1868 st->print("\n\t");
1869 st->print("cmpl [r15_thread + #disarmed_guard_value_offset], #disarmed_guard_value\t");
1870 st->print("\n\t");
1871 st->print("je fast_entry\t");
1872 st->print("\n\t");
1873 st->print("call #nmethod_entry_barrier_stub\t");
1874 st->print("\n\tfast_entry:");
1875 }
1876 st->cr();
1877 }
1878 #endif
1879
1880 void MachPrologNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1881 Compile* C = ra_->C;
1882
1883 int framesize = C->output()->frame_size_in_bytes();
1884 int bangsize = C->output()->bang_size_in_bytes();
1885
1886 if (C->clinit_barrier_on_entry()) {
1887 assert(VM_Version::supports_fast_class_init_checks(), "sanity");
1888 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
1889
1890 Label L_skip_barrier;
1891 Register klass = rscratch1;
1892
1893 __ mov_metadata(klass, C->method()->holder()->constant_encoding());
1894 __ clinit_barrier(klass, &L_skip_barrier /*L_fast_path*/);
1895
1896 __ jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub())); // slow path
1897
1898 __ bind(L_skip_barrier);
1899 }
1900
1901 __ verified_entry(framesize, C->output()->need_stack_bang(bangsize)?bangsize:0, false, C->stub_function() != nullptr);
1902
1903 C->output()->set_frame_complete(__ offset());
1904
1905 if (C->has_mach_constant_base_node()) {
1906 // NOTE: We set the table base offset here because users might be
1907 // emitted before MachConstantBaseNode.
1908 ConstantTable& constant_table = C->output()->constant_table();
5169 // Constant for byte-wide masking
5170 operand immL_255()
5171 %{
5172 predicate(n->get_long() == 255);
5173 match(ConL);
5174
5175 format %{ %}
5176 interface(CONST_INTER);
5177 %}
5178
5179 // Constant for short-wide masking
5180 operand immL_65535()
5181 %{
5182 predicate(n->get_long() == 65535);
5183 match(ConL);
5184
5185 format %{ %}
5186 interface(CONST_INTER);
5187 %}
5188
5189 operand kReg()
5190 %{
5191 constraint(ALLOC_IN_RC(vectmask_reg));
5192 match(RegVectMask);
5193 format %{%}
5194 interface(REG_INTER);
5195 %}
5196
5197 // Register Operands
5198 // Integer Register
5199 operand rRegI()
5200 %{
5201 constraint(ALLOC_IN_RC(int_reg));
5202 match(RegI);
5203
5204 match(rax_RegI);
5205 match(rbx_RegI);
5206 match(rcx_RegI);
5207 match(rdx_RegI);
5208 match(rdi_RegI);
7272 format %{ "movlpd $dst, $mem\t# double" %}
7273 ins_encode %{
7274 __ movdbl($dst$$XMMRegister, $mem$$Address);
7275 %}
7276 ins_pipe(pipe_slow); // XXX
7277 %}
7278
7279 instruct loadD(regD dst, memory mem)
7280 %{
7281 predicate(UseXmmLoadAndClearUpper);
7282 match(Set dst (LoadD mem));
7283
7284 ins_cost(145); // XXX
7285 format %{ "movsd $dst, $mem\t# double" %}
7286 ins_encode %{
7287 __ movdbl($dst$$XMMRegister, $mem$$Address);
7288 %}
7289 ins_pipe(pipe_slow); // XXX
7290 %}
7291
7292 // max = java.lang.Math.max(float a, float b)
7293 instruct maxF_reg_avx10_2(regF dst, regF a, regF b) %{
7294 predicate(VM_Version::supports_avx10_2());
7295 match(Set dst (MaxF a b));
7296 format %{ "maxF $dst, $a, $b" %}
7297 ins_encode %{
7298 __ eminmaxss($dst$$XMMRegister, $a$$XMMRegister, $b$$XMMRegister, AVX10_2_MINMAX_MAX_COMPARE_SIGN);
7299 %}
7300 ins_pipe( pipe_slow );
7301 %}
7302
7303 // max = java.lang.Math.max(float a, float b)
7304 instruct maxF_reg(legRegF dst, legRegF a, legRegF b, legRegF tmp, legRegF atmp, legRegF btmp) %{
7305 predicate(!VM_Version::supports_avx10_2() && UseAVX > 0 && !VLoopReductions::is_reduction(n));
7306 match(Set dst (MaxF a b));
7307 effect(USE a, USE b, TEMP tmp, TEMP atmp, TEMP btmp);
7308 format %{ "maxF $dst, $a, $b \t! using $tmp, $atmp and $btmp as TEMP" %}
7309 ins_encode %{
7310 __ vminmax_fp(Op_MaxV, T_FLOAT, $dst$$XMMRegister, $a$$XMMRegister, $b$$XMMRegister, $tmp$$XMMRegister, $atmp$$XMMRegister, $btmp$$XMMRegister, Assembler::AVX_128bit);
7311 %}
|
1868 st->print("\n\t");
1869 st->print("cmpl [r15_thread + #disarmed_guard_value_offset], #disarmed_guard_value\t");
1870 st->print("\n\t");
1871 st->print("je fast_entry\t");
1872 st->print("\n\t");
1873 st->print("call #nmethod_entry_barrier_stub\t");
1874 st->print("\n\tfast_entry:");
1875 }
1876 st->cr();
1877 }
1878 #endif
1879
1880 void MachPrologNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1881 Compile* C = ra_->C;
1882
1883 int framesize = C->output()->frame_size_in_bytes();
1884 int bangsize = C->output()->bang_size_in_bytes();
1885
1886 if (C->clinit_barrier_on_entry()) {
1887 assert(VM_Version::supports_fast_class_init_checks(), "sanity");
1888 assert(!C->method()->holder()->is_not_initialized() || C->do_clinit_barriers(), "initialization should have been started");
1889
1890 Label L_skip_barrier;
1891 Register klass = rscratch1;
1892
1893 __ mov_metadata(klass, C->method()->holder()->constant_encoding());
1894 __ clinit_barrier(klass, &L_skip_barrier /*L_fast_path*/);
1895
1896 __ jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub())); // slow path
1897
1898 __ bind(L_skip_barrier);
1899 }
1900
1901 __ verified_entry(framesize, C->output()->need_stack_bang(bangsize)?bangsize:0, false, C->stub_function() != nullptr);
1902
1903 C->output()->set_frame_complete(__ offset());
1904
1905 if (C->has_mach_constant_base_node()) {
1906 // NOTE: We set the table base offset here because users might be
1907 // emitted before MachConstantBaseNode.
1908 ConstantTable& constant_table = C->output()->constant_table();
5169 // Constant for byte-wide masking
5170 operand immL_255()
5171 %{
5172 predicate(n->get_long() == 255);
5173 match(ConL);
5174
5175 format %{ %}
5176 interface(CONST_INTER);
5177 %}
5178
5179 // Constant for short-wide masking
5180 operand immL_65535()
5181 %{
5182 predicate(n->get_long() == 65535);
5183 match(ConL);
5184
5185 format %{ %}
5186 interface(CONST_INTER);
5187 %}
5188
5189 // AOT Runtime Constants Address
5190 operand immAOTRuntimeConstantsAddress()
5191 %{
5192 // Check if the address is in the range of AOT Runtime Constants
5193 predicate(AOTRuntimeConstants::contains((address)(n->get_ptr())));
5194 match(ConP);
5195
5196 op_cost(0);
5197 format %{ %}
5198 interface(CONST_INTER);
5199 %}
5200
5201 operand kReg()
5202 %{
5203 constraint(ALLOC_IN_RC(vectmask_reg));
5204 match(RegVectMask);
5205 format %{%}
5206 interface(REG_INTER);
5207 %}
5208
5209 // Register Operands
5210 // Integer Register
5211 operand rRegI()
5212 %{
5213 constraint(ALLOC_IN_RC(int_reg));
5214 match(RegI);
5215
5216 match(rax_RegI);
5217 match(rbx_RegI);
5218 match(rcx_RegI);
5219 match(rdx_RegI);
5220 match(rdi_RegI);
7284 format %{ "movlpd $dst, $mem\t# double" %}
7285 ins_encode %{
7286 __ movdbl($dst$$XMMRegister, $mem$$Address);
7287 %}
7288 ins_pipe(pipe_slow); // XXX
7289 %}
7290
7291 instruct loadD(regD dst, memory mem)
7292 %{
7293 predicate(UseXmmLoadAndClearUpper);
7294 match(Set dst (LoadD mem));
7295
7296 ins_cost(145); // XXX
7297 format %{ "movsd $dst, $mem\t# double" %}
7298 ins_encode %{
7299 __ movdbl($dst$$XMMRegister, $mem$$Address);
7300 %}
7301 ins_pipe(pipe_slow); // XXX
7302 %}
7303
7304 instruct loadAOTRCAddress(rRegP dst, immAOTRuntimeConstantsAddress con)
7305 %{
7306 match(Set dst con);
7307
7308 format %{ "leaq $dst, $con\t# AOT Runtime Constants Address" %}
7309
7310 ins_encode %{
7311 __ load_aotrc_address($dst$$Register, (address)$con$$constant);
7312 %}
7313
7314 ins_pipe(ialu_reg_fat);
7315 %}
7316
7317 // max = java.lang.Math.max(float a, float b)
7318 instruct maxF_reg_avx10_2(regF dst, regF a, regF b) %{
7319 predicate(VM_Version::supports_avx10_2());
7320 match(Set dst (MaxF a b));
7321 format %{ "maxF $dst, $a, $b" %}
7322 ins_encode %{
7323 __ eminmaxss($dst$$XMMRegister, $a$$XMMRegister, $b$$XMMRegister, AVX10_2_MINMAX_MAX_COMPARE_SIGN);
7324 %}
7325 ins_pipe( pipe_slow );
7326 %}
7327
7328 // max = java.lang.Math.max(float a, float b)
7329 instruct maxF_reg(legRegF dst, legRegF a, legRegF b, legRegF tmp, legRegF atmp, legRegF btmp) %{
7330 predicate(!VM_Version::supports_avx10_2() && UseAVX > 0 && !VLoopReductions::is_reduction(n));
7331 match(Set dst (MaxF a b));
7332 effect(USE a, USE b, TEMP tmp, TEMP atmp, TEMP btmp);
7333 format %{ "maxF $dst, $a, $b \t! using $tmp, $atmp and $btmp as TEMP" %}
7334 ins_encode %{
7335 __ vminmax_fp(Op_MaxV, T_FLOAT, $dst$$XMMRegister, $a$$XMMRegister, $b$$XMMRegister, $tmp$$XMMRegister, $atmp$$XMMRegister, $btmp$$XMMRegister, Assembler::AVX_128bit);
7336 %}
|