1868 st->print("\n\t");
1869 st->print("cmpl [r15_thread + #disarmed_guard_value_offset], #disarmed_guard_value\t");
1870 st->print("\n\t");
1871 st->print("je fast_entry\t");
1872 st->print("\n\t");
1873 st->print("call #nmethod_entry_barrier_stub\t");
1874 st->print("\n\tfast_entry:");
1875 }
1876 st->cr();
1877 }
1878 #endif
1879
1880 void MachPrologNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1881 Compile* C = ra_->C;
1882
1883 int framesize = C->output()->frame_size_in_bytes();
1884 int bangsize = C->output()->bang_size_in_bytes();
1885
1886 if (C->clinit_barrier_on_entry()) {
1887 assert(VM_Version::supports_fast_class_init_checks(), "sanity");
1888 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
1889
1890 Label L_skip_barrier;
1891 Register klass = rscratch1;
1892
1893 __ mov_metadata(klass, C->method()->holder()->constant_encoding());
1894 __ clinit_barrier(klass, &L_skip_barrier /*L_fast_path*/);
1895
1896 __ jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub())); // slow path
1897
1898 __ bind(L_skip_barrier);
1899 }
1900
1901 __ verified_entry(framesize, C->output()->need_stack_bang(bangsize)?bangsize:0, false, C->stub_function() != nullptr);
1902
1903 C->output()->set_frame_complete(__ offset());
1904
1905 if (C->has_mach_constant_base_node()) {
1906 // NOTE: We set the table base offset here because users might be
1907 // emitted before MachConstantBaseNode.
1908 ConstantTable& constant_table = C->output()->constant_table();
5121 // Constant for byte-wide masking
5122 operand immL_255()
5123 %{
5124 predicate(n->get_long() == 255);
5125 match(ConL);
5126
5127 format %{ %}
5128 interface(CONST_INTER);
5129 %}
5130
5131 // Constant for short-wide masking
5132 operand immL_65535()
5133 %{
5134 predicate(n->get_long() == 65535);
5135 match(ConL);
5136
5137 format %{ %}
5138 interface(CONST_INTER);
5139 %}
5140
5141 operand kReg()
5142 %{
5143 constraint(ALLOC_IN_RC(vectmask_reg));
5144 match(RegVectMask);
5145 format %{%}
5146 interface(REG_INTER);
5147 %}
5148
5149 // Register Operands
5150 // Integer Register
5151 operand rRegI()
5152 %{
5153 constraint(ALLOC_IN_RC(int_reg));
5154 match(RegI);
5155
5156 match(rax_RegI);
5157 match(rbx_RegI);
5158 match(rcx_RegI);
5159 match(rdx_RegI);
5160 match(rdi_RegI);
7224 format %{ "movlpd $dst, $mem\t# double" %}
7225 ins_encode %{
7226 __ movdbl($dst$$XMMRegister, $mem$$Address);
7227 %}
7228 ins_pipe(pipe_slow); // XXX
7229 %}
7230
7231 instruct loadD(regD dst, memory mem)
7232 %{
7233 predicate(UseXmmLoadAndClearUpper);
7234 match(Set dst (LoadD mem));
7235
7236 ins_cost(145); // XXX
7237 format %{ "movsd $dst, $mem\t# double" %}
7238 ins_encode %{
7239 __ movdbl($dst$$XMMRegister, $mem$$Address);
7240 %}
7241 ins_pipe(pipe_slow); // XXX
7242 %}
7243
7244 // max = java.lang.Math.max(float a, float b)
7245 instruct maxF_avx10_reg(regF dst, regF a, regF b) %{
7246 predicate(VM_Version::supports_avx10_2());
7247 match(Set dst (MaxF a b));
7248 format %{ "maxF $dst, $a, $b" %}
7249 ins_encode %{
7250 __ eminmaxss($dst$$XMMRegister, $a$$XMMRegister, $b$$XMMRegister, AVX10_MINMAX_MAX_COMPARE_SIGN);
7251 %}
7252 ins_pipe( pipe_slow );
7253 %}
7254
7255 // max = java.lang.Math.max(float a, float b)
7256 instruct maxF_reg(legRegF dst, legRegF a, legRegF b, legRegF tmp, legRegF atmp, legRegF btmp) %{
7257 predicate(!VM_Version::supports_avx10_2() && UseAVX > 0 && !VLoopReductions::is_reduction(n));
7258 match(Set dst (MaxF a b));
7259 effect(USE a, USE b, TEMP tmp, TEMP atmp, TEMP btmp);
7260 format %{ "maxF $dst, $a, $b \t! using $tmp, $atmp and $btmp as TEMP" %}
7261 ins_encode %{
7262 __ vminmax_fp(Op_MaxV, T_FLOAT, $dst$$XMMRegister, $a$$XMMRegister, $b$$XMMRegister, $tmp$$XMMRegister, $atmp$$XMMRegister, $btmp$$XMMRegister, Assembler::AVX_128bit);
7263 %}
|
1868 st->print("\n\t");
1869 st->print("cmpl [r15_thread + #disarmed_guard_value_offset], #disarmed_guard_value\t");
1870 st->print("\n\t");
1871 st->print("je fast_entry\t");
1872 st->print("\n\t");
1873 st->print("call #nmethod_entry_barrier_stub\t");
1874 st->print("\n\tfast_entry:");
1875 }
1876 st->cr();
1877 }
1878 #endif
1879
1880 void MachPrologNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1881 Compile* C = ra_->C;
1882
1883 int framesize = C->output()->frame_size_in_bytes();
1884 int bangsize = C->output()->bang_size_in_bytes();
1885
1886 if (C->clinit_barrier_on_entry()) {
1887 assert(VM_Version::supports_fast_class_init_checks(), "sanity");
1888 assert(!C->method()->holder()->is_not_initialized() || C->do_clinit_barriers(), "initialization should have been started");
1889
1890 Label L_skip_barrier;
1891 Register klass = rscratch1;
1892
1893 __ mov_metadata(klass, C->method()->holder()->constant_encoding());
1894 __ clinit_barrier(klass, &L_skip_barrier /*L_fast_path*/);
1895
1896 __ jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub())); // slow path
1897
1898 __ bind(L_skip_barrier);
1899 }
1900
1901 __ verified_entry(framesize, C->output()->need_stack_bang(bangsize)?bangsize:0, false, C->stub_function() != nullptr);
1902
1903 C->output()->set_frame_complete(__ offset());
1904
1905 if (C->has_mach_constant_base_node()) {
1906 // NOTE: We set the table base offset here because users might be
1907 // emitted before MachConstantBaseNode.
1908 ConstantTable& constant_table = C->output()->constant_table();
5121 // Constant for byte-wide masking
5122 operand immL_255()
5123 %{
5124 predicate(n->get_long() == 255);
5125 match(ConL);
5126
5127 format %{ %}
5128 interface(CONST_INTER);
5129 %}
5130
5131 // Constant for short-wide masking
5132 operand immL_65535()
5133 %{
5134 predicate(n->get_long() == 65535);
5135 match(ConL);
5136
5137 format %{ %}
5138 interface(CONST_INTER);
5139 %}
5140
5141 // AOT Runtime Constants Address
5142 operand immAOTRuntimeConstantsAddress()
5143 %{
5144 // Check if the address is in the range of AOT Runtime Constants
5145 predicate(AOTRuntimeConstants::contains((address)(n->get_ptr())));
5146 match(ConP);
5147
5148 op_cost(0);
5149 format %{ %}
5150 interface(CONST_INTER);
5151 %}
5152
5153 operand kReg()
5154 %{
5155 constraint(ALLOC_IN_RC(vectmask_reg));
5156 match(RegVectMask);
5157 format %{%}
5158 interface(REG_INTER);
5159 %}
5160
5161 // Register Operands
5162 // Integer Register
5163 operand rRegI()
5164 %{
5165 constraint(ALLOC_IN_RC(int_reg));
5166 match(RegI);
5167
5168 match(rax_RegI);
5169 match(rbx_RegI);
5170 match(rcx_RegI);
5171 match(rdx_RegI);
5172 match(rdi_RegI);
7236 format %{ "movlpd $dst, $mem\t# double" %}
7237 ins_encode %{
7238 __ movdbl($dst$$XMMRegister, $mem$$Address);
7239 %}
7240 ins_pipe(pipe_slow); // XXX
7241 %}
7242
7243 instruct loadD(regD dst, memory mem)
7244 %{
7245 predicate(UseXmmLoadAndClearUpper);
7246 match(Set dst (LoadD mem));
7247
7248 ins_cost(145); // XXX
7249 format %{ "movsd $dst, $mem\t# double" %}
7250 ins_encode %{
7251 __ movdbl($dst$$XMMRegister, $mem$$Address);
7252 %}
7253 ins_pipe(pipe_slow); // XXX
7254 %}
7255
7256 instruct loadAOTRCAddress(rRegP dst, immAOTRuntimeConstantsAddress con)
7257 %{
7258 match(Set dst con);
7259
7260 format %{ "leaq $dst, $con\t# AOT Runtime Constants Address" %}
7261
7262 ins_encode %{
7263 __ load_aotrc_address($dst$$Register, (address)$con$$constant);
7264 %}
7265
7266 ins_pipe(ialu_reg_fat);
7267 %}
7268
7269 // max = java.lang.Math.max(float a, float b)
7270 instruct maxF_avx10_reg(regF dst, regF a, regF b) %{
7271 predicate(VM_Version::supports_avx10_2());
7272 match(Set dst (MaxF a b));
7273 format %{ "maxF $dst, $a, $b" %}
7274 ins_encode %{
7275 __ eminmaxss($dst$$XMMRegister, $a$$XMMRegister, $b$$XMMRegister, AVX10_MINMAX_MAX_COMPARE_SIGN);
7276 %}
7277 ins_pipe( pipe_slow );
7278 %}
7279
7280 // max = java.lang.Math.max(float a, float b)
7281 instruct maxF_reg(legRegF dst, legRegF a, legRegF b, legRegF tmp, legRegF atmp, legRegF btmp) %{
7282 predicate(!VM_Version::supports_avx10_2() && UseAVX > 0 && !VLoopReductions::is_reduction(n));
7283 match(Set dst (MaxF a b));
7284 effect(USE a, USE b, TEMP tmp, TEMP atmp, TEMP btmp);
7285 format %{ "maxF $dst, $a, $b \t! using $tmp, $atmp and $btmp as TEMP" %}
7286 ins_encode %{
7287 __ vminmax_fp(Op_MaxV, T_FLOAT, $dst$$XMMRegister, $a$$XMMRegister, $b$$XMMRegister, $tmp$$XMMRegister, $atmp$$XMMRegister, $btmp$$XMMRegister, Assembler::AVX_128bit);
7288 %}
|