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src/hotspot/cpu/aarch64/c2_MacroAssembler_aarch64.hpp

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 1 /*
 2  * Copyright (c) 2020, 2021, Oracle and/or its affiliates. All rights reserved.
 3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 4  *
 5  * This code is free software; you can redistribute it and/or modify it
 6  * under the terms of the GNU General Public License version 2 only, as
 7  * published by the Free Software Foundation.
 8  *
 9  * This code is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12  * version 2 for more details (a copy is included in the LICENSE file that
13  * accompanied this code).
14  *
15  * You should have received a copy of the GNU General Public License version
16  * 2 along with this work; if not, write to the Free Software Foundation,
17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18  *
19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20  * or visit www.oracle.com if you need additional information or have any
21  * questions.
22  *
23  */
24 
25 #ifndef CPU_AARCH64_C2_MACROASSEMBLER_AARCH64_HPP
26 #define CPU_AARCH64_C2_MACROASSEMBLER_AARCH64_HPP
27 
28 // C2_MacroAssembler contains high-level macros for C2
29 
30  public:






31 
32   void string_compare(Register str1, Register str2,
33                       Register cnt1, Register cnt2, Register result,
34                       Register tmp1, Register tmp2, FloatRegister vtmp1,
35                       FloatRegister vtmp2, FloatRegister vtmp3, int ae);
36 
37   void string_indexof(Register str1, Register str2,
38                       Register cnt1, Register cnt2,
39                       Register tmp1, Register tmp2,
40                       Register tmp3, Register tmp4,
41                       Register tmp5, Register tmp6,
42                       int int_cnt1, Register result, int ae);
43 
44   void string_indexof_char(Register str1, Register cnt1,
45                            Register ch, Register result,
46                            Register tmp1, Register tmp2, Register tmp3);
47 
48   void stringL_indexof_char(Register str1, Register cnt1,
49                            Register ch, Register result,
50                            Register tmp1, Register tmp2, Register tmp3);
51 
52   // SIMD&FP comparison
53   void neon_compare(FloatRegister dst, BasicType bt, FloatRegister src1,
54                     FloatRegister src2, int cond, bool isQ);
55 


56 #endif // CPU_AARCH64_C2_MACROASSEMBLER_AARCH64_HPP

 1 /*
 2  * Copyright (c) 2020, 2024, Oracle and/or its affiliates. All rights reserved.
 3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 4  *
 5  * This code is free software; you can redistribute it and/or modify it
 6  * under the terms of the GNU General Public License version 2 only, as
 7  * published by the Free Software Foundation.
 8  *
 9  * This code is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12  * version 2 for more details (a copy is included in the LICENSE file that
13  * accompanied this code).
14  *
15  * You should have received a copy of the GNU General Public License version
16  * 2 along with this work; if not, write to the Free Software Foundation,
17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18  *
19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20  * or visit www.oracle.com if you need additional information or have any
21  * questions.
22  *
23  */
24 
25 #ifndef CPU_AARCH64_C2_MACROASSEMBLER_AARCH64_HPP
26 #define CPU_AARCH64_C2_MACROASSEMBLER_AARCH64_HPP
27 
28 // C2_MacroAssembler contains high-level macros for C2
29 
30  public:
31   // Code used by cmpFastLock and cmpFastUnlock mach instructions in .ad file.
32   void fast_lock(Register object, Register box, Register tmp, Register tmp2, Register tmp3);
33   void fast_unlock(Register object, Register box, Register tmp, Register tmp2);
34   // Code used by cmpFastLockLightweight and cmpFastUnlockLightweight mach instructions in .ad file.
35   void fast_lock_lightweight(Register object, Register t1, Register t2, Register t3);
36   void fast_unlock_lightweight(Register object, Register t1, Register t2, Register t3);
37 
38   void string_compare(Register str1, Register str2,
39                       Register cnt1, Register cnt2, Register result,
40                       Register tmp1, Register tmp2, FloatRegister vtmp1,
41                       FloatRegister vtmp2, FloatRegister vtmp3, int ae);
42 
43   void string_indexof(Register str1, Register str2,
44                       Register cnt1, Register cnt2,
45                       Register tmp1, Register tmp2,
46                       Register tmp3, Register tmp4,
47                       Register tmp5, Register tmp6,
48                       int int_cnt1, Register result, int ae);
49 
50   void string_indexof_char(Register str1, Register cnt1,
51                            Register ch, Register result,
52                            Register tmp1, Register tmp2, Register tmp3);
53 
54   void stringL_indexof_char(Register str1, Register cnt1,
55                            Register ch, Register result,
56                            Register tmp1, Register tmp2, Register tmp3);
57 
58   // SIMD&FP comparison
59   void neon_compare(FloatRegister dst, BasicType bt, FloatRegister src1,
60                     FloatRegister src2, int cond, bool isQ);
61 
62   void load_nklass_compact(Register dst, Register obj, Register index, int scale, int disp);
63 
64 #endif // CPU_AARCH64_C2_MACROASSEMBLER_AARCH64_HPP
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