174 b = b && is_ori(*p_inst);
175 } else if (is_lis(*p_inst)) {
176 p_inst++;
177 b = b && is_ori(*p_inst++);
178 b = b && is_ori(*p_inst);
179 // TODO: could enhance reliability by adding is_insrdi
180 } else return false;
181 return b;
182 }
183
184 inline void MacroAssembler::set_oop_constant(jobject obj, Register d) {
185 set_oop(constant_oop_address(obj), d);
186 }
187
188 inline void MacroAssembler::set_oop(AddressLiteral obj_addr, Register d) {
189 assert(obj_addr.rspec().type() == relocInfo::oop_type, "must be an oop reloc");
190 load_const(d, obj_addr);
191 }
192
193 inline void MacroAssembler::pd_patch_instruction(address branch, address target, const char* file, int line) {
194 jint& stub_inst = *(jint*) branch;
195 stub_inst = patched_branch(target - branch, stub_inst, 0);
196 }
197
198 // Relocation of conditional far branches.
199 inline bool MacroAssembler::is_bc_far_variant1_at(address instruction_addr) {
200 // Variant 1, the 1st instruction contains the destination address:
201 //
202 // bcxx DEST
203 // nop
204 //
205 const int instruction_1 = *(int*)(instruction_addr);
206 const int instruction_2 = *(int*)(instruction_addr + 4);
207 return is_bcxx(instruction_1) &&
208 (inv_bd_field(instruction_1, (intptr_t)instruction_addr) != (intptr_t)(instruction_addr + 2*4)) &&
209 is_nop(instruction_2);
210 }
211
212 // Relocation of conditional far branches.
213 inline bool MacroAssembler::is_bc_far_variant2_at(address instruction_addr) {
214 // Variant 2, the 2nd instruction contains the destination address:
215 //
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174 b = b && is_ori(*p_inst);
175 } else if (is_lis(*p_inst)) {
176 p_inst++;
177 b = b && is_ori(*p_inst++);
178 b = b && is_ori(*p_inst);
179 // TODO: could enhance reliability by adding is_insrdi
180 } else return false;
181 return b;
182 }
183
184 inline void MacroAssembler::set_oop_constant(jobject obj, Register d) {
185 set_oop(constant_oop_address(obj), d);
186 }
187
188 inline void MacroAssembler::set_oop(AddressLiteral obj_addr, Register d) {
189 assert(obj_addr.rspec().type() == relocInfo::oop_type, "must be an oop reloc");
190 load_const(d, obj_addr);
191 }
192
193 inline void MacroAssembler::pd_patch_instruction(address branch, address target, const char* file, int line) {
194 if (is_branch(branch)) {
195 jint& stub_inst = *(jint*) branch;
196 stub_inst = patched_branch(target - branch, stub_inst, 0);
197 } else if (is_calculate_address_from_global_toc_at(branch + BytesPerInstWord, branch)) {
198 const address inst1_addr = branch;
199 const address inst2_addr = branch + BytesPerInstWord;
200 patch_calculate_address_from_global_toc_at(inst2_addr, inst1_addr, target);
201 } else if (is_load_const_at(branch)) {
202 patch_const(branch, (long)target);
203 } else {
204 assert(false, "instruction at " PTR_FORMAT " not recognized", p2i(branch));
205 }
206 }
207
208 // Relocation of conditional far branches.
209 inline bool MacroAssembler::is_bc_far_variant1_at(address instruction_addr) {
210 // Variant 1, the 1st instruction contains the destination address:
211 //
212 // bcxx DEST
213 // nop
214 //
215 const int instruction_1 = *(int*)(instruction_addr);
216 const int instruction_2 = *(int*)(instruction_addr + 4);
217 return is_bcxx(instruction_1) &&
218 (inv_bd_field(instruction_1, (intptr_t)instruction_addr) != (intptr_t)(instruction_addr + 2*4)) &&
219 is_nop(instruction_2);
220 }
221
222 // Relocation of conditional far branches.
223 inline bool MacroAssembler::is_bc_far_variant2_at(address instruction_addr) {
224 // Variant 2, the 2nd instruction contains the destination address:
225 //
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