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src/hotspot/cpu/ppc/macroAssembler_ppc.hpp

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 98   // ppc.ad for an example.
 99   void align_prefix();
100 
101   //
102   // Constants, loading constants, TOC support
103   //
104 
105   // Address of the global TOC.
106   inline static address global_toc();
107   // Offset of given address to the global TOC.
108   inline static int offset_to_global_toc(const address addr);
109 
110   // Address of TOC of the current method.
111   inline address method_toc();
112   // Offset of given address to TOC of the current method.
113   inline int offset_to_method_toc(const address addr);
114 
115   // Global TOC.
116   void calculate_address_from_global_toc(Register dst, address addr,
117                                          bool hi16 = true, bool lo16 = true,
118                                          bool add_relocation = true, bool emit_dummy_addr = false);






119   inline void calculate_address_from_global_toc_hi16only(Register dst, address addr) {
120     calculate_address_from_global_toc(dst, addr, true, false);
121   };
122   inline void calculate_address_from_global_toc_lo16only(Register dst, address addr) {
123     calculate_address_from_global_toc(dst, addr, false, true);
124   };
125 
126   inline static bool is_calculate_address_from_global_toc_at(address a, address bound);
127   // Returns address of first instruction in sequence.
128   static address patch_calculate_address_from_global_toc_at(address a, address bound, address addr);
129   static address get_address_of_calculate_address_from_global_toc_at(address a, address addr);
130 
131 #ifdef _LP64
132   // Patch narrow oop constant.
133   inline static bool is_set_narrow_oop(address a, address bound);
134   // Returns address of first instruction in sequence.
135   static address patch_set_narrow_oop(address a, address bound, narrowOop data);
136   static narrowOop get_narrow_oop(address a, address bound);
137 #endif
138 

267   }
268   inline static bool is_b64_patchable_pcrelative_at(address instruction_addr) {
269     return is_bxx64_patchable_pcrelative_at(instruction_addr, /*link=*/false);
270   }
271   inline static void set_dest_of_b64_patchable_at(address instruction_addr, address target) {
272     set_dest_of_bxx64_patchable_at(instruction_addr, target, /*link=*/false);
273   }
274   inline static address get_dest_of_b64_patchable_at(address instruction_addr) {
275     return get_dest_of_bxx64_patchable_at(instruction_addr, /*link=*/false);
276   }
277 
278   //
279   // Support for frame handling
280   //
281 
282   // some ABI-related functions
283 
284   // Clobbers all volatile, (non-floating-point) general-purpose registers for debugging purposes.
285   // This is especially useful for making calls to the JRT in places in which this hasn't been done before;
286   // e.g. with the introduction of LRBs (load reference barriers) for concurrent garbage collection.
287   void clobber_volatile_gprs(Register excluded_register = noreg);



288   void clobber_carg_stack_slots(Register tmp);
289 
290   void save_nonvolatile_gprs(   Register dst_base, int offset);
291   void restore_nonvolatile_gprs(Register src_base, int offset);
292 
293   enum {
294     num_volatile_gp_regs = 11,
295     num_volatile_fp_regs = 14,
296     num_volatile_regs = num_volatile_gp_regs + num_volatile_fp_regs
297   };
298 
299   void save_volatile_gprs(   Register dst_base, int offset,
300                              bool include_fp_regs = true, bool include_R3_RET_reg = true);
301   void restore_volatile_gprs(Register src_base, int offset,
302                              bool include_fp_regs = true, bool include_R3_RET_reg = true);
303   void save_LR(Register tmp);
304   void restore_LR(Register tmp);
305   void save_LR_CR(Register tmp);     // tmp contains LR on return.
306   void restore_LR_CR(Register tmp);
307 

381 
382   // It is imperative that all calls into the VM are handled via the
383   // call_VM macros. They make sure that the stack linkage is setup
384   // correctly. call_VM's correspond to ENTRY/ENTRY_X entry points
385   // while call_VM_leaf's correspond to LEAF entry points.
386   //
387   // This is the base routine called by the different versions of
388   // call_VM. The interpreter may customize this version by overriding
389   // it for its purposes (e.g., to save/restore additional registers
390   // when doing a VM call).
391   //
392   // If no last_java_sp is specified (noreg) then SP will be used instead.
393   virtual void call_VM_base(
394      // where an oop-result ends up if any; use noreg otherwise
395     Register        oop_result,
396     // to set up last_Java_frame in stubs; use noreg otherwise
397     Register        last_java_sp,
398     // the entry point
399     address         entry_point,
400     // flag which indicates if exception should be checked
401     bool            check_exception = true

402   );
403 
404   // Support for VM calls. This is the base routine called by the
405   // different versions of call_VM_leaf. The interpreter may customize
406   // this version by overriding it for its purposes (e.g., to
407   // save/restore additional registers when doing a VM call).
408   void call_VM_leaf_base(address entry_point);
409 
410  public:
411   // Call into the VM.
412   // Passes the thread pointer (in R3_ARG1) as a prepended argument.
413   // Makes sure oop return values are visible to the GC.
414   void call_VM(Register oop_result, address entry_point, bool check_exceptions = true);
415   void call_VM(Register oop_result, address entry_point, Register arg_1, bool check_exceptions = true);
416   void call_VM(Register oop_result, address entry_point, Register arg_1, Register arg_2, bool check_exceptions = true);
417   void call_VM(Register oop_result, address entry_point, Register arg_1, Register arg_2, Register arg3, bool check_exceptions = true);
418   void call_VM_leaf(address entry_point);
419   void call_VM_leaf(address entry_point, Register arg_1);
420   void call_VM_leaf(address entry_point, Register arg_1, Register arg_2);
421   void call_VM_leaf(address entry_point, Register arg_1, Register arg_2, Register arg_3);
422 
423   // Call a stub function via a function descriptor, but don't save
424   // TOC before call, don't setup TOC and ENV for call, and don't
425   // restore TOC after call. Updates and returns _last_calls_return_pc.
426   inline address call_stub(Register function_entry);
427   inline void call_stub_and_return_to(Register function_entry, Register return_pc);
428 
429   void post_call_nop();
430   static bool is_post_call_nop(int instr_bits) {
431     const uint32_t nineth_bit = opp_u_field(1, 9, 9);
432     const uint32_t opcode_mask = 0b111110 << OPCODE_SHIFT;
433     const uint32_t pcn_mask = opcode_mask | nineth_bit;
434     return (instr_bits & pcn_mask) == (Assembler::CMPLI_OPCODE | nineth_bit);

678   void compiler_fast_lock_lightweight_object(ConditionRegister flag, Register oop, Register box,
679                                              Register tmp1, Register tmp2, Register tmp3);
680 
681   void compiler_fast_unlock_lightweight_object(ConditionRegister flag, Register oop, Register box,
682                                                Register tmp1, Register tmp2, Register tmp3);
683 
684   // Check if safepoint requested and if so branch
685   void safepoint_poll(Label& slow_path, Register temp, bool at_return, bool in_nmethod);
686 
687   void resolve_jobject(Register value, Register tmp1, Register tmp2,
688                        MacroAssembler::PreservationLevel preservation_level);
689   void resolve_global_jobject(Register value, Register tmp1, Register tmp2,
690                               MacroAssembler::PreservationLevel preservation_level);
691 
692   // Support for managing the JavaThread pointer (i.e.; the reference to
693   // thread-local information).
694 
695   // Support for last Java frame (but use call_VM instead where possible):
696   // access R16_thread->last_Java_sp.
697   void set_last_Java_frame(Register last_java_sp, Register last_Java_pc);
698   void reset_last_Java_frame(void);
699   void set_top_ijava_frame_at_SP_as_last_Java_frame(Register sp, Register tmp1);
700 
701   // Read vm result from thread: oop_result = R16_thread->result;
702   void get_vm_result  (Register oop_result);
703   void get_vm_result_2(Register metadata_result);
704 
705   static bool needs_explicit_null_check(intptr_t offset);
706   static bool uses_implicit_null_check(void* address);
707 
708   // Trap-instruction-based checks.
709   // Range checks can be distinguished from zero checks as they check 32 bit,
710   // zero checks all 64 bits (tw, td).
711   inline void trap_null_check(Register a, trap_to_bits cmp = traptoEqual);
712   static bool is_trap_null_check(int x) {
713     return is_tdi(x, traptoEqual,               -1/*any reg*/, 0) ||
714            is_tdi(x, traptoGreaterThanUnsigned, -1/*any reg*/, 0);
715   }
716 
717   inline void trap_ic_miss_check(Register a, Register b);
718   static bool is_trap_ic_miss_check(int x) {
719     return is_td(x, traptoGreaterThanUnsigned | traptoLessThanUnsigned, -1/*any reg*/, -1/*any reg*/);

892       const VectorRegister vRb, const Register k);
893 
894  public:
895   void sha256(bool multi_block);
896   void sha512(bool multi_block);
897 
898   void cache_wb(Address line);
899   void cache_wbsync(bool is_presync);
900 
901   //
902   // Debugging
903   //
904 
905   // assert on cr0
906   void asm_assert(bool check_equal, const char* msg);
907   void asm_assert_eq(const char* msg) { asm_assert(true, msg); }
908   void asm_assert_ne(const char* msg) { asm_assert(false, msg); }
909 
910  private:
911   void asm_assert_mems_zero(bool check_equal, int size, int mem_offset, Register mem_base,
912                             const char* msg);
913 
914  public:
915 
916   void asm_assert_mem8_is_zero(int mem_offset, Register mem_base, const char* msg) {
917     asm_assert_mems_zero(true,  8, mem_offset, mem_base, msg);
918   }
919   void asm_assert_mem8_isnot_zero(int mem_offset, Register mem_base, const char* msg) {
920     asm_assert_mems_zero(false, 8, mem_offset, mem_base, msg);
921   }
922 
923   // Calls verify_oop. If UseCompressedOops is on, decodes the oop.
924   // Preserves reg.
925   void verify_coop(Register reg, const char*);
926   // Emit code to verify that reg contains a valid oop if +VerifyOops is set.
927   void verify_oop(Register reg, const char* s = "broken oop");
928   void verify_oop_addr(RegisterOrConstant offs, Register base, const char* s = "contains broken oop");
929 
930   // TODO: verify method and klass metadata (compare against vptr?)
931   void _verify_method_ptr(Register reg, const char * msg, const char * file, int line) {}
932   void _verify_klass_ptr(Register reg, const char * msg, const char * file, int line) {}

 98   // ppc.ad for an example.
 99   void align_prefix();
100 
101   //
102   // Constants, loading constants, TOC support
103   //
104 
105   // Address of the global TOC.
106   inline static address global_toc();
107   // Offset of given address to the global TOC.
108   inline static int offset_to_global_toc(const address addr);
109 
110   // Address of TOC of the current method.
111   inline address method_toc();
112   // Offset of given address to TOC of the current method.
113   inline int offset_to_method_toc(const address addr);
114 
115   // Global TOC.
116   void calculate_address_from_global_toc(Register dst, address addr,
117                                          bool hi16 = true, bool lo16 = true,
118                                          bool add_relocation = true, bool emit_dummy_addr = false,
119                                          bool add_addr_to_reloc = true);
120   void calculate_address_from_global_toc(Register dst, Label& addr,
121                                          bool hi16 = true, bool lo16 = true,
122                                          bool add_relocation = true, bool emit_dummy_addr = false) {
123     calculate_address_from_global_toc(dst, target(addr), hi16, lo16, add_relocation, emit_dummy_addr, false);
124   }
125   inline void calculate_address_from_global_toc_hi16only(Register dst, address addr) {
126     calculate_address_from_global_toc(dst, addr, true, false);
127   };
128   inline void calculate_address_from_global_toc_lo16only(Register dst, address addr) {
129     calculate_address_from_global_toc(dst, addr, false, true);
130   };
131 
132   inline static bool is_calculate_address_from_global_toc_at(address a, address bound);
133   // Returns address of first instruction in sequence.
134   static address patch_calculate_address_from_global_toc_at(address a, address bound, address addr);
135   static address get_address_of_calculate_address_from_global_toc_at(address a, address addr);
136 
137 #ifdef _LP64
138   // Patch narrow oop constant.
139   inline static bool is_set_narrow_oop(address a, address bound);
140   // Returns address of first instruction in sequence.
141   static address patch_set_narrow_oop(address a, address bound, narrowOop data);
142   static narrowOop get_narrow_oop(address a, address bound);
143 #endif
144 

273   }
274   inline static bool is_b64_patchable_pcrelative_at(address instruction_addr) {
275     return is_bxx64_patchable_pcrelative_at(instruction_addr, /*link=*/false);
276   }
277   inline static void set_dest_of_b64_patchable_at(address instruction_addr, address target) {
278     set_dest_of_bxx64_patchable_at(instruction_addr, target, /*link=*/false);
279   }
280   inline static address get_dest_of_b64_patchable_at(address instruction_addr) {
281     return get_dest_of_bxx64_patchable_at(instruction_addr, /*link=*/false);
282   }
283 
284   //
285   // Support for frame handling
286   //
287 
288   // some ABI-related functions
289 
290   // Clobbers all volatile, (non-floating-point) general-purpose registers for debugging purposes.
291   // This is especially useful for making calls to the JRT in places in which this hasn't been done before;
292   // e.g. with the introduction of LRBs (load reference barriers) for concurrent garbage collection.
293   void clobber_volatile_gprs(Register excluded_register = noreg) NOT_DEBUG_RETURN;
294   // Load bad values into registers that are nonvolatile according to the ABI except R16_thread and R29_TOC.
295   // This is done after vthread preemption and before vthread resume.
296   void clobber_nonvolatile_registers() NOT_DEBUG_RETURN;
297   void clobber_carg_stack_slots(Register tmp);
298 
299   void save_nonvolatile_gprs(   Register dst_base, int offset);
300   void restore_nonvolatile_gprs(Register src_base, int offset);
301 
302   enum {
303     num_volatile_gp_regs = 11,
304     num_volatile_fp_regs = 14,
305     num_volatile_regs = num_volatile_gp_regs + num_volatile_fp_regs
306   };
307 
308   void save_volatile_gprs(   Register dst_base, int offset,
309                              bool include_fp_regs = true, bool include_R3_RET_reg = true);
310   void restore_volatile_gprs(Register src_base, int offset,
311                              bool include_fp_regs = true, bool include_R3_RET_reg = true);
312   void save_LR(Register tmp);
313   void restore_LR(Register tmp);
314   void save_LR_CR(Register tmp);     // tmp contains LR on return.
315   void restore_LR_CR(Register tmp);
316 

390 
391   // It is imperative that all calls into the VM are handled via the
392   // call_VM macros. They make sure that the stack linkage is setup
393   // correctly. call_VM's correspond to ENTRY/ENTRY_X entry points
394   // while call_VM_leaf's correspond to LEAF entry points.
395   //
396   // This is the base routine called by the different versions of
397   // call_VM. The interpreter may customize this version by overriding
398   // it for its purposes (e.g., to save/restore additional registers
399   // when doing a VM call).
400   //
401   // If no last_java_sp is specified (noreg) then SP will be used instead.
402   virtual void call_VM_base(
403      // where an oop-result ends up if any; use noreg otherwise
404     Register        oop_result,
405     // to set up last_Java_frame in stubs; use noreg otherwise
406     Register        last_java_sp,
407     // the entry point
408     address         entry_point,
409     // flag which indicates if exception should be checked
410     bool            check_exception = true,
411     Label* last_java_pc = nullptr
412   );
413 
414   // Support for VM calls. This is the base routine called by the
415   // different versions of call_VM_leaf. The interpreter may customize
416   // this version by overriding it for its purposes (e.g., to
417   // save/restore additional registers when doing a VM call).
418   void call_VM_leaf_base(address entry_point);
419 
420  public:
421   // Call into the VM.
422   // Passes the thread pointer (in R3_ARG1) as a prepended argument.
423   // Makes sure oop return values are visible to the GC.
424   void call_VM(Register oop_result, address entry_point, bool check_exceptions = true, Label* last_java_pc = nullptr);
425   void call_VM(Register oop_result, address entry_point, Register arg_1, bool check_exceptions = true);
426   void call_VM(Register oop_result, address entry_point, Register arg_1, Register arg_2, bool check_exceptions = true);
427   void call_VM(Register oop_result, address entry_point, Register arg_1, Register arg_2, Register arg3, bool check_exceptions = true);
428   void call_VM_leaf(address entry_point);
429   void call_VM_leaf(address entry_point, Register arg_1);
430   void call_VM_leaf(address entry_point, Register arg_1, Register arg_2);
431   void call_VM_leaf(address entry_point, Register arg_1, Register arg_2, Register arg_3);
432 
433   // Call a stub function via a function descriptor, but don't save
434   // TOC before call, don't setup TOC and ENV for call, and don't
435   // restore TOC after call. Updates and returns _last_calls_return_pc.
436   inline address call_stub(Register function_entry);
437   inline void call_stub_and_return_to(Register function_entry, Register return_pc);
438 
439   void post_call_nop();
440   static bool is_post_call_nop(int instr_bits) {
441     const uint32_t nineth_bit = opp_u_field(1, 9, 9);
442     const uint32_t opcode_mask = 0b111110 << OPCODE_SHIFT;
443     const uint32_t pcn_mask = opcode_mask | nineth_bit;
444     return (instr_bits & pcn_mask) == (Assembler::CMPLI_OPCODE | nineth_bit);

688   void compiler_fast_lock_lightweight_object(ConditionRegister flag, Register oop, Register box,
689                                              Register tmp1, Register tmp2, Register tmp3);
690 
691   void compiler_fast_unlock_lightweight_object(ConditionRegister flag, Register oop, Register box,
692                                                Register tmp1, Register tmp2, Register tmp3);
693 
694   // Check if safepoint requested and if so branch
695   void safepoint_poll(Label& slow_path, Register temp, bool at_return, bool in_nmethod);
696 
697   void resolve_jobject(Register value, Register tmp1, Register tmp2,
698                        MacroAssembler::PreservationLevel preservation_level);
699   void resolve_global_jobject(Register value, Register tmp1, Register tmp2,
700                               MacroAssembler::PreservationLevel preservation_level);
701 
702   // Support for managing the JavaThread pointer (i.e.; the reference to
703   // thread-local information).
704 
705   // Support for last Java frame (but use call_VM instead where possible):
706   // access R16_thread->last_Java_sp.
707   void set_last_Java_frame(Register last_java_sp, Register last_Java_pc);
708   void reset_last_Java_frame(bool check_last_java_sp = true);
709   void set_top_ijava_frame_at_SP_as_last_Java_frame(Register sp, Register tmp1, Label* jpc = nullptr);
710 
711   // Read vm result from thread: oop_result = R16_thread->result;
712   void get_vm_result  (Register oop_result);
713   void get_vm_result_2(Register metadata_result);
714 
715   static bool needs_explicit_null_check(intptr_t offset);
716   static bool uses_implicit_null_check(void* address);
717 
718   // Trap-instruction-based checks.
719   // Range checks can be distinguished from zero checks as they check 32 bit,
720   // zero checks all 64 bits (tw, td).
721   inline void trap_null_check(Register a, trap_to_bits cmp = traptoEqual);
722   static bool is_trap_null_check(int x) {
723     return is_tdi(x, traptoEqual,               -1/*any reg*/, 0) ||
724            is_tdi(x, traptoGreaterThanUnsigned, -1/*any reg*/, 0);
725   }
726 
727   inline void trap_ic_miss_check(Register a, Register b);
728   static bool is_trap_ic_miss_check(int x) {
729     return is_td(x, traptoGreaterThanUnsigned | traptoLessThanUnsigned, -1/*any reg*/, -1/*any reg*/);

902       const VectorRegister vRb, const Register k);
903 
904  public:
905   void sha256(bool multi_block);
906   void sha512(bool multi_block);
907 
908   void cache_wb(Address line);
909   void cache_wbsync(bool is_presync);
910 
911   //
912   // Debugging
913   //
914 
915   // assert on cr0
916   void asm_assert(bool check_equal, const char* msg);
917   void asm_assert_eq(const char* msg) { asm_assert(true, msg); }
918   void asm_assert_ne(const char* msg) { asm_assert(false, msg); }
919 
920  private:
921   void asm_assert_mems_zero(bool check_equal, int size, int mem_offset, Register mem_base,
922                             const char* msg) NOT_DEBUG_RETURN;
923 
924  public:
925 
926   void asm_assert_mem8_is_zero(int mem_offset, Register mem_base, const char* msg) {
927     asm_assert_mems_zero(true,  8, mem_offset, mem_base, msg);
928   }
929   void asm_assert_mem8_isnot_zero(int mem_offset, Register mem_base, const char* msg) {
930     asm_assert_mems_zero(false, 8, mem_offset, mem_base, msg);
931   }
932 
933   // Calls verify_oop. If UseCompressedOops is on, decodes the oop.
934   // Preserves reg.
935   void verify_coop(Register reg, const char*);
936   // Emit code to verify that reg contains a valid oop if +VerifyOops is set.
937   void verify_oop(Register reg, const char* s = "broken oop");
938   void verify_oop_addr(RegisterOrConstant offs, Register base, const char* s = "contains broken oop");
939 
940   // TODO: verify method and klass metadata (compare against vptr?)
941   void _verify_method_ptr(Register reg, const char * msg, const char * file, int line) {}
942   void _verify_klass_ptr(Register reg, const char * msg, const char * file, int line) {}
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