17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18  *
19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20  * or visit www.oracle.com if you need additional information or have any
21  * questions.
22  *
23  */
24 
25 #ifndef CPU_X86_GLOBALDEFINITIONS_X86_HPP
26 #define CPU_X86_GLOBALDEFINITIONS_X86_HPP
27 
28 const int StackAlignmentInBytes  = 16;
29 const size_t pd_segfault_address = 1024;
30 
31 // Indicates whether the C calling conventions require that
32 // 32-bit integer argument values are extended to 64 bits.
33 const bool CCallingConventionRequiresIntsAsLongs = false;
34 
35 #define SUPPORTS_NATIVE_CX8
36 

37 #define SUPPORT_MONITOR_COUNT

38 
39 #define CPU_MULTI_COPY_ATOMIC
40 
41 // The expected size in bytes of a cache line.
42 #define DEFAULT_CACHE_LINE_SIZE 64
43 
44 // The default padding size for data structures to avoid false sharing.
45 #ifdef _LP64
46 // The common wisdom is that adjacent cache line prefetchers on some hardware
47 // may pull two cache lines on access, so we have to pessimistically assume twice
48 // the cache line size for padding. TODO: Check if this is still true for modern
49 // hardware. If not, DEFAULT_CACHE_LINE_SIZE might as well suffice.
50 #define DEFAULT_PADDING_SIZE (DEFAULT_CACHE_LINE_SIZE*2)
51 #else
52 #define DEFAULT_PADDING_SIZE DEFAULT_CACHE_LINE_SIZE
53 #endif
54 
55 #if defined(LINUX) || defined(__APPLE__)
56 #define SUPPORT_RESERVED_STACK_AREA
57 #endif

17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18  *
19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20  * or visit www.oracle.com if you need additional information or have any
21  * questions.
22  *
23  */
24 
25 #ifndef CPU_X86_GLOBALDEFINITIONS_X86_HPP
26 #define CPU_X86_GLOBALDEFINITIONS_X86_HPP
27 
28 const int StackAlignmentInBytes  = 16;
29 const size_t pd_segfault_address = 1024;
30 
31 // Indicates whether the C calling conventions require that
32 // 32-bit integer argument values are extended to 64 bits.
33 const bool CCallingConventionRequiresIntsAsLongs = false;
34 
35 #define SUPPORTS_NATIVE_CX8
36 
37 #ifdef _LP64
38 #define SUPPORT_MONITOR_COUNT
39 #endif
40 
41 #define CPU_MULTI_COPY_ATOMIC
42 
43 // The expected size in bytes of a cache line.
44 #define DEFAULT_CACHE_LINE_SIZE 64
45 
46 // The default padding size for data structures to avoid false sharing.
47 #ifdef _LP64
48 // The common wisdom is that adjacent cache line prefetchers on some hardware
49 // may pull two cache lines on access, so we have to pessimistically assume twice
50 // the cache line size for padding. TODO: Check if this is still true for modern
51 // hardware. If not, DEFAULT_CACHE_LINE_SIZE might as well suffice.
52 #define DEFAULT_PADDING_SIZE (DEFAULT_CACHE_LINE_SIZE*2)
53 #else
54 #define DEFAULT_PADDING_SIZE DEFAULT_CACHE_LINE_SIZE
55 #endif
56 
57 #if defined(LINUX) || defined(__APPLE__)
58 #define SUPPORT_RESERVED_STACK_AREA
59 #endif