5 // This code is free software; you can redistribute it and/or modify it
6 // under the terms of the GNU General Public License version 2 only, as
7 // published by the Free Software Foundation.
8 //
9 // This code is distributed in the hope that it will be useful, but WITHOUT
10 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 // version 2 for more details (a copy is included in the LICENSE file that
13 // accompanied this code).
14 //
15 // You should have received a copy of the GNU General Public License version
16 // 2 along with this work; if not, write to the Free Software Foundation,
17 // Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 //
19 // Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 // or visit www.oracle.com if you need additional information or have any
21 // questions.
22 //
23 //
24
25 source_hpp %{
26 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
27 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
28 %}
29
30 encode %{
31 enc_class aarch64_enc_cmpxchg_oop_shenandoah(memory mem, iRegP oldval, iRegP newval, iRegPNoSp tmp, iRegINoSp res) %{
32 guarantee($mem$$index == -1 && $mem$$disp == 0, "impossible encoding");
33 Register tmp = $tmp$$Register;
34 __ mov(tmp, $oldval$$Register); // Must not clobber oldval.
35 ShenandoahBarrierSet::assembler()->cmpxchg_oop(masm, $mem$$Register, tmp, $newval$$Register,
36 /*acquire*/ false, /*release*/ true, /*is_cae*/ false, $res$$Register);
37 %}
38
39 enc_class aarch64_enc_cmpxchg_acq_oop_shenandoah(memory mem, iRegP oldval, iRegP newval, iRegPNoSp tmp, iRegINoSp res) %{
40 guarantee($mem$$index == -1 && $mem$$disp == 0, "impossible encoding");
41 Register tmp = $tmp$$Register;
42 __ mov(tmp, $oldval$$Register); // Must not clobber oldval.
43 ShenandoahBarrierSet::assembler()->cmpxchg_oop(masm, $mem$$Register, tmp, $newval$$Register,
44 /*acquire*/ true, /*release*/ true, /*is_cae*/ false, $res$$Register);
45 %}
46 %}
47
48 instruct compareAndSwapP_shenandoah(iRegINoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp, rFlagsReg cr) %{
49
50 match(Set res (ShenandoahCompareAndSwapP mem (Binary oldval newval)));
51 ins_cost(2 * VOLATILE_REF_COST);
52
53 effect(TEMP tmp, KILL cr);
54
55 format %{
56 "cmpxchg_shenandoah $mem, $oldval, $newval\t# (ptr) if $mem == $oldval then $mem <-- $newval with temp $tmp"
57 %}
58
59 ins_encode(aarch64_enc_cmpxchg_oop_shenandoah(mem, oldval, newval, tmp, res));
60
61 ins_pipe(pipe_slow);
62 %}
63
64 instruct compareAndSwapN_shenandoah(iRegINoSp res, indirect mem, iRegN oldval, iRegN newval, iRegNNoSp tmp, rFlagsReg cr) %{
65
66 match(Set res (ShenandoahCompareAndSwapN mem (Binary oldval newval)));
67 ins_cost(2 * VOLATILE_REF_COST);
68
69 effect(TEMP tmp, KILL cr);
70
71 format %{
72 "cmpxchgw_shenandoah $mem, $oldval, $newval\t# (ptr) if $mem == $oldval then $mem <-- $newval with temp $tmp"
73 %}
74
75 ins_encode %{
76 Register tmp = $tmp$$Register;
77 __ mov(tmp, $oldval$$Register); // Must not clobber oldval.
78 ShenandoahBarrierSet::assembler()->cmpxchg_oop(masm, $mem$$Register, tmp, $newval$$Register, /*acquire*/ false, /*release*/ true, /*is_cae*/ false, $res$$Register);
79 %}
80
81 ins_pipe(pipe_slow);
82 %}
83
84 instruct compareAndSwapPAcq_shenandoah(iRegINoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp, rFlagsReg cr) %{
85
86 predicate(needs_acquiring_load_exclusive(n));
87 match(Set res (ShenandoahCompareAndSwapP mem (Binary oldval newval)));
88 ins_cost(VOLATILE_REF_COST);
89
90 effect(TEMP tmp, KILL cr);
91
92 format %{
93 "cmpxchg_acq_shenandoah_oop $mem, $oldval, $newval\t# (ptr) if $mem == $oldval then $mem <-- $newval with temp $tmp"
94 %}
95
96 ins_encode(aarch64_enc_cmpxchg_acq_oop_shenandoah(mem, oldval, newval, tmp, res));
97
98 ins_pipe(pipe_slow);
99 %}
100
101 instruct compareAndSwapNAcq_shenandoah(iRegINoSp res, indirect mem, iRegN oldval, iRegN newval, iRegNNoSp tmp, rFlagsReg cr) %{
102
103 predicate(needs_acquiring_load_exclusive(n));
104 match(Set res (ShenandoahCompareAndSwapN mem (Binary oldval newval)));
105 ins_cost(VOLATILE_REF_COST);
106
107 effect(TEMP tmp, KILL cr);
108
109 format %{
110 "cmpxchgw_acq_shenandoah_narrow_oop $mem, $oldval, $newval\t# (ptr) if $mem == $oldval then $mem <-- $newval with temp $tmp"
111 %}
112
113 ins_encode %{
114 Register tmp = $tmp$$Register;
115 __ mov(tmp, $oldval$$Register); // Must not clobber oldval.
116 ShenandoahBarrierSet::assembler()->cmpxchg_oop(masm, $mem$$Register, tmp, $newval$$Register, /*acquire*/ true, /*release*/ true, /*is_cae*/ false, $res$$Register);
117 %}
118
119 ins_pipe(pipe_slow);
120 %}
121
122 instruct compareAndExchangeN_shenandoah(iRegNNoSp res, indirect mem, iRegN oldval, iRegN newval, iRegNNoSp tmp, rFlagsReg cr) %{
123 match(Set res (ShenandoahCompareAndExchangeN mem (Binary oldval newval)));
124 ins_cost(2 * VOLATILE_REF_COST);
125 effect(TEMP_DEF res, TEMP tmp, KILL cr);
126 format %{
127 "cmpxchgw_shenandoah $res = $mem, $oldval, $newval\t# (narrow oop, weak) if $mem == $oldval then $mem <-- $newval"
128 %}
129 ins_encode %{
130 Register tmp = $tmp$$Register;
131 __ mov(tmp, $oldval$$Register); // Must not clobber oldval.
132 ShenandoahBarrierSet::assembler()->cmpxchg_oop(masm, $mem$$Register, tmp, $newval$$Register,
133 /*acquire*/ false, /*release*/ true, /*is_cae*/ true, $res$$Register);
134 %}
135 ins_pipe(pipe_slow);
136 %}
137
138 instruct compareAndExchangeP_shenandoah(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp, rFlagsReg cr) %{
139 match(Set res (ShenandoahCompareAndExchangeP mem (Binary oldval newval)));
140 ins_cost(2 * VOLATILE_REF_COST);
141 effect(TEMP_DEF res, TEMP tmp, KILL cr);
142 format %{
143 "cmpxchg_shenandoah $mem, $oldval, $newval\t# (ptr) if $mem == $oldval then $mem <-- $newval with temp $tmp"
144 %}
145 ins_encode %{
146 Register tmp = $tmp$$Register;
147 __ mov(tmp, $oldval$$Register); // Must not clobber oldval.
148 ShenandoahBarrierSet::assembler()->cmpxchg_oop(masm, $mem$$Register, tmp, $newval$$Register,
149 /*acquire*/ false, /*release*/ true, /*is_cae*/ true, $res$$Register);
150 %}
151 ins_pipe(pipe_slow);
152 %}
153
154 instruct compareAndExchangeNAcq_shenandoah(iRegNNoSp res, indirect mem, iRegN oldval, iRegN newval, iRegNNoSp tmp, rFlagsReg cr) %{
155 predicate(needs_acquiring_load_exclusive(n));
156 match(Set res (ShenandoahCompareAndExchangeN mem (Binary oldval newval)));
157 ins_cost(VOLATILE_REF_COST);
158 effect(TEMP_DEF res, TEMP tmp, KILL cr);
159 format %{
160 "cmpxchgw_acq_shenandoah $res = $mem, $oldval, $newval\t# (narrow oop, weak) if $mem == $oldval then $mem <-- $newval"
161 %}
162 ins_encode %{
163 Register tmp = $tmp$$Register;
164 __ mov(tmp, $oldval$$Register); // Must not clobber oldval.
165 ShenandoahBarrierSet::assembler()->cmpxchg_oop(masm, $mem$$Register, tmp, $newval$$Register,
166 /*acquire*/ true, /*release*/ true, /*is_cae*/ true, $res$$Register);
167 %}
168 ins_pipe(pipe_slow);
169 %}
170
171 instruct compareAndExchangePAcq_shenandoah(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp, rFlagsReg cr) %{
172 predicate(needs_acquiring_load_exclusive(n));
173 match(Set res (ShenandoahCompareAndExchangeP mem (Binary oldval newval)));
174 ins_cost(VOLATILE_REF_COST);
175 effect(TEMP_DEF res, TEMP tmp, KILL cr);
176 format %{
177 "cmpxchg_acq_shenandoah $mem, $oldval, $newval\t# (ptr) if $mem == $oldval then $mem <-- $newval with temp $tmp"
178 %}
179 ins_encode %{
180 Register tmp = $tmp$$Register;
181 __ mov(tmp, $oldval$$Register); // Must not clobber oldval.
182 ShenandoahBarrierSet::assembler()->cmpxchg_oop(masm, $mem$$Register, tmp, $newval$$Register,
183 /*acquire*/ true, /*release*/ true, /*is_cae*/ true, $res$$Register);
184 %}
185 ins_pipe(pipe_slow);
186 %}
187
188 instruct weakCompareAndSwapN_shenandoah(iRegINoSp res, indirect mem, iRegN oldval, iRegN newval, iRegNNoSp tmp, rFlagsReg cr) %{
189 match(Set res (ShenandoahWeakCompareAndSwapN mem (Binary oldval newval)));
190 ins_cost(2 * VOLATILE_REF_COST);
191 effect(TEMP tmp, KILL cr);
192 format %{
193 "cmpxchgw_shenandoah $res = $mem, $oldval, $newval\t# (narrow oop, weak) if $mem == $oldval then $mem <-- $newval"
194 "csetw $res, EQ\t# $res <-- (EQ ? 1 : 0)"
195 %}
196 ins_encode %{
197 Register tmp = $tmp$$Register;
198 __ mov(tmp, $oldval$$Register); // Must not clobber oldval.
199 // Weak is not currently supported by ShenandoahBarrierSet::cmpxchg_oop
200 ShenandoahBarrierSet::assembler()->cmpxchg_oop(masm, $mem$$Register, tmp, $newval$$Register,
201 /*acquire*/ false, /*release*/ true, /*is_cae*/ false, $res$$Register);
202 %}
203 ins_pipe(pipe_slow);
204 %}
205
206 instruct weakCompareAndSwapP_shenandoah(iRegINoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp, rFlagsReg cr) %{
207 match(Set res (ShenandoahWeakCompareAndSwapP mem (Binary oldval newval)));
208 ins_cost(2 * VOLATILE_REF_COST);
209 effect(TEMP tmp, KILL cr);
210 format %{
211 "cmpxchg_shenandoah $res = $mem, $oldval, $newval\t# (ptr, weak) if $mem == $oldval then $mem <-- $newval"
212 %}
213 ins_encode %{
214 Register tmp = $tmp$$Register;
215 __ mov(tmp, $oldval$$Register); // Must not clobber oldval.
216 // Weak is not currently supported by ShenandoahBarrierSet::cmpxchg_oop
217 ShenandoahBarrierSet::assembler()->cmpxchg_oop(masm, $mem$$Register, tmp, $newval$$Register,
218 /*acquire*/ false, /*release*/ true, /*is_cae*/ false, $res$$Register);
219 %}
220 ins_pipe(pipe_slow);
221 %}
222
223 instruct weakCompareAndSwapNAcq_shenandoah(iRegINoSp res, indirect mem, iRegN oldval, iRegN newval, iRegNNoSp tmp, rFlagsReg cr) %{
224 predicate(needs_acquiring_load_exclusive(n));
225 match(Set res (ShenandoahWeakCompareAndSwapN mem (Binary oldval newval)));
226 ins_cost(VOLATILE_REF_COST);
227 effect(TEMP tmp, KILL cr);
228 format %{
229 "cmpxchgw_acq_shenandoah $res = $mem, $oldval, $newval\t# (narrow oop, weak) if $mem == $oldval then $mem <-- $newval"
230 "csetw $res, EQ\t# $res <-- (EQ ? 1 : 0)"
231 %}
232 ins_encode %{
233 Register tmp = $tmp$$Register;
234 __ mov(tmp, $oldval$$Register); // Must not clobber oldval.
235 // Weak is not currently supported by ShenandoahBarrierSet::cmpxchg_oop
236 ShenandoahBarrierSet::assembler()->cmpxchg_oop(masm, $mem$$Register, tmp, $newval$$Register,
237 /*acquire*/ true, /*release*/ true, /*is_cae*/ false, $res$$Register);
238 %}
239 ins_pipe(pipe_slow);
240 %}
241
242 instruct weakCompareAndSwapPAcq_shenandoah(iRegINoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp, rFlagsReg cr) %{
243 predicate(needs_acquiring_load_exclusive(n));
244 match(Set res (ShenandoahWeakCompareAndSwapP mem (Binary oldval newval)));
245 ins_cost(VOLATILE_REF_COST);
246 effect(TEMP tmp, KILL cr);
247 format %{
248 "cmpxchg_acq_shenandoah $res = $mem, $oldval, $newval\t# (ptr, weak) if $mem == $oldval then $mem <-- $newval"
249 "csetw $res, EQ\t# $res <-- (EQ ? 1 : 0)"
250 %}
251 ins_encode %{
252 Register tmp = $tmp$$Register;
253 __ mov(tmp, $oldval$$Register); // Must not clobber oldval.
254 // Weak is not currently supported by ShenandoahBarrierSet::cmpxchg_oop
255 ShenandoahBarrierSet::assembler()->cmpxchg_oop(masm, $mem$$Register, tmp, $newval$$Register,
256 /*acquire*/ true, /*release*/ true, /*is_cae*/ false, $res$$Register);
257 %}
258 ins_pipe(pipe_slow);
259 %}
|
5 // This code is free software; you can redistribute it and/or modify it
6 // under the terms of the GNU General Public License version 2 only, as
7 // published by the Free Software Foundation.
8 //
9 // This code is distributed in the hope that it will be useful, but WITHOUT
10 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 // version 2 for more details (a copy is included in the LICENSE file that
13 // accompanied this code).
14 //
15 // You should have received a copy of the GNU General Public License version
16 // 2 along with this work; if not, write to the Free Software Foundation,
17 // Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 //
19 // Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 // or visit www.oracle.com if you need additional information or have any
21 // questions.
22 //
23 //
24
25 source %{
26 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
27 #include "gc/shenandoah/shenandoahBarrierSetAssembler_aarch64.hpp"
28 #include "gc/shenandoah/c2/shenandoahBarrierSetC2.hpp"
29 %}
30
31
32 // BEGIN This section of the file is automatically generated from shenandoah_aarch64.m4.
33
34
35
36 // This pattern is generated automatically from shenandoah_aarch64.m4.
37 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
38 instruct store_P_Normal_shenandoah(indirect mem, iRegP src, rFlagsReg cr)
39 %{
40 match(Set mem (StoreP mem src));
41 predicate(UseShenandoahGC && !needs_releasing_store(n) && n->as_Store()->barrier_data() != 0);
42 effect(KILL cr);
43 ins_cost(3*INSN_COST);
44 format %{ "str $src, $mem" %}
45 ins_encode %{
46 ShenandoahBarrierSet::assembler()->store_c2(this, masm,
47 $mem$$Register, /* dst_narrow = */ false,
48 $src$$Register, /* src_narrow = */ false,
49 /* is_volatile = */ false);
50 %}
51 ins_pipe(pipe_class_memory);
52 %}
53
54 // This pattern is generated automatically from shenandoah_aarch64.m4.
55 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
56 instruct store_P_Volatile_shenandoah(indirect mem, iRegP src, rFlagsReg cr)
57 %{
58 match(Set mem (StoreP mem src));
59 predicate(UseShenandoahGC && needs_releasing_store(n) && n->as_Store()->barrier_data() != 0);
60 effect(KILL cr);
61 ins_cost(VOLATILE_REF_COST);
62 format %{ "str $src, $mem" %}
63 ins_encode %{
64 ShenandoahBarrierSet::assembler()->store_c2(this, masm,
65 $mem$$Register, /* dst_narrow = */ false,
66 $src$$Register, /* src_narrow = */ false,
67 /* is_volatile = */ true);
68 %}
69 ins_pipe(pipe_class_memory);
70 %}
71
72 // This pattern is generated automatically from shenandoah_aarch64.m4.
73 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
74 instruct store_N_Normal_shenandoah(indirect mem, iRegN src, rFlagsReg cr)
75 %{
76 match(Set mem (StoreN mem src));
77 predicate(UseShenandoahGC && !needs_releasing_store(n) && n->as_Store()->barrier_data() != 0);
78 effect(KILL cr);
79 ins_cost(3*INSN_COST);
80 format %{ "str $src, $mem" %}
81 ins_encode %{
82 ShenandoahBarrierSet::assembler()->store_c2(this, masm,
83 $mem$$Register, /* dst_narrow = */ true,
84 $src$$Register, /* src_narrow = */ true,
85 /* is_volatile = */ false);
86 %}
87 ins_pipe(pipe_class_memory);
88 %}
89
90 // This pattern is generated automatically from shenandoah_aarch64.m4.
91 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
92 instruct store_N_Volatile_shenandoah(indirect mem, iRegN src, rFlagsReg cr)
93 %{
94 match(Set mem (StoreN mem src));
95 predicate(UseShenandoahGC && needs_releasing_store(n) && n->as_Store()->barrier_data() != 0);
96 effect(KILL cr);
97 ins_cost(VOLATILE_REF_COST);
98 format %{ "str $src, $mem" %}
99 ins_encode %{
100 ShenandoahBarrierSet::assembler()->store_c2(this, masm,
101 $mem$$Register, /* dst_narrow = */ true,
102 $src$$Register, /* src_narrow = */ true,
103 /* is_volatile = */ true);
104 %}
105 ins_pipe(pipe_class_memory);
106 %}
107
108
109
110
111
112
113
114
115
116
117 // This pattern is generated automatically from shenandoah_aarch64.m4.
118 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
119 instruct encodePAndStoreN_Normal_shenandoah(indirect mem, iRegP src, rFlagsReg cr)
120 %{
121 match(Set mem (StoreN mem (EncodeP src)));
122 predicate(UseShenandoahGC && !needs_releasing_store(n) && n->as_Store()->barrier_data() != 0);
123 effect(KILL cr);
124 ins_cost(4*INSN_COST);
125 format %{ "encode_heap_oop tmp, $src\n\t"
126 "str tmp, $mem\t# compressed ptr" %}
127 ins_encode %{
128 ShenandoahBarrierSet::assembler()->store_c2(this, masm,
129 $mem$$Register, /* dst_narrow = */ true,
130 $src$$Register, /* src_narrow = */ false,
131 /* is_volatile = */ false);
132 %}
133 ins_pipe(pipe_class_memory);
134 %}
135
136 // This pattern is generated automatically from shenandoah_aarch64.m4.
137 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
138 instruct encodePAndStoreN_Volatile_shenandoah(indirect mem, iRegP src, rFlagsReg cr)
139 %{
140 match(Set mem (StoreN mem (EncodeP src)));
141 predicate(UseShenandoahGC && needs_releasing_store(n) && n->as_Store()->barrier_data() != 0);
142 effect(KILL cr);
143 ins_cost(VOLATILE_REF_COST);
144 format %{ "encode_heap_oop tmp, $src\n\t"
145 "str tmp, $mem\t# compressed ptr" %}
146 ins_encode %{
147 ShenandoahBarrierSet::assembler()->store_c2(this, masm,
148 $mem$$Register, /* dst_narrow = */ true,
149 $src$$Register, /* src_narrow = */ false,
150 /* is_volatile = */ true);
151 %}
152 ins_pipe(pipe_class_memory);
153 %}
154
155
156
157
158
159
160
161
162
163
164 // This pattern is generated automatically from shenandoah_aarch64.m4.
165 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
166 instruct compareAndSwap_P_Normal_shenandoah(iRegINoSp res, indirect mem, iRegPNoSp oldval, iRegP newval, rFlagsReg cr)
167 %{
168 match(Set res (CompareAndSwapP mem (Binary oldval newval)));
169 predicate(UseShenandoahGC && !needs_acquiring_load_exclusive(n) && n->as_LoadStore()->barrier_data() != 0);
170 ins_cost(VOLATILE_REF_COST);
171 effect(TEMP_DEF res, KILL cr);
172 format %{
173 "cmpxchg_P_Normal_shenandoah $mem, $oldval, $newval\t# (ptr) if $mem == $oldval then $mem <-- $newval"
174 %}
175 ins_encode %{
176 guarantee($mem$$index == -1 && $mem$$disp == 0, "impossible encoding");
177
178 ShenandoahBarrierSet::assembler()->cae_c2(this, masm,
179 $res$$Register,
180 $mem$$base$$Register,
181 $oldval$$Register,
182 $newval$$Register,
183 /* exchange */ false,
184 /* maybe_null */ true,
185 /* is_narrow */ false,
186 /* acquire */ false,
187 /* release */ true,
188 /* weak */ false);
189 %}
190
191 ins_pipe(pipe_slow);
192 %}
193
194 // This pattern is generated automatically from shenandoah_aarch64.m4.
195 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
196 instruct compareAndSwap_N_Normal_shenandoah(iRegINoSp res, indirect mem, iRegNNoSp oldval, iRegN newval, rFlagsReg cr)
197 %{
198 match(Set res (CompareAndSwapN mem (Binary oldval newval)));
199 predicate(UseShenandoahGC && !needs_acquiring_load_exclusive(n) && n->as_LoadStore()->barrier_data() != 0);
200 ins_cost(VOLATILE_REF_COST);
201 effect(TEMP_DEF res, KILL cr);
202 format %{
203 "cmpxchg_N_Normal_shenandoah $mem, $oldval, $newval\t# (ptr) if $mem == $oldval then $mem <-- $newval"
204 %}
205 ins_encode %{
206 guarantee($mem$$index == -1 && $mem$$disp == 0, "impossible encoding");
207
208 ShenandoahBarrierSet::assembler()->cae_c2(this, masm,
209 $res$$Register,
210 $mem$$base$$Register,
211 $oldval$$Register,
212 $newval$$Register,
213 /* exchange */ false,
214 /* maybe_null */ true,
215 /* is_narrow */ true,
216 /* acquire */ false,
217 /* release */ true,
218 /* weak */ false);
219 %}
220
221 ins_pipe(pipe_slow);
222 %}
223
224 // This pattern is generated automatically from shenandoah_aarch64.m4.
225 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
226 instruct compareAndSwap_P_Volatile_shenandoah(iRegINoSp res, indirect mem, iRegPNoSp oldval, iRegP newval, rFlagsReg cr)
227 %{
228 match(Set res (CompareAndSwapP mem (Binary oldval newval)));
229 predicate(UseShenandoahGC && needs_acquiring_load_exclusive(n) && n->as_LoadStore()->barrier_data() != 0);
230 ins_cost(VOLATILE_REF_COST + 3*INSN_COST);
231 effect(TEMP_DEF res, KILL cr);
232 format %{
233 "cmpxchg_P_Volatile_shenandoah $mem, $oldval, $newval\t# (ptr) if $mem == $oldval then $mem <-- $newval"
234 %}
235 ins_encode %{
236 guarantee($mem$$index == -1 && $mem$$disp == 0, "impossible encoding");
237
238 ShenandoahBarrierSet::assembler()->cae_c2(this, masm,
239 $res$$Register,
240 $mem$$base$$Register,
241 $oldval$$Register,
242 $newval$$Register,
243 /* exchange */ false,
244 /* maybe_null */ true,
245 /* is_narrow */ false,
246 /* acquire */ true,
247 /* release */ true,
248 /* weak */ false);
249 %}
250
251 ins_pipe(pipe_slow);
252 %}
253
254 // This pattern is generated automatically from shenandoah_aarch64.m4.
255 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
256 instruct compareAndSwap_N_Volatile_shenandoah(iRegINoSp res, indirect mem, iRegNNoSp oldval, iRegN newval, rFlagsReg cr)
257 %{
258 match(Set res (CompareAndSwapN mem (Binary oldval newval)));
259 predicate(UseShenandoahGC && needs_acquiring_load_exclusive(n) && n->as_LoadStore()->barrier_data() != 0);
260 ins_cost(VOLATILE_REF_COST + 3*INSN_COST);
261 effect(TEMP_DEF res, KILL cr);
262 format %{
263 "cmpxchg_N_Volatile_shenandoah $mem, $oldval, $newval\t# (ptr) if $mem == $oldval then $mem <-- $newval"
264 %}
265 ins_encode %{
266 guarantee($mem$$index == -1 && $mem$$disp == 0, "impossible encoding");
267
268 ShenandoahBarrierSet::assembler()->cae_c2(this, masm,
269 $res$$Register,
270 $mem$$base$$Register,
271 $oldval$$Register,
272 $newval$$Register,
273 /* exchange */ false,
274 /* maybe_null */ true,
275 /* is_narrow */ true,
276 /* acquire */ true,
277 /* release */ true,
278 /* weak */ false);
279 %}
280
281 ins_pipe(pipe_slow);
282 %}
283
284
285
286
287
288
289 // This pattern is generated automatically from shenandoah_aarch64.m4.
290 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
291 instruct compareAndExchange_N_Normal_shenandoah(iRegNNoSp res, indirect mem, iRegN oldval, iRegN newval, rFlagsReg cr)
292 %{
293 match(Set res (CompareAndExchangeN mem (Binary oldval newval)));
294 predicate(UseShenandoahGC && !needs_acquiring_load_exclusive(n) && n->as_LoadStore()->barrier_data() != 0);
295 ins_cost(2*VOLATILE_REF_COST);
296 effect(TEMP_DEF res, KILL cr);
297 format %{
298 "cae_N_Normal_shenandoah $mem, $oldval, $newval\t# (ptr) if $mem == $oldval then $mem <-- $newval"
299 %}
300 ins_encode %{
301 guarantee($mem$$index == -1 && $mem$$disp == 0, "impossible encoding");
302
303 ShenandoahBarrierSet::assembler()->cae_c2(this, masm,
304 $res$$Register,
305 $mem$$base$$Register,
306 $oldval$$Register,
307 $newval$$Register,
308 /* exchange */ true,
309 /* maybe_null */ (this->bottom_type()->make_ptr()->ptr() != TypePtr::NotNull),
310 /* is_narrow */ true,
311 /* acquire */ false,
312 /* release */ true,
313 /* weak */ false);
314 %}
315 ins_pipe(pipe_slow);
316 %}
317
318 // This pattern is generated automatically from shenandoah_aarch64.m4.
319 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
320 instruct compareAndExchange_P_Normal_shenandoah(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, rFlagsReg cr)
321 %{
322 match(Set res (CompareAndExchangeP mem (Binary oldval newval)));
323 predicate(UseShenandoahGC && !needs_acquiring_load_exclusive(n) && n->as_LoadStore()->barrier_data() != 0);
324 ins_cost(2*VOLATILE_REF_COST);
325 effect(TEMP_DEF res, KILL cr);
326 format %{
327 "cae_P_Normal_shenandoah $mem, $oldval, $newval\t# (ptr) if $mem == $oldval then $mem <-- $newval"
328 %}
329 ins_encode %{
330 guarantee($mem$$index == -1 && $mem$$disp == 0, "impossible encoding");
331
332 ShenandoahBarrierSet::assembler()->cae_c2(this, masm,
333 $res$$Register,
334 $mem$$base$$Register,
335 $oldval$$Register,
336 $newval$$Register,
337 /* exchange */ true,
338 /* maybe_null */ (this->bottom_type()->make_ptr()->ptr() != TypePtr::NotNull),
339 /* is_narrow */ false,
340 /* acquire */ false,
341 /* release */ true,
342 /* weak */ false);
343 %}
344 ins_pipe(pipe_slow);
345 %}
346
347 // This pattern is generated automatically from shenandoah_aarch64.m4.
348 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
349 instruct compareAndExchange_N_Volatile_shenandoah(iRegNNoSp res, indirect mem, iRegN oldval, iRegN newval, rFlagsReg cr)
350 %{
351 match(Set res (CompareAndExchangeN mem (Binary oldval newval)));
352 predicate(UseShenandoahGC && needs_acquiring_load_exclusive(n) && n->as_LoadStore()->barrier_data() != 0);
353 ins_cost(VOLATILE_REF_COST + 3*INSN_COST);
354 effect(TEMP_DEF res, KILL cr);
355 format %{
356 "cae_N_Volatile_shenandoah $mem, $oldval, $newval\t# (ptr) if $mem == $oldval then $mem <-- $newval"
357 %}
358 ins_encode %{
359 guarantee($mem$$index == -1 && $mem$$disp == 0, "impossible encoding");
360
361 ShenandoahBarrierSet::assembler()->cae_c2(this, masm,
362 $res$$Register,
363 $mem$$base$$Register,
364 $oldval$$Register,
365 $newval$$Register,
366 /* exchange */ true,
367 /* maybe_null */ (this->bottom_type()->make_ptr()->ptr() != TypePtr::NotNull),
368 /* is_narrow */ true,
369 /* acquire */ true,
370 /* release */ true,
371 /* weak */ false);
372 %}
373 ins_pipe(pipe_slow);
374 %}
375
376 // This pattern is generated automatically from shenandoah_aarch64.m4.
377 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
378 instruct compareAndExchange_P_Volatile_shenandoah(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, rFlagsReg cr)
379 %{
380 match(Set res (CompareAndExchangeP mem (Binary oldval newval)));
381 predicate(UseShenandoahGC && needs_acquiring_load_exclusive(n) && n->as_LoadStore()->barrier_data() != 0);
382 ins_cost(VOLATILE_REF_COST + 3*INSN_COST);
383 effect(TEMP_DEF res, KILL cr);
384 format %{
385 "cae_P_Volatile_shenandoah $mem, $oldval, $newval\t# (ptr) if $mem == $oldval then $mem <-- $newval"
386 %}
387 ins_encode %{
388 guarantee($mem$$index == -1 && $mem$$disp == 0, "impossible encoding");
389
390 ShenandoahBarrierSet::assembler()->cae_c2(this, masm,
391 $res$$Register,
392 $mem$$base$$Register,
393 $oldval$$Register,
394 $newval$$Register,
395 /* exchange */ true,
396 /* maybe_null */ (this->bottom_type()->make_ptr()->ptr() != TypePtr::NotNull),
397 /* is_narrow */ false,
398 /* acquire */ true,
399 /* release */ true,
400 /* weak */ false);
401 %}
402 ins_pipe(pipe_slow);
403 %}
404
405
406
407
408
409
410
411
412 // This pattern is generated automatically from shenandoah_aarch64.m4.
413 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
414 instruct weakCompareAndSwap_N_Normal_shenandoah(iRegINoSp res, indirect mem, iRegNNoSp oldval, iRegN newval, rFlagsReg cr)
415 %{
416 match(Set res (WeakCompareAndSwapN mem (Binary oldval newval)));
417 predicate(UseShenandoahGC && !needs_acquiring_load_exclusive(n) && n->as_LoadStore()->barrier_data() != 0);
418 ins_cost(VOLATILE_REF_COST);
419 effect(TEMP_DEF res, KILL cr);
420 format %{
421 "cae_N_Normal_weak_shenandoah $res = $mem, $oldval, $newval\t# (N, weak, Normal) if $mem == $oldval then $mem <-- $newval\n\t"
422 "csetw $res, EQ\t# $res <-- (EQ ? 1 : 0)"
423 %}
424 ins_encode %{
425 guarantee($mem$$index == -1 && $mem$$disp == 0, "impossible encoding");
426
427 ShenandoahBarrierSet::assembler()->cae_c2(this, masm,
428 $res$$Register,
429 $mem$$base$$Register,
430 $oldval$$Register,
431 $newval$$Register,
432 /* exchange */ false,
433 /* maybe_null */ true,
434 /* is_narrow */ true,
435 /* acquire */ false,
436 /* release */ true,
437 /* weak */ true);
438 %}
439 ins_pipe(pipe_slow);
440 %}
441
442 // This pattern is generated automatically from shenandoah_aarch64.m4.
443 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
444 instruct weakCompareAndSwap_P_Normal_shenandoah(iRegINoSp res, indirect mem, iRegPNoSp oldval, iRegP newval, rFlagsReg cr)
445 %{
446 match(Set res (WeakCompareAndSwapP mem (Binary oldval newval)));
447 predicate(UseShenandoahGC && !needs_acquiring_load_exclusive(n) && n->as_LoadStore()->barrier_data() != 0);
448 ins_cost(VOLATILE_REF_COST);
449 effect(TEMP_DEF res, KILL cr);
450 format %{
451 "cae_P_Normal_weak_shenandoah $res = $mem, $oldval, $newval\t# (P, weak, Normal) if $mem == $oldval then $mem <-- $newval\n\t"
452 "csetw $res, EQ\t# $res <-- (EQ ? 1 : 0)"
453 %}
454 ins_encode %{
455 guarantee($mem$$index == -1 && $mem$$disp == 0, "impossible encoding");
456
457 ShenandoahBarrierSet::assembler()->cae_c2(this, masm,
458 $res$$Register,
459 $mem$$base$$Register,
460 $oldval$$Register,
461 $newval$$Register,
462 /* exchange */ false,
463 /* maybe_null */ true,
464 /* is_narrow */ false,
465 /* acquire */ false,
466 /* release */ true,
467 /* weak */ true);
468 %}
469 ins_pipe(pipe_slow);
470 %}
471
472 // This pattern is generated automatically from shenandoah_aarch64.m4.
473 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
474 instruct weakCompareAndSwap_N_Volatile_shenandoah(iRegINoSp res, indirect mem, iRegNNoSp oldval, iRegN newval, rFlagsReg cr)
475 %{
476 match(Set res (WeakCompareAndSwapN mem (Binary oldval newval)));
477 predicate(UseShenandoahGC && needs_acquiring_load_exclusive(n) && n->as_LoadStore()->barrier_data() != 0);
478 ins_cost(VOLATILE_REF_COST);
479 effect(TEMP_DEF res, KILL cr);
480 format %{
481 "cae_N_Volatile_weak_shenandoah $res = $mem, $oldval, $newval\t# (N, weak, Volatile) if $mem == $oldval then $mem <-- $newval\n\t"
482 "csetw $res, EQ\t# $res <-- (EQ ? 1 : 0)"
483 %}
484 ins_encode %{
485 guarantee($mem$$index == -1 && $mem$$disp == 0, "impossible encoding");
486
487 ShenandoahBarrierSet::assembler()->cae_c2(this, masm,
488 $res$$Register,
489 $mem$$base$$Register,
490 $oldval$$Register,
491 $newval$$Register,
492 /* exchange */ false,
493 /* maybe_null */ true,
494 /* is_narrow */ true,
495 /* acquire */ true,
496 /* release */ true,
497 /* weak */ true);
498 %}
499 ins_pipe(pipe_slow);
500 %}
501
502 // This pattern is generated automatically from shenandoah_aarch64.m4.
503 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
504 instruct weakCompareAndSwap_P_Volatile_shenandoah(iRegINoSp res, indirect mem, iRegPNoSp oldval, iRegP newval, rFlagsReg cr)
505 %{
506 match(Set res (WeakCompareAndSwapP mem (Binary oldval newval)));
507 predicate(UseShenandoahGC && needs_acquiring_load_exclusive(n) && n->as_LoadStore()->barrier_data() != 0);
508 ins_cost(VOLATILE_REF_COST);
509 effect(TEMP_DEF res, KILL cr);
510 format %{
511 "cae_P_Volatile_weak_shenandoah $res = $mem, $oldval, $newval\t# (P, weak, Volatile) if $mem == $oldval then $mem <-- $newval\n\t"
512 "csetw $res, EQ\t# $res <-- (EQ ? 1 : 0)"
513 %}
514 ins_encode %{
515 guarantee($mem$$index == -1 && $mem$$disp == 0, "impossible encoding");
516
517 ShenandoahBarrierSet::assembler()->cae_c2(this, masm,
518 $res$$Register,
519 $mem$$base$$Register,
520 $oldval$$Register,
521 $newval$$Register,
522 /* exchange */ false,
523 /* maybe_null */ true,
524 /* is_narrow */ false,
525 /* acquire */ true,
526 /* release */ true,
527 /* weak */ true);
528 %}
529 ins_pipe(pipe_slow);
530 %}
531
532
533
534 // This pattern is generated automatically from shenandoah_aarch64.m4.
535 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
536 instruct getAndSet_P_Normal_shenandoah(indirect mem, iRegP newval, iRegPNoSp preval, rFlagsReg cr)
537 %{
538 match(Set preval (GetAndSetP mem newval));
539 predicate(UseShenandoahGC && !needs_acquiring_load_exclusive(n) && n->as_LoadStore()->barrier_data() != 0);
540 effect(TEMP_DEF preval, KILL cr);
541 ins_cost(2*VOLATILE_REF_COST);
542 format %{ "get_and_set_P_Normal $preval, $newval, [$mem]" %}
543 ins_encode %{
544 ShenandoahBarrierSet::assembler()->get_and_set_c2(this, masm,
545 $preval$$Register,
546 $newval$$Register,
547 $mem$$Register,
548 /* acquire */ false);
549 %}
550 ins_pipe(pipe_serial);
551 %}
552
553 // This pattern is generated automatically from shenandoah_aarch64.m4.
554 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
555 instruct getAndSet_P_Volatile_shenandoah(indirect mem, iRegP newval, iRegPNoSp preval, rFlagsReg cr)
556 %{
557 match(Set preval (GetAndSetP mem newval));
558 predicate(UseShenandoahGC && needs_acquiring_load_exclusive(n) && n->as_LoadStore()->barrier_data() != 0);
559 effect(TEMP_DEF preval, KILL cr);
560 ins_cost(VOLATILE_REF_COST + 3*INSN_COST);
561 format %{ "get_and_set_P_Volatile $preval, $newval, [$mem]" %}
562 ins_encode %{
563 ShenandoahBarrierSet::assembler()->get_and_set_c2(this, masm,
564 $preval$$Register,
565 $newval$$Register,
566 $mem$$Register,
567 /* acquire */ true);
568 %}
569 ins_pipe(pipe_serial);
570 %}
571
572 // This pattern is generated automatically from shenandoah_aarch64.m4.
573 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
574 instruct getAndSet_N_Normal_shenandoah(indirect mem, iRegN newval, iRegNNoSp preval, rFlagsReg cr)
575 %{
576 match(Set preval (GetAndSetN mem newval));
577 predicate(UseShenandoahGC && !needs_acquiring_load_exclusive(n) && n->as_LoadStore()->barrier_data() != 0);
578 effect(TEMP_DEF preval, KILL cr);
579 ins_cost(2*VOLATILE_REF_COST);
580 format %{ "get_and_set_N_Normal $preval, $newval, [$mem]" %}
581 ins_encode %{
582 ShenandoahBarrierSet::assembler()->get_and_set_c2(this, masm,
583 $preval$$Register,
584 $newval$$Register,
585 $mem$$Register,
586 /* acquire */ false);
587 %}
588 ins_pipe(pipe_serial);
589 %}
590
591 // This pattern is generated automatically from shenandoah_aarch64.m4.
592 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
593 instruct getAndSet_N_Volatile_shenandoah(indirect mem, iRegN newval, iRegNNoSp preval, rFlagsReg cr)
594 %{
595 match(Set preval (GetAndSetN mem newval));
596 predicate(UseShenandoahGC && needs_acquiring_load_exclusive(n) && n->as_LoadStore()->barrier_data() != 0);
597 effect(TEMP_DEF preval, KILL cr);
598 ins_cost(VOLATILE_REF_COST + 3*INSN_COST);
599 format %{ "get_and_set_N_Volatile $preval, $newval, [$mem]" %}
600 ins_encode %{
601 ShenandoahBarrierSet::assembler()->get_and_set_c2(this, masm,
602 $preval$$Register,
603 $newval$$Register,
604 $mem$$Register,
605 /* acquire */ true);
606 %}
607 ins_pipe(pipe_serial);
608 %}
609
610
611 // This pattern is generated automatically from shenandoah_aarch64.m4.
612 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
613 instruct load_P_Normal_shenandoah(iRegPNoSp dst, indirect mem, rFlagsReg cr)
614 %{
615 match(Set dst (LoadP mem));
616 predicate(UseShenandoahGC && !needs_acquiring_load(n) && n->as_Load()->barrier_data() != 0);
617 effect(TEMP_DEF dst, KILL cr);
618 ins_cost(3*INSN_COST);
619 format %{ "ldr $dst, $mem\t# ptr" %}
620 ins_encode %{
621 ShenandoahBarrierSet::assembler()->load_c2(this, masm,
622 $dst$$Register,
623 $mem$$Register,
624 /* acquire */ false);
625 %}
626 ins_pipe(pipe_class_memory);
627 %}
628
629 // This pattern is generated automatically from shenandoah_aarch64.m4.
630 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
631 instruct load_P_Volatile_shenandoah(iRegPNoSp dst, indirect mem, rFlagsReg cr)
632 %{
633 match(Set dst (LoadP mem));
634 predicate(UseShenandoahGC && needs_acquiring_load(n) && n->as_Load()->barrier_data() != 0);
635 effect(TEMP_DEF dst, KILL cr);
636 ins_cost(VOLATILE_REF_COST);
637 format %{ "ldar $dst, $mem\t# ptr" %}
638 ins_encode %{
639 ShenandoahBarrierSet::assembler()->load_c2(this, masm,
640 $dst$$Register,
641 $mem$$Register,
642 /* acquire */ true);
643 %}
644 ins_pipe(pipe_class_memory);
645 %}
646
647 // This pattern is generated automatically from shenandoah_aarch64.m4.
648 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
649 instruct load_N_Normal_shenandoah(iRegNNoSp dst, indirect mem, rFlagsReg cr)
650 %{
651 match(Set dst (LoadN mem));
652 predicate(UseShenandoahGC && !needs_acquiring_load(n) && n->as_Load()->barrier_data() != 0);
653 effect(TEMP_DEF dst, KILL cr);
654 ins_cost(3*INSN_COST);
655 format %{ "ldrw $dst, $mem\t# ptr" %}
656 ins_encode %{
657 ShenandoahBarrierSet::assembler()->load_c2(this, masm,
658 $dst$$Register,
659 $mem$$Register,
660 /* acquire */ false);
661 %}
662 ins_pipe(pipe_class_memory);
663 %}
664
665 // This pattern is generated automatically from shenandoah_aarch64.m4.
666 // DO NOT EDIT ANYTHING IN THIS SECTION OF THE FILE
667 instruct load_N_Volatile_shenandoah(iRegNNoSp dst, indirect mem, rFlagsReg cr)
668 %{
669 match(Set dst (LoadN mem));
670 predicate(UseShenandoahGC && needs_acquiring_load(n) && n->as_Load()->barrier_data() != 0);
671 effect(TEMP_DEF dst, KILL cr);
672 ins_cost(VOLATILE_REF_COST);
673 format %{ "ldarw $dst, $mem\t# ptr" %}
674 ins_encode %{
675 ShenandoahBarrierSet::assembler()->load_c2(this, masm,
676 $dst$$Register,
677 $mem$$Register,
678 /* acquire */ true);
679 %}
680 ins_pipe(pipe_class_memory);
681 %}
682
683 // END This section of the file is automatically generated from shenandoah_aarch64.m4.
|