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src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp

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114   __ add(start, start, scratch);
115 
116   __ bind(loop);
117   if (UseCondCardMark) {
118     __ ldrb(scratch, Address(start, count));
119     // Instead of loading clean_card_val and comparing, we exploit the fact that
120     // the LSB of non-clean cards is always 0, and the LSB of clean cards 1.
121     __ tbz(scratch, 0, next);
122   }
123   static_assert(G1CardTable::dirty_card_val() == 0, "must be to use zr");
124   __ strb(zr, Address(start, count));
125   __ bind(next);
126   __ subs(count, count, 1);
127   __ br(Assembler::GE, loop);
128 
129   __ bind(done);
130 }
131 
132 static void generate_queue_test_and_insertion(MacroAssembler* masm, ByteSize index_offset, ByteSize buffer_offset, Label& runtime,
133                                               const Register thread, const Register value, const Register temp1, const Register temp2) {

134   // Can we store a value in the given thread's buffer?
135   // (The index field is typed as size_t.)
136   __ ldr(temp1, Address(thread, in_bytes(index_offset)));   // temp1 := *(index address)
137   __ cbz(temp1, runtime);                                   // jump to runtime if index == 0 (full buffer)
138   // The buffer is not full, store value into it.
139   __ sub(temp1, temp1, wordSize);                           // temp1 := next index
140   __ str(temp1, Address(thread, in_bytes(index_offset)));   // *(index address) := next index
141   __ ldr(temp2, Address(thread, in_bytes(buffer_offset)));  // temp2 := buffer address
142   __ str(value, Address(temp2, temp1));                     // *(buffer address + next index) := value
143 }
144 
145 static void generate_pre_barrier_fast_path(MacroAssembler* masm,
146                                            const Register thread,
147                                            const Register tmp1) {
148   Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
149   // Is marking active?
150   if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
151     __ ldrw(tmp1, in_progress);
152   } else {
153     assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");

187                                                  bool expand_call) {
188   // If expand_call is true then we expand the call_VM_leaf macro
189   // directly to skip generating the check by
190   // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
191 
192   assert(thread == rthread, "must be");
193 
194   Label done;
195   Label runtime;
196 
197   assert_different_registers(obj, pre_val, tmp1, tmp2);
198   assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
199 
200   generate_pre_barrier_fast_path(masm, thread, tmp1);
201   // If marking is not active (*(mark queue active address) == 0), jump to done
202   __ cbzw(tmp1, done);
203   generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, done, runtime);
204 
205   __ bind(runtime);
206 
207   __ push_call_clobbered_registers();












208 
209   // Calling the runtime using the regular call_VM_leaf mechanism generates
210   // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
211   // that checks that the *(rfp+frame::interpreter_frame_last_sp) == nullptr.
212   //
213   // If we care generating the pre-barrier without a frame (e.g. in the
214   // intrinsified Reference.get() routine) then rfp might be pointing to
215   // the caller frame and so this check will most likely fail at runtime.
216   //
217   // Expanding the call directly bypasses the generation of the check.
218   // So when we do not have have a full interpreter frame on the stack
219   // expand_call should be passed true.
220 
221   if (expand_call) {
222     assert(pre_val != c_rarg1, "smashed arg");
223     __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
224   } else {
225     __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
226   }
227 
228   __ pop_call_clobbered_registers();
229 
230   __ bind(done);
231 
232 }
233 
234 static void generate_post_barrier(MacroAssembler* masm,
235                                   const Register store_addr,
236                                   const Register new_val,
237                                   const Register thread,
238                                   const Register tmp1,
239                                   const Register tmp2,
240                                   Label& done,
241                                   bool new_val_may_be_null) {
242   assert(thread == rthread, "must be");
243   assert_different_registers(store_addr, new_val, thread, tmp1, tmp2, noreg, rscratch1);
244 
245   // Does store cross heap regions?
246   __ eor(tmp1, store_addr, new_val);                     // tmp1 := store address ^ new value
247   __ lsr(tmp1, tmp1, G1HeapRegion::LogOfHRGrainBytes);   // tmp1 := ((store address ^ new value) >> LogOfHRGrainBytes)
248   __ cbz(tmp1, done);

349   CardTableBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
350   if (on_oop && on_reference) {
351     // LR is live.  It must be saved around calls.
352     __ enter(/*strip_ret_addr*/true); // barrier may call runtime
353     // Generate the G1 pre-barrier code to log the value of
354     // the referent field in an SATB buffer.
355     g1_write_barrier_pre(masm /* masm */,
356                          noreg /* obj */,
357                          dst /* pre_val */,
358                          rthread /* thread */,
359                          tmp1 /* tmp1 */,
360                          tmp2 /* tmp2 */,
361                          true /* tosca_live */,
362                          true /* expand_call */);
363     __ leave();
364   }
365 }
366 
367 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
368                                          Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {










369   // flatten object address if needed
370   if (dst.index() == noreg && dst.offset() == 0) {
371     if (dst.base() != tmp3) {
372       __ mov(tmp3, dst.base());
373     }
374   } else {
375     __ lea(tmp3, dst);
376   }
377 
378   g1_write_barrier_pre(masm,
379                        tmp3 /* obj */,
380                        tmp2 /* pre_val */,
381                        rthread /* thread */,
382                        tmp1  /* tmp1 */,
383                        rscratch2  /* tmp2 */,
384                        val != noreg /* tosca_live */,
385                        false /* expand_call */);


386 
387   if (val == noreg) {
388     BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), noreg, noreg, noreg, noreg);
389   } else {
390     // G1 barrier needs uncompressed oop for region cross check.
391     Register new_val = val;
392     if (UseCompressedOops) {
393       new_val = rscratch2;
394       __ mov(new_val, val);


395     }

396     BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
397     g1_write_barrier_post(masm,
398                           tmp3 /* store_adr */,
399                           new_val /* new_val */,
400                           rthread /* thread */,
401                           tmp1 /* tmp1 */,
402                           tmp2 /* tmp2 */);


403   }
404 
405 }
406 
407 #ifdef COMPILER1
408 
409 #undef __
410 #define __ ce->masm()->
411 
412 void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub) {
413   G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
414   // At this point we know that marking is in progress.
415   // If do_load() is true then we have to emit the
416   // load of the previous value; otherwise it has already
417   // been loaded into _pre_val.
418 
419   __ bind(*stub->entry());
420 
421   assert(stub->pre_val()->is_register(), "Precondition.");
422 

114   __ add(start, start, scratch);
115 
116   __ bind(loop);
117   if (UseCondCardMark) {
118     __ ldrb(scratch, Address(start, count));
119     // Instead of loading clean_card_val and comparing, we exploit the fact that
120     // the LSB of non-clean cards is always 0, and the LSB of clean cards 1.
121     __ tbz(scratch, 0, next);
122   }
123   static_assert(G1CardTable::dirty_card_val() == 0, "must be to use zr");
124   __ strb(zr, Address(start, count));
125   __ bind(next);
126   __ subs(count, count, 1);
127   __ br(Assembler::GE, loop);
128 
129   __ bind(done);
130 }
131 
132 static void generate_queue_test_and_insertion(MacroAssembler* masm, ByteSize index_offset, ByteSize buffer_offset, Label& runtime,
133                                               const Register thread, const Register value, const Register temp1, const Register temp2) {
134   assert_different_registers(value, temp1, temp2);
135   // Can we store a value in the given thread's buffer?
136   // (The index field is typed as size_t.)
137   __ ldr(temp1, Address(thread, in_bytes(index_offset)));   // temp1 := *(index address)
138   __ cbz(temp1, runtime);                                   // jump to runtime if index == 0 (full buffer)
139   // The buffer is not full, store value into it.
140   __ sub(temp1, temp1, wordSize);                           // temp1 := next index
141   __ str(temp1, Address(thread, in_bytes(index_offset)));   // *(index address) := next index
142   __ ldr(temp2, Address(thread, in_bytes(buffer_offset)));  // temp2 := buffer address
143   __ str(value, Address(temp2, temp1));                     // *(buffer address + next index) := value
144 }
145 
146 static void generate_pre_barrier_fast_path(MacroAssembler* masm,
147                                            const Register thread,
148                                            const Register tmp1) {
149   Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
150   // Is marking active?
151   if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
152     __ ldrw(tmp1, in_progress);
153   } else {
154     assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");

188                                                  bool expand_call) {
189   // If expand_call is true then we expand the call_VM_leaf macro
190   // directly to skip generating the check by
191   // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
192 
193   assert(thread == rthread, "must be");
194 
195   Label done;
196   Label runtime;
197 
198   assert_different_registers(obj, pre_val, tmp1, tmp2);
199   assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
200 
201   generate_pre_barrier_fast_path(masm, thread, tmp1);
202   // If marking is not active (*(mark queue active address) == 0), jump to done
203   __ cbzw(tmp1, done);
204   generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, done, runtime);
205 
206   __ bind(runtime);
207 
208   // save the live input values
209   RegSet saved = RegSet::of(pre_val);
210   FloatRegSet fsaved;
211 
212   // Barriers might be emitted when converting between (scalarized) calling
213   // conventions for inline types. Save all argument registers before calling
214   // into the runtime.
215 
216   // TODO 8366717 This came with 8284161: Implementation of Virtual Threads (Preview) later in May 2022
217   // Check if it's sufficient
218   //__ push_call_clobbered_registers();
219   assert_different_registers(rscratch1, pre_val); // push_CPU_state trashes rscratch1
220   __ push_CPU_state(true);
221 
222   // Calling the runtime using the regular call_VM_leaf mechanism generates
223   // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
224   // that checks that the *(rfp+frame::interpreter_frame_last_sp) == nullptr.
225   //
226   // If we care generating the pre-barrier without a frame (e.g. in the
227   // intrinsified Reference.get() routine) then rfp might be pointing to
228   // the caller frame and so this check will most likely fail at runtime.
229   //
230   // Expanding the call directly bypasses the generation of the check.
231   // So when we do not have have a full interpreter frame on the stack
232   // expand_call should be passed true.
233 
234   if (expand_call) {
235     assert(pre_val != c_rarg1, "smashed arg");
236     __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
237   } else {
238     __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
239   }
240 
241   __ pop_CPU_state(true);
242 
243   __ bind(done);
244 
245 }
246 
247 static void generate_post_barrier(MacroAssembler* masm,
248                                   const Register store_addr,
249                                   const Register new_val,
250                                   const Register thread,
251                                   const Register tmp1,
252                                   const Register tmp2,
253                                   Label& done,
254                                   bool new_val_may_be_null) {
255   assert(thread == rthread, "must be");
256   assert_different_registers(store_addr, new_val, thread, tmp1, tmp2, noreg, rscratch1);
257 
258   // Does store cross heap regions?
259   __ eor(tmp1, store_addr, new_val);                     // tmp1 := store address ^ new value
260   __ lsr(tmp1, tmp1, G1HeapRegion::LogOfHRGrainBytes);   // tmp1 := ((store address ^ new value) >> LogOfHRGrainBytes)
261   __ cbz(tmp1, done);

362   CardTableBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
363   if (on_oop && on_reference) {
364     // LR is live.  It must be saved around calls.
365     __ enter(/*strip_ret_addr*/true); // barrier may call runtime
366     // Generate the G1 pre-barrier code to log the value of
367     // the referent field in an SATB buffer.
368     g1_write_barrier_pre(masm /* masm */,
369                          noreg /* obj */,
370                          dst /* pre_val */,
371                          rthread /* thread */,
372                          tmp1 /* tmp1 */,
373                          tmp2 /* tmp2 */,
374                          true /* tosca_live */,
375                          true /* expand_call */);
376     __ leave();
377   }
378 }
379 
380 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
381                                          Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
382 
383   bool in_heap = (decorators & IN_HEAP) != 0;
384   bool as_normal = (decorators & AS_NORMAL) != 0;
385   bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
386 
387   bool needs_pre_barrier = as_normal && !dest_uninitialized;
388   bool needs_post_barrier = (val != noreg && in_heap);
389 
390   assert_different_registers(val, tmp1, tmp2, tmp3);
391 
392   // flatten object address if needed
393   if (dst.index() == noreg && dst.offset() == 0) {
394     if (dst.base() != tmp3) {
395       __ mov(tmp3, dst.base());
396     }
397   } else {
398     __ lea(tmp3, dst);
399   }
400 
401   if (needs_pre_barrier) {
402     g1_write_barrier_pre(masm,
403                          tmp3 /* obj */,
404                          tmp2 /* pre_val */,
405                          rthread /* thread */,
406                          tmp1  /* tmp1 */,
407                          rscratch2  /* tmp2 */,
408                          val != noreg /* tosca_live */,
409                          false /* expand_call */);
410   }
411 
412   if (val == noreg) {
413     BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), noreg, noreg, noreg, noreg);
414   } else {
415     // G1 barrier needs uncompressed oop for region cross check.
416     Register new_val = val;
417     if (needs_post_barrier) {
418       if (UseCompressedOops) {
419         new_val = rscratch2;
420         __ mov(new_val, val);
421       }
422     }
423 
424     BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
425     if (needs_post_barrier) {
426       g1_write_barrier_post(masm,
427                             tmp3 /* store_adr */,
428                             new_val /* new_val */,
429                             rthread /* thread */,
430                             tmp1 /* tmp1 */,
431                             tmp2 /* tmp2 */);
432     }
433   }
434 
435 }
436 
437 #ifdef COMPILER1
438 
439 #undef __
440 #define __ ce->masm()->
441 
442 void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub) {
443   G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
444   // At this point we know that marking is in progress.
445   // If do_load() is true then we have to emit the
446   // load of the previous value; otherwise it has already
447   // been loaded into _pre_val.
448 
449   __ bind(*stub->entry());
450 
451   assert(stub->pre_val()->is_register(), "Precondition.");
452 
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