9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "code/compiledIC.hpp"
30 #include "compiler/compileTask.hpp"
31 #include "compiler/disassembler.hpp"
32 #include "compiler/oopMap.hpp"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/cardTable.hpp"
37 #include "gc/shared/collectedHeap.hpp"
38 #include "gc/shared/tlab_globals.hpp"
39 #include "interpreter/bytecodeHistogram.hpp"
40 #include "interpreter/interpreter.hpp"
41 #include "interpreter/interpreterRuntime.hpp"
42 #include "jvm.h"
43 #include "memory/resourceArea.hpp"
44 #include "memory/universe.hpp"
45 #include "nativeInst_aarch64.hpp"
46 #include "oops/accessDecorators.hpp"
47 #include "oops/compressedKlass.inline.hpp"
48 #include "oops/compressedOops.inline.hpp"
49 #include "oops/klass.inline.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/icache.hpp"
52 #include "runtime/interfaceSupport.inline.hpp"
53 #include "runtime/javaThread.hpp"
54 #include "runtime/jniHandles.inline.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/globalDefinitions.hpp"
58 #include "utilities/powerOfTwo.hpp"
59 #ifdef COMPILER1
60 #include "c1/c1_LIRAssembler.hpp"
61 #endif
62 #ifdef COMPILER2
63 #include "oops/oop.hpp"
64 #include "opto/compile.hpp"
65 #include "opto/node.hpp"
66 #include "opto/output.hpp"
67 #endif
68
69 #include <sys/types.h>
70
71 #ifdef PRODUCT
72 #define BLOCK_COMMENT(str) /* nothing */
73 #else
74 #define BLOCK_COMMENT(str) block_comment(str)
75 #endif
76 #define STOP(str) stop(str);
77 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
78
2019 ldarb(scratch, scratch);
2020 cmp(scratch, InstanceKlass::fully_initialized);
2021 br(Assembler::EQ, *L_fast_path);
2022
2023 // Fast path check: current thread is initializer thread
2024 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2025 cmp(rthread, scratch);
2026
2027 if (L_slow_path == &L_fallthrough) {
2028 br(Assembler::EQ, *L_fast_path);
2029 bind(*L_slow_path);
2030 } else if (L_fast_path == &L_fallthrough) {
2031 br(Assembler::NE, *L_slow_path);
2032 bind(*L_fast_path);
2033 } else {
2034 Unimplemented();
2035 }
2036 }
2037
2038 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2039 if (!VerifyOops) return;
2040
2041 // Pass register number to verify_oop_subroutine
2042 const char* b = nullptr;
2043 {
2044 ResourceMark rm;
2045 stringStream ss;
2046 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2047 b = code_string(ss.as_string());
2048 }
2049 BLOCK_COMMENT("verify_oop {");
2050
2051 strip_return_address(); // This might happen within a stack frame.
2052 protect_return_address();
2053 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2054 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2055
2056 mov(r0, reg);
2057 movptr(rscratch1, (uintptr_t)(address)b);
2058
2059 // call indirectly to solve generation ordering problem
2060 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2061 ldr(rscratch2, Address(rscratch2));
2062 blr(rscratch2);
2063
2064 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2065 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2066 authenticate_return_address();
2067
2068 BLOCK_COMMENT("} verify_oop");
2069 }
2070
2071 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2072 if (!VerifyOops) return;
2073
2074 const char* b = nullptr;
2075 {
2076 ResourceMark rm;
2077 stringStream ss;
2078 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2079 b = code_string(ss.as_string());
2080 }
2081 BLOCK_COMMENT("verify_oop_addr {");
2082
2083 strip_return_address(); // This might happen within a stack frame.
2084 protect_return_address();
2085 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2086 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2087
2088 // addr may contain sp so we will have to adjust it based on the
2089 // pushes that we just did.
2090 if (addr.uses(sp)) {
2091 lea(r0, addr);
2092 ldr(r0, Address(r0, 4 * wordSize));
2150 call_VM_leaf_base(entry_point, 1);
2151 }
2152
2153 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2154 assert_different_registers(arg_1, c_rarg0);
2155 pass_arg0(this, arg_0);
2156 pass_arg1(this, arg_1);
2157 call_VM_leaf_base(entry_point, 2);
2158 }
2159
2160 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2161 Register arg_1, Register arg_2) {
2162 assert_different_registers(arg_1, c_rarg0);
2163 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2164 pass_arg0(this, arg_0);
2165 pass_arg1(this, arg_1);
2166 pass_arg2(this, arg_2);
2167 call_VM_leaf_base(entry_point, 3);
2168 }
2169
2170 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2171 pass_arg0(this, arg_0);
2172 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2173 }
2174
2175 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2176
2177 assert_different_registers(arg_0, c_rarg1);
2178 pass_arg1(this, arg_1);
2179 pass_arg0(this, arg_0);
2180 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2181 }
2182
2183 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2184 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2185 assert_different_registers(arg_1, c_rarg2);
2186 pass_arg2(this, arg_2);
2187 pass_arg1(this, arg_1);
2188 pass_arg0(this, arg_0);
2189 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2195 assert_different_registers(arg_2, c_rarg3);
2196 pass_arg3(this, arg_3);
2197 pass_arg2(this, arg_2);
2198 pass_arg1(this, arg_1);
2199 pass_arg0(this, arg_0);
2200 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2201 }
2202
2203 void MacroAssembler::null_check(Register reg, int offset) {
2204 if (needs_explicit_null_check(offset)) {
2205 // provoke OS null exception if reg is null by
2206 // accessing M[reg] w/o changing any registers
2207 // NOTE: this is plenty to provoke a segv
2208 ldr(zr, Address(reg));
2209 } else {
2210 // nothing to do, (later) access of M[reg + offset]
2211 // will provoke OS null exception if reg is null
2212 }
2213 }
2214
2215 // MacroAssembler protected routines needed to implement
2216 // public methods
2217
2218 void MacroAssembler::mov(Register r, Address dest) {
2219 code_section()->relocate(pc(), dest.rspec());
2220 uint64_t imm64 = (uint64_t)dest.target();
2221 movptr(r, imm64);
2222 }
2223
2224 // Move a constant pointer into r. In AArch64 mode the virtual
2225 // address space is 48 bits in size, so we only need three
2226 // instructions to create a patchable instruction sequence that can
2227 // reach anywhere.
2228 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2229 #ifndef PRODUCT
2230 {
2231 char buffer[64];
2232 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2233 block_comment(buffer);
2234 }
4986 adrp(rscratch1, src2, offset);
4987 ldr(rscratch1, Address(rscratch1, offset));
4988 cmp(src1, rscratch1);
4989 }
4990
4991 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
4992 cmp(obj1, obj2);
4993 }
4994
4995 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
4996 load_method_holder(rresult, rmethod);
4997 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
4998 }
4999
5000 void MacroAssembler::load_method_holder(Register holder, Register method) {
5001 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5002 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5003 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5004 }
5005
5006 // Loads the obj's Klass* into dst.
5007 // Preserves all registers (incl src, rscratch1 and rscratch2).
5008 // Input:
5009 // src - the oop we want to load the klass from.
5010 // dst - output narrow klass.
5011 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5012 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5013 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5014 lsr(dst, dst, markWord::klass_shift);
5015 }
5016
5017 void MacroAssembler::load_klass(Register dst, Register src) {
5018 if (UseCompactObjectHeaders) {
5019 load_narrow_klass_compact(dst, src);
5020 decode_klass_not_null(dst);
5021 } else if (UseCompressedClassPointers) {
5022 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5023 decode_klass_not_null(dst);
5024 } else {
5025 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5096 }
5097 cmp(klass, tmp);
5098 }
5099
5100 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5101 if (UseCompactObjectHeaders) {
5102 load_narrow_klass_compact(tmp1, obj1);
5103 load_narrow_klass_compact(tmp2, obj2);
5104 cmpw(tmp1, tmp2);
5105 } else if (UseCompressedClassPointers) {
5106 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5107 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5108 cmpw(tmp1, tmp2);
5109 } else {
5110 ldr(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5111 ldr(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5112 cmp(tmp1, tmp2);
5113 }
5114 }
5115
5116 void MacroAssembler::store_klass(Register dst, Register src) {
5117 // FIXME: Should this be a store release? concurrent gcs assumes
5118 // klass length is valid if klass field is not null.
5119 assert(!UseCompactObjectHeaders, "not with compact headers");
5120 if (UseCompressedClassPointers) {
5121 encode_klass_not_null(src);
5122 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5123 } else {
5124 str(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5125 }
5126 }
5127
5128 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5129 assert(!UseCompactObjectHeaders, "not with compact headers");
5130 if (UseCompressedClassPointers) {
5131 // Store to klass gap in destination
5132 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5133 }
5134 }
5135
5497 if (as_raw) {
5498 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5499 } else {
5500 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5501 }
5502 }
5503
5504 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5505 Address dst, Register val,
5506 Register tmp1, Register tmp2, Register tmp3) {
5507 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5508 decorators = AccessInternal::decorator_fixup(decorators, type);
5509 bool as_raw = (decorators & AS_RAW) != 0;
5510 if (as_raw) {
5511 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5512 } else {
5513 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5514 }
5515 }
5516
5517 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5518 Register tmp2, DecoratorSet decorators) {
5519 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5520 }
5521
5522 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5523 Register tmp2, DecoratorSet decorators) {
5524 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5525 }
5526
5527 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5528 Register tmp2, Register tmp3, DecoratorSet decorators) {
5529 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5530 }
5531
5532 // Used for storing nulls.
5533 void MacroAssembler::store_heap_oop_null(Address dst) {
5534 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5535 }
5536
5572 oop_index = oop_recorder()->allocate_metadata_index(obj);
5573 } else {
5574 oop_index = oop_recorder()->find_index(obj);
5575 }
5576 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5577 mov(dst, Address((address)obj, rspec));
5578 }
5579
5580 Address MacroAssembler::constant_oop_address(jobject obj) {
5581 #ifdef ASSERT
5582 {
5583 ThreadInVMfromUnknown tiv;
5584 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5585 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5586 }
5587 #endif
5588 int oop_index = oop_recorder()->find_index(obj);
5589 return Address((address)obj, oop_Relocation::spec(oop_index));
5590 }
5591
5592 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5593 void MacroAssembler::tlab_allocate(Register obj,
5594 Register var_size_in_bytes,
5595 int con_size_in_bytes,
5596 Register t1,
5597 Register t2,
5598 Label& slow_case) {
5599 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5600 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5601 }
5602
5603 void MacroAssembler::verify_tlab() {
5604 #ifdef ASSERT
5605 if (UseTLAB && VerifyOops) {
5606 Label next, ok;
5607
5608 stp(rscratch2, rscratch1, Address(pre(sp, -16)));
5609
5610 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5611 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5612 cmp(rscratch2, rscratch1);
5613 br(Assembler::HS, next);
5614 STOP("assert(top >= start)");
5615 should_not_reach_here();
5616
5617 bind(next);
5618 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5619 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5620 cmp(rscratch2, rscratch1);
5621 br(Assembler::HS, ok);
5622 STOP("assert(top <= end)");
5623 should_not_reach_here();
5624
5625 bind(ok);
5626 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5627 }
5628 #endif
5629 }
5630
5631 // Writes to stack successive pages until offset reached to check for
5632 // stack overflow + shadow pages. This clobbers tmp.
5633 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5634 assert_different_registers(tmp, size, rscratch1);
5635 mov(tmp, sp);
5636 // Bang stack for total size given plus shadow page size.
5637 // Bang one page at a time because large size can bang beyond yellow and
5638 // red zones.
5639 Label loop;
5640 mov(rscratch1, (int)os::vm_page_size());
5641 bind(loop);
5642 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5643 subsw(size, size, rscratch1);
5644 str(size, Address(tmp));
5645 br(Assembler::GT, loop);
5646
5647 // Bang down shadow pages too.
5648 // At this point, (tmp-0) is the last address touched, so don't
5649 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5650 // was post-decremented.) Skip this address by starting at i=1, and
5736 }
5737
5738 void MacroAssembler::remove_frame(int framesize) {
5739 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5740 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5741 if (framesize < ((1 << 9) + 2 * wordSize)) {
5742 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5743 add(sp, sp, framesize);
5744 } else {
5745 if (framesize < ((1 << 12) + 2 * wordSize))
5746 add(sp, sp, framesize - 2 * wordSize);
5747 else {
5748 mov(rscratch1, framesize - 2 * wordSize);
5749 add(sp, sp, rscratch1);
5750 }
5751 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5752 }
5753 authenticate_return_address();
5754 }
5755
5756
5757 // This method counts leading positive bytes (highest bit not set) in provided byte array
5758 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
5759 // Simple and most common case of aligned small array which is not at the
5760 // end of memory page is placed here. All other cases are in stub.
5761 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
5762 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
5763 assert_different_registers(ary1, len, result);
5764
5765 mov(result, len);
5766 cmpw(len, 0);
5767 br(LE, DONE);
5768 cmpw(len, 4 * wordSize);
5769 br(GE, STUB_LONG); // size > 32 then go to stub
5770
5771 int shift = 64 - exact_log2(os::vm_page_size());
5772 lsl(rscratch1, ary1, shift);
5773 mov(rscratch2, (size_t)(4 * wordSize) << shift);
5774 adds(rscratch2, rscratch1, rscratch2); // At end of page?
5775 br(CS, STUB); // at the end of page then go to stub
6653 // On other systems, the helper is a usual C function.
6654 //
6655 void MacroAssembler::get_thread(Register dst) {
6656 RegSet saved_regs =
6657 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
6658 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
6659
6660 protect_return_address();
6661 push(saved_regs, sp);
6662
6663 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6664 blr(lr);
6665 if (dst != c_rarg0) {
6666 mov(dst, c_rarg0);
6667 }
6668
6669 pop(saved_regs, sp);
6670 authenticate_return_address();
6671 }
6672
6673 void MacroAssembler::cache_wb(Address line) {
6674 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
6675 assert(line.index() == noreg, "index should be noreg");
6676 assert(line.offset() == 0, "offset should be 0");
6677 // would like to assert this
6678 // assert(line._ext.shift == 0, "shift should be zero");
6679 if (VM_Version::supports_dcpop()) {
6680 // writeback using clear virtual address to point of persistence
6681 dc(Assembler::CVAP, line.base());
6682 } else {
6683 // no need to generate anything as Unsafe.writebackMemory should
6684 // never invoke this stub
6685 }
6686 }
6687
6688 void MacroAssembler::cache_wbsync(bool is_pre) {
6689 // we only need a barrier post sync
6690 if (!is_pre) {
6691 membar(Assembler::AnyAny);
6692 }
7063 }
7064
7065 // Check if the lock-stack is full.
7066 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7067 cmpw(top, (unsigned)LockStack::end_offset());
7068 br(Assembler::GE, slow);
7069
7070 // Check for recursion.
7071 subw(t, top, oopSize);
7072 ldr(t, Address(rthread, t));
7073 cmp(obj, t);
7074 br(Assembler::EQ, push);
7075
7076 // Check header for monitor (0b10).
7077 tst(mark, markWord::monitor_value);
7078 br(Assembler::NE, slow);
7079
7080 // Try to lock. Transition lock bits 0b01 => 0b00
7081 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7082 orr(mark, mark, markWord::unlocked_value);
7083 eor(t, mark, markWord::unlocked_value);
7084 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7085 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7086 br(Assembler::NE, slow);
7087
7088 bind(push);
7089 // After successful lock, push object on lock-stack.
7090 str(obj, Address(rthread, top));
7091 addw(top, top, oopSize);
7092 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7093 }
7094
7095 // Implements lightweight-unlocking.
7096 //
7097 // - obj: the object to be unlocked
7098 // - t1, t2, t3: temporary registers
7099 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7100 void MacroAssembler::lightweight_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7101 // cmpxchg clobbers rscratch1.
7102 assert_different_registers(obj, t1, t2, t3, rscratch1);
|
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "ci/ciInlineKlass.hpp"
30 #include "code/compiledIC.hpp"
31 #include "compiler/compileTask.hpp"
32 #include "compiler/disassembler.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "gc/shared/cardTableBarrierSet.hpp"
37 #include "gc/shared/cardTable.hpp"
38 #include "gc/shared/collectedHeap.hpp"
39 #include "gc/shared/tlab_globals.hpp"
40 #include "interpreter/bytecodeHistogram.hpp"
41 #include "interpreter/interpreter.hpp"
42 #include "interpreter/interpreterRuntime.hpp"
43 #include "jvm.h"
44 #include "memory/resourceArea.hpp"
45 #include "memory/universe.hpp"
46 #include "nativeInst_aarch64.hpp"
47 #include "oops/accessDecorators.hpp"
48 #include "oops/compressedKlass.inline.hpp"
49 #include "oops/compressedOops.inline.hpp"
50 #include "oops/klass.inline.hpp"
51 #include "oops/resolvedFieldEntry.hpp"
52 #include "runtime/continuation.hpp"
53 #include "runtime/globals.hpp"
54 #include "runtime/icache.hpp"
55 #include "runtime/interfaceSupport.inline.hpp"
56 #include "runtime/javaThread.hpp"
57 #include "runtime/jniHandles.inline.hpp"
58 #include "runtime/sharedRuntime.hpp"
59 #include "runtime/signature_cc.hpp"
60 #include "runtime/stubRoutines.hpp"
61 #include "utilities/globalDefinitions.hpp"
62 #include "utilities/powerOfTwo.hpp"
63 #include "vmreg_aarch64.inline.hpp"
64 #ifdef COMPILER1
65 #include "c1/c1_LIRAssembler.hpp"
66 #endif
67 #ifdef COMPILER2
68 #include "oops/oop.hpp"
69 #include "opto/compile.hpp"
70 #include "opto/node.hpp"
71 #include "opto/output.hpp"
72 #endif
73
74 #include <sys/types.h>
75
76 #ifdef PRODUCT
77 #define BLOCK_COMMENT(str) /* nothing */
78 #else
79 #define BLOCK_COMMENT(str) block_comment(str)
80 #endif
81 #define STOP(str) stop(str);
82 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
83
2024 ldarb(scratch, scratch);
2025 cmp(scratch, InstanceKlass::fully_initialized);
2026 br(Assembler::EQ, *L_fast_path);
2027
2028 // Fast path check: current thread is initializer thread
2029 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2030 cmp(rthread, scratch);
2031
2032 if (L_slow_path == &L_fallthrough) {
2033 br(Assembler::EQ, *L_fast_path);
2034 bind(*L_slow_path);
2035 } else if (L_fast_path == &L_fallthrough) {
2036 br(Assembler::NE, *L_slow_path);
2037 bind(*L_fast_path);
2038 } else {
2039 Unimplemented();
2040 }
2041 }
2042
2043 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2044 if (!VerifyOops || VerifyAdapterSharing) {
2045 // Below address of the code string confuses VerifyAdapterSharing
2046 // because it may differ between otherwise equivalent adapters.
2047 return;
2048 }
2049
2050 // Pass register number to verify_oop_subroutine
2051 const char* b = nullptr;
2052 {
2053 ResourceMark rm;
2054 stringStream ss;
2055 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2056 b = code_string(ss.as_string());
2057 }
2058 BLOCK_COMMENT("verify_oop {");
2059
2060 strip_return_address(); // This might happen within a stack frame.
2061 protect_return_address();
2062 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2063 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2064
2065 mov(r0, reg);
2066 movptr(rscratch1, (uintptr_t)(address)b);
2067
2068 // call indirectly to solve generation ordering problem
2069 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2070 ldr(rscratch2, Address(rscratch2));
2071 blr(rscratch2);
2072
2073 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2074 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2075 authenticate_return_address();
2076
2077 BLOCK_COMMENT("} verify_oop");
2078 }
2079
2080 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2081 if (!VerifyOops || VerifyAdapterSharing) {
2082 // Below address of the code string confuses VerifyAdapterSharing
2083 // because it may differ between otherwise equivalent adapters.
2084 return;
2085 }
2086
2087 const char* b = nullptr;
2088 {
2089 ResourceMark rm;
2090 stringStream ss;
2091 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2092 b = code_string(ss.as_string());
2093 }
2094 BLOCK_COMMENT("verify_oop_addr {");
2095
2096 strip_return_address(); // This might happen within a stack frame.
2097 protect_return_address();
2098 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2099 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2100
2101 // addr may contain sp so we will have to adjust it based on the
2102 // pushes that we just did.
2103 if (addr.uses(sp)) {
2104 lea(r0, addr);
2105 ldr(r0, Address(r0, 4 * wordSize));
2163 call_VM_leaf_base(entry_point, 1);
2164 }
2165
2166 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2167 assert_different_registers(arg_1, c_rarg0);
2168 pass_arg0(this, arg_0);
2169 pass_arg1(this, arg_1);
2170 call_VM_leaf_base(entry_point, 2);
2171 }
2172
2173 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2174 Register arg_1, Register arg_2) {
2175 assert_different_registers(arg_1, c_rarg0);
2176 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2177 pass_arg0(this, arg_0);
2178 pass_arg1(this, arg_1);
2179 pass_arg2(this, arg_2);
2180 call_VM_leaf_base(entry_point, 3);
2181 }
2182
2183 void MacroAssembler::super_call_VM_leaf(address entry_point) {
2184 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2185 }
2186
2187 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2188 pass_arg0(this, arg_0);
2189 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2190 }
2191
2192 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2193
2194 assert_different_registers(arg_0, c_rarg1);
2195 pass_arg1(this, arg_1);
2196 pass_arg0(this, arg_0);
2197 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2198 }
2199
2200 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2201 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2202 assert_different_registers(arg_1, c_rarg2);
2203 pass_arg2(this, arg_2);
2204 pass_arg1(this, arg_1);
2205 pass_arg0(this, arg_0);
2206 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2212 assert_different_registers(arg_2, c_rarg3);
2213 pass_arg3(this, arg_3);
2214 pass_arg2(this, arg_2);
2215 pass_arg1(this, arg_1);
2216 pass_arg0(this, arg_0);
2217 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2218 }
2219
2220 void MacroAssembler::null_check(Register reg, int offset) {
2221 if (needs_explicit_null_check(offset)) {
2222 // provoke OS null exception if reg is null by
2223 // accessing M[reg] w/o changing any registers
2224 // NOTE: this is plenty to provoke a segv
2225 ldr(zr, Address(reg));
2226 } else {
2227 // nothing to do, (later) access of M[reg + offset]
2228 // will provoke OS null exception if reg is null
2229 }
2230 }
2231
2232 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2233 assert_different_registers(markword, rscratch2);
2234 mov(rscratch2, markWord::inline_type_mask_in_place);
2235 andr(markword, markword, rscratch2);
2236 mov(rscratch2, markWord::inline_type_pattern);
2237 cmp(markword, rscratch2);
2238 br(Assembler::EQ, is_inline_type);
2239 }
2240
2241 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2242 assert_different_registers(tmp, rscratch1);
2243 if (can_be_null) {
2244 cbz(object, not_inline_type);
2245 }
2246 const int is_inline_type_mask = markWord::inline_type_pattern;
2247 ldr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2248 mov(rscratch1, is_inline_type_mask);
2249 andr(tmp, tmp, rscratch1);
2250 cmp(tmp, rscratch1);
2251 br(Assembler::NE, not_inline_type);
2252 }
2253
2254 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2255 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2256 tbnz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, is_null_free_inline_type);
2257 }
2258
2259 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2260 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2261 tbz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, not_null_free_inline_type);
2262 }
2263
2264 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2265 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2266 tbnz(flags, ResolvedFieldEntry::is_flat_shift, is_flat);
2267 }
2268
2269 void MacroAssembler::test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker) {
2270 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2271 tbnz(flags, ResolvedFieldEntry::has_null_marker_shift, has_null_marker);
2272 }
2273
2274 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2275 Label test_mark_word;
2276 // load mark word
2277 ldr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2278 // check displaced
2279 tst(temp_reg, markWord::unlocked_value);
2280 br(Assembler::NE, test_mark_word);
2281 // slow path use klass prototype
2282 load_prototype_header(temp_reg, oop);
2283
2284 bind(test_mark_word);
2285 andr(temp_reg, temp_reg, test_bit);
2286 if (jmp_set) {
2287 cbnz(temp_reg, jmp_label);
2288 } else {
2289 cbz(temp_reg, jmp_label);
2290 }
2291 }
2292
2293 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array) {
2294 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2295 }
2296
2297 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2298 Label&is_non_flat_array) {
2299 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2300 }
2301
2302 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array) {
2303 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2304 }
2305
2306 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2307 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2308 }
2309
2310 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2311 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2312 br(Assembler::NE, is_flat_array);
2313 }
2314
2315 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
2316 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2317 br(Assembler::EQ, is_non_flat_array);
2318 }
2319
2320 // MacroAssembler protected routines needed to implement
2321 // public methods
2322
2323 void MacroAssembler::mov(Register r, Address dest) {
2324 code_section()->relocate(pc(), dest.rspec());
2325 uint64_t imm64 = (uint64_t)dest.target();
2326 movptr(r, imm64);
2327 }
2328
2329 // Move a constant pointer into r. In AArch64 mode the virtual
2330 // address space is 48 bits in size, so we only need three
2331 // instructions to create a patchable instruction sequence that can
2332 // reach anywhere.
2333 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2334 #ifndef PRODUCT
2335 {
2336 char buffer[64];
2337 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2338 block_comment(buffer);
2339 }
5091 adrp(rscratch1, src2, offset);
5092 ldr(rscratch1, Address(rscratch1, offset));
5093 cmp(src1, rscratch1);
5094 }
5095
5096 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5097 cmp(obj1, obj2);
5098 }
5099
5100 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5101 load_method_holder(rresult, rmethod);
5102 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5103 }
5104
5105 void MacroAssembler::load_method_holder(Register holder, Register method) {
5106 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5107 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5108 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5109 }
5110
5111 void MacroAssembler::load_metadata(Register dst, Register src) {
5112 if (UseCompactObjectHeaders) {
5113 load_narrow_klass_compact(dst, src);
5114 } else if (UseCompressedClassPointers) {
5115 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5116 } else {
5117 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5118 }
5119 }
5120
5121 // Loads the obj's Klass* into dst.
5122 // Preserves all registers (incl src, rscratch1 and rscratch2).
5123 // Input:
5124 // src - the oop we want to load the klass from.
5125 // dst - output narrow klass.
5126 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5127 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5128 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5129 lsr(dst, dst, markWord::klass_shift);
5130 }
5131
5132 void MacroAssembler::load_klass(Register dst, Register src) {
5133 if (UseCompactObjectHeaders) {
5134 load_narrow_klass_compact(dst, src);
5135 decode_klass_not_null(dst);
5136 } else if (UseCompressedClassPointers) {
5137 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5138 decode_klass_not_null(dst);
5139 } else {
5140 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5211 }
5212 cmp(klass, tmp);
5213 }
5214
5215 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5216 if (UseCompactObjectHeaders) {
5217 load_narrow_klass_compact(tmp1, obj1);
5218 load_narrow_klass_compact(tmp2, obj2);
5219 cmpw(tmp1, tmp2);
5220 } else if (UseCompressedClassPointers) {
5221 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5222 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5223 cmpw(tmp1, tmp2);
5224 } else {
5225 ldr(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5226 ldr(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5227 cmp(tmp1, tmp2);
5228 }
5229 }
5230
5231 void MacroAssembler::load_prototype_header(Register dst, Register src) {
5232 load_klass(dst, src);
5233 ldr(dst, Address(dst, Klass::prototype_header_offset()));
5234 }
5235
5236 void MacroAssembler::store_klass(Register dst, Register src) {
5237 // FIXME: Should this be a store release? concurrent gcs assumes
5238 // klass length is valid if klass field is not null.
5239 assert(!UseCompactObjectHeaders, "not with compact headers");
5240 if (UseCompressedClassPointers) {
5241 encode_klass_not_null(src);
5242 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5243 } else {
5244 str(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5245 }
5246 }
5247
5248 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5249 assert(!UseCompactObjectHeaders, "not with compact headers");
5250 if (UseCompressedClassPointers) {
5251 // Store to klass gap in destination
5252 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5253 }
5254 }
5255
5617 if (as_raw) {
5618 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5619 } else {
5620 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5621 }
5622 }
5623
5624 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5625 Address dst, Register val,
5626 Register tmp1, Register tmp2, Register tmp3) {
5627 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5628 decorators = AccessInternal::decorator_fixup(decorators, type);
5629 bool as_raw = (decorators & AS_RAW) != 0;
5630 if (as_raw) {
5631 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5632 } else {
5633 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5634 }
5635 }
5636
5637 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5638 Register inline_layout_info) {
5639 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5640 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5641 }
5642
5643 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5644 ldr(offset, Address(inline_klass, InstanceKlass::adr_inlineklass_fixed_block_offset()));
5645 ldrw(offset, Address(offset, InlineKlass::payload_offset_offset()));
5646 }
5647
5648 void MacroAssembler::payload_address(Register oop, Register data, Register inline_klass) {
5649 // ((address) (void*) o) + vk->payload_offset();
5650 Register offset = (data == oop) ? rscratch1 : data;
5651 payload_offset(inline_klass, offset);
5652 if (data == oop) {
5653 add(data, data, offset);
5654 } else {
5655 lea(data, Address(oop, offset));
5656 }
5657 }
5658
5659 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
5660 Register index, Register data) {
5661 assert_different_registers(array, array_klass, index);
5662 assert_different_registers(rscratch1, array, index);
5663
5664 // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
5665 ldrw(rscratch1, Address(array_klass, Klass::layout_helper_offset()));
5666
5667 // Klass::layout_helper_log2_element_size(lh)
5668 // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
5669 lsr(rscratch1, rscratch1, Klass::_lh_log2_element_size_shift);
5670 andr(rscratch1, rscratch1, Klass::_lh_log2_element_size_mask);
5671 lslv(index, index, rscratch1);
5672
5673 add(data, array, index);
5674 add(data, data, arrayOopDesc::base_offset_in_bytes(T_FLAT_ELEMENT));
5675 }
5676
5677 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5678 Register tmp2, DecoratorSet decorators) {
5679 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5680 }
5681
5682 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5683 Register tmp2, DecoratorSet decorators) {
5684 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5685 }
5686
5687 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5688 Register tmp2, Register tmp3, DecoratorSet decorators) {
5689 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5690 }
5691
5692 // Used for storing nulls.
5693 void MacroAssembler::store_heap_oop_null(Address dst) {
5694 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5695 }
5696
5732 oop_index = oop_recorder()->allocate_metadata_index(obj);
5733 } else {
5734 oop_index = oop_recorder()->find_index(obj);
5735 }
5736 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5737 mov(dst, Address((address)obj, rspec));
5738 }
5739
5740 Address MacroAssembler::constant_oop_address(jobject obj) {
5741 #ifdef ASSERT
5742 {
5743 ThreadInVMfromUnknown tiv;
5744 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5745 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5746 }
5747 #endif
5748 int oop_index = oop_recorder()->find_index(obj);
5749 return Address((address)obj, oop_Relocation::spec(oop_index));
5750 }
5751
5752 // Object / value buffer allocation...
5753 void MacroAssembler::allocate_instance(Register klass, Register new_obj,
5754 Register t1, Register t2,
5755 bool clear_fields, Label& alloc_failed)
5756 {
5757 Label done, initialize_header, initialize_object, slow_case, slow_case_no_pop;
5758 Register layout_size = t1;
5759 assert(new_obj == r0, "needs to be r0");
5760 assert_different_registers(klass, new_obj, t1, t2);
5761
5762 // get instance_size in InstanceKlass (scaled to a count of bytes)
5763 ldrw(layout_size, Address(klass, Klass::layout_helper_offset()));
5764 // test to see if it is malformed in some way
5765 tst(layout_size, Klass::_lh_instance_slow_path_bit);
5766 br(Assembler::NE, slow_case_no_pop);
5767
5768 // Allocate the instance:
5769 // If TLAB is enabled:
5770 // Try to allocate in the TLAB.
5771 // If fails, go to the slow path.
5772 // Initialize the allocation.
5773 // Exit.
5774 //
5775 // Go to slow path.
5776
5777 if (UseTLAB) {
5778 push(klass);
5779 tlab_allocate(new_obj, layout_size, 0, klass, t2, slow_case);
5780 if (ZeroTLAB || (!clear_fields)) {
5781 // the fields have been already cleared
5782 b(initialize_header);
5783 } else {
5784 // initialize both the header and fields
5785 b(initialize_object);
5786 }
5787
5788 if (clear_fields) {
5789 // The object is initialized before the header. If the object size is
5790 // zero, go directly to the header initialization.
5791 bind(initialize_object);
5792 int header_size = oopDesc::header_size() * HeapWordSize;
5793 assert(is_aligned(header_size, BytesPerLong), "oop header size must be 8-byte-aligned");
5794 subs(layout_size, layout_size, header_size);
5795 br(Assembler::EQ, initialize_header);
5796
5797 // Initialize topmost object field, divide size by 8, check if odd and
5798 // test if zero.
5799
5800 #ifdef ASSERT
5801 // make sure instance_size was multiple of 8
5802 Label L;
5803 tst(layout_size, 7);
5804 br(Assembler::EQ, L);
5805 stop("object size is not multiple of 8 - adjust this code");
5806 bind(L);
5807 // must be > 0, no extra check needed here
5808 #endif
5809
5810 lsr(layout_size, layout_size, LogBytesPerLong);
5811
5812 // initialize remaining object fields: instance_size was a multiple of 8
5813 {
5814 Label loop;
5815 Register base = t2;
5816
5817 bind(loop);
5818 add(rscratch1, new_obj, layout_size, Assembler::LSL, LogBytesPerLong);
5819 str(zr, Address(rscratch1, header_size - 1*oopSize));
5820 subs(layout_size, layout_size, 1);
5821 br(Assembler::NE, loop);
5822 }
5823 } // clear_fields
5824
5825 // initialize object header only.
5826 bind(initialize_header);
5827 pop(klass);
5828 Register mark_word = t2;
5829 if (UseCompactObjectHeaders || EnableValhalla) {
5830 ldr(mark_word, Address(klass, Klass::prototype_header_offset()));
5831 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5832 } else {
5833 mov(mark_word, (intptr_t)markWord::prototype().value());
5834 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5835 }
5836 if (!UseCompactObjectHeaders) {
5837 store_klass_gap(new_obj, zr); // zero klass gap for compressed oops
5838 mov(t2, klass); // preserve klass
5839 store_klass(new_obj, t2); // src klass reg is potentially compressed
5840 }
5841 b(done);
5842 }
5843
5844 if (UseTLAB) {
5845 bind(slow_case);
5846 pop(klass);
5847 }
5848 bind(slow_case_no_pop);
5849 b(alloc_failed);
5850
5851 bind(done);
5852 }
5853
5854 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5855 void MacroAssembler::tlab_allocate(Register obj,
5856 Register var_size_in_bytes,
5857 int con_size_in_bytes,
5858 Register t1,
5859 Register t2,
5860 Label& slow_case) {
5861 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5862 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5863 }
5864
5865 void MacroAssembler::verify_tlab() {
5866 #ifdef ASSERT
5867 if (UseTLAB && VerifyOops) {
5868 Label next, ok;
5869
5870 stp(rscratch2, rscratch1, Address(pre(sp, -16)));
5871
5872 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5873 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5874 cmp(rscratch2, rscratch1);
5875 br(Assembler::HS, next);
5876 STOP("assert(top >= start)");
5877 should_not_reach_here();
5878
5879 bind(next);
5880 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5881 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5882 cmp(rscratch2, rscratch1);
5883 br(Assembler::HS, ok);
5884 STOP("assert(top <= end)");
5885 should_not_reach_here();
5886
5887 bind(ok);
5888 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5889 }
5890 #endif
5891 }
5892
5893 void MacroAssembler::get_inline_type_field_klass(Register holder_klass, Register index, Register inline_klass) {
5894 inline_layout_info(holder_klass, index, inline_klass);
5895 ldr(inline_klass, Address(inline_klass, InlineLayoutInfo::klass_offset()));
5896 }
5897
5898 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
5899 assert_different_registers(holder_klass, index, layout_info);
5900 InlineLayoutInfo array[2];
5901 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
5902 if (is_power_of_2(size)) {
5903 lsl(index, index, log2i_exact(size)); // Scale index by power of 2
5904 } else {
5905 mov(layout_info, size);
5906 mul(index, index, layout_info); // Scale the index to be the entry index * array_element_size
5907 }
5908 ldr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
5909 add(layout_info, layout_info, Array<InlineLayoutInfo>::base_offset_in_bytes());
5910 lea(layout_info, Address(layout_info, index));
5911 }
5912
5913 // Writes to stack successive pages until offset reached to check for
5914 // stack overflow + shadow pages. This clobbers tmp.
5915 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5916 assert_different_registers(tmp, size, rscratch1);
5917 mov(tmp, sp);
5918 // Bang stack for total size given plus shadow page size.
5919 // Bang one page at a time because large size can bang beyond yellow and
5920 // red zones.
5921 Label loop;
5922 mov(rscratch1, (int)os::vm_page_size());
5923 bind(loop);
5924 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5925 subsw(size, size, rscratch1);
5926 str(size, Address(tmp));
5927 br(Assembler::GT, loop);
5928
5929 // Bang down shadow pages too.
5930 // At this point, (tmp-0) is the last address touched, so don't
5931 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5932 // was post-decremented.) Skip this address by starting at i=1, and
6018 }
6019
6020 void MacroAssembler::remove_frame(int framesize) {
6021 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
6022 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
6023 if (framesize < ((1 << 9) + 2 * wordSize)) {
6024 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
6025 add(sp, sp, framesize);
6026 } else {
6027 if (framesize < ((1 << 12) + 2 * wordSize))
6028 add(sp, sp, framesize - 2 * wordSize);
6029 else {
6030 mov(rscratch1, framesize - 2 * wordSize);
6031 add(sp, sp, rscratch1);
6032 }
6033 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6034 }
6035 authenticate_return_address();
6036 }
6037
6038 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6039 if (needs_stack_repair) {
6040 // Remove the extension of the caller's frame used for inline type unpacking
6041 //
6042 // Right now the stack looks like this:
6043 //
6044 // | Arguments from caller |
6045 // |---------------------------| <-- caller's SP
6046 // | Saved LR #1 |
6047 // | Saved FP #1 |
6048 // |---------------------------|
6049 // | Extension space for |
6050 // | inline arg (un)packing |
6051 // |---------------------------| <-- start of this method's frame
6052 // | Saved LR #2 |
6053 // | Saved FP #2 |
6054 // |---------------------------| <-- FP
6055 // | sp_inc |
6056 // | method locals |
6057 // |---------------------------| <-- SP
6058 //
6059 // There are two copies of FP and LR on the stack. They will be identical at
6060 // first, but that can change.
6061 // If the caller has been deoptimized, LR #1 will be patched to point at the
6062 // deopt blob, and LR #2 will still point into the old method.
6063 // If the saved FP (x29) was not used as the frame pointer, but to store an
6064 // oop, the GC will be aware only of FP #2 as the spilled location of x29 and
6065 // will fix only this one.
6066 //
6067 // When restoring, one must then load FP #2 into x29, and LR #1 into x30,
6068 // while keeping in mind that from the scalarized entry point, there will be
6069 // only one copy of each.
6070 //
6071 // The sp_inc stack slot holds the total size of the frame including the
6072 // extension space minus two words for the saved FP and LR. That is how to
6073 // find LR #1. FP #2 is always located just after sp_inc.
6074
6075 int sp_inc_offset = initial_framesize - 3 * wordSize; // Immediately below saved LR and FP
6076
6077 ldr(rscratch1, Address(sp, sp_inc_offset));
6078 ldr(rfp, Address(sp, sp_inc_offset + wordSize));
6079 add(sp, sp, rscratch1);
6080 ldr(lr, Address(sp, wordSize));
6081 add(sp, sp, 2 * wordSize);
6082 } else {
6083 remove_frame(initial_framesize);
6084 }
6085 }
6086
6087 void MacroAssembler::save_stack_increment(int sp_inc, int frame_size) {
6088 int real_frame_size = frame_size + sp_inc;
6089 assert(sp_inc == 0 || sp_inc > 2*wordSize, "invalid sp_inc value");
6090 assert(real_frame_size >= 2*wordSize, "frame size must include FP/LR space");
6091 assert((real_frame_size & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6092
6093 int sp_inc_offset = frame_size - 3 * wordSize; // Immediately below saved LR and FP
6094
6095 // Subtract two words for the saved FP and LR as these will be popped
6096 // separately. See remove_frame above.
6097 mov(rscratch1, real_frame_size - 2*wordSize);
6098 str(rscratch1, Address(sp, sp_inc_offset));
6099 }
6100
6101 // This method counts leading positive bytes (highest bit not set) in provided byte array
6102 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
6103 // Simple and most common case of aligned small array which is not at the
6104 // end of memory page is placed here. All other cases are in stub.
6105 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
6106 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
6107 assert_different_registers(ary1, len, result);
6108
6109 mov(result, len);
6110 cmpw(len, 0);
6111 br(LE, DONE);
6112 cmpw(len, 4 * wordSize);
6113 br(GE, STUB_LONG); // size > 32 then go to stub
6114
6115 int shift = 64 - exact_log2(os::vm_page_size());
6116 lsl(rscratch1, ary1, shift);
6117 mov(rscratch2, (size_t)(4 * wordSize) << shift);
6118 adds(rscratch2, rscratch1, rscratch2); // At end of page?
6119 br(CS, STUB); // at the end of page then go to stub
6997 // On other systems, the helper is a usual C function.
6998 //
6999 void MacroAssembler::get_thread(Register dst) {
7000 RegSet saved_regs =
7001 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
7002 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
7003
7004 protect_return_address();
7005 push(saved_regs, sp);
7006
7007 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
7008 blr(lr);
7009 if (dst != c_rarg0) {
7010 mov(dst, c_rarg0);
7011 }
7012
7013 pop(saved_regs, sp);
7014 authenticate_return_address();
7015 }
7016
7017 #ifdef COMPILER2
7018 // C2 compiled method's prolog code
7019 // Moved here from aarch64.ad to support Valhalla code belows
7020 void MacroAssembler::verified_entry(Compile* C, int sp_inc) {
7021 if (C->clinit_barrier_on_entry()) {
7022 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
7023
7024 Label L_skip_barrier;
7025
7026 mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
7027 clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
7028 far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
7029 bind(L_skip_barrier);
7030 }
7031
7032 if (C->max_vector_size() > 0) {
7033 reinitialize_ptrue();
7034 }
7035
7036 int bangsize = C->output()->bang_size_in_bytes();
7037 if (C->output()->need_stack_bang(bangsize))
7038 generate_stack_overflow_check(bangsize);
7039
7040 // n.b. frame size includes space for return pc and rfp
7041 const long framesize = C->output()->frame_size_in_bytes();
7042 build_frame(framesize);
7043
7044 if (C->needs_stack_repair()) {
7045 save_stack_increment(sp_inc, framesize);
7046 }
7047
7048 if (VerifyStackAtCalls) {
7049 Unimplemented();
7050 }
7051 }
7052 #endif // COMPILER2
7053
7054 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
7055 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
7056 // An inline type might be returned. If fields are in registers we
7057 // need to allocate an inline type instance and initialize it with
7058 // the value of the fields.
7059 Label skip;
7060 // We only need a new buffered inline type if a new one is not returned
7061 tbz(r0, 0, skip);
7062 int call_offset = -1;
7063
7064 // Be careful not to clobber r1-7 which hold returned fields
7065 // Also do not use callee-saved registers as these may be live in the interpreter
7066 Register tmp1 = r13, tmp2 = r14, klass = r15, r0_preserved = r12;
7067
7068 // The following code is similar to allocate_instance but has some slight differences,
7069 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
7070 // allocating is not necessary if vk != nullptr, etc. allocate_instance is not aware of these.
7071 Label slow_case;
7072 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
7073 mov(r0_preserved, r0); // save r0 for slow_case since *_allocate may corrupt it when allocation failed
7074
7075 if (vk != nullptr) {
7076 // Called from C1, where the return type is statically known.
7077 movptr(klass, (intptr_t)vk->get_InlineKlass());
7078 jint lh = vk->layout_helper();
7079 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
7080 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
7081 tlab_allocate(r0, noreg, lh, tmp1, tmp2, slow_case);
7082 } else {
7083 b(slow_case);
7084 }
7085 } else {
7086 // Call from interpreter. R0 contains ((the InlineKlass* of the return type) | 0x01)
7087 andr(klass, r0, -2);
7088 if (UseTLAB) {
7089 ldrw(tmp2, Address(klass, Klass::layout_helper_offset()));
7090 tst(tmp2, Klass::_lh_instance_slow_path_bit);
7091 br(Assembler::NE, slow_case);
7092 tlab_allocate(r0, tmp2, 0, tmp1, tmp2, slow_case);
7093 } else {
7094 b(slow_case);
7095 }
7096 }
7097 if (UseTLAB) {
7098 // 2. Initialize buffered inline instance header
7099 Register buffer_obj = r0;
7100 if (UseCompactObjectHeaders) {
7101 ldr(rscratch1, Address(klass, Klass::prototype_header_offset()));
7102 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7103 } else {
7104 mov(rscratch1, (intptr_t)markWord::inline_type_prototype().value());
7105 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7106 store_klass_gap(buffer_obj, zr);
7107 if (vk == nullptr) {
7108 // store_klass corrupts klass, so save it for later use (interpreter case only).
7109 mov(tmp1, klass);
7110 }
7111 store_klass(buffer_obj, klass);
7112 klass = tmp1;
7113 }
7114 // 3. Initialize its fields with an inline class specific handler
7115 if (vk != nullptr) {
7116 far_call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
7117 } else {
7118 ldr(tmp1, Address(klass, InstanceKlass::adr_inlineklass_fixed_block_offset()));
7119 ldr(tmp1, Address(tmp1, InlineKlass::pack_handler_offset()));
7120 blr(tmp1);
7121 }
7122
7123 membar(Assembler::StoreStore);
7124 b(skip);
7125 } else {
7126 // Must have already branched to slow_case above.
7127 DEBUG_ONLY(should_not_reach_here());
7128 }
7129 bind(slow_case);
7130 // We failed to allocate a new inline type, fall back to a runtime
7131 // call. Some oop field may be live in some registers but we can't
7132 // tell. That runtime call will take care of preserving them
7133 // across a GC if there's one.
7134 mov(r0, r0_preserved);
7135
7136 if (from_interpreter) {
7137 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
7138 } else {
7139 far_call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
7140 call_offset = offset();
7141 }
7142 membar(Assembler::StoreStore);
7143
7144 bind(skip);
7145 return call_offset;
7146 }
7147
7148 // Move a value between registers/stack slots and update the reg_state
7149 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
7150 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
7151 if (reg_state[to->value()] == reg_written) {
7152 return true; // Already written
7153 }
7154
7155 if (from != to && bt != T_VOID) {
7156 if (reg_state[to->value()] == reg_readonly) {
7157 return false; // Not yet writable
7158 }
7159 if (from->is_reg()) {
7160 if (to->is_reg()) {
7161 if (from->is_Register() && to->is_Register()) {
7162 mov(to->as_Register(), from->as_Register());
7163 } else if (from->is_FloatRegister() && to->is_FloatRegister()) {
7164 fmovd(to->as_FloatRegister(), from->as_FloatRegister());
7165 } else {
7166 ShouldNotReachHere();
7167 }
7168 } else {
7169 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7170 Address to_addr = Address(sp, st_off);
7171 if (from->is_FloatRegister()) {
7172 if (bt == T_DOUBLE) {
7173 strd(from->as_FloatRegister(), to_addr);
7174 } else {
7175 assert(bt == T_FLOAT, "must be float");
7176 strs(from->as_FloatRegister(), to_addr);
7177 }
7178 } else {
7179 str(from->as_Register(), to_addr);
7180 }
7181 }
7182 } else {
7183 Address from_addr = Address(sp, from->reg2stack() * VMRegImpl::stack_slot_size);
7184 if (to->is_reg()) {
7185 if (to->is_FloatRegister()) {
7186 if (bt == T_DOUBLE) {
7187 ldrd(to->as_FloatRegister(), from_addr);
7188 } else {
7189 assert(bt == T_FLOAT, "must be float");
7190 ldrs(to->as_FloatRegister(), from_addr);
7191 }
7192 } else {
7193 ldr(to->as_Register(), from_addr);
7194 }
7195 } else {
7196 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7197 ldr(rscratch1, from_addr);
7198 str(rscratch1, Address(sp, st_off));
7199 }
7200 }
7201 }
7202
7203 // Update register states
7204 reg_state[from->value()] = reg_writable;
7205 reg_state[to->value()] = reg_written;
7206 return true;
7207 }
7208
7209 // Calculate the extra stack space required for packing or unpacking inline
7210 // args and adjust the stack pointer
7211 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
7212 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
7213 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
7214 assert(sp_inc > 0, "sanity");
7215
7216 // Save a copy of the FP and LR here for deoptimization patching and frame walking
7217 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
7218
7219 // Adjust the stack pointer. This will be repaired on return by MacroAssembler::remove_frame
7220 if (sp_inc < (1 << 9)) {
7221 sub(sp, sp, sp_inc); // Fits in an immediate
7222 } else {
7223 mov(rscratch1, sp_inc);
7224 sub(sp, sp, rscratch1);
7225 }
7226
7227 return sp_inc + 2 * wordSize; // Account for the FP/LR space
7228 }
7229
7230 // Read all fields from an inline type oop and store the values in registers/stack slots
7231 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
7232 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
7233 RegState reg_state[]) {
7234 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
7235 assert(from->is_valid(), "source must be valid");
7236 bool progress = false;
7237 #ifdef ASSERT
7238 const int start_offset = offset();
7239 #endif
7240
7241 Label L_null, L_notNull;
7242 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
7243 // TODO 8366717 We need to make sure that r14 (and potentially other long-life regs) are kept live in slowpath runtime calls in GC barriers
7244 Register tmp1 = r10;
7245 Register tmp2 = r11;
7246 Register fromReg = noreg;
7247 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, -1);
7248 bool done = true;
7249 bool mark_done = true;
7250 VMReg toReg;
7251 BasicType bt;
7252 // Check if argument requires a null check
7253 bool null_check = false;
7254 VMReg nullCheckReg;
7255 while (stream.next(nullCheckReg, bt)) {
7256 if (sig->at(stream.sig_index())._offset == -1) {
7257 null_check = true;
7258 break;
7259 }
7260 }
7261 stream.reset(sig_index, to_index);
7262 while (stream.next(toReg, bt)) {
7263 assert(toReg->is_valid(), "destination must be valid");
7264 int idx = (int)toReg->value();
7265 if (reg_state[idx] == reg_readonly) {
7266 if (idx != from->value()) {
7267 mark_done = false;
7268 }
7269 done = false;
7270 continue;
7271 } else if (reg_state[idx] == reg_written) {
7272 continue;
7273 }
7274 assert(reg_state[idx] == reg_writable, "must be writable");
7275 reg_state[idx] = reg_written;
7276 progress = true;
7277
7278 if (fromReg == noreg) {
7279 if (from->is_reg()) {
7280 fromReg = from->as_Register();
7281 } else {
7282 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size;
7283 ldr(tmp1, Address(sp, st_off));
7284 fromReg = tmp1;
7285 }
7286 if (null_check) {
7287 // Nullable inline type argument, emit null check
7288 cbz(fromReg, L_null);
7289 }
7290 }
7291 int off = sig->at(stream.sig_index())._offset;
7292 if (off == -1) {
7293 assert(null_check, "Missing null check at");
7294 if (toReg->is_stack()) {
7295 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7296 mov(tmp2, 1);
7297 str(tmp2, Address(sp, st_off));
7298 } else {
7299 mov(toReg->as_Register(), 1);
7300 }
7301 continue;
7302 }
7303 assert(off > 0, "offset in object should be positive");
7304 Address fromAddr = Address(fromReg, off);
7305 if (!toReg->is_FloatRegister()) {
7306 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
7307 if (is_reference_type(bt)) {
7308 load_heap_oop(dst, fromAddr, rscratch1, rscratch2);
7309 } else {
7310 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
7311 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
7312 }
7313 if (toReg->is_stack()) {
7314 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7315 str(dst, Address(sp, st_off));
7316 }
7317 } else if (bt == T_DOUBLE) {
7318 ldrd(toReg->as_FloatRegister(), fromAddr);
7319 } else {
7320 assert(bt == T_FLOAT, "must be float");
7321 ldrs(toReg->as_FloatRegister(), fromAddr);
7322 }
7323 }
7324 if (progress && null_check) {
7325 if (done) {
7326 b(L_notNull);
7327 bind(L_null);
7328 // Set null marker to zero to signal that the argument is null.
7329 // Also set all oop fields to zero to make the GC happy.
7330 stream.reset(sig_index, to_index);
7331 while (stream.next(toReg, bt)) {
7332 if (sig->at(stream.sig_index())._offset == -1 ||
7333 bt == T_OBJECT || bt == T_ARRAY) {
7334 if (toReg->is_stack()) {
7335 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7336 str(zr, Address(sp, st_off));
7337 } else {
7338 mov(toReg->as_Register(), zr);
7339 }
7340 }
7341 }
7342 bind(L_notNull);
7343 } else {
7344 bind(L_null);
7345 }
7346 }
7347
7348 // TODO 8366717 This is probably okay but looks fishy because stream is reset in the "Set null marker to zero" case just above. Same on x64.
7349 sig_index = stream.sig_index();
7350 to_index = stream.regs_index();
7351
7352 if (mark_done && reg_state[from->value()] != reg_written) {
7353 // This is okay because no one else will write to that slot
7354 reg_state[from->value()] = reg_writable;
7355 }
7356 from_index--;
7357 assert(progress || (start_offset == offset()), "should not emit code");
7358 return done;
7359 }
7360
7361 // Pack fields back into an inline type oop
7362 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
7363 VMRegPair* from, int from_count, int& from_index, VMReg to,
7364 RegState reg_state[], Register val_array) {
7365 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
7366 assert(to->is_valid(), "destination must be valid");
7367
7368 if (reg_state[to->value()] == reg_written) {
7369 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7370 return true; // Already written
7371 }
7372
7373 // The GC barrier expanded by store_heap_oop below may call into the
7374 // runtime so use callee-saved registers for any values that need to be
7375 // preserved. The GC barrier assembler should take care of saving the
7376 // Java argument registers.
7377 // TODO 8284443 Isn't it an issue if below code uses r14 as tmp when it contains a spilled value?
7378 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
7379 Register val_obj_tmp = r21;
7380 Register from_reg_tmp = r22;
7381 Register tmp1 = r14;
7382 Register tmp2 = r13;
7383 Register tmp3 = r12;
7384 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
7385
7386 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
7387
7388 if (reg_state[to->value()] == reg_readonly) {
7389 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
7390 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7391 return false; // Not yet writable
7392 }
7393 val_obj = val_obj_tmp;
7394 }
7395
7396 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
7397 load_heap_oop(val_obj, Address(val_array, index), tmp1, tmp2);
7398
7399 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
7400 VMReg fromReg;
7401 BasicType bt;
7402 Label L_null;
7403 while (stream.next(fromReg, bt)) {
7404 assert(fromReg->is_valid(), "source must be valid");
7405 reg_state[fromReg->value()] = reg_writable;
7406
7407 int off = sig->at(stream.sig_index())._offset;
7408 if (off == -1) {
7409 // Nullable inline type argument, emit null check
7410 Label L_notNull;
7411 if (fromReg->is_stack()) {
7412 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7413 ldrb(tmp2, Address(sp, ld_off));
7414 cbnz(tmp2, L_notNull);
7415 } else {
7416 cbnz(fromReg->as_Register(), L_notNull);
7417 }
7418 mov(val_obj, 0);
7419 b(L_null);
7420 bind(L_notNull);
7421 continue;
7422 }
7423
7424 assert(off > 0, "offset in object should be positive");
7425 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
7426
7427 // Pack the scalarized field into the value object.
7428 Address dst(val_obj, off);
7429 if (!fromReg->is_FloatRegister()) {
7430 Register src;
7431 if (fromReg->is_stack()) {
7432 src = from_reg_tmp;
7433 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7434 load_sized_value(src, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
7435 } else {
7436 src = fromReg->as_Register();
7437 }
7438 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
7439 if (is_reference_type(bt)) {
7440 store_heap_oop(dst, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
7441 } else {
7442 store_sized_value(dst, src, size_in_bytes);
7443 }
7444 } else if (bt == T_DOUBLE) {
7445 strd(fromReg->as_FloatRegister(), dst);
7446 } else {
7447 assert(bt == T_FLOAT, "must be float");
7448 strs(fromReg->as_FloatRegister(), dst);
7449 }
7450 }
7451 bind(L_null);
7452 sig_index = stream.sig_index();
7453 from_index = stream.regs_index();
7454
7455 assert(reg_state[to->value()] == reg_writable, "must have already been read");
7456 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
7457 assert(success, "to register must be writeable");
7458 return true;
7459 }
7460
7461 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
7462 return (reg->is_FloatRegister()) ? v8->as_VMReg() : r14->as_VMReg();
7463 }
7464
7465 void MacroAssembler::cache_wb(Address line) {
7466 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
7467 assert(line.index() == noreg, "index should be noreg");
7468 assert(line.offset() == 0, "offset should be 0");
7469 // would like to assert this
7470 // assert(line._ext.shift == 0, "shift should be zero");
7471 if (VM_Version::supports_dcpop()) {
7472 // writeback using clear virtual address to point of persistence
7473 dc(Assembler::CVAP, line.base());
7474 } else {
7475 // no need to generate anything as Unsafe.writebackMemory should
7476 // never invoke this stub
7477 }
7478 }
7479
7480 void MacroAssembler::cache_wbsync(bool is_pre) {
7481 // we only need a barrier post sync
7482 if (!is_pre) {
7483 membar(Assembler::AnyAny);
7484 }
7855 }
7856
7857 // Check if the lock-stack is full.
7858 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7859 cmpw(top, (unsigned)LockStack::end_offset());
7860 br(Assembler::GE, slow);
7861
7862 // Check for recursion.
7863 subw(t, top, oopSize);
7864 ldr(t, Address(rthread, t));
7865 cmp(obj, t);
7866 br(Assembler::EQ, push);
7867
7868 // Check header for monitor (0b10).
7869 tst(mark, markWord::monitor_value);
7870 br(Assembler::NE, slow);
7871
7872 // Try to lock. Transition lock bits 0b01 => 0b00
7873 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7874 orr(mark, mark, markWord::unlocked_value);
7875 // Mask inline_type bit such that we go to the slow path if object is an inline type
7876 andr(mark, mark, ~((int) markWord::inline_type_bit_in_place));
7877
7878 eor(t, mark, markWord::unlocked_value);
7879 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7880 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7881 br(Assembler::NE, slow);
7882
7883 bind(push);
7884 // After successful lock, push object on lock-stack.
7885 str(obj, Address(rthread, top));
7886 addw(top, top, oopSize);
7887 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7888 }
7889
7890 // Implements lightweight-unlocking.
7891 //
7892 // - obj: the object to be unlocked
7893 // - t1, t2, t3: temporary registers
7894 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7895 void MacroAssembler::lightweight_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7896 // cmpxchg clobbers rscratch1.
7897 assert_different_registers(obj, t1, t2, t3, rscratch1);
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