9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "code/compiledIC.hpp"
30 #include "compiler/compileTask.hpp"
31 #include "compiler/disassembler.hpp"
32 #include "compiler/oopMap.hpp"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/cardTable.hpp"
37 #include "gc/shared/collectedHeap.hpp"
38 #include "gc/shared/tlab_globals.hpp"
39 #include "interpreter/bytecodeHistogram.hpp"
40 #include "interpreter/interpreter.hpp"
41 #include "interpreter/interpreterRuntime.hpp"
42 #include "jvm.h"
43 #include "memory/resourceArea.hpp"
44 #include "memory/universe.hpp"
45 #include "nativeInst_aarch64.hpp"
46 #include "oops/accessDecorators.hpp"
47 #include "oops/compressedKlass.inline.hpp"
48 #include "oops/compressedOops.inline.hpp"
49 #include "oops/klass.inline.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/icache.hpp"
52 #include "runtime/interfaceSupport.inline.hpp"
53 #include "runtime/javaThread.hpp"
54 #include "runtime/jniHandles.inline.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/globalDefinitions.hpp"
58 #include "utilities/integerCast.hpp"
59 #include "utilities/powerOfTwo.hpp"
60 #ifdef COMPILER1
61 #include "c1/c1_LIRAssembler.hpp"
62 #endif
63 #ifdef COMPILER2
64 #include "oops/oop.hpp"
65 #include "opto/compile.hpp"
66 #include "opto/node.hpp"
67 #include "opto/output.hpp"
68 #endif
69
70 #include <sys/types.h>
71
72 #ifdef PRODUCT
73 #define BLOCK_COMMENT(str) /* nothing */
74 #else
75 #define BLOCK_COMMENT(str) block_comment(str)
76 #endif
77 #define STOP(str) stop(str);
78 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
79
2006 ldarb(scratch, scratch);
2007 cmp(scratch, InstanceKlass::fully_initialized);
2008 br(Assembler::EQ, *L_fast_path);
2009
2010 // Fast path check: current thread is initializer thread
2011 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2012 cmp(rthread, scratch);
2013
2014 if (L_slow_path == &L_fallthrough) {
2015 br(Assembler::EQ, *L_fast_path);
2016 bind(*L_slow_path);
2017 } else if (L_fast_path == &L_fallthrough) {
2018 br(Assembler::NE, *L_slow_path);
2019 bind(*L_fast_path);
2020 } else {
2021 Unimplemented();
2022 }
2023 }
2024
2025 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2026 if (!VerifyOops) return;
2027
2028 // Pass register number to verify_oop_subroutine
2029 const char* b = nullptr;
2030 {
2031 ResourceMark rm;
2032 stringStream ss;
2033 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2034 b = code_string(ss.as_string());
2035 }
2036 BLOCK_COMMENT("verify_oop {");
2037
2038 strip_return_address(); // This might happen within a stack frame.
2039 protect_return_address();
2040 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2041 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2042
2043 mov(r0, reg);
2044 movptr(rscratch1, (uintptr_t)(address)b);
2045
2046 // call indirectly to solve generation ordering problem
2047 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2048 ldr(rscratch2, Address(rscratch2));
2049 blr(rscratch2);
2050
2051 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2052 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2053 authenticate_return_address();
2054
2055 BLOCK_COMMENT("} verify_oop");
2056 }
2057
2058 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2059 if (!VerifyOops) return;
2060
2061 const char* b = nullptr;
2062 {
2063 ResourceMark rm;
2064 stringStream ss;
2065 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2066 b = code_string(ss.as_string());
2067 }
2068 BLOCK_COMMENT("verify_oop_addr {");
2069
2070 strip_return_address(); // This might happen within a stack frame.
2071 protect_return_address();
2072 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2073 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2074
2075 // addr may contain sp so we will have to adjust it based on the
2076 // pushes that we just did.
2077 if (addr.uses(sp)) {
2078 lea(r0, addr);
2079 ldr(r0, Address(r0, 4 * wordSize));
2292 call_VM_leaf_base(entry_point, 1);
2293 }
2294
2295 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2296 assert_different_registers(arg_1, c_rarg0);
2297 pass_arg0(this, arg_0);
2298 pass_arg1(this, arg_1);
2299 call_VM_leaf_base(entry_point, 2);
2300 }
2301
2302 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2303 Register arg_1, Register arg_2) {
2304 assert_different_registers(arg_1, c_rarg0);
2305 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2306 pass_arg0(this, arg_0);
2307 pass_arg1(this, arg_1);
2308 pass_arg2(this, arg_2);
2309 call_VM_leaf_base(entry_point, 3);
2310 }
2311
2312 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2313 pass_arg0(this, arg_0);
2314 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2315 }
2316
2317 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2318
2319 assert_different_registers(arg_0, c_rarg1);
2320 pass_arg1(this, arg_1);
2321 pass_arg0(this, arg_0);
2322 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2323 }
2324
2325 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2326 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2327 assert_different_registers(arg_1, c_rarg2);
2328 pass_arg2(this, arg_2);
2329 pass_arg1(this, arg_1);
2330 pass_arg0(this, arg_0);
2331 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2337 assert_different_registers(arg_2, c_rarg3);
2338 pass_arg3(this, arg_3);
2339 pass_arg2(this, arg_2);
2340 pass_arg1(this, arg_1);
2341 pass_arg0(this, arg_0);
2342 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2343 }
2344
2345 void MacroAssembler::null_check(Register reg, int offset) {
2346 if (needs_explicit_null_check(offset)) {
2347 // provoke OS null exception if reg is null by
2348 // accessing M[reg] w/o changing any registers
2349 // NOTE: this is plenty to provoke a segv
2350 ldr(zr, Address(reg));
2351 } else {
2352 // nothing to do, (later) access of M[reg + offset]
2353 // will provoke OS null exception if reg is null
2354 }
2355 }
2356
2357 // MacroAssembler protected routines needed to implement
2358 // public methods
2359
2360 void MacroAssembler::mov(Register r, Address dest) {
2361 code_section()->relocate(pc(), dest.rspec());
2362 uint64_t imm64 = (uint64_t)dest.target();
2363 movptr(r, imm64);
2364 }
2365
2366 // Move a constant pointer into r. In AArch64 mode the virtual
2367 // address space is 48 bits in size, so we only need three
2368 // instructions to create a patchable instruction sequence that can
2369 // reach anywhere.
2370 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2371 #ifndef PRODUCT
2372 {
2373 char buffer[64];
2374 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2375 block_comment(buffer);
2376 }
5070 adrp(rscratch1, src2, offset);
5071 ldr(rscratch1, Address(rscratch1, offset));
5072 cmp(src1, rscratch1);
5073 }
5074
5075 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5076 cmp(obj1, obj2);
5077 }
5078
5079 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5080 load_method_holder(rresult, rmethod);
5081 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5082 }
5083
5084 void MacroAssembler::load_method_holder(Register holder, Register method) {
5085 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5086 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5087 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5088 }
5089
5090 // Loads the obj's Klass* into dst.
5091 // Preserves all registers (incl src, rscratch1 and rscratch2).
5092 // Input:
5093 // src - the oop we want to load the klass from.
5094 // dst - output narrow klass.
5095 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5096 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5097 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5098 lsr(dst, dst, markWord::klass_shift);
5099 }
5100
5101 void MacroAssembler::load_klass(Register dst, Register src) {
5102 if (UseCompactObjectHeaders) {
5103 load_narrow_klass_compact(dst, src);
5104 } else {
5105 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5106 }
5107 decode_klass_not_null(dst);
5108 }
5109
5161 } else {
5162 ldrw(tmp, Address(obj, oopDesc::klass_offset_in_bytes()));
5163 }
5164 if (CompressedKlassPointers::base() == nullptr) {
5165 cmp(klass, tmp, LSL, CompressedKlassPointers::shift());
5166 return;
5167 } else if (!AOTCodeCache::is_on_for_dump() &&
5168 ((uint64_t)CompressedKlassPointers::base() & 0xffffffff) == 0
5169 && CompressedKlassPointers::shift() == 0) {
5170 // Only the bottom 32 bits matter
5171 cmpw(klass, tmp);
5172 return;
5173 }
5174 decode_klass_not_null(tmp);
5175 cmp(klass, tmp);
5176 }
5177
5178 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5179 if (UseCompactObjectHeaders) {
5180 load_narrow_klass_compact(tmp1, obj1);
5181 load_narrow_klass_compact(tmp2, obj2);
5182 } else {
5183 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5184 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5185 }
5186 cmpw(tmp1, tmp2);
5187 }
5188
5189 void MacroAssembler::store_klass(Register dst, Register src) {
5190 // FIXME: Should this be a store release? concurrent gcs assumes
5191 // klass length is valid if klass field is not null.
5192 assert(!UseCompactObjectHeaders, "not with compact headers");
5193 encode_klass_not_null(src);
5194 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5195 }
5196
5197 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5198 assert(!UseCompactObjectHeaders, "not with compact headers");
5199 // Store to klass gap in destination
5200 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5201 }
5202
5203 // Algorithm must match CompressedOops::encode.
5204 void MacroAssembler::encode_heap_oop(Register d, Register s) {
5205 #ifdef ASSERT
5206 verify_heapbase("MacroAssembler::encode_heap_oop: heap base corrupted?");
5207 #endif
5208 verify_oop_msg(s, "broken oop in encode_heap_oop");
5558 if (as_raw) {
5559 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5560 } else {
5561 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5562 }
5563 }
5564
5565 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5566 Address dst, Register val,
5567 Register tmp1, Register tmp2, Register tmp3) {
5568 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5569 decorators = AccessInternal::decorator_fixup(decorators, type);
5570 bool as_raw = (decorators & AS_RAW) != 0;
5571 if (as_raw) {
5572 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5573 } else {
5574 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5575 }
5576 }
5577
5578 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5579 Register tmp2, DecoratorSet decorators) {
5580 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5581 }
5582
5583 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5584 Register tmp2, DecoratorSet decorators) {
5585 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5586 }
5587
5588 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5589 Register tmp2, Register tmp3, DecoratorSet decorators) {
5590 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5591 }
5592
5593 // Used for storing nulls.
5594 void MacroAssembler::store_heap_oop_null(Address dst) {
5595 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5596 }
5597
5672 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5673 cmp(rscratch2, rscratch1);
5674 br(Assembler::HS, next);
5675 STOP("assert(top >= start)");
5676 should_not_reach_here();
5677
5678 bind(next);
5679 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5680 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5681 cmp(rscratch2, rscratch1);
5682 br(Assembler::HS, ok);
5683 STOP("assert(top <= end)");
5684 should_not_reach_here();
5685
5686 bind(ok);
5687 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5688 }
5689 #endif
5690 }
5691
5692 // Writes to stack successive pages until offset reached to check for
5693 // stack overflow + shadow pages. This clobbers tmp.
5694 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5695 assert_different_registers(tmp, size, rscratch1);
5696 mov(tmp, sp);
5697 // Bang stack for total size given plus shadow page size.
5698 // Bang one page at a time because large size can bang beyond yellow and
5699 // red zones.
5700 Label loop;
5701 mov(rscratch1, (int)os::vm_page_size());
5702 bind(loop);
5703 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5704 subsw(size, size, rscratch1);
5705 str(size, Address(tmp));
5706 br(Assembler::GT, loop);
5707
5708 // Bang down shadow pages too.
5709 // At this point, (tmp-0) is the last address touched, so don't
5710 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5711 // was post-decremented.) Skip this address by starting at i=1, and
5778
5779 // Strictly speaking the card table base isn't an address at all, and it might
5780 // even be negative. It is thus materialised as a constant.
5781 mov(reg, (uint64_t)ctbs->card_table_base_const());
5782 }
5783
5784 void MacroAssembler::load_aotrc_address(Register reg, address a) {
5785 #if INCLUDE_CDS
5786 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
5787 if (AOTCodeCache::is_on_for_dump()) {
5788 // all aotrc field addresses should be registered in the AOTCodeCache address table
5789 lea(reg, ExternalAddress(a));
5790 } else {
5791 mov(reg, (uint64_t)a);
5792 }
5793 #else
5794 ShouldNotReachHere();
5795 #endif
5796 }
5797
5798 void MacroAssembler::build_frame(int framesize) {
5799 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5800 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5801 protect_return_address();
5802 if (framesize < ((1 << 9) + 2 * wordSize)) {
5803 sub(sp, sp, framesize);
5804 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5805 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5806 } else {
5807 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5808 if (PreserveFramePointer) mov(rfp, sp);
5809 if (framesize < ((1 << 12) + 2 * wordSize))
5810 sub(sp, sp, framesize - 2 * wordSize);
5811 else {
5812 mov(rscratch1, framesize - 2 * wordSize);
5813 sub(sp, sp, rscratch1);
5814 }
5815 }
5816 verify_cross_modify_fence_not_required();
5817 }
5818
5819 void MacroAssembler::remove_frame(int framesize) {
5820 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5821 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5822 if (framesize < ((1 << 9) + 2 * wordSize)) {
5823 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5824 add(sp, sp, framesize);
5825 } else {
5826 if (framesize < ((1 << 12) + 2 * wordSize))
5827 add(sp, sp, framesize - 2 * wordSize);
5828 else {
5829 mov(rscratch1, framesize - 2 * wordSize);
5830 add(sp, sp, rscratch1);
5831 }
5832 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5833 }
5834 authenticate_return_address();
5835 }
5836
5837
5838 // This method counts leading positive bytes (highest bit not set) in provided byte array
5839 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
5840 // Simple and most common case of aligned small array which is not at the
5841 // end of memory page is placed here. All other cases are in stub.
5842 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
5843 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
5844 assert_different_registers(ary1, len, result);
5845
5846 mov(result, len);
5847 cmpw(len, 0);
5848 br(LE, DONE);
5849 cmpw(len, 4 * wordSize);
5850 br(GE, STUB_LONG); // size > 32 then go to stub
5851
5852 int shift = 64 - exact_log2(os::vm_page_size());
5853 lsl(rscratch1, ary1, shift);
5854 mov(rscratch2, (size_t)(4 * wordSize) << shift);
5855 adds(rscratch2, rscratch1, rscratch2); // At end of page?
5856 br(CS, STUB); // at the end of page then go to stub
6740 // On other systems, the helper is a usual C function.
6741 //
6742 void MacroAssembler::get_thread(Register dst) {
6743 RegSet saved_regs =
6744 BSD_ONLY(RegSet::range(r0, r17) + lr - dst)
6745 NOT_BSD (RegSet::range(r0, r1) + lr - dst);
6746
6747 protect_return_address();
6748 push(saved_regs, sp);
6749
6750 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6751 blr(lr);
6752 if (dst != c_rarg0) {
6753 mov(dst, c_rarg0);
6754 }
6755
6756 pop(saved_regs, sp);
6757 authenticate_return_address();
6758 }
6759
6760 void MacroAssembler::cache_wb(Address line) {
6761 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
6762 assert(line.index() == noreg, "index should be noreg");
6763 assert(line.offset() == 0, "offset should be 0");
6764 // would like to assert this
6765 // assert(line._ext.shift == 0, "shift should be zero");
6766 if (VM_Version::supports_dcpop()) {
6767 // writeback using clear virtual address to point of persistence
6768 dc(Assembler::CVAP, line.base());
6769 } else {
6770 // no need to generate anything as Unsafe.writebackMemory should
6771 // never invoke this stub
6772 }
6773 }
6774
6775 void MacroAssembler::cache_wbsync(bool is_pre) {
6776 // we only need a barrier post sync
6777 if (!is_pre) {
6778 membar(Assembler::AnyAny);
6779 }
7175 }
7176
7177 // Check if the lock-stack is full.
7178 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7179 cmpw(top, (unsigned)LockStack::end_offset());
7180 br(Assembler::GE, slow);
7181
7182 // Check for recursion.
7183 subw(t, top, oopSize);
7184 ldr(t, Address(rthread, t));
7185 cmp(obj, t);
7186 br(Assembler::EQ, push);
7187
7188 // Check header for monitor (0b10).
7189 tst(mark, markWord::monitor_value);
7190 br(Assembler::NE, slow);
7191
7192 // Try to lock. Transition lock bits 0b01 => 0b00
7193 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7194 orr(mark, mark, markWord::unlocked_value);
7195 eor(t, mark, markWord::unlocked_value);
7196 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7197 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7198 br(Assembler::NE, slow);
7199
7200 bind(push);
7201 // After successful lock, push object on lock-stack.
7202 str(obj, Address(rthread, top));
7203 addw(top, top, oopSize);
7204 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7205 }
7206
7207 // Implements fast-unlocking.
7208 //
7209 // - obj: the object to be unlocked
7210 // - t1, t2, t3: temporary registers
7211 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7212 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7213 // cmpxchg clobbers rscratch1.
7214 assert_different_registers(obj, t1, t2, t3, rscratch1);
|
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "ci/ciInlineKlass.hpp"
30 #include "code/compiledIC.hpp"
31 #include "compiler/compileTask.hpp"
32 #include "compiler/disassembler.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "gc/shared/cardTableBarrierSet.hpp"
37 #include "gc/shared/cardTable.hpp"
38 #include "gc/shared/collectedHeap.hpp"
39 #include "gc/shared/tlab_globals.hpp"
40 #include "interpreter/bytecodeHistogram.hpp"
41 #include "interpreter/interpreter.hpp"
42 #include "interpreter/interpreterRuntime.hpp"
43 #include "jvm.h"
44 #include "memory/resourceArea.hpp"
45 #include "memory/universe.hpp"
46 #include "nativeInst_aarch64.hpp"
47 #include "oops/accessDecorators.hpp"
48 #include "oops/compressedKlass.inline.hpp"
49 #include "oops/compressedOops.inline.hpp"
50 #include "oops/klass.inline.hpp"
51 #include "oops/resolvedFieldEntry.hpp"
52 #include "runtime/arguments.hpp"
53 #include "runtime/continuation.hpp"
54 #include "runtime/globals.hpp"
55 #include "runtime/icache.hpp"
56 #include "runtime/interfaceSupport.inline.hpp"
57 #include "runtime/javaThread.hpp"
58 #include "runtime/jniHandles.inline.hpp"
59 #include "runtime/sharedRuntime.hpp"
60 #include "runtime/signature_cc.hpp"
61 #include "runtime/stubRoutines.hpp"
62 #include "utilities/globalDefinitions.hpp"
63 #include "utilities/integerCast.hpp"
64 #include "utilities/powerOfTwo.hpp"
65 #include "vmreg_aarch64.inline.hpp"
66 #ifdef COMPILER1
67 #include "c1/c1_LIRAssembler.hpp"
68 #endif
69 #ifdef COMPILER2
70 #include "oops/oop.hpp"
71 #include "opto/compile.hpp"
72 #include "opto/node.hpp"
73 #include "opto/output.hpp"
74 #endif
75
76 #include <sys/types.h>
77
78 #ifdef PRODUCT
79 #define BLOCK_COMMENT(str) /* nothing */
80 #else
81 #define BLOCK_COMMENT(str) block_comment(str)
82 #endif
83 #define STOP(str) stop(str);
84 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
85
2012 ldarb(scratch, scratch);
2013 cmp(scratch, InstanceKlass::fully_initialized);
2014 br(Assembler::EQ, *L_fast_path);
2015
2016 // Fast path check: current thread is initializer thread
2017 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2018 cmp(rthread, scratch);
2019
2020 if (L_slow_path == &L_fallthrough) {
2021 br(Assembler::EQ, *L_fast_path);
2022 bind(*L_slow_path);
2023 } else if (L_fast_path == &L_fallthrough) {
2024 br(Assembler::NE, *L_slow_path);
2025 bind(*L_fast_path);
2026 } else {
2027 Unimplemented();
2028 }
2029 }
2030
2031 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2032 if (!VerifyOops || VerifyAdapterSharing) {
2033 // Below address of the code string confuses VerifyAdapterSharing
2034 // because it may differ between otherwise equivalent adapters.
2035 return;
2036 }
2037
2038 // Pass register number to verify_oop_subroutine
2039 const char* b = nullptr;
2040 {
2041 ResourceMark rm;
2042 stringStream ss;
2043 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2044 b = code_string(ss.as_string());
2045 }
2046 BLOCK_COMMENT("verify_oop {");
2047
2048 strip_return_address(); // This might happen within a stack frame.
2049 protect_return_address();
2050 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2051 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2052
2053 mov(r0, reg);
2054 movptr(rscratch1, (uintptr_t)(address)b);
2055
2056 // call indirectly to solve generation ordering problem
2057 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2058 ldr(rscratch2, Address(rscratch2));
2059 blr(rscratch2);
2060
2061 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2062 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2063 authenticate_return_address();
2064
2065 BLOCK_COMMENT("} verify_oop");
2066 }
2067
2068 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2069 if (!VerifyOops || VerifyAdapterSharing) {
2070 // Below address of the code string confuses VerifyAdapterSharing
2071 // because it may differ between otherwise equivalent adapters.
2072 return;
2073 }
2074
2075 const char* b = nullptr;
2076 {
2077 ResourceMark rm;
2078 stringStream ss;
2079 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2080 b = code_string(ss.as_string());
2081 }
2082 BLOCK_COMMENT("verify_oop_addr {");
2083
2084 strip_return_address(); // This might happen within a stack frame.
2085 protect_return_address();
2086 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2087 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2088
2089 // addr may contain sp so we will have to adjust it based on the
2090 // pushes that we just did.
2091 if (addr.uses(sp)) {
2092 lea(r0, addr);
2093 ldr(r0, Address(r0, 4 * wordSize));
2306 call_VM_leaf_base(entry_point, 1);
2307 }
2308
2309 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2310 assert_different_registers(arg_1, c_rarg0);
2311 pass_arg0(this, arg_0);
2312 pass_arg1(this, arg_1);
2313 call_VM_leaf_base(entry_point, 2);
2314 }
2315
2316 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2317 Register arg_1, Register arg_2) {
2318 assert_different_registers(arg_1, c_rarg0);
2319 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2320 pass_arg0(this, arg_0);
2321 pass_arg1(this, arg_1);
2322 pass_arg2(this, arg_2);
2323 call_VM_leaf_base(entry_point, 3);
2324 }
2325
2326 void MacroAssembler::super_call_VM_leaf(address entry_point) {
2327 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2328 }
2329
2330 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2331 pass_arg0(this, arg_0);
2332 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2333 }
2334
2335 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2336
2337 assert_different_registers(arg_0, c_rarg1);
2338 pass_arg1(this, arg_1);
2339 pass_arg0(this, arg_0);
2340 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2341 }
2342
2343 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2344 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2345 assert_different_registers(arg_1, c_rarg2);
2346 pass_arg2(this, arg_2);
2347 pass_arg1(this, arg_1);
2348 pass_arg0(this, arg_0);
2349 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2355 assert_different_registers(arg_2, c_rarg3);
2356 pass_arg3(this, arg_3);
2357 pass_arg2(this, arg_2);
2358 pass_arg1(this, arg_1);
2359 pass_arg0(this, arg_0);
2360 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2361 }
2362
2363 void MacroAssembler::null_check(Register reg, int offset) {
2364 if (needs_explicit_null_check(offset)) {
2365 // provoke OS null exception if reg is null by
2366 // accessing M[reg] w/o changing any registers
2367 // NOTE: this is plenty to provoke a segv
2368 ldr(zr, Address(reg));
2369 } else {
2370 // nothing to do, (later) access of M[reg + offset]
2371 // will provoke OS null exception if reg is null
2372 }
2373 }
2374
2375 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2376 assert_different_registers(markword, rscratch2);
2377 mov(rscratch2, markWord::inline_type_pattern_mask);
2378 andr(markword, markword, rscratch2);
2379 mov(rscratch2, markWord::inline_type_pattern);
2380 cmp(markword, rscratch2);
2381 br(Assembler::EQ, is_inline_type);
2382 }
2383
2384 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2385 assert_different_registers(tmp, rscratch1);
2386 if (can_be_null) {
2387 cbz(object, not_inline_type);
2388 }
2389 const int is_inline_type_mask = markWord::inline_type_pattern;
2390 ldr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2391 mov(rscratch1, is_inline_type_mask);
2392 andr(tmp, tmp, rscratch1);
2393 cmp(tmp, rscratch1);
2394 br(Assembler::NE, not_inline_type);
2395 }
2396
2397 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2398 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2399 tbnz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, is_null_free_inline_type);
2400 }
2401
2402 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2403 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2404 tbz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, not_null_free_inline_type);
2405 }
2406
2407 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2408 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2409 tbnz(flags, ResolvedFieldEntry::is_flat_shift, is_flat);
2410 }
2411
2412 void MacroAssembler::test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker) {
2413 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2414 tbnz(flags, ResolvedFieldEntry::has_null_marker_shift, has_null_marker);
2415 }
2416
2417 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2418 Label test_mark_word;
2419 // load mark word
2420 ldr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2421 // check displaced
2422 tst(temp_reg, markWord::unlocked_value);
2423 br(Assembler::NE, test_mark_word);
2424 // slow path use klass prototype
2425 load_prototype_header(temp_reg, oop);
2426
2427 bind(test_mark_word);
2428 andr(temp_reg, temp_reg, test_bit);
2429 if (jmp_set) {
2430 cbnz(temp_reg, jmp_label);
2431 } else {
2432 cbz(temp_reg, jmp_label);
2433 }
2434 }
2435
2436 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array) {
2437 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2438 }
2439
2440 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2441 Label&is_non_flat_array) {
2442 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2443 }
2444
2445 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array) {
2446 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2447 }
2448
2449 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2450 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2451 }
2452
2453 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2454 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2455 br(Assembler::NE, is_flat_array);
2456 }
2457
2458 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
2459 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2460 br(Assembler::EQ, is_non_flat_array);
2461 }
2462
2463 // MacroAssembler protected routines needed to implement
2464 // public methods
2465
2466 void MacroAssembler::mov(Register r, Address dest) {
2467 code_section()->relocate(pc(), dest.rspec());
2468 uint64_t imm64 = (uint64_t)dest.target();
2469 movptr(r, imm64);
2470 }
2471
2472 // Move a constant pointer into r. In AArch64 mode the virtual
2473 // address space is 48 bits in size, so we only need three
2474 // instructions to create a patchable instruction sequence that can
2475 // reach anywhere.
2476 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2477 #ifndef PRODUCT
2478 {
2479 char buffer[64];
2480 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2481 block_comment(buffer);
2482 }
5176 adrp(rscratch1, src2, offset);
5177 ldr(rscratch1, Address(rscratch1, offset));
5178 cmp(src1, rscratch1);
5179 }
5180
5181 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5182 cmp(obj1, obj2);
5183 }
5184
5185 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5186 load_method_holder(rresult, rmethod);
5187 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5188 }
5189
5190 void MacroAssembler::load_method_holder(Register holder, Register method) {
5191 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5192 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5193 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5194 }
5195
5196 void MacroAssembler::load_metadata(Register dst, Register src) {
5197 if (UseCompactObjectHeaders) {
5198 load_narrow_klass_compact(dst, src);
5199 } else {
5200 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5201 }
5202 }
5203
5204 // Loads the obj's Klass* into dst.
5205 // Preserves all registers (incl src, rscratch1 and rscratch2).
5206 // Input:
5207 // src - the oop we want to load the klass from.
5208 // dst - output narrow klass.
5209 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5210 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5211 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5212 lsr(dst, dst, markWord::klass_shift);
5213 }
5214
5215 void MacroAssembler::load_klass(Register dst, Register src) {
5216 if (UseCompactObjectHeaders) {
5217 load_narrow_klass_compact(dst, src);
5218 } else {
5219 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5220 }
5221 decode_klass_not_null(dst);
5222 }
5223
5275 } else {
5276 ldrw(tmp, Address(obj, oopDesc::klass_offset_in_bytes()));
5277 }
5278 if (CompressedKlassPointers::base() == nullptr) {
5279 cmp(klass, tmp, LSL, CompressedKlassPointers::shift());
5280 return;
5281 } else if (!AOTCodeCache::is_on_for_dump() &&
5282 ((uint64_t)CompressedKlassPointers::base() & 0xffffffff) == 0
5283 && CompressedKlassPointers::shift() == 0) {
5284 // Only the bottom 32 bits matter
5285 cmpw(klass, tmp);
5286 return;
5287 }
5288 decode_klass_not_null(tmp);
5289 cmp(klass, tmp);
5290 }
5291
5292 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5293 if (UseCompactObjectHeaders) {
5294 load_narrow_klass_compact(tmp1, obj1);
5295 load_narrow_klass_compact(tmp2, obj2);
5296 } else {
5297 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5298 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5299 }
5300 cmpw(tmp1, tmp2);
5301 }
5302
5303 void MacroAssembler::load_prototype_header(Register dst, Register src) {
5304 load_klass(dst, src);
5305 ldr(dst, Address(dst, Klass::prototype_header_offset()));
5306 }
5307
5308 void MacroAssembler::store_klass(Register dst, Register src) {
5309 // FIXME: Should this be a store release? concurrent gcs assumes
5310 // klass length is valid if klass field is not null.
5311 assert(!UseCompactObjectHeaders, "not with compact headers");
5312 encode_klass_not_null(src);
5313 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5314 }
5315
5316 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5317 assert(!UseCompactObjectHeaders, "not with compact headers");
5318 // Store to klass gap in destination
5319 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5320 }
5321
5322 // Algorithm must match CompressedOops::encode.
5323 void MacroAssembler::encode_heap_oop(Register d, Register s) {
5324 #ifdef ASSERT
5325 verify_heapbase("MacroAssembler::encode_heap_oop: heap base corrupted?");
5326 #endif
5327 verify_oop_msg(s, "broken oop in encode_heap_oop");
5677 if (as_raw) {
5678 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5679 } else {
5680 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5681 }
5682 }
5683
5684 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5685 Address dst, Register val,
5686 Register tmp1, Register tmp2, Register tmp3) {
5687 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5688 decorators = AccessInternal::decorator_fixup(decorators, type);
5689 bool as_raw = (decorators & AS_RAW) != 0;
5690 if (as_raw) {
5691 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5692 } else {
5693 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5694 }
5695 }
5696
5697 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5698 Register inline_layout_info) {
5699 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5700 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5701 }
5702
5703 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5704 ldr(offset, Address(inline_klass, InlineKlass::adr_members_offset()));
5705 ldrw(offset, Address(offset, InlineKlass::payload_offset_offset()));
5706 }
5707
5708 void MacroAssembler::payload_address(Register oop, Register data, Register inline_klass) {
5709 // ((address) (void*) o) + vk->payload_offset();
5710 Register offset = (data == oop) ? rscratch1 : data;
5711 payload_offset(inline_klass, offset);
5712 if (data == oop) {
5713 add(data, data, offset);
5714 } else {
5715 lea(data, Address(oop, offset));
5716 }
5717 }
5718
5719 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
5720 Register index, Register data) {
5721 assert_different_registers(array, array_klass, index);
5722 assert_different_registers(rscratch1, array, index);
5723
5724 // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
5725 ldrw(rscratch1, Address(array_klass, Klass::layout_helper_offset()));
5726
5727 // Klass::layout_helper_log2_element_size(lh)
5728 // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
5729 lsr(rscratch1, rscratch1, Klass::_lh_log2_element_size_shift);
5730 andr(rscratch1, rscratch1, Klass::_lh_log2_element_size_mask);
5731 lslv(index, index, rscratch1);
5732
5733 add(data, array, index);
5734 add(data, data, arrayOopDesc::base_offset_in_bytes(T_FLAT_ELEMENT));
5735 }
5736
5737 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5738 Register tmp2, DecoratorSet decorators) {
5739 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5740 }
5741
5742 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5743 Register tmp2, DecoratorSet decorators) {
5744 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5745 }
5746
5747 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5748 Register tmp2, Register tmp3, DecoratorSet decorators) {
5749 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5750 }
5751
5752 // Used for storing nulls.
5753 void MacroAssembler::store_heap_oop_null(Address dst) {
5754 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5755 }
5756
5831 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5832 cmp(rscratch2, rscratch1);
5833 br(Assembler::HS, next);
5834 STOP("assert(top >= start)");
5835 should_not_reach_here();
5836
5837 bind(next);
5838 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5839 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5840 cmp(rscratch2, rscratch1);
5841 br(Assembler::HS, ok);
5842 STOP("assert(top <= end)");
5843 should_not_reach_here();
5844
5845 bind(ok);
5846 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5847 }
5848 #endif
5849 }
5850
5851 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
5852 assert_different_registers(holder_klass, index, layout_info);
5853 InlineLayoutInfo array[2];
5854 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
5855 if (is_power_of_2(size)) {
5856 lsl(index, index, log2i_exact(size)); // Scale index by power of 2
5857 } else {
5858 mov(layout_info, size);
5859 mul(index, index, layout_info); // Scale the index to be the entry index * array_element_size
5860 }
5861 ldr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
5862 add(layout_info, layout_info, Array<InlineLayoutInfo>::base_offset_in_bytes());
5863 lea(layout_info, Address(layout_info, index));
5864 }
5865
5866 // Writes to stack successive pages until offset reached to check for
5867 // stack overflow + shadow pages. This clobbers tmp.
5868 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5869 assert_different_registers(tmp, size, rscratch1);
5870 mov(tmp, sp);
5871 // Bang stack for total size given plus shadow page size.
5872 // Bang one page at a time because large size can bang beyond yellow and
5873 // red zones.
5874 Label loop;
5875 mov(rscratch1, (int)os::vm_page_size());
5876 bind(loop);
5877 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5878 subsw(size, size, rscratch1);
5879 str(size, Address(tmp));
5880 br(Assembler::GT, loop);
5881
5882 // Bang down shadow pages too.
5883 // At this point, (tmp-0) is the last address touched, so don't
5884 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5885 // was post-decremented.) Skip this address by starting at i=1, and
5952
5953 // Strictly speaking the card table base isn't an address at all, and it might
5954 // even be negative. It is thus materialised as a constant.
5955 mov(reg, (uint64_t)ctbs->card_table_base_const());
5956 }
5957
5958 void MacroAssembler::load_aotrc_address(Register reg, address a) {
5959 #if INCLUDE_CDS
5960 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
5961 if (AOTCodeCache::is_on_for_dump()) {
5962 // all aotrc field addresses should be registered in the AOTCodeCache address table
5963 lea(reg, ExternalAddress(a));
5964 } else {
5965 mov(reg, (uint64_t)a);
5966 }
5967 #else
5968 ShouldNotReachHere();
5969 #endif
5970 }
5971
5972 #ifdef ASSERT
5973 void MacroAssembler::build_frame(int framesize) {
5974 build_frame(framesize, false);
5975 }
5976 #endif
5977
5978 void MacroAssembler::build_frame(int framesize DEBUG_ONLY(COMMA bool zap_rfp_lr_spills)) {
5979 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5980 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5981 protect_return_address();
5982 if (framesize < ((1 << 9) + 2 * wordSize)) {
5983 sub(sp, sp, framesize);
5984 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
5985 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
5986 stp(rscratch1, rscratch1, Address(sp, framesize - 2 * wordSize));
5987 } else {
5988 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5989 }
5990 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5991 } else {
5992 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
5993 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
5994 stp(rscratch1, rscratch1, Address(pre(sp, -2 * wordSize)));
5995 } else {
5996 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5997 }
5998 if (PreserveFramePointer) mov(rfp, sp);
5999 if (framesize < ((1 << 12) + 2 * wordSize))
6000 sub(sp, sp, framesize - 2 * wordSize);
6001 else {
6002 mov(rscratch1, framesize - 2 * wordSize);
6003 sub(sp, sp, rscratch1);
6004 }
6005 }
6006 verify_cross_modify_fence_not_required();
6007 }
6008
6009 void MacroAssembler::remove_frame(int framesize) {
6010 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
6011 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
6012 if (framesize < ((1 << 9) + 2 * wordSize)) {
6013 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
6014 add(sp, sp, framesize);
6015 } else {
6016 if (framesize < ((1 << 12) + 2 * wordSize))
6017 add(sp, sp, framesize - 2 * wordSize);
6018 else {
6019 mov(rscratch1, framesize - 2 * wordSize);
6020 add(sp, sp, rscratch1);
6021 }
6022 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6023 }
6024 authenticate_return_address();
6025 }
6026
6027 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6028 if (needs_stack_repair) {
6029 // The method has a scalarized entry point (where fields of value object arguments
6030 // are passed through registers and stack), and a non-scalarized entry point (where
6031 // value object arguments are given as oops). The non-scalarized entry point will
6032 // first load each field of value object arguments and store them in registers and on
6033 // the stack in a way compatible with the scalarized entry point. To do so, some extra
6034 // stack space might be reserved (if argument registers are not enough). On leaving the
6035 // method, this space must be freed.
6036 //
6037 // In case we used the non-scalarized entry point the stack looks like this:
6038 //
6039 // | Arguments from caller |
6040 // |---------------------------| <-- caller's SP
6041 // | Saved LR #1 |
6042 // | Saved FP #1 |
6043 // |---------------------------|
6044 // | Extension space for |
6045 // | inline arg (un)packing |
6046 // |---------------------------| <-- start of this method's frame
6047 // | Saved LR #2 |
6048 // | Saved FP #2 |
6049 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6050 // | sp_inc |
6051 // | method locals |
6052 // |---------------------------| <-- SP
6053 //
6054 // There are two copies of FP and LR on the stack. They will be identical at
6055 // first, but that can change.
6056 // If the caller has been deoptimized, LR #1 will be patched to point at the
6057 // deopt blob, and LR #2 will still point into the old method.
6058 // If the saved FP (x29) was not used as the frame pointer, but to store an
6059 // oop, the GC will be aware only of FP #1 as the spilled location of x29 and
6060 // will fix only this one. Overall, FP/LR #2 are not reliable and are simply
6061 // needed to add space between the extension space and the locals, as there
6062 // would be between the real arguments and the locals if we don't need to
6063 // do unpacking (from the scalarized entry point).
6064 //
6065 // When restoring, one must then load FP #1 into x29, and LR #1 into x30,
6066 // while keeping in mind that from the scalarized entry point, there will be
6067 // only one copy of each. Indeed, in the case we used the scalarized calling
6068 // convention, the stack looks like this:
6069 //
6070 // | Arguments from caller |
6071 // |---------------------------| <-- caller's SP / start of this method's frame
6072 // | Saved LR |
6073 // | Saved FP |
6074 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6075 // | sp_inc |
6076 // | method locals |
6077 // |---------------------------| <-- SP
6078 //
6079 // The sp_inc stack slot holds the total size of the frame including the
6080 // extension space minus two words for the saved FP and LR. That is how to
6081 // find FP/LR #1. This size is expressed in bytes. Be careful when using it
6082 // from C++ in pointer arithmetic; you might need to divide it by wordSize.
6083 //
6084 // One can find sp_inc since the start the method's frame is SP + initial_framesize.
6085
6086 int sp_inc_offset = initial_framesize - 3 * wordSize; // Immediately below saved LR and FP
6087
6088 ldr(rscratch1, Address(sp, sp_inc_offset));
6089 add(sp, sp, rscratch1);
6090 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6091 } else {
6092 remove_frame(initial_framesize);
6093 }
6094 }
6095
6096 void MacroAssembler::save_stack_increment(int sp_inc, int frame_size) {
6097 int real_frame_size = frame_size + sp_inc;
6098 assert(sp_inc == 0 || sp_inc > 2*wordSize, "invalid sp_inc value");
6099 assert(real_frame_size >= 2*wordSize, "frame size must include FP/LR space");
6100 assert((real_frame_size & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6101
6102 int sp_inc_offset = frame_size - 3 * wordSize; // Immediately below saved LR and FP
6103
6104 // Subtract two words for the saved FP and LR as these will be popped
6105 // separately. See remove_frame above.
6106 mov(rscratch1, real_frame_size - 2*wordSize);
6107 str(rscratch1, Address(sp, sp_inc_offset));
6108 }
6109
6110 // This method counts leading positive bytes (highest bit not set) in provided byte array
6111 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
6112 // Simple and most common case of aligned small array which is not at the
6113 // end of memory page is placed here. All other cases are in stub.
6114 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
6115 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
6116 assert_different_registers(ary1, len, result);
6117
6118 mov(result, len);
6119 cmpw(len, 0);
6120 br(LE, DONE);
6121 cmpw(len, 4 * wordSize);
6122 br(GE, STUB_LONG); // size > 32 then go to stub
6123
6124 int shift = 64 - exact_log2(os::vm_page_size());
6125 lsl(rscratch1, ary1, shift);
6126 mov(rscratch2, (size_t)(4 * wordSize) << shift);
6127 adds(rscratch2, rscratch1, rscratch2); // At end of page?
6128 br(CS, STUB); // at the end of page then go to stub
7012 // On other systems, the helper is a usual C function.
7013 //
7014 void MacroAssembler::get_thread(Register dst) {
7015 RegSet saved_regs =
7016 BSD_ONLY(RegSet::range(r0, r17) + lr - dst)
7017 NOT_BSD (RegSet::range(r0, r1) + lr - dst);
7018
7019 protect_return_address();
7020 push(saved_regs, sp);
7021
7022 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
7023 blr(lr);
7024 if (dst != c_rarg0) {
7025 mov(dst, c_rarg0);
7026 }
7027
7028 pop(saved_regs, sp);
7029 authenticate_return_address();
7030 }
7031
7032 #ifdef COMPILER2
7033 // C2 compiled method's prolog code
7034 // Moved here from aarch64.ad to support Valhalla code below
7035 void MacroAssembler::verified_entry(Compile* C, int sp_inc) {
7036 if (C->clinit_barrier_on_entry()) {
7037 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
7038
7039 Label L_skip_barrier;
7040
7041 mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
7042 clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
7043 far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
7044 bind(L_skip_barrier);
7045 }
7046
7047 if (C->max_vector_size() > 0) {
7048 reinitialize_ptrue();
7049 }
7050
7051 int bangsize = C->output()->bang_size_in_bytes();
7052 if (C->output()->need_stack_bang(bangsize))
7053 generate_stack_overflow_check(bangsize);
7054
7055 // n.b. frame size includes space for return pc and rfp
7056 const long framesize = C->output()->frame_size_in_bytes();
7057 build_frame(framesize DEBUG_ONLY(COMMA sp_inc != 0));
7058
7059 if (C->needs_stack_repair()) {
7060 save_stack_increment(sp_inc, framesize);
7061 }
7062
7063 if (VerifyStackAtCalls) {
7064 Unimplemented();
7065 }
7066 }
7067 #endif // COMPILER2
7068
7069 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
7070 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
7071 // An inline type might be returned. If fields are in registers we
7072 // need to allocate an inline type instance and initialize it with
7073 // the value of the fields.
7074 Label skip;
7075 // We only need a new buffered inline type if a new one is not returned
7076 tbz(r0, 0, skip);
7077 int call_offset = -1;
7078
7079 // Be careful not to clobber r1-7 which hold returned fields
7080 // Also do not use callee-saved registers as these may be live in the interpreter
7081 Register tmp1 = r13, tmp2 = r14, klass = r15, r0_preserved = r12;
7082
7083 // The following code is similar to the instance allocation code in TemplateTable::_new
7084 // but has some slight differences,
7085 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
7086 // allocating is not necessary if vk != nullptr, etc.
7087 Label slow_case;
7088 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
7089 mov(r0_preserved, r0); // save r0 for slow_case since *_allocate may corrupt it when allocation failed
7090
7091 if (vk != nullptr) {
7092 // Called from C1, where the return type is statically known.
7093 movptr(klass, (intptr_t)vk->get_InlineKlass());
7094 jint lh = vk->layout_helper();
7095 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
7096 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
7097 tlab_allocate(r0, noreg, lh, tmp1, tmp2, slow_case);
7098 } else {
7099 b(slow_case);
7100 }
7101 } else {
7102 // Call from interpreter. R0 contains ((the InlineKlass* of the return type) | 0x01)
7103 andr(klass, r0, -2);
7104 if (UseTLAB) {
7105 ldrw(tmp2, Address(klass, Klass::layout_helper_offset()));
7106 tst(tmp2, Klass::_lh_instance_slow_path_bit);
7107 br(Assembler::NE, slow_case);
7108 tlab_allocate(r0, tmp2, 0, tmp1, tmp2, slow_case);
7109 } else {
7110 b(slow_case);
7111 }
7112 }
7113 if (UseTLAB) {
7114 // 2. Initialize buffered inline instance header
7115 Register buffer_obj = r0;
7116 if (UseCompactObjectHeaders) {
7117 ldr(rscratch1, Address(klass, Klass::prototype_header_offset()));
7118 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7119 } else {
7120 mov(rscratch1, (intptr_t)markWord::inline_type_prototype().value());
7121 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7122 store_klass_gap(buffer_obj, zr);
7123 if (vk == nullptr) {
7124 // store_klass corrupts klass, so save it for later use (interpreter case only).
7125 mov(tmp1, klass);
7126 }
7127 store_klass(buffer_obj, klass);
7128 klass = tmp1;
7129 }
7130 // 3. Initialize its fields with an inline class specific handler
7131 if (vk != nullptr) {
7132 far_call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
7133 } else {
7134 ldr(tmp1, Address(klass, InlineKlass::adr_members_offset()));
7135 ldr(tmp1, Address(tmp1, InlineKlass::pack_handler_offset()));
7136 blr(tmp1);
7137 }
7138
7139 membar(Assembler::StoreStore);
7140 b(skip);
7141 } else {
7142 // Must have already branched to slow_case above.
7143 DEBUG_ONLY(should_not_reach_here());
7144 }
7145 bind(slow_case);
7146 // We failed to allocate a new inline type, fall back to a runtime
7147 // call. Some oop field may be live in some registers but we can't
7148 // tell. That runtime call will take care of preserving them
7149 // across a GC if there's one.
7150 mov(r0, r0_preserved);
7151
7152 if (from_interpreter) {
7153 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
7154 } else {
7155 far_call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
7156 call_offset = offset();
7157 }
7158 membar(Assembler::StoreStore);
7159
7160 bind(skip);
7161 return call_offset;
7162 }
7163
7164 // Move a value between registers/stack slots and update the reg_state
7165 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
7166 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
7167 if (reg_state[to->value()] == reg_written) {
7168 return true; // Already written
7169 }
7170
7171 if (from != to && bt != T_VOID) {
7172 if (reg_state[to->value()] == reg_readonly) {
7173 return false; // Not yet writable
7174 }
7175 if (from->is_reg()) {
7176 if (to->is_reg()) {
7177 if (from->is_Register() && to->is_Register()) {
7178 mov(to->as_Register(), from->as_Register());
7179 } else if (from->is_FloatRegister() && to->is_FloatRegister()) {
7180 fmovd(to->as_FloatRegister(), from->as_FloatRegister());
7181 } else {
7182 ShouldNotReachHere();
7183 }
7184 } else {
7185 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7186 Address to_addr = Address(sp, st_off);
7187 if (from->is_FloatRegister()) {
7188 if (bt == T_DOUBLE) {
7189 strd(from->as_FloatRegister(), to_addr);
7190 } else {
7191 assert(bt == T_FLOAT, "must be float");
7192 strs(from->as_FloatRegister(), to_addr);
7193 }
7194 } else {
7195 str(from->as_Register(), to_addr);
7196 }
7197 }
7198 } else {
7199 Address from_addr = Address(sp, from->reg2stack() * VMRegImpl::stack_slot_size);
7200 if (to->is_reg()) {
7201 if (to->is_FloatRegister()) {
7202 if (bt == T_DOUBLE) {
7203 ldrd(to->as_FloatRegister(), from_addr);
7204 } else {
7205 assert(bt == T_FLOAT, "must be float");
7206 ldrs(to->as_FloatRegister(), from_addr);
7207 }
7208 } else {
7209 ldr(to->as_Register(), from_addr);
7210 }
7211 } else {
7212 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7213 ldr(rscratch1, from_addr);
7214 str(rscratch1, Address(sp, st_off));
7215 }
7216 }
7217 }
7218
7219 // Update register states
7220 reg_state[from->value()] = reg_writable;
7221 reg_state[to->value()] = reg_written;
7222 return true;
7223 }
7224
7225 // Calculate the extra stack space required for packing or unpacking inline
7226 // args and adjust the stack pointer
7227 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
7228 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
7229 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
7230 assert(sp_inc > 0, "sanity");
7231
7232 // Save a copy of the FP and LR here for deoptimization patching and frame walking
7233 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
7234
7235 // Adjust the stack pointer. This will be repaired on return by MacroAssembler::remove_frame
7236 if (sp_inc < (1 << 9)) {
7237 sub(sp, sp, sp_inc); // Fits in an immediate
7238 } else {
7239 mov(rscratch1, sp_inc);
7240 sub(sp, sp, rscratch1);
7241 }
7242
7243 return sp_inc + 2 * wordSize; // Account for the FP/LR space
7244 }
7245
7246 // Read all fields from an inline type oop and store the values in registers/stack slots
7247 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
7248 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
7249 RegState reg_state[]) {
7250 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
7251 assert(from->is_valid(), "source must be valid");
7252 bool progress = false;
7253 #ifdef ASSERT
7254 const int start_offset = offset();
7255 #endif
7256
7257 Label L_null, L_notNull;
7258 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
7259 Register tmp1 = r10;
7260 Register tmp2 = r11;
7261
7262 #ifdef ASSERT
7263 RegSet clobbered_gp_regs = MacroAssembler::call_clobbered_gp_registers();
7264 assert(clobbered_gp_regs.contains(tmp1), "tmp1 must be saved explicitly if it's not a clobber");
7265 assert(clobbered_gp_regs.contains(tmp2), "tmp2 must be saved explicitly if it's not a clobber");
7266 assert(clobbered_gp_regs.contains(r14), "r14 must be saved explicitly if it's not a clobber");
7267 #endif
7268
7269 Register fromReg = noreg;
7270 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
7271 bool done = true;
7272 bool mark_done = true;
7273 VMReg toReg;
7274 BasicType bt;
7275 // Check if argument requires a null check
7276 bool null_check = false;
7277 VMReg nullCheckReg;
7278 while (stream.next(nullCheckReg, bt)) {
7279 if (sig->at(stream.sig_index())._offset == -1) {
7280 null_check = true;
7281 break;
7282 }
7283 }
7284 stream.reset(sig_index, to_index);
7285 while (stream.next(toReg, bt)) {
7286 assert(toReg->is_valid(), "destination must be valid");
7287 int idx = (int)toReg->value();
7288 if (reg_state[idx] == reg_readonly) {
7289 if (idx != from->value()) {
7290 mark_done = false;
7291 }
7292 done = false;
7293 continue;
7294 } else if (reg_state[idx] == reg_written) {
7295 continue;
7296 }
7297 assert(reg_state[idx] == reg_writable, "must be writable");
7298 reg_state[idx] = reg_written;
7299 progress = true;
7300
7301 if (fromReg == noreg) {
7302 if (from->is_reg()) {
7303 fromReg = from->as_Register();
7304 } else {
7305 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size;
7306 ldr(tmp1, Address(sp, st_off));
7307 fromReg = tmp1;
7308 }
7309 if (null_check) {
7310 // Nullable inline type argument, emit null check
7311 cbz(fromReg, L_null);
7312 }
7313 }
7314 int off = sig->at(stream.sig_index())._offset;
7315 if (off == -1) {
7316 assert(null_check, "Missing null check at");
7317 if (toReg->is_stack()) {
7318 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7319 mov(tmp2, 1);
7320 str(tmp2, Address(sp, st_off));
7321 } else {
7322 mov(toReg->as_Register(), 1);
7323 }
7324 continue;
7325 }
7326 if (sig->at(stream.sig_index())._vt_oop) {
7327 if (toReg->is_stack()) {
7328 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7329 str(fromReg, Address(sp, st_off));
7330 } else {
7331 mov(toReg->as_Register(), fromReg);
7332 }
7333 continue;
7334 }
7335 assert(off > 0, "offset in object should be positive");
7336 Address fromAddr = Address(fromReg, off);
7337 if (!toReg->is_FloatRegister()) {
7338 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
7339 if (is_reference_type(bt)) {
7340 load_heap_oop(dst, fromAddr, rscratch1, rscratch2);
7341 } else {
7342 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
7343 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
7344 }
7345 if (toReg->is_stack()) {
7346 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7347 str(dst, Address(sp, st_off));
7348 }
7349 } else if (bt == T_DOUBLE) {
7350 ldrd(toReg->as_FloatRegister(), fromAddr);
7351 } else {
7352 assert(bt == T_FLOAT, "must be float");
7353 ldrs(toReg->as_FloatRegister(), fromAddr);
7354 }
7355 }
7356 if (progress && null_check) {
7357 if (done) {
7358 b(L_notNull);
7359 bind(L_null);
7360 // Set null marker to zero to signal that the argument is null.
7361 // Also set all fields to zero since the runtime requires a canonical
7362 // representation of a flat null.
7363 stream.reset(sig_index, to_index);
7364 while (stream.next(toReg, bt)) {
7365 if (toReg->is_stack()) {
7366 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7367 str(zr, Address(sp, st_off));
7368 } else if (toReg->is_FloatRegister()) {
7369 mov(toReg->as_FloatRegister(), T2S, 0);
7370 } else {
7371 mov(toReg->as_Register(), zr);
7372 }
7373 }
7374 bind(L_notNull);
7375 } else {
7376 bind(L_null);
7377 }
7378 }
7379
7380 sig_index = stream.sig_index();
7381 to_index = stream.regs_index();
7382
7383 if (mark_done && reg_state[from->value()] != reg_written) {
7384 // This is okay because no one else will write to that slot
7385 reg_state[from->value()] = reg_writable;
7386 }
7387 from_index--;
7388 assert(progress || (start_offset == offset()), "should not emit code");
7389 return done;
7390 }
7391
7392 // Pack fields back into an inline type oop
7393 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
7394 VMRegPair* from, int from_count, int& from_index, VMReg to,
7395 RegState reg_state[], Register val_array) {
7396 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
7397 assert(to->is_valid(), "destination must be valid");
7398
7399 if (reg_state[to->value()] == reg_written) {
7400 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7401 return true; // Already written
7402 }
7403
7404 // The GC barrier expanded by store_heap_oop below may call into the
7405 // runtime so use callee-saved registers for any values that need to be
7406 // preserved. The GC barrier assembler should take care of saving the
7407 // Java argument registers.
7408 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
7409 Register val_obj_tmp = r21;
7410 Register from_reg_tmp = r22;
7411 Register tmp1 = r14;
7412 Register tmp2 = r13;
7413 Register tmp3 = r12;
7414 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
7415
7416 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
7417
7418 if (reg_state[to->value()] == reg_readonly) {
7419 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
7420 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7421 return false; // Not yet writable
7422 }
7423 val_obj = val_obj_tmp;
7424 }
7425
7426 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
7427 VMReg fromReg;
7428 BasicType bt;
7429 Label L_null;
7430 while (stream.next(fromReg, bt)) {
7431 assert(fromReg->is_valid(), "source must be valid");
7432 reg_state[fromReg->value()] = reg_writable;
7433
7434 int off = sig->at(stream.sig_index())._offset;
7435 if (off == -1) {
7436 // Nullable inline type argument, emit null check
7437 Label L_notNull;
7438 if (fromReg->is_stack()) {
7439 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7440 ldrb(tmp2, Address(sp, ld_off));
7441 cbnz(tmp2, L_notNull);
7442 } else {
7443 cbnz(fromReg->as_Register(), L_notNull);
7444 }
7445 mov(val_obj, 0);
7446 b(L_null);
7447 bind(L_notNull);
7448 continue;
7449 }
7450 if (sig->at(stream.sig_index())._vt_oop) {
7451 if (fromReg->is_stack()) {
7452 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7453 ldr(val_obj, Address(sp, ld_off));
7454 } else {
7455 mov(val_obj, fromReg->as_Register());
7456 }
7457 cbnz(val_obj, L_null);
7458 // get the buffer from the just allocated pool of buffers
7459 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
7460 load_heap_oop(val_obj, Address(val_array, index), rscratch1, rscratch2);
7461 continue;
7462 }
7463
7464 assert(off > 0, "offset in object should be positive");
7465 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
7466
7467 // Pack the scalarized field into the value object.
7468 Address dst(val_obj, off);
7469 if (!fromReg->is_FloatRegister()) {
7470 Register src;
7471 if (fromReg->is_stack()) {
7472 src = from_reg_tmp;
7473 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7474 load_sized_value(src, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
7475 } else {
7476 src = fromReg->as_Register();
7477 }
7478 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
7479 if (is_reference_type(bt)) {
7480 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep val_obj valid.
7481 mov(tmp3, val_obj);
7482 Address dst_with_tmp3(tmp3, off);
7483 store_heap_oop(dst_with_tmp3, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
7484 } else {
7485 store_sized_value(dst, src, size_in_bytes);
7486 }
7487 } else if (bt == T_DOUBLE) {
7488 strd(fromReg->as_FloatRegister(), dst);
7489 } else {
7490 assert(bt == T_FLOAT, "must be float");
7491 strs(fromReg->as_FloatRegister(), dst);
7492 }
7493 }
7494 bind(L_null);
7495 sig_index = stream.sig_index();
7496 from_index = stream.regs_index();
7497
7498 assert(reg_state[to->value()] == reg_writable, "must have already been read");
7499 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
7500 assert(success, "to register must be writeable");
7501 return true;
7502 }
7503
7504 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
7505 return (reg->is_FloatRegister()) ? v8->as_VMReg() : r14->as_VMReg();
7506 }
7507
7508 void MacroAssembler::cache_wb(Address line) {
7509 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
7510 assert(line.index() == noreg, "index should be noreg");
7511 assert(line.offset() == 0, "offset should be 0");
7512 // would like to assert this
7513 // assert(line._ext.shift == 0, "shift should be zero");
7514 if (VM_Version::supports_dcpop()) {
7515 // writeback using clear virtual address to point of persistence
7516 dc(Assembler::CVAP, line.base());
7517 } else {
7518 // no need to generate anything as Unsafe.writebackMemory should
7519 // never invoke this stub
7520 }
7521 }
7522
7523 void MacroAssembler::cache_wbsync(bool is_pre) {
7524 // we only need a barrier post sync
7525 if (!is_pre) {
7526 membar(Assembler::AnyAny);
7527 }
7923 }
7924
7925 // Check if the lock-stack is full.
7926 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7927 cmpw(top, (unsigned)LockStack::end_offset());
7928 br(Assembler::GE, slow);
7929
7930 // Check for recursion.
7931 subw(t, top, oopSize);
7932 ldr(t, Address(rthread, t));
7933 cmp(obj, t);
7934 br(Assembler::EQ, push);
7935
7936 // Check header for monitor (0b10).
7937 tst(mark, markWord::monitor_value);
7938 br(Assembler::NE, slow);
7939
7940 // Try to lock. Transition lock bits 0b01 => 0b00
7941 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7942 orr(mark, mark, markWord::unlocked_value);
7943 // Mask inline_type bit such that we go to the slow path if object is an inline type
7944 andr(mark, mark, ~((int) markWord::inline_type_bit_in_place));
7945
7946 eor(t, mark, markWord::unlocked_value);
7947 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7948 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7949 br(Assembler::NE, slow);
7950
7951 bind(push);
7952 // After successful lock, push object on lock-stack.
7953 str(obj, Address(rthread, top));
7954 addw(top, top, oopSize);
7955 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7956 }
7957
7958 // Implements fast-unlocking.
7959 //
7960 // - obj: the object to be unlocked
7961 // - t1, t2, t3: temporary registers
7962 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7963 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7964 // cmpxchg clobbers rscratch1.
7965 assert_different_registers(obj, t1, t2, t3, rscratch1);
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