9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "code/compiledIC.hpp"
30 #include "compiler/compileTask.hpp"
31 #include "compiler/disassembler.hpp"
32 #include "compiler/oopMap.hpp"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/cardTable.hpp"
37 #include "gc/shared/collectedHeap.hpp"
38 #include "gc/shared/tlab_globals.hpp"
39 #include "interpreter/bytecodeHistogram.hpp"
40 #include "interpreter/interpreter.hpp"
41 #include "interpreter/interpreterRuntime.hpp"
42 #include "jvm.h"
43 #include "memory/resourceArea.hpp"
44 #include "memory/universe.hpp"
45 #include "nativeInst_aarch64.hpp"
46 #include "oops/accessDecorators.hpp"
47 #include "oops/compressedKlass.inline.hpp"
48 #include "oops/compressedOops.inline.hpp"
49 #include "oops/klass.inline.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/icache.hpp"
52 #include "runtime/interfaceSupport.inline.hpp"
53 #include "runtime/javaThread.hpp"
54 #include "runtime/jniHandles.inline.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/globalDefinitions.hpp"
58 #include "utilities/integerCast.hpp"
59 #include "utilities/powerOfTwo.hpp"
60 #ifdef COMPILER1
61 #include "c1/c1_LIRAssembler.hpp"
62 #endif
63 #ifdef COMPILER2
64 #include "oops/oop.hpp"
65 #include "opto/compile.hpp"
66 #include "opto/node.hpp"
67 #include "opto/output.hpp"
68 #endif
69
70 #include <sys/types.h>
71
72 #ifdef PRODUCT
73 #define BLOCK_COMMENT(str) /* nothing */
74 #else
75 #define BLOCK_COMMENT(str) block_comment(str)
76 #endif
77 #define STOP(str) stop(str);
78 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
79
1989 ldarb(scratch, scratch);
1990 cmp(scratch, InstanceKlass::fully_initialized);
1991 br(Assembler::EQ, *L_fast_path);
1992
1993 // Fast path check: current thread is initializer thread
1994 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
1995 cmp(rthread, scratch);
1996
1997 if (L_slow_path == &L_fallthrough) {
1998 br(Assembler::EQ, *L_fast_path);
1999 bind(*L_slow_path);
2000 } else if (L_fast_path == &L_fallthrough) {
2001 br(Assembler::NE, *L_slow_path);
2002 bind(*L_fast_path);
2003 } else {
2004 Unimplemented();
2005 }
2006 }
2007
2008 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2009 if (!VerifyOops) return;
2010
2011 // Pass register number to verify_oop_subroutine
2012 const char* b = nullptr;
2013 {
2014 ResourceMark rm;
2015 stringStream ss;
2016 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2017 b = code_string(ss.as_string());
2018 }
2019 BLOCK_COMMENT("verify_oop {");
2020
2021 strip_return_address(); // This might happen within a stack frame.
2022 protect_return_address();
2023 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2024 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2025
2026 mov(r0, reg);
2027 movptr(rscratch1, (uintptr_t)(address)b);
2028
2029 // call indirectly to solve generation ordering problem
2030 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2031 ldr(rscratch2, Address(rscratch2));
2032 blr(rscratch2);
2033
2034 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2035 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2036 authenticate_return_address();
2037
2038 BLOCK_COMMENT("} verify_oop");
2039 }
2040
2041 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2042 if (!VerifyOops) return;
2043
2044 const char* b = nullptr;
2045 {
2046 ResourceMark rm;
2047 stringStream ss;
2048 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2049 b = code_string(ss.as_string());
2050 }
2051 BLOCK_COMMENT("verify_oop_addr {");
2052
2053 strip_return_address(); // This might happen within a stack frame.
2054 protect_return_address();
2055 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2056 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2057
2058 // addr may contain sp so we will have to adjust it based on the
2059 // pushes that we just did.
2060 if (addr.uses(sp)) {
2061 lea(r0, addr);
2062 ldr(r0, Address(r0, 4 * wordSize));
2271 call_VM_leaf_base(entry_point, 1);
2272 }
2273
2274 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2275 assert_different_registers(arg_1, c_rarg0);
2276 pass_arg0(this, arg_0);
2277 pass_arg1(this, arg_1);
2278 call_VM_leaf_base(entry_point, 2);
2279 }
2280
2281 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2282 Register arg_1, Register arg_2) {
2283 assert_different_registers(arg_1, c_rarg0);
2284 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2285 pass_arg0(this, arg_0);
2286 pass_arg1(this, arg_1);
2287 pass_arg2(this, arg_2);
2288 call_VM_leaf_base(entry_point, 3);
2289 }
2290
2291 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2292 pass_arg0(this, arg_0);
2293 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2294 }
2295
2296 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2297
2298 assert_different_registers(arg_0, c_rarg1);
2299 pass_arg1(this, arg_1);
2300 pass_arg0(this, arg_0);
2301 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2302 }
2303
2304 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2305 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2306 assert_different_registers(arg_1, c_rarg2);
2307 pass_arg2(this, arg_2);
2308 pass_arg1(this, arg_1);
2309 pass_arg0(this, arg_0);
2310 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2316 assert_different_registers(arg_2, c_rarg3);
2317 pass_arg3(this, arg_3);
2318 pass_arg2(this, arg_2);
2319 pass_arg1(this, arg_1);
2320 pass_arg0(this, arg_0);
2321 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2322 }
2323
2324 void MacroAssembler::null_check(Register reg, int offset) {
2325 if (needs_explicit_null_check(offset)) {
2326 // provoke OS null exception if reg is null by
2327 // accessing M[reg] w/o changing any registers
2328 // NOTE: this is plenty to provoke a segv
2329 ldr(zr, Address(reg));
2330 } else {
2331 // nothing to do, (later) access of M[reg + offset]
2332 // will provoke OS null exception if reg is null
2333 }
2334 }
2335
2336 // MacroAssembler protected routines needed to implement
2337 // public methods
2338
2339 void MacroAssembler::mov(Register r, Address dest) {
2340 code_section()->relocate(pc(), dest.rspec());
2341 uint64_t imm64 = (uint64_t)dest.target();
2342 movptr(r, imm64);
2343 }
2344
2345 // Move a constant pointer into r. In AArch64 mode the virtual
2346 // address space is 48 bits in size, so we only need three
2347 // instructions to create a patchable instruction sequence that can
2348 // reach anywhere.
2349 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2350 #ifndef PRODUCT
2351 {
2352 char buffer[64];
2353 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2354 block_comment(buffer);
2355 }
5078 adrp(rscratch1, src2, offset);
5079 ldr(rscratch1, Address(rscratch1, offset));
5080 cmp(src1, rscratch1);
5081 }
5082
5083 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5084 cmp(obj1, obj2);
5085 }
5086
5087 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5088 load_method_holder(rresult, rmethod);
5089 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5090 }
5091
5092 void MacroAssembler::load_method_holder(Register holder, Register method) {
5093 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5094 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5095 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5096 }
5097
5098 // Loads the obj's narrow Klass from a compact object header (+COH) into dst.
5099 // Preserves all registers (incl src, rscratch1 and rscratch2).
5100 // Input:
5101 // src - the oop we want to load the klass from.
5102 // dst - output narrow klass.
5103 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5104 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5105 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5106 lsr(dst, dst, markWord::klass_shift);
5107 }
5108
5109 // Loads the obj's narrow Klass from any header (compact or not) into dst.
5110 void MacroAssembler::load_narrow_klass(Register dst, Register src) {
5111 if (UseCompactObjectHeaders) {
5112 load_narrow_klass_compact(dst, src);
5113 } else {
5114 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5115 }
5116 }
5117
5174 } else {
5175 ldrw(tmp, Address(obj, oopDesc::klass_offset_in_bytes()));
5176 }
5177 if (CompressedKlassPointers::base() == nullptr) {
5178 cmp(klass, tmp, LSL, CompressedKlassPointers::shift());
5179 return;
5180 } else if (!AOTCodeCache::is_on_for_dump() &&
5181 ((uint64_t)CompressedKlassPointers::base() & 0xffffffff) == 0
5182 && CompressedKlassPointers::shift() == 0) {
5183 // Only the bottom 32 bits matter
5184 cmpw(klass, tmp);
5185 return;
5186 }
5187 decode_klass_not_null(tmp);
5188 cmp(klass, tmp);
5189 }
5190
5191 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5192 if (UseCompactObjectHeaders) {
5193 load_narrow_klass_compact(tmp1, obj1);
5194 load_narrow_klass_compact(tmp2, obj2);
5195 } else {
5196 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5197 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5198 }
5199 cmpw(tmp1, tmp2);
5200 }
5201
5202 void MacroAssembler::store_klass(Register dst, Register src) {
5203 // FIXME: Should this be a store release? concurrent gcs assumes
5204 // klass length is valid if klass field is not null.
5205 assert(!UseCompactObjectHeaders, "not with compact headers");
5206 encode_klass_not_null(src);
5207 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5208 }
5209
5210 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5211 assert(!UseCompactObjectHeaders, "not with compact headers");
5212 // Store to klass gap in destination
5213 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5214 }
5215
5216 // Algorithm must match CompressedOops::encode.
5217 void MacroAssembler::encode_heap_oop(Register d, Register s) {
5218 #ifdef ASSERT
5219 verify_heapbase("MacroAssembler::encode_heap_oop: heap base corrupted?");
5220 #endif
5221 verify_oop_msg(s, "broken oop in encode_heap_oop");
5571 if (as_raw) {
5572 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5573 } else {
5574 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5575 }
5576 }
5577
5578 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5579 Address dst, Register val,
5580 Register tmp1, Register tmp2, Register tmp3) {
5581 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5582 decorators = AccessInternal::decorator_fixup(decorators, type);
5583 bool as_raw = (decorators & AS_RAW) != 0;
5584 if (as_raw) {
5585 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5586 } else {
5587 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5588 }
5589 }
5590
5591 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5592 Register tmp2, DecoratorSet decorators) {
5593 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5594 }
5595
5596 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5597 Register tmp2, DecoratorSet decorators) {
5598 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5599 }
5600
5601 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5602 Register tmp2, Register tmp3, DecoratorSet decorators) {
5603 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5604 }
5605
5606 // Used for storing nulls.
5607 void MacroAssembler::store_heap_oop_null(Address dst) {
5608 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5609 }
5610
5685 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5686 cmp(rscratch2, rscratch1);
5687 br(Assembler::HS, next);
5688 STOP("assert(top >= start)");
5689 should_not_reach_here();
5690
5691 bind(next);
5692 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5693 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5694 cmp(rscratch2, rscratch1);
5695 br(Assembler::HS, ok);
5696 STOP("assert(top <= end)");
5697 should_not_reach_here();
5698
5699 bind(ok);
5700 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5701 }
5702 #endif
5703 }
5704
5705 // Writes to stack successive pages until offset reached to check for
5706 // stack overflow + shadow pages. This clobbers tmp.
5707 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5708 assert_different_registers(tmp, size, rscratch1);
5709 mov(tmp, sp);
5710 // Bang stack for total size given plus shadow page size.
5711 // Bang one page at a time because large size can bang beyond yellow and
5712 // red zones.
5713 Label loop;
5714 mov(rscratch1, (int)os::vm_page_size());
5715 bind(loop);
5716 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5717 subsw(size, size, rscratch1);
5718 str(size, Address(tmp));
5719 br(Assembler::GT, loop);
5720
5721 // Bang down shadow pages too.
5722 // At this point, (tmp-0) is the last address touched, so don't
5723 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5724 // was post-decremented.) Skip this address by starting at i=1, and
5791
5792 // Strictly speaking the card table base isn't an address at all, and it might
5793 // even be negative. It is thus materialised as a constant.
5794 mov(reg, (uint64_t)ctbs->card_table_base_const());
5795 }
5796
5797 void MacroAssembler::load_aotrc_address(Register reg, address a) {
5798 #if INCLUDE_CDS
5799 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
5800 if (AOTCodeCache::is_on_for_dump()) {
5801 // all aotrc field addresses should be registered in the AOTCodeCache address table
5802 lea(reg, ExternalAddress(a));
5803 } else {
5804 mov(reg, (uint64_t)a);
5805 }
5806 #else
5807 ShouldNotReachHere();
5808 #endif
5809 }
5810
5811 void MacroAssembler::build_frame(int framesize) {
5812 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5813 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5814 protect_return_address();
5815 if (framesize < ((1 << 9) + 2 * wordSize)) {
5816 sub(sp, sp, framesize);
5817 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5818 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5819 } else {
5820 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5821 if (PreserveFramePointer) mov(rfp, sp);
5822 if (framesize < ((1 << 12) + 2 * wordSize))
5823 sub(sp, sp, framesize - 2 * wordSize);
5824 else {
5825 mov(rscratch1, framesize - 2 * wordSize);
5826 sub(sp, sp, rscratch1);
5827 }
5828 }
5829 verify_cross_modify_fence_not_required();
5830 }
5831
5832 void MacroAssembler::remove_frame(int framesize) {
5833 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5834 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5835 if (framesize < ((1 << 9) + 2 * wordSize)) {
5836 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5837 add(sp, sp, framesize);
5838 } else {
5839 if (framesize < ((1 << 12) + 2 * wordSize))
5840 add(sp, sp, framesize - 2 * wordSize);
5841 else {
5842 mov(rscratch1, framesize - 2 * wordSize);
5843 add(sp, sp, rscratch1);
5844 }
5845 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5846 }
5847 authenticate_return_address();
5848 }
5849
5850
5851 // This method counts leading positive bytes (highest bit not set) in provided byte array
5852 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
5853 // Simple and most common case of aligned small array which is not at the
5854 // end of memory page is placed here. All other cases are in stub.
5855 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
5856 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
5857 assert_different_registers(ary1, len, result);
5858
5859 mov(result, len);
5860 cmpw(len, 0);
5861 br(LE, DONE);
5862 cmpw(len, 4 * wordSize);
5863 br(GE, STUB_LONG); // size > 32 then go to stub
5864
5865 int shift = 64 - exact_log2(os::vm_page_size());
5866 lsl(rscratch1, ary1, shift);
5867 mov(rscratch2, (size_t)(4 * wordSize) << shift);
5868 adds(rscratch2, rscratch1, rscratch2); // At end of page?
5869 br(CS, STUB); // at the end of page then go to stub
6753 // On other systems, the helper is a usual C function.
6754 //
6755 void MacroAssembler::get_thread(Register dst) {
6756 RegSet saved_regs =
6757 BSD_ONLY(RegSet::range(r0, r17) + lr - dst)
6758 NOT_BSD (RegSet::range(r0, r1) + lr - dst);
6759
6760 protect_return_address();
6761 push(saved_regs, sp);
6762
6763 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6764 blr(lr);
6765 if (dst != c_rarg0) {
6766 mov(dst, c_rarg0);
6767 }
6768
6769 pop(saved_regs, sp);
6770 authenticate_return_address();
6771 }
6772
6773 void MacroAssembler::cache_wb(Address line) {
6774 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
6775 assert(line.index() == noreg, "index should be noreg");
6776 assert(line.offset() == 0, "offset should be 0");
6777 // would like to assert this
6778 // assert(line._ext.shift == 0, "shift should be zero");
6779 if (VM_Version::supports_dcpop()) {
6780 // writeback using clear virtual address to point of persistence
6781 dc(Assembler::CVAP, line.base());
6782 } else {
6783 // no need to generate anything as Unsafe.writebackMemory should
6784 // never invoke this stub
6785 }
6786 }
6787
6788 void MacroAssembler::cache_wbsync(bool is_pre) {
6789 // we only need a barrier post sync
6790 if (!is_pre) {
6791 membar(Assembler::AnyAny);
6792 }
7188 }
7189
7190 // Check if the lock-stack is full.
7191 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7192 cmpw(top, (unsigned)LockStack::end_offset());
7193 br(Assembler::GE, slow);
7194
7195 // Check for recursion.
7196 subw(t, top, oopSize);
7197 ldr(t, Address(rthread, t));
7198 cmp(obj, t);
7199 br(Assembler::EQ, push);
7200
7201 // Check header for monitor (0b10).
7202 tst(mark, markWord::monitor_value);
7203 br(Assembler::NE, slow);
7204
7205 // Try to lock. Transition lock bits 0b01 => 0b00
7206 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7207 orr(mark, mark, markWord::unlocked_value);
7208 eor(t, mark, markWord::unlocked_value);
7209 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword, memory_order_acquire);
7210 br(Assembler::NE, slow);
7211
7212 bind(push);
7213 // After successful lock, push object on lock-stack.
7214 str(obj, Address(rthread, top));
7215 addw(top, top, oopSize);
7216 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7217 }
7218
7219 // Implements fast-unlocking.
7220 //
7221 // - obj: the object to be unlocked
7222 // - t1, t2, t3: temporary registers
7223 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7224 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7225 // cmpxchg clobbers rscratch1.
7226 assert_different_registers(obj, t1, t2, t3, rscratch1);
7227
|
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "ci/ciInlineKlass.hpp"
30 #include "code/compiledIC.hpp"
31 #include "compiler/compileTask.hpp"
32 #include "compiler/disassembler.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "gc/shared/cardTableBarrierSet.hpp"
37 #include "gc/shared/cardTable.hpp"
38 #include "gc/shared/collectedHeap.hpp"
39 #include "gc/shared/tlab_globals.hpp"
40 #include "interpreter/bytecodeHistogram.hpp"
41 #include "interpreter/interpreter.hpp"
42 #include "interpreter/interpreterRuntime.hpp"
43 #include "jvm.h"
44 #include "memory/resourceArea.hpp"
45 #include "memory/universe.hpp"
46 #include "nativeInst_aarch64.hpp"
47 #include "oops/accessDecorators.hpp"
48 #include "oops/compressedKlass.inline.hpp"
49 #include "oops/compressedOops.inline.hpp"
50 #include "oops/klass.inline.hpp"
51 #include "oops/resolvedFieldEntry.hpp"
52 #include "runtime/arguments.hpp"
53 #include "runtime/continuation.hpp"
54 #include "runtime/globals.hpp"
55 #include "runtime/icache.hpp"
56 #include "runtime/interfaceSupport.inline.hpp"
57 #include "runtime/javaThread.hpp"
58 #include "runtime/jniHandles.inline.hpp"
59 #include "runtime/sharedRuntime.hpp"
60 #include "runtime/signature_cc.hpp"
61 #include "runtime/stubRoutines.hpp"
62 #include "utilities/globalDefinitions.hpp"
63 #include "utilities/integerCast.hpp"
64 #include "utilities/powerOfTwo.hpp"
65 #include "vmreg_aarch64.inline.hpp"
66 #ifdef COMPILER1
67 #include "c1/c1_LIRAssembler.hpp"
68 #endif
69 #ifdef COMPILER2
70 #include "oops/oop.hpp"
71 #include "opto/compile.hpp"
72 #include "opto/node.hpp"
73 #include "opto/output.hpp"
74 #endif
75
76 #include <sys/types.h>
77
78 #ifdef PRODUCT
79 #define BLOCK_COMMENT(str) /* nothing */
80 #else
81 #define BLOCK_COMMENT(str) block_comment(str)
82 #endif
83 #define STOP(str) stop(str);
84 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
85
1995 ldarb(scratch, scratch);
1996 cmp(scratch, InstanceKlass::fully_initialized);
1997 br(Assembler::EQ, *L_fast_path);
1998
1999 // Fast path check: current thread is initializer thread
2000 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2001 cmp(rthread, scratch);
2002
2003 if (L_slow_path == &L_fallthrough) {
2004 br(Assembler::EQ, *L_fast_path);
2005 bind(*L_slow_path);
2006 } else if (L_fast_path == &L_fallthrough) {
2007 br(Assembler::NE, *L_slow_path);
2008 bind(*L_fast_path);
2009 } else {
2010 Unimplemented();
2011 }
2012 }
2013
2014 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2015 if (!VerifyOops || VerifyAdapterSharing) {
2016 // Below address of the code string confuses VerifyAdapterSharing
2017 // because it may differ between otherwise equivalent adapters.
2018 return;
2019 }
2020
2021 // Pass register number to verify_oop_subroutine
2022 const char* b = nullptr;
2023 {
2024 ResourceMark rm;
2025 stringStream ss;
2026 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2027 b = code_string(ss.as_string());
2028 }
2029 BLOCK_COMMENT("verify_oop {");
2030
2031 strip_return_address(); // This might happen within a stack frame.
2032 protect_return_address();
2033 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2034 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2035
2036 mov(r0, reg);
2037 movptr(rscratch1, (uintptr_t)(address)b);
2038
2039 // call indirectly to solve generation ordering problem
2040 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2041 ldr(rscratch2, Address(rscratch2));
2042 blr(rscratch2);
2043
2044 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2045 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2046 authenticate_return_address();
2047
2048 BLOCK_COMMENT("} verify_oop");
2049 }
2050
2051 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2052 if (!VerifyOops || VerifyAdapterSharing) {
2053 // Below address of the code string confuses VerifyAdapterSharing
2054 // because it may differ between otherwise equivalent adapters.
2055 return;
2056 }
2057
2058 const char* b = nullptr;
2059 {
2060 ResourceMark rm;
2061 stringStream ss;
2062 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2063 b = code_string(ss.as_string());
2064 }
2065 BLOCK_COMMENT("verify_oop_addr {");
2066
2067 strip_return_address(); // This might happen within a stack frame.
2068 protect_return_address();
2069 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2070 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2071
2072 // addr may contain sp so we will have to adjust it based on the
2073 // pushes that we just did.
2074 if (addr.uses(sp)) {
2075 lea(r0, addr);
2076 ldr(r0, Address(r0, 4 * wordSize));
2285 call_VM_leaf_base(entry_point, 1);
2286 }
2287
2288 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2289 assert_different_registers(arg_1, c_rarg0);
2290 pass_arg0(this, arg_0);
2291 pass_arg1(this, arg_1);
2292 call_VM_leaf_base(entry_point, 2);
2293 }
2294
2295 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2296 Register arg_1, Register arg_2) {
2297 assert_different_registers(arg_1, c_rarg0);
2298 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2299 pass_arg0(this, arg_0);
2300 pass_arg1(this, arg_1);
2301 pass_arg2(this, arg_2);
2302 call_VM_leaf_base(entry_point, 3);
2303 }
2304
2305 void MacroAssembler::super_call_VM_leaf(address entry_point) {
2306 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2307 }
2308
2309 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2310 pass_arg0(this, arg_0);
2311 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2312 }
2313
2314 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2315
2316 assert_different_registers(arg_0, c_rarg1);
2317 pass_arg1(this, arg_1);
2318 pass_arg0(this, arg_0);
2319 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2320 }
2321
2322 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2323 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2324 assert_different_registers(arg_1, c_rarg2);
2325 pass_arg2(this, arg_2);
2326 pass_arg1(this, arg_1);
2327 pass_arg0(this, arg_0);
2328 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2334 assert_different_registers(arg_2, c_rarg3);
2335 pass_arg3(this, arg_3);
2336 pass_arg2(this, arg_2);
2337 pass_arg1(this, arg_1);
2338 pass_arg0(this, arg_0);
2339 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2340 }
2341
2342 void MacroAssembler::null_check(Register reg, int offset) {
2343 if (needs_explicit_null_check(offset)) {
2344 // provoke OS null exception if reg is null by
2345 // accessing M[reg] w/o changing any registers
2346 // NOTE: this is plenty to provoke a segv
2347 ldr(zr, Address(reg));
2348 } else {
2349 // nothing to do, (later) access of M[reg + offset]
2350 // will provoke OS null exception if reg is null
2351 }
2352 }
2353
2354 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2355 assert_different_registers(markword, rscratch2);
2356 mov(rscratch2, markWord::inline_type_pattern_mask);
2357 andr(markword, markword, rscratch2);
2358 mov(rscratch2, markWord::inline_type_pattern);
2359 cmp(markword, rscratch2);
2360 br(Assembler::EQ, is_inline_type);
2361 }
2362
2363 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2364 assert_different_registers(tmp, rscratch1);
2365 if (can_be_null) {
2366 cbz(object, not_inline_type);
2367 }
2368 const int is_inline_type_mask = markWord::inline_type_pattern;
2369 ldr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2370 mov(rscratch1, is_inline_type_mask);
2371 andr(tmp, tmp, rscratch1);
2372 cmp(tmp, rscratch1);
2373 br(Assembler::NE, not_inline_type);
2374 }
2375
2376 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2377 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2378 tbnz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, is_null_free_inline_type);
2379 }
2380
2381 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2382 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2383 tbz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, not_null_free_inline_type);
2384 }
2385
2386 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2387 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2388 tbnz(flags, ResolvedFieldEntry::is_flat_shift, is_flat);
2389 }
2390
2391 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2392 // load mark word
2393 ldr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2394 if (!UseObjectMonitorTable) {
2395 Label test_mark_word;
2396 // check displaced
2397 tst(temp_reg, markWord::unlocked_value);
2398 br(Assembler::NE, test_mark_word);
2399 // slow path use klass prototype
2400 load_prototype_header(temp_reg, oop);
2401
2402 bind(test_mark_word);
2403 }
2404 andr(temp_reg, temp_reg, test_bit);
2405 if (jmp_set) {
2406 cbnz(temp_reg, jmp_label);
2407 } else {
2408 cbz(temp_reg, jmp_label);
2409 }
2410 }
2411
2412 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array) {
2413 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2414 }
2415
2416 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2417 Label&is_non_flat_array) {
2418 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2419 }
2420
2421 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array) {
2422 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2423 }
2424
2425 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2426 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2427 }
2428
2429 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2430 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2431 br(Assembler::NE, is_flat_array);
2432 }
2433
2434 // MacroAssembler protected routines needed to implement
2435 // public methods
2436
2437 void MacroAssembler::mov(Register r, Address dest) {
2438 code_section()->relocate(pc(), dest.rspec());
2439 uint64_t imm64 = (uint64_t)dest.target();
2440 movptr(r, imm64);
2441 }
2442
2443 // Move a constant pointer into r. In AArch64 mode the virtual
2444 // address space is 48 bits in size, so we only need three
2445 // instructions to create a patchable instruction sequence that can
2446 // reach anywhere.
2447 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2448 #ifndef PRODUCT
2449 {
2450 char buffer[64];
2451 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2452 block_comment(buffer);
2453 }
5176 adrp(rscratch1, src2, offset);
5177 ldr(rscratch1, Address(rscratch1, offset));
5178 cmp(src1, rscratch1);
5179 }
5180
5181 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5182 cmp(obj1, obj2);
5183 }
5184
5185 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5186 load_method_holder(rresult, rmethod);
5187 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5188 }
5189
5190 void MacroAssembler::load_method_holder(Register holder, Register method) {
5191 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5192 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5193 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5194 }
5195
5196 void MacroAssembler::load_metadata(Register dst, Register src) {
5197 if (UseCompactObjectHeaders) {
5198 load_narrow_klass_compact(dst, src);
5199 } else {
5200 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5201 }
5202 }
5203
5204 // Loads the obj's narrow Klass from a compact object header (+COH) into dst.
5205 // Preserves all registers (incl src, rscratch1 and rscratch2).
5206 // Input:
5207 // src - the oop we want to load the klass from.
5208 // dst - output narrow klass.
5209 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5210 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5211 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5212 lsr(dst, dst, markWord::klass_shift);
5213 }
5214
5215 // Loads the obj's narrow Klass from any header (compact or not) into dst.
5216 void MacroAssembler::load_narrow_klass(Register dst, Register src) {
5217 if (UseCompactObjectHeaders) {
5218 load_narrow_klass_compact(dst, src);
5219 } else {
5220 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5221 }
5222 }
5223
5280 } else {
5281 ldrw(tmp, Address(obj, oopDesc::klass_offset_in_bytes()));
5282 }
5283 if (CompressedKlassPointers::base() == nullptr) {
5284 cmp(klass, tmp, LSL, CompressedKlassPointers::shift());
5285 return;
5286 } else if (!AOTCodeCache::is_on_for_dump() &&
5287 ((uint64_t)CompressedKlassPointers::base() & 0xffffffff) == 0
5288 && CompressedKlassPointers::shift() == 0) {
5289 // Only the bottom 32 bits matter
5290 cmpw(klass, tmp);
5291 return;
5292 }
5293 decode_klass_not_null(tmp);
5294 cmp(klass, tmp);
5295 }
5296
5297 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5298 if (UseCompactObjectHeaders) {
5299 load_narrow_klass_compact(tmp1, obj1);
5300 load_narrow_klass_compact(tmp2, obj2);
5301 } else {
5302 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5303 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5304 }
5305 cmpw(tmp1, tmp2);
5306 }
5307
5308 void MacroAssembler::load_prototype_header(Register dst, Register src) {
5309 load_klass(dst, src);
5310 ldr(dst, Address(dst, Klass::prototype_header_offset()));
5311 }
5312
5313 void MacroAssembler::store_klass(Register dst, Register src) {
5314 // FIXME: Should this be a store release? concurrent gcs assumes
5315 // klass length is valid if klass field is not null.
5316 assert(!UseCompactObjectHeaders, "not with compact headers");
5317 encode_klass_not_null(src);
5318 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5319 }
5320
5321 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5322 assert(!UseCompactObjectHeaders, "not with compact headers");
5323 // Store to klass gap in destination
5324 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5325 }
5326
5327 // Algorithm must match CompressedOops::encode.
5328 void MacroAssembler::encode_heap_oop(Register d, Register s) {
5329 #ifdef ASSERT
5330 verify_heapbase("MacroAssembler::encode_heap_oop: heap base corrupted?");
5331 #endif
5332 verify_oop_msg(s, "broken oop in encode_heap_oop");
5682 if (as_raw) {
5683 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5684 } else {
5685 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5686 }
5687 }
5688
5689 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5690 Address dst, Register val,
5691 Register tmp1, Register tmp2, Register tmp3) {
5692 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5693 decorators = AccessInternal::decorator_fixup(decorators, type);
5694 bool as_raw = (decorators & AS_RAW) != 0;
5695 if (as_raw) {
5696 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5697 } else {
5698 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5699 }
5700 }
5701
5702 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5703 Register inline_layout_info) {
5704 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5705 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5706 }
5707
5708 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5709 ldr(offset, Address(inline_klass, InlineKlass::adr_members_offset()));
5710 ldrw(offset, Address(offset, InlineKlass::payload_offset_offset()));
5711 }
5712
5713 void MacroAssembler::payload_address(Register oop, Register data, Register inline_klass) {
5714 // ((address) (void*) o) + vk->payload_offset();
5715 Register offset = (data == oop) ? rscratch1 : data;
5716 payload_offset(inline_klass, offset);
5717 if (data == oop) {
5718 add(data, data, offset);
5719 } else {
5720 lea(data, Address(oop, offset));
5721 }
5722 }
5723
5724 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5725 Register tmp2, DecoratorSet decorators) {
5726 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5727 }
5728
5729 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5730 Register tmp2, DecoratorSet decorators) {
5731 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5732 }
5733
5734 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5735 Register tmp2, Register tmp3, DecoratorSet decorators) {
5736 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5737 }
5738
5739 // Used for storing nulls.
5740 void MacroAssembler::store_heap_oop_null(Address dst) {
5741 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5742 }
5743
5818 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5819 cmp(rscratch2, rscratch1);
5820 br(Assembler::HS, next);
5821 STOP("assert(top >= start)");
5822 should_not_reach_here();
5823
5824 bind(next);
5825 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5826 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5827 cmp(rscratch2, rscratch1);
5828 br(Assembler::HS, ok);
5829 STOP("assert(top <= end)");
5830 should_not_reach_here();
5831
5832 bind(ok);
5833 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5834 }
5835 #endif
5836 }
5837
5838 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
5839 assert_different_registers(holder_klass, index, layout_info);
5840 InlineLayoutInfo array[2];
5841 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
5842 if (is_power_of_2(size)) {
5843 lsl(index, index, log2i_exact(size)); // Scale index by power of 2
5844 } else {
5845 mov(layout_info, size);
5846 mul(index, index, layout_info); // Scale the index to be the entry index * array_element_size
5847 }
5848 ldr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
5849 add(layout_info, layout_info, Array<InlineLayoutInfo>::base_offset_in_bytes());
5850 lea(layout_info, Address(layout_info, index));
5851 }
5852
5853 // Writes to stack successive pages until offset reached to check for
5854 // stack overflow + shadow pages. This clobbers tmp.
5855 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5856 assert_different_registers(tmp, size, rscratch1);
5857 mov(tmp, sp);
5858 // Bang stack for total size given plus shadow page size.
5859 // Bang one page at a time because large size can bang beyond yellow and
5860 // red zones.
5861 Label loop;
5862 mov(rscratch1, (int)os::vm_page_size());
5863 bind(loop);
5864 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5865 subsw(size, size, rscratch1);
5866 str(size, Address(tmp));
5867 br(Assembler::GT, loop);
5868
5869 // Bang down shadow pages too.
5870 // At this point, (tmp-0) is the last address touched, so don't
5871 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5872 // was post-decremented.) Skip this address by starting at i=1, and
5939
5940 // Strictly speaking the card table base isn't an address at all, and it might
5941 // even be negative. It is thus materialised as a constant.
5942 mov(reg, (uint64_t)ctbs->card_table_base_const());
5943 }
5944
5945 void MacroAssembler::load_aotrc_address(Register reg, address a) {
5946 #if INCLUDE_CDS
5947 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
5948 if (AOTCodeCache::is_on_for_dump()) {
5949 // all aotrc field addresses should be registered in the AOTCodeCache address table
5950 lea(reg, ExternalAddress(a));
5951 } else {
5952 mov(reg, (uint64_t)a);
5953 }
5954 #else
5955 ShouldNotReachHere();
5956 #endif
5957 }
5958
5959 #ifdef ASSERT
5960 void MacroAssembler::build_frame(int framesize) {
5961 build_frame(framesize, false);
5962 }
5963 #endif
5964
5965 void MacroAssembler::build_frame(int framesize DEBUG_ONLY(COMMA bool zap_rfp_lr_spills)) {
5966 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5967 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5968 protect_return_address();
5969 if (framesize < ((1 << 9) + 2 * wordSize)) {
5970 sub(sp, sp, framesize);
5971 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
5972 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
5973 stp(rscratch1, rscratch1, Address(sp, framesize - 2 * wordSize));
5974 } else {
5975 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5976 }
5977 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5978 } else {
5979 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
5980 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
5981 stp(rscratch1, rscratch1, Address(pre(sp, -2 * wordSize)));
5982 } else {
5983 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5984 }
5985 if (PreserveFramePointer) mov(rfp, sp);
5986 if (framesize < ((1 << 12) + 2 * wordSize))
5987 sub(sp, sp, framesize - 2 * wordSize);
5988 else {
5989 mov(rscratch1, framesize - 2 * wordSize);
5990 sub(sp, sp, rscratch1);
5991 }
5992 }
5993 verify_cross_modify_fence_not_required();
5994 }
5995
5996 void MacroAssembler::remove_frame(int framesize) {
5997 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5998 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5999 if (framesize < ((1 << 9) + 2 * wordSize)) {
6000 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
6001 add(sp, sp, framesize);
6002 } else {
6003 if (framesize < ((1 << 12) + 2 * wordSize))
6004 add(sp, sp, framesize - 2 * wordSize);
6005 else {
6006 mov(rscratch1, framesize - 2 * wordSize);
6007 add(sp, sp, rscratch1);
6008 }
6009 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6010 }
6011 authenticate_return_address();
6012 }
6013
6014 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6015 if (needs_stack_repair) {
6016 // The method has a scalarized entry point (where fields of value object arguments
6017 // are passed through registers and stack), and a non-scalarized entry point (where
6018 // value object arguments are given as oops). The non-scalarized entry point will
6019 // first load each field of value object arguments and store them in registers and on
6020 // the stack in a way compatible with the scalarized entry point. To do so, some extra
6021 // stack space might be reserved (if argument registers are not enough). On leaving the
6022 // method, this space must be freed.
6023 //
6024 // In case we used the non-scalarized entry point the stack looks like this:
6025 //
6026 // | Arguments from caller |
6027 // |---------------------------| <-- caller's SP
6028 // | Saved LR #1 |
6029 // | Saved FP #1 |
6030 // |---------------------------|
6031 // | Extension space for |
6032 // | inline arg (un)packing |
6033 // |---------------------------| <-- start of this method's frame
6034 // | Saved LR #2 |
6035 // | Saved FP #2 |
6036 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6037 // | sp_inc |
6038 // | method locals |
6039 // |---------------------------| <-- SP
6040 //
6041 // There are two copies of FP and LR on the stack. They will be identical at
6042 // first, but that can change.
6043 // If the caller has been deoptimized, LR #1 will be patched to point at the
6044 // deopt blob, and LR #2 will still point into the old method.
6045 // If the saved FP (x29) was not used as the frame pointer, but to store an
6046 // oop, the GC will be aware only of FP #1 as the spilled location of x29 and
6047 // will fix only this one. Overall, FP/LR #2 are not reliable and are simply
6048 // needed to add space between the extension space and the locals, as there
6049 // would be between the real arguments and the locals if we don't need to
6050 // do unpacking (from the scalarized entry point).
6051 //
6052 // When restoring, one must then load FP #1 into x29, and LR #1 into x30,
6053 // while keeping in mind that from the scalarized entry point, there will be
6054 // only one copy of each. Indeed, in the case we used the scalarized calling
6055 // convention, the stack looks like this:
6056 //
6057 // | Arguments from caller |
6058 // |---------------------------| <-- caller's SP / start of this method's frame
6059 // | Saved LR |
6060 // | Saved FP |
6061 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6062 // | sp_inc |
6063 // | method locals |
6064 // |---------------------------| <-- SP
6065 //
6066 // The sp_inc stack slot holds the total size of the frame including the
6067 // extension space minus two words for the saved FP and LR. That is how to
6068 // find FP/LR #1. This size is expressed in bytes. Be careful when using it
6069 // from C++ in pointer arithmetic; you might need to divide it by wordSize.
6070 //
6071 // One can find sp_inc since the start the method's frame is SP + initial_framesize.
6072
6073 int sp_inc_offset = initial_framesize - 3 * wordSize; // Immediately below saved LR and FP
6074
6075 ldr(rscratch1, Address(sp, sp_inc_offset));
6076 add(sp, sp, rscratch1);
6077 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6078 } else {
6079 remove_frame(initial_framesize);
6080 }
6081 }
6082
6083 void MacroAssembler::save_stack_increment(int sp_inc, int frame_size) {
6084 int real_frame_size = frame_size + sp_inc;
6085 assert(sp_inc == 0 || sp_inc > 2*wordSize, "invalid sp_inc value");
6086 assert(real_frame_size >= 2*wordSize, "frame size must include FP/LR space");
6087 assert((real_frame_size & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6088
6089 int sp_inc_offset = frame_size - 3 * wordSize; // Immediately below saved LR and FP
6090
6091 // Subtract two words for the saved FP and LR as these will be popped
6092 // separately. See remove_frame above.
6093 mov(rscratch1, real_frame_size - 2*wordSize);
6094 str(rscratch1, Address(sp, sp_inc_offset));
6095 }
6096
6097 // This method counts leading positive bytes (highest bit not set) in provided byte array
6098 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
6099 // Simple and most common case of aligned small array which is not at the
6100 // end of memory page is placed here. All other cases are in stub.
6101 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
6102 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
6103 assert_different_registers(ary1, len, result);
6104
6105 mov(result, len);
6106 cmpw(len, 0);
6107 br(LE, DONE);
6108 cmpw(len, 4 * wordSize);
6109 br(GE, STUB_LONG); // size > 32 then go to stub
6110
6111 int shift = 64 - exact_log2(os::vm_page_size());
6112 lsl(rscratch1, ary1, shift);
6113 mov(rscratch2, (size_t)(4 * wordSize) << shift);
6114 adds(rscratch2, rscratch1, rscratch2); // At end of page?
6115 br(CS, STUB); // at the end of page then go to stub
6999 // On other systems, the helper is a usual C function.
7000 //
7001 void MacroAssembler::get_thread(Register dst) {
7002 RegSet saved_regs =
7003 BSD_ONLY(RegSet::range(r0, r17) + lr - dst)
7004 NOT_BSD (RegSet::range(r0, r1) + lr - dst);
7005
7006 protect_return_address();
7007 push(saved_regs, sp);
7008
7009 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
7010 blr(lr);
7011 if (dst != c_rarg0) {
7012 mov(dst, c_rarg0);
7013 }
7014
7015 pop(saved_regs, sp);
7016 authenticate_return_address();
7017 }
7018
7019 #ifdef COMPILER2
7020 // C2 compiled method's prolog code
7021 // Moved here from aarch64.ad to support Valhalla code below
7022 void MacroAssembler::verified_entry(Compile* C, int sp_inc) {
7023 if (C->clinit_barrier_on_entry()) {
7024 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
7025
7026 Label L_skip_barrier;
7027
7028 mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
7029 clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
7030 far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
7031 bind(L_skip_barrier);
7032 }
7033
7034 if (C->max_vector_size() > 0) {
7035 reinitialize_ptrue();
7036 }
7037
7038 int bangsize = C->output()->bang_size_in_bytes();
7039 if (C->output()->need_stack_bang(bangsize))
7040 generate_stack_overflow_check(bangsize);
7041
7042 // n.b. frame size includes space for return pc and rfp
7043 const long framesize = C->output()->frame_size_in_bytes();
7044 build_frame(framesize DEBUG_ONLY(COMMA sp_inc != 0));
7045
7046 if (C->needs_stack_repair()) {
7047 save_stack_increment(sp_inc, framesize);
7048 }
7049
7050 if (VerifyStackAtCalls) {
7051 Unimplemented();
7052 }
7053 }
7054 #endif // COMPILER2
7055
7056 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
7057 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
7058 // An inline type might be returned. If fields are in registers we
7059 // need to allocate an inline type instance and initialize it with
7060 // the value of the fields.
7061 Label skip;
7062 // We only need a new buffered inline type if a new one is not returned
7063 tbz(r0, 0, skip);
7064 int call_offset = -1;
7065
7066 // Be careful not to clobber r1-7 which hold returned fields
7067 // Also do not use callee-saved registers as these may be live in the interpreter
7068 Register tmp1 = r13, tmp2 = r14, klass = r15, r0_preserved = r12;
7069
7070 // The following code is similar to the instance allocation code in TemplateTable::_new
7071 // but has some slight differences,
7072 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
7073 // allocating is not necessary if vk != nullptr, etc.
7074 Label slow_case;
7075 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
7076 mov(r0_preserved, r0); // save r0 for slow_case since *_allocate may corrupt it when allocation failed
7077
7078 if (vk != nullptr) {
7079 // Called from C1, where the return type is statically known.
7080 movptr(klass, (intptr_t)vk->get_InlineKlass());
7081 jint lh = vk->layout_helper();
7082 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
7083 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
7084 tlab_allocate(r0, noreg, lh, tmp1, tmp2, slow_case);
7085 } else {
7086 b(slow_case);
7087 }
7088 } else {
7089 // Call from interpreter. R0 contains ((the InlineKlass* of the return type) | 0x01)
7090 andr(klass, r0, -2);
7091 if (UseTLAB) {
7092 ldrw(tmp2, Address(klass, Klass::layout_helper_offset()));
7093 tst(tmp2, Klass::_lh_instance_slow_path_bit);
7094 br(Assembler::NE, slow_case);
7095 tlab_allocate(r0, tmp2, 0, tmp1, tmp2, slow_case);
7096 } else {
7097 b(slow_case);
7098 }
7099 }
7100 if (UseTLAB) {
7101 // 2. Initialize buffered inline instance header
7102 Register buffer_obj = r0;
7103 if (UseCompactObjectHeaders) {
7104 ldr(rscratch1, Address(klass, Klass::prototype_header_offset()));
7105 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7106 } else {
7107 mov(rscratch1, (intptr_t)markWord::inline_type_prototype().value());
7108 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7109 store_klass_gap(buffer_obj, zr);
7110 if (vk == nullptr) {
7111 // store_klass corrupts klass, so save it for later use (interpreter case only).
7112 mov(tmp1, klass);
7113 }
7114 store_klass(buffer_obj, klass);
7115 klass = tmp1;
7116 }
7117 // 3. Initialize its fields with an inline class specific handler
7118 if (vk != nullptr) {
7119 far_call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
7120 } else {
7121 ldr(tmp1, Address(klass, InlineKlass::adr_members_offset()));
7122 ldr(tmp1, Address(tmp1, InlineKlass::pack_handler_offset()));
7123 blr(tmp1);
7124 }
7125
7126 membar(Assembler::StoreStore);
7127 b(skip);
7128 } else {
7129 // Must have already branched to slow_case above.
7130 DEBUG_ONLY(should_not_reach_here());
7131 }
7132 bind(slow_case);
7133 // We failed to allocate a new inline type, fall back to a runtime
7134 // call. Some oop field may be live in some registers but we can't
7135 // tell. That runtime call will take care of preserving them
7136 // across a GC if there's one.
7137 mov(r0, r0_preserved);
7138
7139 if (from_interpreter) {
7140 super_call_VM_leaf(SharedRuntime::store_inline_type_fields_to_buf_entry());
7141 } else {
7142 far_call(RuntimeAddress(SharedRuntime::store_inline_type_fields_to_buf_entry()));
7143 call_offset = offset();
7144 }
7145 membar(Assembler::StoreStore);
7146
7147 bind(skip);
7148 return call_offset;
7149 }
7150
7151 // Move a value between registers/stack slots and update the reg_state
7152 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
7153 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
7154 if (reg_state[to->value()] == reg_written) {
7155 return true; // Already written
7156 }
7157
7158 if (from != to && bt != T_VOID) {
7159 if (reg_state[to->value()] == reg_readonly) {
7160 return false; // Not yet writable
7161 }
7162 if (from->is_reg()) {
7163 if (to->is_reg()) {
7164 if (from->is_Register() && to->is_Register()) {
7165 mov(to->as_Register(), from->as_Register());
7166 } else if (from->is_FloatRegister() && to->is_FloatRegister()) {
7167 fmovd(to->as_FloatRegister(), from->as_FloatRegister());
7168 } else {
7169 ShouldNotReachHere();
7170 }
7171 } else {
7172 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7173 Address to_addr = Address(sp, st_off);
7174 if (from->is_FloatRegister()) {
7175 if (bt == T_DOUBLE) {
7176 strd(from->as_FloatRegister(), to_addr);
7177 } else {
7178 assert(bt == T_FLOAT, "must be float");
7179 strs(from->as_FloatRegister(), to_addr);
7180 }
7181 } else {
7182 str(from->as_Register(), to_addr);
7183 }
7184 }
7185 } else {
7186 Address from_addr = Address(sp, from->reg2stack() * VMRegImpl::stack_slot_size);
7187 if (to->is_reg()) {
7188 if (to->is_FloatRegister()) {
7189 if (bt == T_DOUBLE) {
7190 ldrd(to->as_FloatRegister(), from_addr);
7191 } else {
7192 assert(bt == T_FLOAT, "must be float");
7193 ldrs(to->as_FloatRegister(), from_addr);
7194 }
7195 } else {
7196 ldr(to->as_Register(), from_addr);
7197 }
7198 } else {
7199 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7200 ldr(rscratch1, from_addr);
7201 str(rscratch1, Address(sp, st_off));
7202 }
7203 }
7204 }
7205
7206 // Update register states
7207 reg_state[from->value()] = reg_writable;
7208 reg_state[to->value()] = reg_written;
7209 return true;
7210 }
7211
7212 // Calculate the extra stack space required for packing or unpacking inline
7213 // args and adjust the stack pointer
7214 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
7215 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
7216 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
7217 assert(sp_inc > 0, "sanity");
7218
7219 // Save a copy of the FP and LR here for deoptimization patching and frame walking
7220 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
7221
7222 // Adjust the stack pointer. This will be repaired on return by MacroAssembler::remove_frame
7223 if (sp_inc < (1 << 9)) {
7224 sub(sp, sp, sp_inc); // Fits in an immediate
7225 } else {
7226 mov(rscratch1, sp_inc);
7227 sub(sp, sp, rscratch1);
7228 }
7229
7230 return sp_inc + 2 * wordSize; // Account for the FP/LR space
7231 }
7232
7233 // Read all fields from an inline type oop and store the values in registers/stack slots
7234 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
7235 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
7236 RegState reg_state[]) {
7237 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
7238 assert(from->is_valid(), "source must be valid");
7239 bool progress = false;
7240 #ifdef ASSERT
7241 const int start_offset = offset();
7242 #endif
7243
7244 Label L_null, L_notNull;
7245 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
7246 Register tmp1 = r10;
7247 Register tmp2 = r11;
7248
7249 #ifdef ASSERT
7250 RegSet clobbered_gp_regs = MacroAssembler::call_clobbered_gp_registers();
7251 assert(clobbered_gp_regs.contains(tmp1), "tmp1 must be saved explicitly if it's not a clobber");
7252 assert(clobbered_gp_regs.contains(tmp2), "tmp2 must be saved explicitly if it's not a clobber");
7253 assert(clobbered_gp_regs.contains(r14), "r14 must be saved explicitly if it's not a clobber");
7254 #endif
7255
7256 Register fromReg = noreg;
7257 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
7258 bool done = true;
7259 bool mark_done = true;
7260 VMReg toReg;
7261 BasicType bt;
7262 // Check if argument requires a null check
7263 bool null_check = false;
7264 VMReg nullCheckReg;
7265 while (stream.next(nullCheckReg, bt)) {
7266 if (sig->at(stream.sig_index())._offset == -1) {
7267 null_check = true;
7268 break;
7269 }
7270 }
7271 stream.reset(sig_index, to_index);
7272 while (stream.next(toReg, bt)) {
7273 assert(toReg->is_valid(), "destination must be valid");
7274 int idx = (int)toReg->value();
7275 if (reg_state[idx] == reg_readonly) {
7276 if (idx != from->value()) {
7277 mark_done = false;
7278 }
7279 done = false;
7280 continue;
7281 } else if (reg_state[idx] == reg_written) {
7282 continue;
7283 }
7284 assert(reg_state[idx] == reg_writable, "must be writable");
7285 reg_state[idx] = reg_written;
7286 progress = true;
7287
7288 if (fromReg == noreg) {
7289 if (from->is_reg()) {
7290 fromReg = from->as_Register();
7291 } else {
7292 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size;
7293 ldr(tmp1, Address(sp, st_off));
7294 fromReg = tmp1;
7295 }
7296 if (null_check) {
7297 // Nullable inline type argument, emit null check
7298 cbz(fromReg, L_null);
7299 }
7300 }
7301 int off = sig->at(stream.sig_index())._offset;
7302 if (off == -1) {
7303 assert(null_check, "Missing null check at");
7304 if (toReg->is_stack()) {
7305 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7306 mov(tmp2, 1);
7307 str(tmp2, Address(sp, st_off));
7308 } else {
7309 mov(toReg->as_Register(), 1);
7310 }
7311 continue;
7312 }
7313 if (sig->at(stream.sig_index())._vt_oop) {
7314 if (toReg->is_stack()) {
7315 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7316 str(fromReg, Address(sp, st_off));
7317 } else {
7318 mov(toReg->as_Register(), fromReg);
7319 }
7320 continue;
7321 }
7322 assert(off > 0, "offset in object should be positive");
7323 Address fromAddr = Address(fromReg, off);
7324 if (!toReg->is_FloatRegister()) {
7325 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
7326 if (is_reference_type(bt)) {
7327 load_heap_oop(dst, fromAddr, rscratch1, rscratch2);
7328 } else {
7329 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
7330 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
7331 }
7332 if (toReg->is_stack()) {
7333 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7334 str(dst, Address(sp, st_off));
7335 }
7336 } else if (bt == T_DOUBLE) {
7337 ldrd(toReg->as_FloatRegister(), fromAddr);
7338 } else {
7339 assert(bt == T_FLOAT, "must be float");
7340 ldrs(toReg->as_FloatRegister(), fromAddr);
7341 }
7342 }
7343 if (progress && null_check) {
7344 if (done) {
7345 b(L_notNull);
7346 bind(L_null);
7347 // Set null marker to zero to signal that the argument is null.
7348 // Also set all fields to zero since the runtime requires a canonical
7349 // representation of a flat null.
7350 stream.reset(sig_index, to_index);
7351 while (stream.next(toReg, bt)) {
7352 if (toReg->is_stack()) {
7353 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7354 str(zr, Address(sp, st_off));
7355 } else if (toReg->is_FloatRegister()) {
7356 mov(toReg->as_FloatRegister(), T2S, 0);
7357 } else {
7358 mov(toReg->as_Register(), zr);
7359 }
7360 }
7361 bind(L_notNull);
7362 } else {
7363 bind(L_null);
7364 }
7365 }
7366
7367 sig_index = stream.sig_index();
7368 to_index = stream.regs_index();
7369
7370 if (mark_done && reg_state[from->value()] != reg_written) {
7371 // This is okay because no one else will write to that slot
7372 reg_state[from->value()] = reg_writable;
7373 }
7374 from_index--;
7375 assert(progress || (start_offset == offset()), "should not emit code");
7376 return done;
7377 }
7378
7379 // Pack fields back into an inline type oop
7380 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
7381 VMRegPair* from, int from_count, int& from_index, VMReg to,
7382 RegState reg_state[], Register val_array) {
7383 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
7384 assert(to->is_valid(), "destination must be valid");
7385
7386 if (reg_state[to->value()] == reg_written) {
7387 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7388 return true; // Already written
7389 }
7390
7391 // The GC barrier expanded by store_heap_oop below may call into the
7392 // runtime so use callee-saved registers for any values that need to be
7393 // preserved. The GC barrier assembler should take care of saving the
7394 // Java argument registers.
7395 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
7396 Register val_obj_tmp = r21;
7397 Register from_reg_tmp = r22;
7398 Register tmp1 = r14;
7399 Register tmp2 = r13;
7400 Register tmp3 = r12;
7401 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
7402
7403 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
7404
7405 if (reg_state[to->value()] == reg_readonly) {
7406 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
7407 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7408 return false; // Not yet writable
7409 }
7410 val_obj = val_obj_tmp;
7411 }
7412
7413 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
7414 VMReg fromReg;
7415 BasicType bt;
7416 Label L_null;
7417 while (stream.next(fromReg, bt)) {
7418 assert(fromReg->is_valid(), "source must be valid");
7419 reg_state[fromReg->value()] = reg_writable;
7420
7421 int off = sig->at(stream.sig_index())._offset;
7422 if (off == -1) {
7423 // Nullable inline type argument, emit null check
7424 Label L_notNull;
7425 if (fromReg->is_stack()) {
7426 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7427 ldrb(tmp2, Address(sp, ld_off));
7428 cbnz(tmp2, L_notNull);
7429 } else {
7430 cbnz(fromReg->as_Register(), L_notNull);
7431 }
7432 mov(val_obj, 0);
7433 b(L_null);
7434 bind(L_notNull);
7435 continue;
7436 }
7437 if (sig->at(stream.sig_index())._vt_oop) {
7438 if (fromReg->is_stack()) {
7439 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7440 ldr(val_obj, Address(sp, ld_off));
7441 } else {
7442 mov(val_obj, fromReg->as_Register());
7443 }
7444 cbnz(val_obj, L_null);
7445 // get the buffer from the just allocated pool of buffers
7446 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
7447 load_heap_oop(val_obj, Address(val_array, index), rscratch1, rscratch2);
7448 continue;
7449 }
7450
7451 assert(off > 0, "offset in object should be positive");
7452 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
7453
7454 // Pack the scalarized field into the value object.
7455 Address dst(val_obj, off);
7456 if (!fromReg->is_FloatRegister()) {
7457 Register src;
7458 if (fromReg->is_stack()) {
7459 src = from_reg_tmp;
7460 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7461 load_sized_value(src, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
7462 } else {
7463 src = fromReg->as_Register();
7464 }
7465 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
7466 if (is_reference_type(bt)) {
7467 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep val_obj valid.
7468 mov(tmp3, val_obj);
7469 Address dst_with_tmp3(tmp3, off);
7470 store_heap_oop(dst_with_tmp3, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
7471 } else {
7472 store_sized_value(dst, src, size_in_bytes);
7473 }
7474 } else if (bt == T_DOUBLE) {
7475 strd(fromReg->as_FloatRegister(), dst);
7476 } else {
7477 assert(bt == T_FLOAT, "must be float");
7478 strs(fromReg->as_FloatRegister(), dst);
7479 }
7480 }
7481 bind(L_null);
7482 sig_index = stream.sig_index();
7483 from_index = stream.regs_index();
7484
7485 assert(reg_state[to->value()] == reg_writable, "must have already been read");
7486 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
7487 assert(success, "to register must be writable");
7488 return true;
7489 }
7490
7491 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
7492 return (reg->is_FloatRegister()) ? v8->as_VMReg() : r14->as_VMReg();
7493 }
7494
7495 void MacroAssembler::cache_wb(Address line) {
7496 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
7497 assert(line.index() == noreg, "index should be noreg");
7498 assert(line.offset() == 0, "offset should be 0");
7499 // would like to assert this
7500 // assert(line._ext.shift == 0, "shift should be zero");
7501 if (VM_Version::supports_dcpop()) {
7502 // writeback using clear virtual address to point of persistence
7503 dc(Assembler::CVAP, line.base());
7504 } else {
7505 // no need to generate anything as Unsafe.writebackMemory should
7506 // never invoke this stub
7507 }
7508 }
7509
7510 void MacroAssembler::cache_wbsync(bool is_pre) {
7511 // we only need a barrier post sync
7512 if (!is_pre) {
7513 membar(Assembler::AnyAny);
7514 }
7910 }
7911
7912 // Check if the lock-stack is full.
7913 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7914 cmpw(top, (unsigned)LockStack::end_offset());
7915 br(Assembler::GE, slow);
7916
7917 // Check for recursion.
7918 subw(t, top, oopSize);
7919 ldr(t, Address(rthread, t));
7920 cmp(obj, t);
7921 br(Assembler::EQ, push);
7922
7923 // Check header for monitor (0b10).
7924 tst(mark, markWord::monitor_value);
7925 br(Assembler::NE, slow);
7926
7927 // Try to lock. Transition lock bits 0b01 => 0b00
7928 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7929 orr(mark, mark, markWord::unlocked_value);
7930 // Mask inline_type bit such that we go to the slow path if object is an inline type
7931 andr(mark, mark, ~((int) markWord::inline_type_bit_in_place));
7932
7933 eor(t, mark, markWord::unlocked_value);
7934 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword, memory_order_acquire);
7935 br(Assembler::NE, slow);
7936
7937 bind(push);
7938 // After successful lock, push object on lock-stack.
7939 str(obj, Address(rthread, top));
7940 addw(top, top, oopSize);
7941 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7942 }
7943
7944 // Implements fast-unlocking.
7945 //
7946 // - obj: the object to be unlocked
7947 // - t1, t2, t3: temporary registers
7948 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7949 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7950 // cmpxchg clobbers rscratch1.
7951 assert_different_registers(obj, t1, t2, t3, rscratch1);
7952
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