9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "code/compiledIC.hpp"
30 #include "compiler/compileTask.hpp"
31 #include "compiler/disassembler.hpp"
32 #include "compiler/oopMap.hpp"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/cardTable.hpp"
37 #include "gc/shared/collectedHeap.hpp"
38 #include "gc/shared/tlab_globals.hpp"
39 #include "interpreter/bytecodeHistogram.hpp"
40 #include "interpreter/interpreter.hpp"
41 #include "interpreter/interpreterRuntime.hpp"
42 #include "jvm.h"
43 #include "memory/resourceArea.hpp"
44 #include "memory/universe.hpp"
45 #include "nativeInst_aarch64.hpp"
46 #include "oops/accessDecorators.hpp"
47 #include "oops/compressedKlass.inline.hpp"
48 #include "oops/compressedOops.inline.hpp"
49 #include "oops/klass.inline.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/icache.hpp"
52 #include "runtime/interfaceSupport.inline.hpp"
53 #include "runtime/javaThread.hpp"
54 #include "runtime/jniHandles.inline.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/globalDefinitions.hpp"
58 #include "utilities/powerOfTwo.hpp"
59 #ifdef COMPILER1
60 #include "c1/c1_LIRAssembler.hpp"
61 #endif
62 #ifdef COMPILER2
63 #include "oops/oop.hpp"
64 #include "opto/compile.hpp"
65 #include "opto/node.hpp"
66 #include "opto/output.hpp"
67 #endif
68
69 #include <sys/types.h>
70
71 #ifdef PRODUCT
72 #define BLOCK_COMMENT(str) /* nothing */
73 #else
74 #define BLOCK_COMMENT(str) block_comment(str)
75 #endif
76 #define STOP(str) stop(str);
77 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
78
2049 ldarb(scratch, scratch);
2050 cmp(scratch, InstanceKlass::fully_initialized);
2051 br(Assembler::EQ, *L_fast_path);
2052
2053 // Fast path check: current thread is initializer thread
2054 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2055 cmp(rthread, scratch);
2056
2057 if (L_slow_path == &L_fallthrough) {
2058 br(Assembler::EQ, *L_fast_path);
2059 bind(*L_slow_path);
2060 } else if (L_fast_path == &L_fallthrough) {
2061 br(Assembler::NE, *L_slow_path);
2062 bind(*L_fast_path);
2063 } else {
2064 Unimplemented();
2065 }
2066 }
2067
2068 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2069 if (!VerifyOops) return;
2070
2071 // Pass register number to verify_oop_subroutine
2072 const char* b = nullptr;
2073 {
2074 ResourceMark rm;
2075 stringStream ss;
2076 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2077 b = code_string(ss.as_string());
2078 }
2079 BLOCK_COMMENT("verify_oop {");
2080
2081 strip_return_address(); // This might happen within a stack frame.
2082 protect_return_address();
2083 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2084 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2085
2086 mov(r0, reg);
2087 movptr(rscratch1, (uintptr_t)(address)b);
2088
2089 // call indirectly to solve generation ordering problem
2090 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2091 ldr(rscratch2, Address(rscratch2));
2092 blr(rscratch2);
2093
2094 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2095 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2096 authenticate_return_address();
2097
2098 BLOCK_COMMENT("} verify_oop");
2099 }
2100
2101 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2102 if (!VerifyOops) return;
2103
2104 const char* b = nullptr;
2105 {
2106 ResourceMark rm;
2107 stringStream ss;
2108 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2109 b = code_string(ss.as_string());
2110 }
2111 BLOCK_COMMENT("verify_oop_addr {");
2112
2113 strip_return_address(); // This might happen within a stack frame.
2114 protect_return_address();
2115 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2116 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2117
2118 // addr may contain sp so we will have to adjust it based on the
2119 // pushes that we just did.
2120 if (addr.uses(sp)) {
2121 lea(r0, addr);
2122 ldr(r0, Address(r0, 4 * wordSize));
2180 call_VM_leaf_base(entry_point, 1);
2181 }
2182
2183 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2184 assert_different_registers(arg_1, c_rarg0);
2185 pass_arg0(this, arg_0);
2186 pass_arg1(this, arg_1);
2187 call_VM_leaf_base(entry_point, 2);
2188 }
2189
2190 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2191 Register arg_1, Register arg_2) {
2192 assert_different_registers(arg_1, c_rarg0);
2193 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2194 pass_arg0(this, arg_0);
2195 pass_arg1(this, arg_1);
2196 pass_arg2(this, arg_2);
2197 call_VM_leaf_base(entry_point, 3);
2198 }
2199
2200 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2201 pass_arg0(this, arg_0);
2202 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2203 }
2204
2205 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2206
2207 assert_different_registers(arg_0, c_rarg1);
2208 pass_arg1(this, arg_1);
2209 pass_arg0(this, arg_0);
2210 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2211 }
2212
2213 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2214 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2215 assert_different_registers(arg_1, c_rarg2);
2216 pass_arg2(this, arg_2);
2217 pass_arg1(this, arg_1);
2218 pass_arg0(this, arg_0);
2219 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2225 assert_different_registers(arg_2, c_rarg3);
2226 pass_arg3(this, arg_3);
2227 pass_arg2(this, arg_2);
2228 pass_arg1(this, arg_1);
2229 pass_arg0(this, arg_0);
2230 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2231 }
2232
2233 void MacroAssembler::null_check(Register reg, int offset) {
2234 if (needs_explicit_null_check(offset)) {
2235 // provoke OS null exception if reg is null by
2236 // accessing M[reg] w/o changing any registers
2237 // NOTE: this is plenty to provoke a segv
2238 ldr(zr, Address(reg));
2239 } else {
2240 // nothing to do, (later) access of M[reg + offset]
2241 // will provoke OS null exception if reg is null
2242 }
2243 }
2244
2245 // MacroAssembler protected routines needed to implement
2246 // public methods
2247
2248 void MacroAssembler::mov(Register r, Address dest) {
2249 code_section()->relocate(pc(), dest.rspec());
2250 uint64_t imm64 = (uint64_t)dest.target();
2251 movptr(r, imm64);
2252 }
2253
2254 // Move a constant pointer into r. In AArch64 mode the virtual
2255 // address space is 48 bits in size, so we only need three
2256 // instructions to create a patchable instruction sequence that can
2257 // reach anywhere.
2258 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2259 #ifndef PRODUCT
2260 {
2261 char buffer[64];
2262 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2263 block_comment(buffer);
2264 }
5016 adrp(rscratch1, src2, offset);
5017 ldr(rscratch1, Address(rscratch1, offset));
5018 cmp(src1, rscratch1);
5019 }
5020
5021 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5022 cmp(obj1, obj2);
5023 }
5024
5025 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5026 load_method_holder(rresult, rmethod);
5027 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5028 }
5029
5030 void MacroAssembler::load_method_holder(Register holder, Register method) {
5031 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5032 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5033 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5034 }
5035
5036 // Loads the obj's Klass* into dst.
5037 // Preserves all registers (incl src, rscratch1 and rscratch2).
5038 // Input:
5039 // src - the oop we want to load the klass from.
5040 // dst - output narrow klass.
5041 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5042 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5043 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5044 lsr(dst, dst, markWord::klass_shift);
5045 }
5046
5047 void MacroAssembler::load_klass(Register dst, Register src) {
5048 if (UseCompactObjectHeaders) {
5049 load_narrow_klass_compact(dst, src);
5050 decode_klass_not_null(dst);
5051 } else if (UseCompressedClassPointers) {
5052 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5053 decode_klass_not_null(dst);
5054 } else {
5055 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5126 }
5127 cmp(klass, tmp);
5128 }
5129
5130 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5131 if (UseCompactObjectHeaders) {
5132 load_narrow_klass_compact(tmp1, obj1);
5133 load_narrow_klass_compact(tmp2, obj2);
5134 cmpw(tmp1, tmp2);
5135 } else if (UseCompressedClassPointers) {
5136 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5137 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5138 cmpw(tmp1, tmp2);
5139 } else {
5140 ldr(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5141 ldr(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5142 cmp(tmp1, tmp2);
5143 }
5144 }
5145
5146 void MacroAssembler::store_klass(Register dst, Register src) {
5147 // FIXME: Should this be a store release? concurrent gcs assumes
5148 // klass length is valid if klass field is not null.
5149 assert(!UseCompactObjectHeaders, "not with compact headers");
5150 if (UseCompressedClassPointers) {
5151 encode_klass_not_null(src);
5152 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5153 } else {
5154 str(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5155 }
5156 }
5157
5158 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5159 assert(!UseCompactObjectHeaders, "not with compact headers");
5160 if (UseCompressedClassPointers) {
5161 // Store to klass gap in destination
5162 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5163 }
5164 }
5165
5527 if (as_raw) {
5528 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5529 } else {
5530 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5531 }
5532 }
5533
5534 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5535 Address dst, Register val,
5536 Register tmp1, Register tmp2, Register tmp3) {
5537 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5538 decorators = AccessInternal::decorator_fixup(decorators, type);
5539 bool as_raw = (decorators & AS_RAW) != 0;
5540 if (as_raw) {
5541 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5542 } else {
5543 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5544 }
5545 }
5546
5547 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5548 Register tmp2, DecoratorSet decorators) {
5549 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5550 }
5551
5552 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5553 Register tmp2, DecoratorSet decorators) {
5554 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5555 }
5556
5557 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5558 Register tmp2, Register tmp3, DecoratorSet decorators) {
5559 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5560 }
5561
5562 // Used for storing nulls.
5563 void MacroAssembler::store_heap_oop_null(Address dst) {
5564 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5565 }
5566
5602 oop_index = oop_recorder()->allocate_metadata_index(obj);
5603 } else {
5604 oop_index = oop_recorder()->find_index(obj);
5605 }
5606 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5607 mov(dst, Address((address)obj, rspec));
5608 }
5609
5610 Address MacroAssembler::constant_oop_address(jobject obj) {
5611 #ifdef ASSERT
5612 {
5613 ThreadInVMfromUnknown tiv;
5614 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5615 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5616 }
5617 #endif
5618 int oop_index = oop_recorder()->find_index(obj);
5619 return Address((address)obj, oop_Relocation::spec(oop_index));
5620 }
5621
5622 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5623 void MacroAssembler::tlab_allocate(Register obj,
5624 Register var_size_in_bytes,
5625 int con_size_in_bytes,
5626 Register t1,
5627 Register t2,
5628 Label& slow_case) {
5629 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5630 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5631 }
5632
5633 void MacroAssembler::inc_held_monitor_count(Register tmp) {
5634 Address dst(rthread, JavaThread::held_monitor_count_offset());
5635 #ifdef ASSERT
5636 ldr(tmp, dst);
5637 increment(tmp);
5638 str(tmp, dst);
5639 Label ok;
5640 tbz(tmp, 63, ok);
5641 STOP("assert(held monitor count underflow)");
5673 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5674 cmp(rscratch2, rscratch1);
5675 br(Assembler::HS, next);
5676 STOP("assert(top >= start)");
5677 should_not_reach_here();
5678
5679 bind(next);
5680 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5681 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5682 cmp(rscratch2, rscratch1);
5683 br(Assembler::HS, ok);
5684 STOP("assert(top <= end)");
5685 should_not_reach_here();
5686
5687 bind(ok);
5688 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5689 }
5690 #endif
5691 }
5692
5693 // Writes to stack successive pages until offset reached to check for
5694 // stack overflow + shadow pages. This clobbers tmp.
5695 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5696 assert_different_registers(tmp, size, rscratch1);
5697 mov(tmp, sp);
5698 // Bang stack for total size given plus shadow page size.
5699 // Bang one page at a time because large size can bang beyond yellow and
5700 // red zones.
5701 Label loop;
5702 mov(rscratch1, (int)os::vm_page_size());
5703 bind(loop);
5704 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5705 subsw(size, size, rscratch1);
5706 str(size, Address(tmp));
5707 br(Assembler::GT, loop);
5708
5709 // Bang down shadow pages too.
5710 // At this point, (tmp-0) is the last address touched, so don't
5711 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5712 // was post-decremented.) Skip this address by starting at i=1, and
5798 }
5799
5800 void MacroAssembler::remove_frame(int framesize) {
5801 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5802 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5803 if (framesize < ((1 << 9) + 2 * wordSize)) {
5804 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5805 add(sp, sp, framesize);
5806 } else {
5807 if (framesize < ((1 << 12) + 2 * wordSize))
5808 add(sp, sp, framesize - 2 * wordSize);
5809 else {
5810 mov(rscratch1, framesize - 2 * wordSize);
5811 add(sp, sp, rscratch1);
5812 }
5813 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5814 }
5815 authenticate_return_address();
5816 }
5817
5818
5819 // This method counts leading positive bytes (highest bit not set) in provided byte array
5820 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
5821 // Simple and most common case of aligned small array which is not at the
5822 // end of memory page is placed here. All other cases are in stub.
5823 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
5824 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
5825 assert_different_registers(ary1, len, result);
5826
5827 mov(result, len);
5828 cmpw(len, 0);
5829 br(LE, DONE);
5830 cmpw(len, 4 * wordSize);
5831 br(GE, STUB_LONG); // size > 32 then go to stub
5832
5833 int shift = 64 - exact_log2(os::vm_page_size());
5834 lsl(rscratch1, ary1, shift);
5835 mov(rscratch2, (size_t)(4 * wordSize) << shift);
5836 adds(rscratch2, rscratch1, rscratch2); // At end of page?
5837 br(CS, STUB); // at the end of page then go to stub
6715 // On other systems, the helper is a usual C function.
6716 //
6717 void MacroAssembler::get_thread(Register dst) {
6718 RegSet saved_regs =
6719 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
6720 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
6721
6722 protect_return_address();
6723 push(saved_regs, sp);
6724
6725 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6726 blr(lr);
6727 if (dst != c_rarg0) {
6728 mov(dst, c_rarg0);
6729 }
6730
6731 pop(saved_regs, sp);
6732 authenticate_return_address();
6733 }
6734
6735 void MacroAssembler::cache_wb(Address line) {
6736 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
6737 assert(line.index() == noreg, "index should be noreg");
6738 assert(line.offset() == 0, "offset should be 0");
6739 // would like to assert this
6740 // assert(line._ext.shift == 0, "shift should be zero");
6741 if (VM_Version::supports_dcpop()) {
6742 // writeback using clear virtual address to point of persistence
6743 dc(Assembler::CVAP, line.base());
6744 } else {
6745 // no need to generate anything as Unsafe.writebackMemory should
6746 // never invoke this stub
6747 }
6748 }
6749
6750 void MacroAssembler::cache_wbsync(bool is_pre) {
6751 // we only need a barrier post sync
6752 if (!is_pre) {
6753 membar(Assembler::AnyAny);
6754 }
7125 }
7126
7127 // Check if the lock-stack is full.
7128 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7129 cmpw(top, (unsigned)LockStack::end_offset());
7130 br(Assembler::GE, slow);
7131
7132 // Check for recursion.
7133 subw(t, top, oopSize);
7134 ldr(t, Address(rthread, t));
7135 cmp(obj, t);
7136 br(Assembler::EQ, push);
7137
7138 // Check header for monitor (0b10).
7139 tst(mark, markWord::monitor_value);
7140 br(Assembler::NE, slow);
7141
7142 // Try to lock. Transition lock bits 0b01 => 0b00
7143 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7144 orr(mark, mark, markWord::unlocked_value);
7145 eor(t, mark, markWord::unlocked_value);
7146 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7147 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7148 br(Assembler::NE, slow);
7149
7150 bind(push);
7151 // After successful lock, push object on lock-stack.
7152 str(obj, Address(rthread, top));
7153 addw(top, top, oopSize);
7154 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7155 }
7156
7157 // Implements lightweight-unlocking.
7158 //
7159 // - obj: the object to be unlocked
7160 // - t1, t2, t3: temporary registers
7161 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7162 void MacroAssembler::lightweight_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7163 // cmpxchg clobbers rscratch1.
7164 assert_different_registers(obj, t1, t2, t3, rscratch1);
|
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "ci/ciInlineKlass.hpp"
30 #include "code/compiledIC.hpp"
31 #include "compiler/compileTask.hpp"
32 #include "compiler/disassembler.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "gc/shared/cardTableBarrierSet.hpp"
37 #include "gc/shared/cardTable.hpp"
38 #include "gc/shared/collectedHeap.hpp"
39 #include "gc/shared/tlab_globals.hpp"
40 #include "interpreter/bytecodeHistogram.hpp"
41 #include "interpreter/interpreter.hpp"
42 #include "interpreter/interpreterRuntime.hpp"
43 #include "jvm.h"
44 #include "memory/resourceArea.hpp"
45 #include "memory/universe.hpp"
46 #include "nativeInst_aarch64.hpp"
47 #include "oops/accessDecorators.hpp"
48 #include "oops/compressedKlass.inline.hpp"
49 #include "oops/compressedOops.inline.hpp"
50 #include "oops/klass.inline.hpp"
51 #include "oops/resolvedFieldEntry.hpp"
52 #include "runtime/continuation.hpp"
53 #include "runtime/globals.hpp"
54 #include "runtime/icache.hpp"
55 #include "runtime/interfaceSupport.inline.hpp"
56 #include "runtime/javaThread.hpp"
57 #include "runtime/jniHandles.inline.hpp"
58 #include "runtime/sharedRuntime.hpp"
59 #include "runtime/signature_cc.hpp"
60 #include "runtime/stubRoutines.hpp"
61 #include "utilities/globalDefinitions.hpp"
62 #include "utilities/powerOfTwo.hpp"
63 #include "vmreg_aarch64.inline.hpp"
64 #ifdef COMPILER1
65 #include "c1/c1_LIRAssembler.hpp"
66 #endif
67 #ifdef COMPILER2
68 #include "oops/oop.hpp"
69 #include "opto/compile.hpp"
70 #include "opto/node.hpp"
71 #include "opto/output.hpp"
72 #endif
73
74 #include <sys/types.h>
75
76 #ifdef PRODUCT
77 #define BLOCK_COMMENT(str) /* nothing */
78 #else
79 #define BLOCK_COMMENT(str) block_comment(str)
80 #endif
81 #define STOP(str) stop(str);
82 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
83
2054 ldarb(scratch, scratch);
2055 cmp(scratch, InstanceKlass::fully_initialized);
2056 br(Assembler::EQ, *L_fast_path);
2057
2058 // Fast path check: current thread is initializer thread
2059 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2060 cmp(rthread, scratch);
2061
2062 if (L_slow_path == &L_fallthrough) {
2063 br(Assembler::EQ, *L_fast_path);
2064 bind(*L_slow_path);
2065 } else if (L_fast_path == &L_fallthrough) {
2066 br(Assembler::NE, *L_slow_path);
2067 bind(*L_fast_path);
2068 } else {
2069 Unimplemented();
2070 }
2071 }
2072
2073 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2074 if (!VerifyOops || VerifyAdapterSharing) {
2075 // Below address of the code string confuses VerifyAdapterSharing
2076 // because it may differ between otherwise equivalent adapters.
2077 return;
2078 }
2079
2080 // Pass register number to verify_oop_subroutine
2081 const char* b = nullptr;
2082 {
2083 ResourceMark rm;
2084 stringStream ss;
2085 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2086 b = code_string(ss.as_string());
2087 }
2088 BLOCK_COMMENT("verify_oop {");
2089
2090 strip_return_address(); // This might happen within a stack frame.
2091 protect_return_address();
2092 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2093 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2094
2095 mov(r0, reg);
2096 movptr(rscratch1, (uintptr_t)(address)b);
2097
2098 // call indirectly to solve generation ordering problem
2099 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2100 ldr(rscratch2, Address(rscratch2));
2101 blr(rscratch2);
2102
2103 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2104 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2105 authenticate_return_address();
2106
2107 BLOCK_COMMENT("} verify_oop");
2108 }
2109
2110 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2111 if (!VerifyOops || VerifyAdapterSharing) {
2112 // Below address of the code string confuses VerifyAdapterSharing
2113 // because it may differ between otherwise equivalent adapters.
2114 return;
2115 }
2116
2117 const char* b = nullptr;
2118 {
2119 ResourceMark rm;
2120 stringStream ss;
2121 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2122 b = code_string(ss.as_string());
2123 }
2124 BLOCK_COMMENT("verify_oop_addr {");
2125
2126 strip_return_address(); // This might happen within a stack frame.
2127 protect_return_address();
2128 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2129 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2130
2131 // addr may contain sp so we will have to adjust it based on the
2132 // pushes that we just did.
2133 if (addr.uses(sp)) {
2134 lea(r0, addr);
2135 ldr(r0, Address(r0, 4 * wordSize));
2193 call_VM_leaf_base(entry_point, 1);
2194 }
2195
2196 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2197 assert_different_registers(arg_1, c_rarg0);
2198 pass_arg0(this, arg_0);
2199 pass_arg1(this, arg_1);
2200 call_VM_leaf_base(entry_point, 2);
2201 }
2202
2203 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2204 Register arg_1, Register arg_2) {
2205 assert_different_registers(arg_1, c_rarg0);
2206 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2207 pass_arg0(this, arg_0);
2208 pass_arg1(this, arg_1);
2209 pass_arg2(this, arg_2);
2210 call_VM_leaf_base(entry_point, 3);
2211 }
2212
2213 void MacroAssembler::super_call_VM_leaf(address entry_point) {
2214 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2215 }
2216
2217 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2218 pass_arg0(this, arg_0);
2219 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2220 }
2221
2222 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2223
2224 assert_different_registers(arg_0, c_rarg1);
2225 pass_arg1(this, arg_1);
2226 pass_arg0(this, arg_0);
2227 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2228 }
2229
2230 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2231 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2232 assert_different_registers(arg_1, c_rarg2);
2233 pass_arg2(this, arg_2);
2234 pass_arg1(this, arg_1);
2235 pass_arg0(this, arg_0);
2236 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2242 assert_different_registers(arg_2, c_rarg3);
2243 pass_arg3(this, arg_3);
2244 pass_arg2(this, arg_2);
2245 pass_arg1(this, arg_1);
2246 pass_arg0(this, arg_0);
2247 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2248 }
2249
2250 void MacroAssembler::null_check(Register reg, int offset) {
2251 if (needs_explicit_null_check(offset)) {
2252 // provoke OS null exception if reg is null by
2253 // accessing M[reg] w/o changing any registers
2254 // NOTE: this is plenty to provoke a segv
2255 ldr(zr, Address(reg));
2256 } else {
2257 // nothing to do, (later) access of M[reg + offset]
2258 // will provoke OS null exception if reg is null
2259 }
2260 }
2261
2262 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2263 assert_different_registers(markword, rscratch2);
2264 mov(rscratch2, markWord::inline_type_mask_in_place);
2265 andr(markword, markword, rscratch2);
2266 mov(rscratch2, markWord::inline_type_pattern);
2267 cmp(markword, rscratch2);
2268 br(Assembler::EQ, is_inline_type);
2269 }
2270
2271 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2272 assert_different_registers(tmp, rscratch1);
2273 if (can_be_null) {
2274 cbz(object, not_inline_type);
2275 }
2276 const int is_inline_type_mask = markWord::inline_type_pattern;
2277 ldr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2278 mov(rscratch1, is_inline_type_mask);
2279 andr(tmp, tmp, rscratch1);
2280 cmp(tmp, rscratch1);
2281 br(Assembler::NE, not_inline_type);
2282 }
2283
2284 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2285 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2286 tbnz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, is_null_free_inline_type);
2287 }
2288
2289 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2290 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2291 tbz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, not_null_free_inline_type);
2292 }
2293
2294 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2295 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2296 tbnz(flags, ResolvedFieldEntry::is_flat_shift, is_flat);
2297 }
2298
2299 void MacroAssembler::test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker) {
2300 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2301 tbnz(flags, ResolvedFieldEntry::has_null_marker_shift, has_null_marker);
2302 }
2303
2304 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2305 Label test_mark_word;
2306 // load mark word
2307 ldr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2308 // check displaced
2309 tst(temp_reg, markWord::unlocked_value);
2310 br(Assembler::NE, test_mark_word);
2311 // slow path use klass prototype
2312 load_prototype_header(temp_reg, oop);
2313
2314 bind(test_mark_word);
2315 andr(temp_reg, temp_reg, test_bit);
2316 if (jmp_set) {
2317 cbnz(temp_reg, jmp_label);
2318 } else {
2319 cbz(temp_reg, jmp_label);
2320 }
2321 }
2322
2323 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array) {
2324 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2325 }
2326
2327 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2328 Label&is_non_flat_array) {
2329 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2330 }
2331
2332 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array) {
2333 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2334 }
2335
2336 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2337 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2338 }
2339
2340 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2341 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2342 br(Assembler::NE, is_flat_array);
2343 }
2344
2345 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
2346 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2347 br(Assembler::EQ, is_non_flat_array);
2348 }
2349
2350 // MacroAssembler protected routines needed to implement
2351 // public methods
2352
2353 void MacroAssembler::mov(Register r, Address dest) {
2354 code_section()->relocate(pc(), dest.rspec());
2355 uint64_t imm64 = (uint64_t)dest.target();
2356 movptr(r, imm64);
2357 }
2358
2359 // Move a constant pointer into r. In AArch64 mode the virtual
2360 // address space is 48 bits in size, so we only need three
2361 // instructions to create a patchable instruction sequence that can
2362 // reach anywhere.
2363 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2364 #ifndef PRODUCT
2365 {
2366 char buffer[64];
2367 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2368 block_comment(buffer);
2369 }
5121 adrp(rscratch1, src2, offset);
5122 ldr(rscratch1, Address(rscratch1, offset));
5123 cmp(src1, rscratch1);
5124 }
5125
5126 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5127 cmp(obj1, obj2);
5128 }
5129
5130 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5131 load_method_holder(rresult, rmethod);
5132 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5133 }
5134
5135 void MacroAssembler::load_method_holder(Register holder, Register method) {
5136 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5137 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5138 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5139 }
5140
5141 void MacroAssembler::load_metadata(Register dst, Register src) {
5142 if (UseCompactObjectHeaders) {
5143 load_narrow_klass_compact(dst, src);
5144 } else if (UseCompressedClassPointers) {
5145 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5146 } else {
5147 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5148 }
5149 }
5150
5151 // Loads the obj's Klass* into dst.
5152 // Preserves all registers (incl src, rscratch1 and rscratch2).
5153 // Input:
5154 // src - the oop we want to load the klass from.
5155 // dst - output narrow klass.
5156 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5157 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5158 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5159 lsr(dst, dst, markWord::klass_shift);
5160 }
5161
5162 void MacroAssembler::load_klass(Register dst, Register src) {
5163 if (UseCompactObjectHeaders) {
5164 load_narrow_klass_compact(dst, src);
5165 decode_klass_not_null(dst);
5166 } else if (UseCompressedClassPointers) {
5167 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5168 decode_klass_not_null(dst);
5169 } else {
5170 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5241 }
5242 cmp(klass, tmp);
5243 }
5244
5245 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5246 if (UseCompactObjectHeaders) {
5247 load_narrow_klass_compact(tmp1, obj1);
5248 load_narrow_klass_compact(tmp2, obj2);
5249 cmpw(tmp1, tmp2);
5250 } else if (UseCompressedClassPointers) {
5251 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5252 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5253 cmpw(tmp1, tmp2);
5254 } else {
5255 ldr(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5256 ldr(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5257 cmp(tmp1, tmp2);
5258 }
5259 }
5260
5261 void MacroAssembler::load_prototype_header(Register dst, Register src) {
5262 load_klass(dst, src);
5263 ldr(dst, Address(dst, Klass::prototype_header_offset()));
5264 }
5265
5266 void MacroAssembler::store_klass(Register dst, Register src) {
5267 // FIXME: Should this be a store release? concurrent gcs assumes
5268 // klass length is valid if klass field is not null.
5269 assert(!UseCompactObjectHeaders, "not with compact headers");
5270 if (UseCompressedClassPointers) {
5271 encode_klass_not_null(src);
5272 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5273 } else {
5274 str(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5275 }
5276 }
5277
5278 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5279 assert(!UseCompactObjectHeaders, "not with compact headers");
5280 if (UseCompressedClassPointers) {
5281 // Store to klass gap in destination
5282 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5283 }
5284 }
5285
5647 if (as_raw) {
5648 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5649 } else {
5650 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5651 }
5652 }
5653
5654 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5655 Address dst, Register val,
5656 Register tmp1, Register tmp2, Register tmp3) {
5657 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5658 decorators = AccessInternal::decorator_fixup(decorators, type);
5659 bool as_raw = (decorators & AS_RAW) != 0;
5660 if (as_raw) {
5661 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5662 } else {
5663 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5664 }
5665 }
5666
5667 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5668 Register inline_layout_info) {
5669 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5670 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5671 }
5672
5673 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5674 ldr(offset, Address(inline_klass, InstanceKlass::adr_inlineklass_fixed_block_offset()));
5675 ldrw(offset, Address(offset, InlineKlass::payload_offset_offset()));
5676 }
5677
5678 void MacroAssembler::payload_address(Register oop, Register data, Register inline_klass) {
5679 // ((address) (void*) o) + vk->payload_offset();
5680 Register offset = (data == oop) ? rscratch1 : data;
5681 payload_offset(inline_klass, offset);
5682 if (data == oop) {
5683 add(data, data, offset);
5684 } else {
5685 lea(data, Address(oop, offset));
5686 }
5687 }
5688
5689 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
5690 Register index, Register data) {
5691 assert_different_registers(array, array_klass, index);
5692 assert_different_registers(rscratch1, array, index);
5693
5694 // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
5695 ldrw(rscratch1, Address(array_klass, Klass::layout_helper_offset()));
5696
5697 // Klass::layout_helper_log2_element_size(lh)
5698 // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
5699 lsr(rscratch1, rscratch1, Klass::_lh_log2_element_size_shift);
5700 andr(rscratch1, rscratch1, Klass::_lh_log2_element_size_mask);
5701 lslv(index, index, rscratch1);
5702
5703 add(data, array, index);
5704 add(data, data, arrayOopDesc::base_offset_in_bytes(T_FLAT_ELEMENT));
5705 }
5706
5707 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5708 Register tmp2, DecoratorSet decorators) {
5709 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5710 }
5711
5712 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5713 Register tmp2, DecoratorSet decorators) {
5714 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5715 }
5716
5717 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5718 Register tmp2, Register tmp3, DecoratorSet decorators) {
5719 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5720 }
5721
5722 // Used for storing nulls.
5723 void MacroAssembler::store_heap_oop_null(Address dst) {
5724 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5725 }
5726
5762 oop_index = oop_recorder()->allocate_metadata_index(obj);
5763 } else {
5764 oop_index = oop_recorder()->find_index(obj);
5765 }
5766 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5767 mov(dst, Address((address)obj, rspec));
5768 }
5769
5770 Address MacroAssembler::constant_oop_address(jobject obj) {
5771 #ifdef ASSERT
5772 {
5773 ThreadInVMfromUnknown tiv;
5774 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5775 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5776 }
5777 #endif
5778 int oop_index = oop_recorder()->find_index(obj);
5779 return Address((address)obj, oop_Relocation::spec(oop_index));
5780 }
5781
5782 // Object / value buffer allocation...
5783 void MacroAssembler::allocate_instance(Register klass, Register new_obj,
5784 Register t1, Register t2,
5785 bool clear_fields, Label& alloc_failed)
5786 {
5787 Label done, initialize_header, initialize_object, slow_case, slow_case_no_pop;
5788 Register layout_size = t1;
5789 assert(new_obj == r0, "needs to be r0");
5790 assert_different_registers(klass, new_obj, t1, t2);
5791
5792 // get instance_size in InstanceKlass (scaled to a count of bytes)
5793 ldrw(layout_size, Address(klass, Klass::layout_helper_offset()));
5794 // test to see if it is malformed in some way
5795 tst(layout_size, Klass::_lh_instance_slow_path_bit);
5796 br(Assembler::NE, slow_case_no_pop);
5797
5798 // Allocate the instance:
5799 // If TLAB is enabled:
5800 // Try to allocate in the TLAB.
5801 // If fails, go to the slow path.
5802 // Initialize the allocation.
5803 // Exit.
5804 //
5805 // Go to slow path.
5806
5807 if (UseTLAB) {
5808 push(klass);
5809 tlab_allocate(new_obj, layout_size, 0, klass, t2, slow_case);
5810 if (ZeroTLAB || (!clear_fields)) {
5811 // the fields have been already cleared
5812 b(initialize_header);
5813 } else {
5814 // initialize both the header and fields
5815 b(initialize_object);
5816 }
5817
5818 if (clear_fields) {
5819 // The object is initialized before the header. If the object size is
5820 // zero, go directly to the header initialization.
5821 bind(initialize_object);
5822 int header_size = oopDesc::header_size() * HeapWordSize;
5823 assert(is_aligned(header_size, BytesPerLong), "oop header size must be 8-byte-aligned");
5824 subs(layout_size, layout_size, header_size);
5825 br(Assembler::EQ, initialize_header);
5826
5827 // Initialize topmost object field, divide size by 8, check if odd and
5828 // test if zero.
5829
5830 #ifdef ASSERT
5831 // make sure instance_size was multiple of 8
5832 Label L;
5833 tst(layout_size, 7);
5834 br(Assembler::EQ, L);
5835 stop("object size is not multiple of 8 - adjust this code");
5836 bind(L);
5837 // must be > 0, no extra check needed here
5838 #endif
5839
5840 lsr(layout_size, layout_size, LogBytesPerLong);
5841
5842 // initialize remaining object fields: instance_size was a multiple of 8
5843 {
5844 Label loop;
5845 Register base = t2;
5846
5847 bind(loop);
5848 add(rscratch1, new_obj, layout_size, Assembler::LSL, LogBytesPerLong);
5849 str(zr, Address(rscratch1, header_size - 1*oopSize));
5850 subs(layout_size, layout_size, 1);
5851 br(Assembler::NE, loop);
5852 }
5853 } // clear_fields
5854
5855 // initialize object header only.
5856 bind(initialize_header);
5857 pop(klass);
5858 Register mark_word = t2;
5859 if (UseCompactObjectHeaders || EnableValhalla) {
5860 ldr(mark_word, Address(klass, Klass::prototype_header_offset()));
5861 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5862 } else {
5863 mov(mark_word, (intptr_t)markWord::prototype().value());
5864 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5865 }
5866 if (!UseCompactObjectHeaders) {
5867 store_klass_gap(new_obj, zr); // zero klass gap for compressed oops
5868 mov(t2, klass); // preserve klass
5869 store_klass(new_obj, t2); // src klass reg is potentially compressed
5870 }
5871 b(done);
5872 }
5873
5874 if (UseTLAB) {
5875 bind(slow_case);
5876 pop(klass);
5877 }
5878 bind(slow_case_no_pop);
5879 b(alloc_failed);
5880
5881 bind(done);
5882 }
5883
5884 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5885 void MacroAssembler::tlab_allocate(Register obj,
5886 Register var_size_in_bytes,
5887 int con_size_in_bytes,
5888 Register t1,
5889 Register t2,
5890 Label& slow_case) {
5891 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5892 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5893 }
5894
5895 void MacroAssembler::inc_held_monitor_count(Register tmp) {
5896 Address dst(rthread, JavaThread::held_monitor_count_offset());
5897 #ifdef ASSERT
5898 ldr(tmp, dst);
5899 increment(tmp);
5900 str(tmp, dst);
5901 Label ok;
5902 tbz(tmp, 63, ok);
5903 STOP("assert(held monitor count underflow)");
5935 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5936 cmp(rscratch2, rscratch1);
5937 br(Assembler::HS, next);
5938 STOP("assert(top >= start)");
5939 should_not_reach_here();
5940
5941 bind(next);
5942 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5943 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5944 cmp(rscratch2, rscratch1);
5945 br(Assembler::HS, ok);
5946 STOP("assert(top <= end)");
5947 should_not_reach_here();
5948
5949 bind(ok);
5950 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5951 }
5952 #endif
5953 }
5954
5955 void MacroAssembler::get_inline_type_field_klass(Register holder_klass, Register index, Register inline_klass) {
5956 inline_layout_info(holder_klass, index, inline_klass);
5957 ldr(inline_klass, Address(inline_klass, InlineLayoutInfo::klass_offset()));
5958 }
5959
5960 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
5961 assert_different_registers(holder_klass, index, layout_info);
5962 InlineLayoutInfo array[2];
5963 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
5964 if (is_power_of_2(size)) {
5965 lsl(index, index, log2i_exact(size)); // Scale index by power of 2
5966 } else {
5967 mov(layout_info, size);
5968 mul(index, index, layout_info); // Scale the index to be the entry index * array_element_size
5969 }
5970 ldr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
5971 add(layout_info, layout_info, Array<InlineLayoutInfo>::base_offset_in_bytes());
5972 lea(layout_info, Address(layout_info, index));
5973 }
5974
5975 // Writes to stack successive pages until offset reached to check for
5976 // stack overflow + shadow pages. This clobbers tmp.
5977 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5978 assert_different_registers(tmp, size, rscratch1);
5979 mov(tmp, sp);
5980 // Bang stack for total size given plus shadow page size.
5981 // Bang one page at a time because large size can bang beyond yellow and
5982 // red zones.
5983 Label loop;
5984 mov(rscratch1, (int)os::vm_page_size());
5985 bind(loop);
5986 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5987 subsw(size, size, rscratch1);
5988 str(size, Address(tmp));
5989 br(Assembler::GT, loop);
5990
5991 // Bang down shadow pages too.
5992 // At this point, (tmp-0) is the last address touched, so don't
5993 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5994 // was post-decremented.) Skip this address by starting at i=1, and
6080 }
6081
6082 void MacroAssembler::remove_frame(int framesize) {
6083 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
6084 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
6085 if (framesize < ((1 << 9) + 2 * wordSize)) {
6086 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
6087 add(sp, sp, framesize);
6088 } else {
6089 if (framesize < ((1 << 12) + 2 * wordSize))
6090 add(sp, sp, framesize - 2 * wordSize);
6091 else {
6092 mov(rscratch1, framesize - 2 * wordSize);
6093 add(sp, sp, rscratch1);
6094 }
6095 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6096 }
6097 authenticate_return_address();
6098 }
6099
6100 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6101 if (needs_stack_repair) {
6102 // Remove the extension of the caller's frame used for inline type unpacking
6103 //
6104 // Right now the stack looks like this:
6105 //
6106 // | Arguments from caller |
6107 // |---------------------------| <-- caller's SP
6108 // | Saved LR #1 |
6109 // | Saved FP #1 |
6110 // |---------------------------|
6111 // | Extension space for |
6112 // | inline arg (un)packing |
6113 // |---------------------------| <-- start of this method's frame
6114 // | Saved LR #2 |
6115 // | Saved FP #2 |
6116 // |---------------------------| <-- FP
6117 // | sp_inc |
6118 // | method locals |
6119 // |---------------------------| <-- SP
6120 //
6121 // There are two copies of FP and LR on the stack. They will be identical at
6122 // first, but that can change.
6123 // If the caller has been deoptimized, LR #1 will be patched to point at the
6124 // deopt blob, and LR #2 will still point into the old method.
6125 // If the saved FP (x29) was not used as the frame pointer, but to store an
6126 // oop, the GC will be aware only of FP #2 as the spilled location of x29 and
6127 // will fix only this one.
6128 //
6129 // When restoring, one must then load FP #2 into x29, and LR #1 into x30,
6130 // while keeping in mind that from the scalarized entry point, there will be
6131 // only one copy of each.
6132 //
6133 // The sp_inc stack slot holds the total size of the frame including the
6134 // extension space minus two words for the saved FP and LR. That is how to
6135 // find LR #1. FP #2 is always located just after sp_inc.
6136
6137 int sp_inc_offset = initial_framesize - 3 * wordSize; // Immediately below saved LR and FP
6138
6139 ldr(rscratch1, Address(sp, sp_inc_offset));
6140 ldr(rfp, Address(sp, sp_inc_offset + wordSize));
6141 add(sp, sp, rscratch1);
6142 ldr(lr, Address(sp, wordSize));
6143 add(sp, sp, 2 * wordSize);
6144 } else {
6145 remove_frame(initial_framesize);
6146 }
6147 }
6148
6149 void MacroAssembler::save_stack_increment(int sp_inc, int frame_size) {
6150 int real_frame_size = frame_size + sp_inc;
6151 assert(sp_inc == 0 || sp_inc > 2*wordSize, "invalid sp_inc value");
6152 assert(real_frame_size >= 2*wordSize, "frame size must include FP/LR space");
6153 assert((real_frame_size & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6154
6155 int sp_inc_offset = frame_size - 3 * wordSize; // Immediately below saved LR and FP
6156
6157 // Subtract two words for the saved FP and LR as these will be popped
6158 // separately. See remove_frame above.
6159 mov(rscratch1, real_frame_size - 2*wordSize);
6160 str(rscratch1, Address(sp, sp_inc_offset));
6161 }
6162
6163 // This method counts leading positive bytes (highest bit not set) in provided byte array
6164 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
6165 // Simple and most common case of aligned small array which is not at the
6166 // end of memory page is placed here. All other cases are in stub.
6167 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
6168 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
6169 assert_different_registers(ary1, len, result);
6170
6171 mov(result, len);
6172 cmpw(len, 0);
6173 br(LE, DONE);
6174 cmpw(len, 4 * wordSize);
6175 br(GE, STUB_LONG); // size > 32 then go to stub
6176
6177 int shift = 64 - exact_log2(os::vm_page_size());
6178 lsl(rscratch1, ary1, shift);
6179 mov(rscratch2, (size_t)(4 * wordSize) << shift);
6180 adds(rscratch2, rscratch1, rscratch2); // At end of page?
6181 br(CS, STUB); // at the end of page then go to stub
7059 // On other systems, the helper is a usual C function.
7060 //
7061 void MacroAssembler::get_thread(Register dst) {
7062 RegSet saved_regs =
7063 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
7064 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
7065
7066 protect_return_address();
7067 push(saved_regs, sp);
7068
7069 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
7070 blr(lr);
7071 if (dst != c_rarg0) {
7072 mov(dst, c_rarg0);
7073 }
7074
7075 pop(saved_regs, sp);
7076 authenticate_return_address();
7077 }
7078
7079 #ifdef COMPILER2
7080 // C2 compiled method's prolog code
7081 // Moved here from aarch64.ad to support Valhalla code belows
7082 void MacroAssembler::verified_entry(Compile* C, int sp_inc) {
7083 if (C->clinit_barrier_on_entry()) {
7084 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
7085
7086 Label L_skip_barrier;
7087
7088 mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
7089 clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
7090 far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
7091 bind(L_skip_barrier);
7092 }
7093
7094 if (C->max_vector_size() > 0) {
7095 reinitialize_ptrue();
7096 }
7097
7098 int bangsize = C->output()->bang_size_in_bytes();
7099 if (C->output()->need_stack_bang(bangsize))
7100 generate_stack_overflow_check(bangsize);
7101
7102 // n.b. frame size includes space for return pc and rfp
7103 const long framesize = C->output()->frame_size_in_bytes();
7104 build_frame(framesize);
7105
7106 if (C->needs_stack_repair()) {
7107 save_stack_increment(sp_inc, framesize);
7108 }
7109
7110 if (VerifyStackAtCalls) {
7111 Unimplemented();
7112 }
7113 }
7114 #endif // COMPILER2
7115
7116 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
7117 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
7118 // An inline type might be returned. If fields are in registers we
7119 // need to allocate an inline type instance and initialize it with
7120 // the value of the fields.
7121 Label skip;
7122 // We only need a new buffered inline type if a new one is not returned
7123 tbz(r0, 0, skip);
7124 int call_offset = -1;
7125
7126 // Be careful not to clobber r1-7 which hold returned fields
7127 // Also do not use callee-saved registers as these may be live in the interpreter
7128 Register tmp1 = r13, tmp2 = r14, klass = r15, r0_preserved = r12;
7129
7130 // The following code is similar to allocate_instance but has some slight differences,
7131 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
7132 // allocating is not necessary if vk != nullptr, etc. allocate_instance is not aware of these.
7133 Label slow_case;
7134 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
7135 mov(r0_preserved, r0); // save r0 for slow_case since *_allocate may corrupt it when allocation failed
7136
7137 if (vk != nullptr) {
7138 // Called from C1, where the return type is statically known.
7139 movptr(klass, (intptr_t)vk->get_InlineKlass());
7140 jint lh = vk->layout_helper();
7141 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
7142 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
7143 tlab_allocate(r0, noreg, lh, tmp1, tmp2, slow_case);
7144 } else {
7145 b(slow_case);
7146 }
7147 } else {
7148 // Call from interpreter. R0 contains ((the InlineKlass* of the return type) | 0x01)
7149 andr(klass, r0, -2);
7150 if (UseTLAB) {
7151 ldrw(tmp2, Address(klass, Klass::layout_helper_offset()));
7152 tst(tmp2, Klass::_lh_instance_slow_path_bit);
7153 br(Assembler::NE, slow_case);
7154 tlab_allocate(r0, tmp2, 0, tmp1, tmp2, slow_case);
7155 } else {
7156 b(slow_case);
7157 }
7158 }
7159 if (UseTLAB) {
7160 // 2. Initialize buffered inline instance header
7161 Register buffer_obj = r0;
7162 if (UseCompactObjectHeaders) {
7163 ldr(rscratch1, Address(klass, Klass::prototype_header_offset()));
7164 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7165 } else {
7166 mov(rscratch1, (intptr_t)markWord::inline_type_prototype().value());
7167 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7168 store_klass_gap(buffer_obj, zr);
7169 if (vk == nullptr) {
7170 // store_klass corrupts klass, so save it for later use (interpreter case only).
7171 mov(tmp1, klass);
7172 }
7173 store_klass(buffer_obj, klass);
7174 klass = tmp1;
7175 }
7176 // 3. Initialize its fields with an inline class specific handler
7177 if (vk != nullptr) {
7178 far_call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
7179 } else {
7180 ldr(tmp1, Address(klass, InstanceKlass::adr_inlineklass_fixed_block_offset()));
7181 ldr(tmp1, Address(tmp1, InlineKlass::pack_handler_offset()));
7182 blr(tmp1);
7183 }
7184
7185 membar(Assembler::StoreStore);
7186 b(skip);
7187 } else {
7188 // Must have already branched to slow_case above.
7189 DEBUG_ONLY(should_not_reach_here());
7190 }
7191 bind(slow_case);
7192 // We failed to allocate a new inline type, fall back to a runtime
7193 // call. Some oop field may be live in some registers but we can't
7194 // tell. That runtime call will take care of preserving them
7195 // across a GC if there's one.
7196 mov(r0, r0_preserved);
7197
7198 if (from_interpreter) {
7199 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
7200 } else {
7201 far_call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
7202 call_offset = offset();
7203 }
7204 membar(Assembler::StoreStore);
7205
7206 bind(skip);
7207 return call_offset;
7208 }
7209
7210 // Move a value between registers/stack slots and update the reg_state
7211 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
7212 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
7213 if (reg_state[to->value()] == reg_written) {
7214 return true; // Already written
7215 }
7216
7217 if (from != to && bt != T_VOID) {
7218 if (reg_state[to->value()] == reg_readonly) {
7219 return false; // Not yet writable
7220 }
7221 if (from->is_reg()) {
7222 if (to->is_reg()) {
7223 if (from->is_Register() && to->is_Register()) {
7224 mov(to->as_Register(), from->as_Register());
7225 } else if (from->is_FloatRegister() && to->is_FloatRegister()) {
7226 fmovd(to->as_FloatRegister(), from->as_FloatRegister());
7227 } else {
7228 ShouldNotReachHere();
7229 }
7230 } else {
7231 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7232 Address to_addr = Address(sp, st_off);
7233 if (from->is_FloatRegister()) {
7234 if (bt == T_DOUBLE) {
7235 strd(from->as_FloatRegister(), to_addr);
7236 } else {
7237 assert(bt == T_FLOAT, "must be float");
7238 strs(from->as_FloatRegister(), to_addr);
7239 }
7240 } else {
7241 str(from->as_Register(), to_addr);
7242 }
7243 }
7244 } else {
7245 Address from_addr = Address(sp, from->reg2stack() * VMRegImpl::stack_slot_size);
7246 if (to->is_reg()) {
7247 if (to->is_FloatRegister()) {
7248 if (bt == T_DOUBLE) {
7249 ldrd(to->as_FloatRegister(), from_addr);
7250 } else {
7251 assert(bt == T_FLOAT, "must be float");
7252 ldrs(to->as_FloatRegister(), from_addr);
7253 }
7254 } else {
7255 ldr(to->as_Register(), from_addr);
7256 }
7257 } else {
7258 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7259 ldr(rscratch1, from_addr);
7260 str(rscratch1, Address(sp, st_off));
7261 }
7262 }
7263 }
7264
7265 // Update register states
7266 reg_state[from->value()] = reg_writable;
7267 reg_state[to->value()] = reg_written;
7268 return true;
7269 }
7270
7271 // Calculate the extra stack space required for packing or unpacking inline
7272 // args and adjust the stack pointer
7273 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
7274 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
7275 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
7276 assert(sp_inc > 0, "sanity");
7277
7278 // Save a copy of the FP and LR here for deoptimization patching and frame walking
7279 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
7280
7281 // Adjust the stack pointer. This will be repaired on return by MacroAssembler::remove_frame
7282 if (sp_inc < (1 << 9)) {
7283 sub(sp, sp, sp_inc); // Fits in an immediate
7284 } else {
7285 mov(rscratch1, sp_inc);
7286 sub(sp, sp, rscratch1);
7287 }
7288
7289 return sp_inc + 2 * wordSize; // Account for the FP/LR space
7290 }
7291
7292 // Read all fields from an inline type oop and store the values in registers/stack slots
7293 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
7294 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
7295 RegState reg_state[]) {
7296 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
7297 assert(from->is_valid(), "source must be valid");
7298 bool progress = false;
7299 #ifdef ASSERT
7300 const int start_offset = offset();
7301 #endif
7302
7303 Label L_null, L_notNull;
7304 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
7305 // TODO 8366717 We need to make sure that r14 (and potentially other long-life regs) are kept live in slowpath runtime calls in GC barriers
7306 Register tmp1 = r10;
7307 Register tmp2 = r11;
7308 Register fromReg = noreg;
7309 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, -1);
7310 bool done = true;
7311 bool mark_done = true;
7312 VMReg toReg;
7313 BasicType bt;
7314 // Check if argument requires a null check
7315 bool null_check = false;
7316 VMReg nullCheckReg;
7317 while (stream.next(nullCheckReg, bt)) {
7318 if (sig->at(stream.sig_index())._offset == -1) {
7319 null_check = true;
7320 break;
7321 }
7322 }
7323 stream.reset(sig_index, to_index);
7324 while (stream.next(toReg, bt)) {
7325 assert(toReg->is_valid(), "destination must be valid");
7326 int idx = (int)toReg->value();
7327 if (reg_state[idx] == reg_readonly) {
7328 if (idx != from->value()) {
7329 mark_done = false;
7330 }
7331 done = false;
7332 continue;
7333 } else if (reg_state[idx] == reg_written) {
7334 continue;
7335 }
7336 assert(reg_state[idx] == reg_writable, "must be writable");
7337 reg_state[idx] = reg_written;
7338 progress = true;
7339
7340 if (fromReg == noreg) {
7341 if (from->is_reg()) {
7342 fromReg = from->as_Register();
7343 } else {
7344 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size;
7345 ldr(tmp1, Address(sp, st_off));
7346 fromReg = tmp1;
7347 }
7348 if (null_check) {
7349 // Nullable inline type argument, emit null check
7350 cbz(fromReg, L_null);
7351 }
7352 }
7353 int off = sig->at(stream.sig_index())._offset;
7354 if (off == -1) {
7355 assert(null_check, "Missing null check at");
7356 if (toReg->is_stack()) {
7357 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7358 mov(tmp2, 1);
7359 str(tmp2, Address(sp, st_off));
7360 } else {
7361 mov(toReg->as_Register(), 1);
7362 }
7363 continue;
7364 }
7365 assert(off > 0, "offset in object should be positive");
7366 Address fromAddr = Address(fromReg, off);
7367 if (!toReg->is_FloatRegister()) {
7368 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
7369 if (is_reference_type(bt)) {
7370 load_heap_oop(dst, fromAddr, rscratch1, rscratch2);
7371 } else {
7372 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
7373 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
7374 }
7375 if (toReg->is_stack()) {
7376 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7377 str(dst, Address(sp, st_off));
7378 }
7379 } else if (bt == T_DOUBLE) {
7380 ldrd(toReg->as_FloatRegister(), fromAddr);
7381 } else {
7382 assert(bt == T_FLOAT, "must be float");
7383 ldrs(toReg->as_FloatRegister(), fromAddr);
7384 }
7385 }
7386 if (progress && null_check) {
7387 if (done) {
7388 b(L_notNull);
7389 bind(L_null);
7390 // Set null marker to zero to signal that the argument is null.
7391 // Also set all oop fields to zero to make the GC happy.
7392 stream.reset(sig_index, to_index);
7393 while (stream.next(toReg, bt)) {
7394 if (sig->at(stream.sig_index())._offset == -1 ||
7395 bt == T_OBJECT || bt == T_ARRAY) {
7396 if (toReg->is_stack()) {
7397 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7398 str(zr, Address(sp, st_off));
7399 } else {
7400 mov(toReg->as_Register(), zr);
7401 }
7402 }
7403 }
7404 bind(L_notNull);
7405 } else {
7406 bind(L_null);
7407 }
7408 }
7409
7410 // TODO 8366717 This is probably okay but looks fishy because stream is reset in the "Set null marker to zero" case just above. Same on x64.
7411 sig_index = stream.sig_index();
7412 to_index = stream.regs_index();
7413
7414 if (mark_done && reg_state[from->value()] != reg_written) {
7415 // This is okay because no one else will write to that slot
7416 reg_state[from->value()] = reg_writable;
7417 }
7418 from_index--;
7419 assert(progress || (start_offset == offset()), "should not emit code");
7420 return done;
7421 }
7422
7423 // Pack fields back into an inline type oop
7424 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
7425 VMRegPair* from, int from_count, int& from_index, VMReg to,
7426 RegState reg_state[], Register val_array) {
7427 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
7428 assert(to->is_valid(), "destination must be valid");
7429
7430 if (reg_state[to->value()] == reg_written) {
7431 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7432 return true; // Already written
7433 }
7434
7435 // The GC barrier expanded by store_heap_oop below may call into the
7436 // runtime so use callee-saved registers for any values that need to be
7437 // preserved. The GC barrier assembler should take care of saving the
7438 // Java argument registers.
7439 // TODO 8284443 Isn't it an issue if below code uses r14 as tmp when it contains a spilled value?
7440 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
7441 Register val_obj_tmp = r21;
7442 Register from_reg_tmp = r22;
7443 Register tmp1 = r14;
7444 Register tmp2 = r13;
7445 Register tmp3 = r12;
7446 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
7447
7448 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
7449
7450 if (reg_state[to->value()] == reg_readonly) {
7451 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
7452 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7453 return false; // Not yet writable
7454 }
7455 val_obj = val_obj_tmp;
7456 }
7457
7458 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
7459 load_heap_oop(val_obj, Address(val_array, index), tmp1, tmp2);
7460
7461 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
7462 VMReg fromReg;
7463 BasicType bt;
7464 Label L_null;
7465 while (stream.next(fromReg, bt)) {
7466 assert(fromReg->is_valid(), "source must be valid");
7467 reg_state[fromReg->value()] = reg_writable;
7468
7469 int off = sig->at(stream.sig_index())._offset;
7470 if (off == -1) {
7471 // Nullable inline type argument, emit null check
7472 Label L_notNull;
7473 if (fromReg->is_stack()) {
7474 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7475 ldrb(tmp2, Address(sp, ld_off));
7476 cbnz(tmp2, L_notNull);
7477 } else {
7478 cbnz(fromReg->as_Register(), L_notNull);
7479 }
7480 mov(val_obj, 0);
7481 b(L_null);
7482 bind(L_notNull);
7483 continue;
7484 }
7485
7486 assert(off > 0, "offset in object should be positive");
7487 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
7488
7489 // Pack the scalarized field into the value object.
7490 Address dst(val_obj, off);
7491 if (!fromReg->is_FloatRegister()) {
7492 Register src;
7493 if (fromReg->is_stack()) {
7494 src = from_reg_tmp;
7495 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7496 load_sized_value(src, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
7497 } else {
7498 src = fromReg->as_Register();
7499 }
7500 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
7501 if (is_reference_type(bt)) {
7502 store_heap_oop(dst, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
7503 } else {
7504 store_sized_value(dst, src, size_in_bytes);
7505 }
7506 } else if (bt == T_DOUBLE) {
7507 strd(fromReg->as_FloatRegister(), dst);
7508 } else {
7509 assert(bt == T_FLOAT, "must be float");
7510 strs(fromReg->as_FloatRegister(), dst);
7511 }
7512 }
7513 bind(L_null);
7514 sig_index = stream.sig_index();
7515 from_index = stream.regs_index();
7516
7517 assert(reg_state[to->value()] == reg_writable, "must have already been read");
7518 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
7519 assert(success, "to register must be writeable");
7520 return true;
7521 }
7522
7523 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
7524 return (reg->is_FloatRegister()) ? v8->as_VMReg() : r14->as_VMReg();
7525 }
7526
7527 void MacroAssembler::cache_wb(Address line) {
7528 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
7529 assert(line.index() == noreg, "index should be noreg");
7530 assert(line.offset() == 0, "offset should be 0");
7531 // would like to assert this
7532 // assert(line._ext.shift == 0, "shift should be zero");
7533 if (VM_Version::supports_dcpop()) {
7534 // writeback using clear virtual address to point of persistence
7535 dc(Assembler::CVAP, line.base());
7536 } else {
7537 // no need to generate anything as Unsafe.writebackMemory should
7538 // never invoke this stub
7539 }
7540 }
7541
7542 void MacroAssembler::cache_wbsync(bool is_pre) {
7543 // we only need a barrier post sync
7544 if (!is_pre) {
7545 membar(Assembler::AnyAny);
7546 }
7917 }
7918
7919 // Check if the lock-stack is full.
7920 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7921 cmpw(top, (unsigned)LockStack::end_offset());
7922 br(Assembler::GE, slow);
7923
7924 // Check for recursion.
7925 subw(t, top, oopSize);
7926 ldr(t, Address(rthread, t));
7927 cmp(obj, t);
7928 br(Assembler::EQ, push);
7929
7930 // Check header for monitor (0b10).
7931 tst(mark, markWord::monitor_value);
7932 br(Assembler::NE, slow);
7933
7934 // Try to lock. Transition lock bits 0b01 => 0b00
7935 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7936 orr(mark, mark, markWord::unlocked_value);
7937 if (EnableValhalla) {
7938 // Mask inline_type bit such that we go to the slow path if object is an inline type
7939 andr(mark, mark, ~((int) markWord::inline_type_bit_in_place));
7940 }
7941 eor(t, mark, markWord::unlocked_value);
7942 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7943 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7944 br(Assembler::NE, slow);
7945
7946 bind(push);
7947 // After successful lock, push object on lock-stack.
7948 str(obj, Address(rthread, top));
7949 addw(top, top, oopSize);
7950 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7951 }
7952
7953 // Implements lightweight-unlocking.
7954 //
7955 // - obj: the object to be unlocked
7956 // - t1, t2, t3: temporary registers
7957 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7958 void MacroAssembler::lightweight_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7959 // cmpxchg clobbers rscratch1.
7960 assert_different_registers(obj, t1, t2, t3, rscratch1);
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