9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "code/compiledIC.hpp"
30 #include "compiler/compileTask.hpp"
31 #include "compiler/disassembler.hpp"
32 #include "compiler/oopMap.hpp"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/cardTable.hpp"
37 #include "gc/shared/collectedHeap.hpp"
38 #include "gc/shared/tlab_globals.hpp"
39 #include "interpreter/bytecodeHistogram.hpp"
40 #include "interpreter/interpreter.hpp"
41 #include "interpreter/interpreterRuntime.hpp"
42 #include "jvm.h"
43 #include "memory/resourceArea.hpp"
44 #include "memory/universe.hpp"
45 #include "nativeInst_aarch64.hpp"
46 #include "oops/accessDecorators.hpp"
47 #include "oops/compressedKlass.inline.hpp"
48 #include "oops/compressedOops.inline.hpp"
49 #include "oops/klass.inline.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/icache.hpp"
52 #include "runtime/interfaceSupport.inline.hpp"
53 #include "runtime/javaThread.hpp"
54 #include "runtime/jniHandles.inline.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/globalDefinitions.hpp"
58 #include "utilities/powerOfTwo.hpp"
59 #ifdef COMPILER1
60 #include "c1/c1_LIRAssembler.hpp"
61 #endif
62 #ifdef COMPILER2
63 #include "oops/oop.hpp"
64 #include "opto/compile.hpp"
65 #include "opto/node.hpp"
66 #include "opto/output.hpp"
67 #endif
68
69 #include <sys/types.h>
70
71 #ifdef PRODUCT
72 #define BLOCK_COMMENT(str) /* nothing */
73 #else
74 #define BLOCK_COMMENT(str) block_comment(str)
75 #endif
76 #define STOP(str) stop(str);
77 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
78
2005 ldarb(scratch, scratch);
2006 cmp(scratch, InstanceKlass::fully_initialized);
2007 br(Assembler::EQ, *L_fast_path);
2008
2009 // Fast path check: current thread is initializer thread
2010 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2011 cmp(rthread, scratch);
2012
2013 if (L_slow_path == &L_fallthrough) {
2014 br(Assembler::EQ, *L_fast_path);
2015 bind(*L_slow_path);
2016 } else if (L_fast_path == &L_fallthrough) {
2017 br(Assembler::NE, *L_slow_path);
2018 bind(*L_fast_path);
2019 } else {
2020 Unimplemented();
2021 }
2022 }
2023
2024 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2025 if (!VerifyOops) return;
2026
2027 // Pass register number to verify_oop_subroutine
2028 const char* b = nullptr;
2029 {
2030 ResourceMark rm;
2031 stringStream ss;
2032 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2033 b = code_string(ss.as_string());
2034 }
2035 BLOCK_COMMENT("verify_oop {");
2036
2037 strip_return_address(); // This might happen within a stack frame.
2038 protect_return_address();
2039 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2040 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2041
2042 mov(r0, reg);
2043 movptr(rscratch1, (uintptr_t)(address)b);
2044
2045 // call indirectly to solve generation ordering problem
2046 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2047 ldr(rscratch2, Address(rscratch2));
2048 blr(rscratch2);
2049
2050 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2051 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2052 authenticate_return_address();
2053
2054 BLOCK_COMMENT("} verify_oop");
2055 }
2056
2057 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2058 if (!VerifyOops) return;
2059
2060 const char* b = nullptr;
2061 {
2062 ResourceMark rm;
2063 stringStream ss;
2064 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2065 b = code_string(ss.as_string());
2066 }
2067 BLOCK_COMMENT("verify_oop_addr {");
2068
2069 strip_return_address(); // This might happen within a stack frame.
2070 protect_return_address();
2071 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2072 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2073
2074 // addr may contain sp so we will have to adjust it based on the
2075 // pushes that we just did.
2076 if (addr.uses(sp)) {
2077 lea(r0, addr);
2078 ldr(r0, Address(r0, 4 * wordSize));
2291 call_VM_leaf_base(entry_point, 1);
2292 }
2293
2294 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2295 assert_different_registers(arg_1, c_rarg0);
2296 pass_arg0(this, arg_0);
2297 pass_arg1(this, arg_1);
2298 call_VM_leaf_base(entry_point, 2);
2299 }
2300
2301 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2302 Register arg_1, Register arg_2) {
2303 assert_different_registers(arg_1, c_rarg0);
2304 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2305 pass_arg0(this, arg_0);
2306 pass_arg1(this, arg_1);
2307 pass_arg2(this, arg_2);
2308 call_VM_leaf_base(entry_point, 3);
2309 }
2310
2311 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2312 pass_arg0(this, arg_0);
2313 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2314 }
2315
2316 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2317
2318 assert_different_registers(arg_0, c_rarg1);
2319 pass_arg1(this, arg_1);
2320 pass_arg0(this, arg_0);
2321 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2322 }
2323
2324 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2325 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2326 assert_different_registers(arg_1, c_rarg2);
2327 pass_arg2(this, arg_2);
2328 pass_arg1(this, arg_1);
2329 pass_arg0(this, arg_0);
2330 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2336 assert_different_registers(arg_2, c_rarg3);
2337 pass_arg3(this, arg_3);
2338 pass_arg2(this, arg_2);
2339 pass_arg1(this, arg_1);
2340 pass_arg0(this, arg_0);
2341 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2342 }
2343
2344 void MacroAssembler::null_check(Register reg, int offset) {
2345 if (needs_explicit_null_check(offset)) {
2346 // provoke OS null exception if reg is null by
2347 // accessing M[reg] w/o changing any registers
2348 // NOTE: this is plenty to provoke a segv
2349 ldr(zr, Address(reg));
2350 } else {
2351 // nothing to do, (later) access of M[reg + offset]
2352 // will provoke OS null exception if reg is null
2353 }
2354 }
2355
2356 // MacroAssembler protected routines needed to implement
2357 // public methods
2358
2359 void MacroAssembler::mov(Register r, Address dest) {
2360 code_section()->relocate(pc(), dest.rspec());
2361 uint64_t imm64 = (uint64_t)dest.target();
2362 movptr(r, imm64);
2363 }
2364
2365 // Move a constant pointer into r. In AArch64 mode the virtual
2366 // address space is 48 bits in size, so we only need three
2367 // instructions to create a patchable instruction sequence that can
2368 // reach anywhere.
2369 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2370 #ifndef PRODUCT
2371 {
2372 char buffer[64];
2373 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2374 block_comment(buffer);
2375 }
5034 adrp(rscratch1, src2, offset);
5035 ldr(rscratch1, Address(rscratch1, offset));
5036 cmp(src1, rscratch1);
5037 }
5038
5039 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5040 cmp(obj1, obj2);
5041 }
5042
5043 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5044 load_method_holder(rresult, rmethod);
5045 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5046 }
5047
5048 void MacroAssembler::load_method_holder(Register holder, Register method) {
5049 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5050 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5051 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5052 }
5053
5054 // Loads the obj's Klass* into dst.
5055 // Preserves all registers (incl src, rscratch1 and rscratch2).
5056 // Input:
5057 // src - the oop we want to load the klass from.
5058 // dst - output narrow klass.
5059 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5060 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5061 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5062 lsr(dst, dst, markWord::klass_shift);
5063 }
5064
5065 void MacroAssembler::load_klass(Register dst, Register src) {
5066 if (UseCompactObjectHeaders) {
5067 load_narrow_klass_compact(dst, src);
5068 } else {
5069 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5070 }
5071 decode_klass_not_null(dst);
5072 }
5073
5125 } else {
5126 ldrw(tmp, Address(obj, oopDesc::klass_offset_in_bytes()));
5127 }
5128 if (CompressedKlassPointers::base() == nullptr) {
5129 cmp(klass, tmp, LSL, CompressedKlassPointers::shift());
5130 return;
5131 } else if (!AOTCodeCache::is_on_for_dump() &&
5132 ((uint64_t)CompressedKlassPointers::base() & 0xffffffff) == 0
5133 && CompressedKlassPointers::shift() == 0) {
5134 // Only the bottom 32 bits matter
5135 cmpw(klass, tmp);
5136 return;
5137 }
5138 decode_klass_not_null(tmp);
5139 cmp(klass, tmp);
5140 }
5141
5142 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5143 if (UseCompactObjectHeaders) {
5144 load_narrow_klass_compact(tmp1, obj1);
5145 load_narrow_klass_compact(tmp2, obj2);
5146 } else {
5147 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5148 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5149 }
5150 cmpw(tmp1, tmp2);
5151 }
5152
5153 void MacroAssembler::store_klass(Register dst, Register src) {
5154 // FIXME: Should this be a store release? concurrent gcs assumes
5155 // klass length is valid if klass field is not null.
5156 assert(!UseCompactObjectHeaders, "not with compact headers");
5157 encode_klass_not_null(src);
5158 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5159 }
5160
5161 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5162 assert(!UseCompactObjectHeaders, "not with compact headers");
5163 // Store to klass gap in destination
5164 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5165 }
5166
5167 // Algorithm must match CompressedOops::encode.
5168 void MacroAssembler::encode_heap_oop(Register d, Register s) {
5169 #ifdef ASSERT
5170 verify_heapbase("MacroAssembler::encode_heap_oop: heap base corrupted?");
5171 #endif
5172 verify_oop_msg(s, "broken oop in encode_heap_oop");
5522 if (as_raw) {
5523 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5524 } else {
5525 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5526 }
5527 }
5528
5529 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5530 Address dst, Register val,
5531 Register tmp1, Register tmp2, Register tmp3) {
5532 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5533 decorators = AccessInternal::decorator_fixup(decorators, type);
5534 bool as_raw = (decorators & AS_RAW) != 0;
5535 if (as_raw) {
5536 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5537 } else {
5538 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5539 }
5540 }
5541
5542 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5543 Register tmp2, DecoratorSet decorators) {
5544 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5545 }
5546
5547 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5548 Register tmp2, DecoratorSet decorators) {
5549 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5550 }
5551
5552 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5553 Register tmp2, Register tmp3, DecoratorSet decorators) {
5554 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5555 }
5556
5557 // Used for storing nulls.
5558 void MacroAssembler::store_heap_oop_null(Address dst) {
5559 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5560 }
5561
5597 oop_index = oop_recorder()->allocate_metadata_index(obj);
5598 } else {
5599 oop_index = oop_recorder()->find_index(obj);
5600 }
5601 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5602 mov(dst, Address((address)obj, rspec));
5603 }
5604
5605 Address MacroAssembler::constant_oop_address(jobject obj) {
5606 #ifdef ASSERT
5607 {
5608 ThreadInVMfromUnknown tiv;
5609 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5610 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5611 }
5612 #endif
5613 int oop_index = oop_recorder()->find_index(obj);
5614 return Address((address)obj, oop_Relocation::spec(oop_index));
5615 }
5616
5617 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5618 void MacroAssembler::tlab_allocate(Register obj,
5619 Register var_size_in_bytes,
5620 int con_size_in_bytes,
5621 Register t1,
5622 Register t2,
5623 Label& slow_case) {
5624 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5625 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5626 }
5627
5628 void MacroAssembler::verify_tlab() {
5629 #ifdef ASSERT
5630 if (UseTLAB && VerifyOops) {
5631 Label next, ok;
5632
5633 stp(rscratch2, rscratch1, Address(pre(sp, -16)));
5634
5635 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5636 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5637 cmp(rscratch2, rscratch1);
5638 br(Assembler::HS, next);
5639 STOP("assert(top >= start)");
5640 should_not_reach_here();
5641
5642 bind(next);
5643 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5644 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5645 cmp(rscratch2, rscratch1);
5646 br(Assembler::HS, ok);
5647 STOP("assert(top <= end)");
5648 should_not_reach_here();
5649
5650 bind(ok);
5651 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5652 }
5653 #endif
5654 }
5655
5656 // Writes to stack successive pages until offset reached to check for
5657 // stack overflow + shadow pages. This clobbers tmp.
5658 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5659 assert_different_registers(tmp, size, rscratch1);
5660 mov(tmp, sp);
5661 // Bang stack for total size given plus shadow page size.
5662 // Bang one page at a time because large size can bang beyond yellow and
5663 // red zones.
5664 Label loop;
5665 mov(rscratch1, (int)os::vm_page_size());
5666 bind(loop);
5667 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5668 subsw(size, size, rscratch1);
5669 str(size, Address(tmp));
5670 br(Assembler::GT, loop);
5671
5672 // Bang down shadow pages too.
5673 // At this point, (tmp-0) is the last address touched, so don't
5674 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5675 // was post-decremented.) Skip this address by starting at i=1, and
5742
5743 // Strictly speaking the card table base isn't an address at all, and it might
5744 // even be negative. It is thus materialised as a constant.
5745 mov(reg, (uint64_t)ctbs->card_table_base_const());
5746 }
5747
5748 void MacroAssembler::load_aotrc_address(Register reg, address a) {
5749 #if INCLUDE_CDS
5750 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
5751 if (AOTCodeCache::is_on_for_dump()) {
5752 // all aotrc field addresses should be registered in the AOTCodeCache address table
5753 lea(reg, ExternalAddress(a));
5754 } else {
5755 mov(reg, (uint64_t)a);
5756 }
5757 #else
5758 ShouldNotReachHere();
5759 #endif
5760 }
5761
5762 void MacroAssembler::build_frame(int framesize) {
5763 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5764 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5765 protect_return_address();
5766 if (framesize < ((1 << 9) + 2 * wordSize)) {
5767 sub(sp, sp, framesize);
5768 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5769 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5770 } else {
5771 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5772 if (PreserveFramePointer) mov(rfp, sp);
5773 if (framesize < ((1 << 12) + 2 * wordSize))
5774 sub(sp, sp, framesize - 2 * wordSize);
5775 else {
5776 mov(rscratch1, framesize - 2 * wordSize);
5777 sub(sp, sp, rscratch1);
5778 }
5779 }
5780 verify_cross_modify_fence_not_required();
5781 }
5782
5783 void MacroAssembler::remove_frame(int framesize) {
5784 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5785 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5786 if (framesize < ((1 << 9) + 2 * wordSize)) {
5787 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5788 add(sp, sp, framesize);
5789 } else {
5790 if (framesize < ((1 << 12) + 2 * wordSize))
5791 add(sp, sp, framesize - 2 * wordSize);
5792 else {
5793 mov(rscratch1, framesize - 2 * wordSize);
5794 add(sp, sp, rscratch1);
5795 }
5796 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5797 }
5798 authenticate_return_address();
5799 }
5800
5801
5802 // This method counts leading positive bytes (highest bit not set) in provided byte array
5803 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
5804 // Simple and most common case of aligned small array which is not at the
5805 // end of memory page is placed here. All other cases are in stub.
5806 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
5807 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
5808 assert_different_registers(ary1, len, result);
5809
5810 mov(result, len);
5811 cmpw(len, 0);
5812 br(LE, DONE);
5813 cmpw(len, 4 * wordSize);
5814 br(GE, STUB_LONG); // size > 32 then go to stub
5815
5816 int shift = 64 - exact_log2(os::vm_page_size());
5817 lsl(rscratch1, ary1, shift);
5818 mov(rscratch2, (size_t)(4 * wordSize) << shift);
5819 adds(rscratch2, rscratch1, rscratch2); // At end of page?
5820 br(CS, STUB); // at the end of page then go to stub
6703 // On other systems, the helper is a usual C function.
6704 //
6705 void MacroAssembler::get_thread(Register dst) {
6706 RegSet saved_regs =
6707 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
6708 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
6709
6710 protect_return_address();
6711 push(saved_regs, sp);
6712
6713 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6714 blr(lr);
6715 if (dst != c_rarg0) {
6716 mov(dst, c_rarg0);
6717 }
6718
6719 pop(saved_regs, sp);
6720 authenticate_return_address();
6721 }
6722
6723 void MacroAssembler::cache_wb(Address line) {
6724 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
6725 assert(line.index() == noreg, "index should be noreg");
6726 assert(line.offset() == 0, "offset should be 0");
6727 // would like to assert this
6728 // assert(line._ext.shift == 0, "shift should be zero");
6729 if (VM_Version::supports_dcpop()) {
6730 // writeback using clear virtual address to point of persistence
6731 dc(Assembler::CVAP, line.base());
6732 } else {
6733 // no need to generate anything as Unsafe.writebackMemory should
6734 // never invoke this stub
6735 }
6736 }
6737
6738 void MacroAssembler::cache_wbsync(bool is_pre) {
6739 // we only need a barrier post sync
6740 if (!is_pre) {
6741 membar(Assembler::AnyAny);
6742 }
7138 }
7139
7140 // Check if the lock-stack is full.
7141 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7142 cmpw(top, (unsigned)LockStack::end_offset());
7143 br(Assembler::GE, slow);
7144
7145 // Check for recursion.
7146 subw(t, top, oopSize);
7147 ldr(t, Address(rthread, t));
7148 cmp(obj, t);
7149 br(Assembler::EQ, push);
7150
7151 // Check header for monitor (0b10).
7152 tst(mark, markWord::monitor_value);
7153 br(Assembler::NE, slow);
7154
7155 // Try to lock. Transition lock bits 0b01 => 0b00
7156 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7157 orr(mark, mark, markWord::unlocked_value);
7158 eor(t, mark, markWord::unlocked_value);
7159 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7160 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7161 br(Assembler::NE, slow);
7162
7163 bind(push);
7164 // After successful lock, push object on lock-stack.
7165 str(obj, Address(rthread, top));
7166 addw(top, top, oopSize);
7167 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7168 }
7169
7170 // Implements fast-unlocking.
7171 //
7172 // - obj: the object to be unlocked
7173 // - t1, t2, t3: temporary registers
7174 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7175 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7176 // cmpxchg clobbers rscratch1.
7177 assert_different_registers(obj, t1, t2, t3, rscratch1);
|
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "ci/ciInlineKlass.hpp"
30 #include "code/compiledIC.hpp"
31 #include "compiler/compileTask.hpp"
32 #include "compiler/disassembler.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "gc/shared/cardTableBarrierSet.hpp"
37 #include "gc/shared/cardTable.hpp"
38 #include "gc/shared/collectedHeap.hpp"
39 #include "gc/shared/tlab_globals.hpp"
40 #include "interpreter/bytecodeHistogram.hpp"
41 #include "interpreter/interpreter.hpp"
42 #include "interpreter/interpreterRuntime.hpp"
43 #include "jvm.h"
44 #include "memory/resourceArea.hpp"
45 #include "memory/universe.hpp"
46 #include "nativeInst_aarch64.hpp"
47 #include "oops/accessDecorators.hpp"
48 #include "oops/compressedKlass.inline.hpp"
49 #include "oops/compressedOops.inline.hpp"
50 #include "oops/klass.inline.hpp"
51 #include "oops/resolvedFieldEntry.hpp"
52 #include "runtime/arguments.hpp"
53 #include "runtime/continuation.hpp"
54 #include "runtime/globals.hpp"
55 #include "runtime/icache.hpp"
56 #include "runtime/interfaceSupport.inline.hpp"
57 #include "runtime/javaThread.hpp"
58 #include "runtime/jniHandles.inline.hpp"
59 #include "runtime/sharedRuntime.hpp"
60 #include "runtime/signature_cc.hpp"
61 #include "runtime/stubRoutines.hpp"
62 #include "utilities/globalDefinitions.hpp"
63 #include "utilities/powerOfTwo.hpp"
64 #include "vmreg_aarch64.inline.hpp"
65 #ifdef COMPILER1
66 #include "c1/c1_LIRAssembler.hpp"
67 #endif
68 #ifdef COMPILER2
69 #include "oops/oop.hpp"
70 #include "opto/compile.hpp"
71 #include "opto/node.hpp"
72 #include "opto/output.hpp"
73 #endif
74
75 #include <sys/types.h>
76
77 #ifdef PRODUCT
78 #define BLOCK_COMMENT(str) /* nothing */
79 #else
80 #define BLOCK_COMMENT(str) block_comment(str)
81 #endif
82 #define STOP(str) stop(str);
83 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
84
2011 ldarb(scratch, scratch);
2012 cmp(scratch, InstanceKlass::fully_initialized);
2013 br(Assembler::EQ, *L_fast_path);
2014
2015 // Fast path check: current thread is initializer thread
2016 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2017 cmp(rthread, scratch);
2018
2019 if (L_slow_path == &L_fallthrough) {
2020 br(Assembler::EQ, *L_fast_path);
2021 bind(*L_slow_path);
2022 } else if (L_fast_path == &L_fallthrough) {
2023 br(Assembler::NE, *L_slow_path);
2024 bind(*L_fast_path);
2025 } else {
2026 Unimplemented();
2027 }
2028 }
2029
2030 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2031 if (!VerifyOops || VerifyAdapterSharing) {
2032 // Below address of the code string confuses VerifyAdapterSharing
2033 // because it may differ between otherwise equivalent adapters.
2034 return;
2035 }
2036
2037 // Pass register number to verify_oop_subroutine
2038 const char* b = nullptr;
2039 {
2040 ResourceMark rm;
2041 stringStream ss;
2042 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2043 b = code_string(ss.as_string());
2044 }
2045 BLOCK_COMMENT("verify_oop {");
2046
2047 strip_return_address(); // This might happen within a stack frame.
2048 protect_return_address();
2049 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2050 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2051
2052 mov(r0, reg);
2053 movptr(rscratch1, (uintptr_t)(address)b);
2054
2055 // call indirectly to solve generation ordering problem
2056 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2057 ldr(rscratch2, Address(rscratch2));
2058 blr(rscratch2);
2059
2060 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2061 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2062 authenticate_return_address();
2063
2064 BLOCK_COMMENT("} verify_oop");
2065 }
2066
2067 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2068 if (!VerifyOops || VerifyAdapterSharing) {
2069 // Below address of the code string confuses VerifyAdapterSharing
2070 // because it may differ between otherwise equivalent adapters.
2071 return;
2072 }
2073
2074 const char* b = nullptr;
2075 {
2076 ResourceMark rm;
2077 stringStream ss;
2078 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2079 b = code_string(ss.as_string());
2080 }
2081 BLOCK_COMMENT("verify_oop_addr {");
2082
2083 strip_return_address(); // This might happen within a stack frame.
2084 protect_return_address();
2085 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2086 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2087
2088 // addr may contain sp so we will have to adjust it based on the
2089 // pushes that we just did.
2090 if (addr.uses(sp)) {
2091 lea(r0, addr);
2092 ldr(r0, Address(r0, 4 * wordSize));
2305 call_VM_leaf_base(entry_point, 1);
2306 }
2307
2308 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2309 assert_different_registers(arg_1, c_rarg0);
2310 pass_arg0(this, arg_0);
2311 pass_arg1(this, arg_1);
2312 call_VM_leaf_base(entry_point, 2);
2313 }
2314
2315 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2316 Register arg_1, Register arg_2) {
2317 assert_different_registers(arg_1, c_rarg0);
2318 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2319 pass_arg0(this, arg_0);
2320 pass_arg1(this, arg_1);
2321 pass_arg2(this, arg_2);
2322 call_VM_leaf_base(entry_point, 3);
2323 }
2324
2325 void MacroAssembler::super_call_VM_leaf(address entry_point) {
2326 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2327 }
2328
2329 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2330 pass_arg0(this, arg_0);
2331 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2332 }
2333
2334 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2335
2336 assert_different_registers(arg_0, c_rarg1);
2337 pass_arg1(this, arg_1);
2338 pass_arg0(this, arg_0);
2339 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2340 }
2341
2342 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2343 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2344 assert_different_registers(arg_1, c_rarg2);
2345 pass_arg2(this, arg_2);
2346 pass_arg1(this, arg_1);
2347 pass_arg0(this, arg_0);
2348 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2354 assert_different_registers(arg_2, c_rarg3);
2355 pass_arg3(this, arg_3);
2356 pass_arg2(this, arg_2);
2357 pass_arg1(this, arg_1);
2358 pass_arg0(this, arg_0);
2359 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2360 }
2361
2362 void MacroAssembler::null_check(Register reg, int offset) {
2363 if (needs_explicit_null_check(offset)) {
2364 // provoke OS null exception if reg is null by
2365 // accessing M[reg] w/o changing any registers
2366 // NOTE: this is plenty to provoke a segv
2367 ldr(zr, Address(reg));
2368 } else {
2369 // nothing to do, (later) access of M[reg + offset]
2370 // will provoke OS null exception if reg is null
2371 }
2372 }
2373
2374 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2375 assert_different_registers(markword, rscratch2);
2376 mov(rscratch2, markWord::inline_type_pattern_mask);
2377 andr(markword, markword, rscratch2);
2378 mov(rscratch2, markWord::inline_type_pattern);
2379 cmp(markword, rscratch2);
2380 br(Assembler::EQ, is_inline_type);
2381 }
2382
2383 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2384 assert_different_registers(tmp, rscratch1);
2385 if (can_be_null) {
2386 cbz(object, not_inline_type);
2387 }
2388 const int is_inline_type_mask = markWord::inline_type_pattern;
2389 ldr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2390 mov(rscratch1, is_inline_type_mask);
2391 andr(tmp, tmp, rscratch1);
2392 cmp(tmp, rscratch1);
2393 br(Assembler::NE, not_inline_type);
2394 }
2395
2396 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2397 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2398 tbnz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, is_null_free_inline_type);
2399 }
2400
2401 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2402 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2403 tbz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, not_null_free_inline_type);
2404 }
2405
2406 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2407 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2408 tbnz(flags, ResolvedFieldEntry::is_flat_shift, is_flat);
2409 }
2410
2411 void MacroAssembler::test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker) {
2412 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2413 tbnz(flags, ResolvedFieldEntry::has_null_marker_shift, has_null_marker);
2414 }
2415
2416 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2417 Label test_mark_word;
2418 // load mark word
2419 ldr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2420 // check displaced
2421 tst(temp_reg, markWord::unlocked_value);
2422 br(Assembler::NE, test_mark_word);
2423 // slow path use klass prototype
2424 load_prototype_header(temp_reg, oop);
2425
2426 bind(test_mark_word);
2427 andr(temp_reg, temp_reg, test_bit);
2428 if (jmp_set) {
2429 cbnz(temp_reg, jmp_label);
2430 } else {
2431 cbz(temp_reg, jmp_label);
2432 }
2433 }
2434
2435 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array) {
2436 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2437 }
2438
2439 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2440 Label&is_non_flat_array) {
2441 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2442 }
2443
2444 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array) {
2445 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2446 }
2447
2448 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2449 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2450 }
2451
2452 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2453 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2454 br(Assembler::NE, is_flat_array);
2455 }
2456
2457 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
2458 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2459 br(Assembler::EQ, is_non_flat_array);
2460 }
2461
2462 // MacroAssembler protected routines needed to implement
2463 // public methods
2464
2465 void MacroAssembler::mov(Register r, Address dest) {
2466 code_section()->relocate(pc(), dest.rspec());
2467 uint64_t imm64 = (uint64_t)dest.target();
2468 movptr(r, imm64);
2469 }
2470
2471 // Move a constant pointer into r. In AArch64 mode the virtual
2472 // address space is 48 bits in size, so we only need three
2473 // instructions to create a patchable instruction sequence that can
2474 // reach anywhere.
2475 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2476 #ifndef PRODUCT
2477 {
2478 char buffer[64];
2479 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2480 block_comment(buffer);
2481 }
5140 adrp(rscratch1, src2, offset);
5141 ldr(rscratch1, Address(rscratch1, offset));
5142 cmp(src1, rscratch1);
5143 }
5144
5145 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5146 cmp(obj1, obj2);
5147 }
5148
5149 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5150 load_method_holder(rresult, rmethod);
5151 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5152 }
5153
5154 void MacroAssembler::load_method_holder(Register holder, Register method) {
5155 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5156 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5157 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5158 }
5159
5160 void MacroAssembler::load_metadata(Register dst, Register src) {
5161 if (UseCompactObjectHeaders) {
5162 load_narrow_klass_compact(dst, src);
5163 } else {
5164 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5165 }
5166 }
5167
5168 // Loads the obj's Klass* into dst.
5169 // Preserves all registers (incl src, rscratch1 and rscratch2).
5170 // Input:
5171 // src - the oop we want to load the klass from.
5172 // dst - output narrow klass.
5173 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5174 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5175 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5176 lsr(dst, dst, markWord::klass_shift);
5177 }
5178
5179 void MacroAssembler::load_klass(Register dst, Register src) {
5180 if (UseCompactObjectHeaders) {
5181 load_narrow_klass_compact(dst, src);
5182 } else {
5183 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5184 }
5185 decode_klass_not_null(dst);
5186 }
5187
5239 } else {
5240 ldrw(tmp, Address(obj, oopDesc::klass_offset_in_bytes()));
5241 }
5242 if (CompressedKlassPointers::base() == nullptr) {
5243 cmp(klass, tmp, LSL, CompressedKlassPointers::shift());
5244 return;
5245 } else if (!AOTCodeCache::is_on_for_dump() &&
5246 ((uint64_t)CompressedKlassPointers::base() & 0xffffffff) == 0
5247 && CompressedKlassPointers::shift() == 0) {
5248 // Only the bottom 32 bits matter
5249 cmpw(klass, tmp);
5250 return;
5251 }
5252 decode_klass_not_null(tmp);
5253 cmp(klass, tmp);
5254 }
5255
5256 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5257 if (UseCompactObjectHeaders) {
5258 load_narrow_klass_compact(tmp1, obj1);
5259 load_narrow_klass_compact(tmp2, obj2);
5260 } else {
5261 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5262 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5263 }
5264 cmpw(tmp1, tmp2);
5265 }
5266
5267 void MacroAssembler::load_prototype_header(Register dst, Register src) {
5268 load_klass(dst, src);
5269 ldr(dst, Address(dst, Klass::prototype_header_offset()));
5270 }
5271
5272 void MacroAssembler::store_klass(Register dst, Register src) {
5273 // FIXME: Should this be a store release? concurrent gcs assumes
5274 // klass length is valid if klass field is not null.
5275 assert(!UseCompactObjectHeaders, "not with compact headers");
5276 encode_klass_not_null(src);
5277 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5278 }
5279
5280 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5281 assert(!UseCompactObjectHeaders, "not with compact headers");
5282 // Store to klass gap in destination
5283 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5284 }
5285
5286 // Algorithm must match CompressedOops::encode.
5287 void MacroAssembler::encode_heap_oop(Register d, Register s) {
5288 #ifdef ASSERT
5289 verify_heapbase("MacroAssembler::encode_heap_oop: heap base corrupted?");
5290 #endif
5291 verify_oop_msg(s, "broken oop in encode_heap_oop");
5641 if (as_raw) {
5642 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5643 } else {
5644 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5645 }
5646 }
5647
5648 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5649 Address dst, Register val,
5650 Register tmp1, Register tmp2, Register tmp3) {
5651 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5652 decorators = AccessInternal::decorator_fixup(decorators, type);
5653 bool as_raw = (decorators & AS_RAW) != 0;
5654 if (as_raw) {
5655 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5656 } else {
5657 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5658 }
5659 }
5660
5661 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5662 Register inline_layout_info) {
5663 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5664 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5665 }
5666
5667 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5668 ldr(offset, Address(inline_klass, InlineKlass::adr_members_offset()));
5669 ldrw(offset, Address(offset, InlineKlass::payload_offset_offset()));
5670 }
5671
5672 void MacroAssembler::payload_address(Register oop, Register data, Register inline_klass) {
5673 // ((address) (void*) o) + vk->payload_offset();
5674 Register offset = (data == oop) ? rscratch1 : data;
5675 payload_offset(inline_klass, offset);
5676 if (data == oop) {
5677 add(data, data, offset);
5678 } else {
5679 lea(data, Address(oop, offset));
5680 }
5681 }
5682
5683 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
5684 Register index, Register data) {
5685 assert_different_registers(array, array_klass, index);
5686 assert_different_registers(rscratch1, array, index);
5687
5688 // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
5689 ldrw(rscratch1, Address(array_klass, Klass::layout_helper_offset()));
5690
5691 // Klass::layout_helper_log2_element_size(lh)
5692 // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
5693 lsr(rscratch1, rscratch1, Klass::_lh_log2_element_size_shift);
5694 andr(rscratch1, rscratch1, Klass::_lh_log2_element_size_mask);
5695 lslv(index, index, rscratch1);
5696
5697 add(data, array, index);
5698 add(data, data, arrayOopDesc::base_offset_in_bytes(T_FLAT_ELEMENT));
5699 }
5700
5701 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5702 Register tmp2, DecoratorSet decorators) {
5703 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5704 }
5705
5706 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5707 Register tmp2, DecoratorSet decorators) {
5708 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5709 }
5710
5711 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5712 Register tmp2, Register tmp3, DecoratorSet decorators) {
5713 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5714 }
5715
5716 // Used for storing nulls.
5717 void MacroAssembler::store_heap_oop_null(Address dst) {
5718 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5719 }
5720
5756 oop_index = oop_recorder()->allocate_metadata_index(obj);
5757 } else {
5758 oop_index = oop_recorder()->find_index(obj);
5759 }
5760 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5761 mov(dst, Address((address)obj, rspec));
5762 }
5763
5764 Address MacroAssembler::constant_oop_address(jobject obj) {
5765 #ifdef ASSERT
5766 {
5767 ThreadInVMfromUnknown tiv;
5768 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5769 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5770 }
5771 #endif
5772 int oop_index = oop_recorder()->find_index(obj);
5773 return Address((address)obj, oop_Relocation::spec(oop_index));
5774 }
5775
5776 // Object / value buffer allocation...
5777 void MacroAssembler::allocate_instance(Register klass, Register new_obj,
5778 Register t1, Register t2,
5779 bool clear_fields, Label& alloc_failed)
5780 {
5781 Label done, initialize_header, initialize_object, slow_case, slow_case_no_pop;
5782 Register layout_size = t1;
5783 assert(new_obj == r0, "needs to be r0");
5784 assert_different_registers(klass, new_obj, t1, t2);
5785
5786 // get instance_size in InstanceKlass (scaled to a count of bytes)
5787 ldrw(layout_size, Address(klass, Klass::layout_helper_offset()));
5788 // test to see if it is malformed in some way
5789 tst(layout_size, Klass::_lh_instance_slow_path_bit);
5790 br(Assembler::NE, slow_case_no_pop);
5791
5792 // Allocate the instance:
5793 // If TLAB is enabled:
5794 // Try to allocate in the TLAB.
5795 // If fails, go to the slow path.
5796 // Initialize the allocation.
5797 // Exit.
5798 //
5799 // Go to slow path.
5800
5801 if (UseTLAB) {
5802 push(klass);
5803 tlab_allocate(new_obj, layout_size, 0, klass, t2, slow_case);
5804 if (ZeroTLAB || (!clear_fields)) {
5805 // the fields have been already cleared
5806 b(initialize_header);
5807 } else {
5808 // initialize both the header and fields
5809 b(initialize_object);
5810 }
5811
5812 if (clear_fields) {
5813 // The object is initialized before the header. If the object size is
5814 // zero, go directly to the header initialization.
5815 bind(initialize_object);
5816 int header_size = oopDesc::header_size() * HeapWordSize;
5817 assert(is_aligned(header_size, BytesPerLong), "oop header size must be 8-byte-aligned");
5818 subs(layout_size, layout_size, header_size);
5819 br(Assembler::EQ, initialize_header);
5820
5821 // Initialize topmost object field, divide size by 8, check if odd and
5822 // test if zero.
5823
5824 #ifdef ASSERT
5825 // make sure instance_size was multiple of 8
5826 Label L;
5827 tst(layout_size, 7);
5828 br(Assembler::EQ, L);
5829 stop("object size is not multiple of 8 - adjust this code");
5830 bind(L);
5831 // must be > 0, no extra check needed here
5832 #endif
5833
5834 lsr(layout_size, layout_size, LogBytesPerLong);
5835
5836 // initialize remaining object fields: instance_size was a multiple of 8
5837 {
5838 Label loop;
5839 Register base = t2;
5840
5841 bind(loop);
5842 add(rscratch1, new_obj, layout_size, Assembler::LSL, LogBytesPerLong);
5843 str(zr, Address(rscratch1, header_size - 1*oopSize));
5844 subs(layout_size, layout_size, 1);
5845 br(Assembler::NE, loop);
5846 }
5847 } // clear_fields
5848
5849 // initialize object header only.
5850 bind(initialize_header);
5851 pop(klass);
5852 Register mark_word = t2;
5853 if (UseCompactObjectHeaders || Arguments::is_valhalla_enabled()) {
5854 ldr(mark_word, Address(klass, Klass::prototype_header_offset()));
5855 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5856 } else {
5857 mov(mark_word, (intptr_t)markWord::prototype().value());
5858 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5859 }
5860 if (!UseCompactObjectHeaders) {
5861 store_klass_gap(new_obj, zr); // zero klass gap for compressed oops
5862 mov(t2, klass); // preserve klass
5863 store_klass(new_obj, t2); // src klass reg is potentially compressed
5864 }
5865 b(done);
5866 }
5867
5868 if (UseTLAB) {
5869 bind(slow_case);
5870 pop(klass);
5871 }
5872 bind(slow_case_no_pop);
5873 b(alloc_failed);
5874
5875 bind(done);
5876 }
5877
5878 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5879 void MacroAssembler::tlab_allocate(Register obj,
5880 Register var_size_in_bytes,
5881 int con_size_in_bytes,
5882 Register t1,
5883 Register t2,
5884 Label& slow_case) {
5885 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5886 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5887 }
5888
5889 void MacroAssembler::verify_tlab() {
5890 #ifdef ASSERT
5891 if (UseTLAB && VerifyOops) {
5892 Label next, ok;
5893
5894 stp(rscratch2, rscratch1, Address(pre(sp, -16)));
5895
5896 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5897 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5898 cmp(rscratch2, rscratch1);
5899 br(Assembler::HS, next);
5900 STOP("assert(top >= start)");
5901 should_not_reach_here();
5902
5903 bind(next);
5904 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5905 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5906 cmp(rscratch2, rscratch1);
5907 br(Assembler::HS, ok);
5908 STOP("assert(top <= end)");
5909 should_not_reach_here();
5910
5911 bind(ok);
5912 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5913 }
5914 #endif
5915 }
5916
5917 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
5918 assert_different_registers(holder_klass, index, layout_info);
5919 InlineLayoutInfo array[2];
5920 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
5921 if (is_power_of_2(size)) {
5922 lsl(index, index, log2i_exact(size)); // Scale index by power of 2
5923 } else {
5924 mov(layout_info, size);
5925 mul(index, index, layout_info); // Scale the index to be the entry index * array_element_size
5926 }
5927 ldr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
5928 add(layout_info, layout_info, Array<InlineLayoutInfo>::base_offset_in_bytes());
5929 lea(layout_info, Address(layout_info, index));
5930 }
5931
5932 // Writes to stack successive pages until offset reached to check for
5933 // stack overflow + shadow pages. This clobbers tmp.
5934 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5935 assert_different_registers(tmp, size, rscratch1);
5936 mov(tmp, sp);
5937 // Bang stack for total size given plus shadow page size.
5938 // Bang one page at a time because large size can bang beyond yellow and
5939 // red zones.
5940 Label loop;
5941 mov(rscratch1, (int)os::vm_page_size());
5942 bind(loop);
5943 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5944 subsw(size, size, rscratch1);
5945 str(size, Address(tmp));
5946 br(Assembler::GT, loop);
5947
5948 // Bang down shadow pages too.
5949 // At this point, (tmp-0) is the last address touched, so don't
5950 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5951 // was post-decremented.) Skip this address by starting at i=1, and
6018
6019 // Strictly speaking the card table base isn't an address at all, and it might
6020 // even be negative. It is thus materialised as a constant.
6021 mov(reg, (uint64_t)ctbs->card_table_base_const());
6022 }
6023
6024 void MacroAssembler::load_aotrc_address(Register reg, address a) {
6025 #if INCLUDE_CDS
6026 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
6027 if (AOTCodeCache::is_on_for_dump()) {
6028 // all aotrc field addresses should be registered in the AOTCodeCache address table
6029 lea(reg, ExternalAddress(a));
6030 } else {
6031 mov(reg, (uint64_t)a);
6032 }
6033 #else
6034 ShouldNotReachHere();
6035 #endif
6036 }
6037
6038 #ifdef ASSERT
6039 void MacroAssembler::build_frame(int framesize) {
6040 build_frame(framesize, false);
6041 }
6042 #endif
6043
6044 void MacroAssembler::build_frame(int framesize DEBUG_ONLY(COMMA bool zap_rfp_lr_spills)) {
6045 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
6046 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
6047 protect_return_address();
6048 if (framesize < ((1 << 9) + 2 * wordSize)) {
6049 sub(sp, sp, framesize);
6050 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
6051 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
6052 stp(rscratch1, rscratch1, Address(sp, framesize - 2 * wordSize));
6053 } else {
6054 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
6055 }
6056 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
6057 } else {
6058 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
6059 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
6060 stp(rscratch1, rscratch1, Address(pre(sp, -2 * wordSize)));
6061 } else {
6062 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
6063 }
6064 if (PreserveFramePointer) mov(rfp, sp);
6065 if (framesize < ((1 << 12) + 2 * wordSize))
6066 sub(sp, sp, framesize - 2 * wordSize);
6067 else {
6068 mov(rscratch1, framesize - 2 * wordSize);
6069 sub(sp, sp, rscratch1);
6070 }
6071 }
6072 verify_cross_modify_fence_not_required();
6073 }
6074
6075 void MacroAssembler::remove_frame(int framesize) {
6076 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
6077 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
6078 if (framesize < ((1 << 9) + 2 * wordSize)) {
6079 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
6080 add(sp, sp, framesize);
6081 } else {
6082 if (framesize < ((1 << 12) + 2 * wordSize))
6083 add(sp, sp, framesize - 2 * wordSize);
6084 else {
6085 mov(rscratch1, framesize - 2 * wordSize);
6086 add(sp, sp, rscratch1);
6087 }
6088 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6089 }
6090 authenticate_return_address();
6091 }
6092
6093 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6094 if (needs_stack_repair) {
6095 // The method has a scalarized entry point (where fields of value object arguments
6096 // are passed through registers and stack), and a non-scalarized entry point (where
6097 // value object arguments are given as oops). The non-scalarized entry point will
6098 // first load each field of value object arguments and store them in registers and on
6099 // the stack in a way compatible with the scalarized entry point. To do so, some extra
6100 // stack space might be reserved (if argument registers are not enough). On leaving the
6101 // method, this space must be freed.
6102 //
6103 // In case we used the non-scalarized entry point the stack looks like this:
6104 //
6105 // | Arguments from caller |
6106 // |---------------------------| <-- caller's SP
6107 // | Saved LR #1 |
6108 // | Saved FP #1 |
6109 // |---------------------------|
6110 // | Extension space for |
6111 // | inline arg (un)packing |
6112 // |---------------------------| <-- start of this method's frame
6113 // | Saved LR #2 |
6114 // | Saved FP #2 |
6115 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6116 // | sp_inc |
6117 // | method locals |
6118 // |---------------------------| <-- SP
6119 //
6120 // There are two copies of FP and LR on the stack. They will be identical at
6121 // first, but that can change.
6122 // If the caller has been deoptimized, LR #1 will be patched to point at the
6123 // deopt blob, and LR #2 will still point into the old method.
6124 // If the saved FP (x29) was not used as the frame pointer, but to store an
6125 // oop, the GC will be aware only of FP #1 as the spilled location of x29 and
6126 // will fix only this one. Overall, FP/LR #2 are not reliable and are simply
6127 // needed to add space between the extension space and the locals, as there
6128 // would be between the real arguments and the locals if we don't need to
6129 // do unpacking (from the scalarized entry point).
6130 //
6131 // When restoring, one must then load FP #1 into x29, and LR #1 into x30,
6132 // while keeping in mind that from the scalarized entry point, there will be
6133 // only one copy of each. Indeed, in the case we used the scalarized calling
6134 // convention, the stack looks like this:
6135 //
6136 // | Arguments from caller |
6137 // |---------------------------| <-- caller's SP / start of this method's frame
6138 // | Saved LR |
6139 // | Saved FP |
6140 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6141 // | sp_inc |
6142 // | method locals |
6143 // |---------------------------| <-- SP
6144 //
6145 // The sp_inc stack slot holds the total size of the frame including the
6146 // extension space minus two words for the saved FP and LR. That is how to
6147 // find FP/LR #1. This size is expressed in bytes. Be careful when using it
6148 // from C++ in pointer arithmetic; you might need to divide it by wordSize.
6149 //
6150 // One can find sp_inc since the start the method's frame is SP + initial_framesize.
6151
6152 int sp_inc_offset = initial_framesize - 3 * wordSize; // Immediately below saved LR and FP
6153
6154 ldr(rscratch1, Address(sp, sp_inc_offset));
6155 add(sp, sp, rscratch1);
6156 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6157 } else {
6158 remove_frame(initial_framesize);
6159 }
6160 }
6161
6162 void MacroAssembler::save_stack_increment(int sp_inc, int frame_size) {
6163 int real_frame_size = frame_size + sp_inc;
6164 assert(sp_inc == 0 || sp_inc > 2*wordSize, "invalid sp_inc value");
6165 assert(real_frame_size >= 2*wordSize, "frame size must include FP/LR space");
6166 assert((real_frame_size & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6167
6168 int sp_inc_offset = frame_size - 3 * wordSize; // Immediately below saved LR and FP
6169
6170 // Subtract two words for the saved FP and LR as these will be popped
6171 // separately. See remove_frame above.
6172 mov(rscratch1, real_frame_size - 2*wordSize);
6173 str(rscratch1, Address(sp, sp_inc_offset));
6174 }
6175
6176 // This method counts leading positive bytes (highest bit not set) in provided byte array
6177 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
6178 // Simple and most common case of aligned small array which is not at the
6179 // end of memory page is placed here. All other cases are in stub.
6180 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
6181 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
6182 assert_different_registers(ary1, len, result);
6183
6184 mov(result, len);
6185 cmpw(len, 0);
6186 br(LE, DONE);
6187 cmpw(len, 4 * wordSize);
6188 br(GE, STUB_LONG); // size > 32 then go to stub
6189
6190 int shift = 64 - exact_log2(os::vm_page_size());
6191 lsl(rscratch1, ary1, shift);
6192 mov(rscratch2, (size_t)(4 * wordSize) << shift);
6193 adds(rscratch2, rscratch1, rscratch2); // At end of page?
6194 br(CS, STUB); // at the end of page then go to stub
7077 // On other systems, the helper is a usual C function.
7078 //
7079 void MacroAssembler::get_thread(Register dst) {
7080 RegSet saved_regs =
7081 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
7082 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
7083
7084 protect_return_address();
7085 push(saved_regs, sp);
7086
7087 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
7088 blr(lr);
7089 if (dst != c_rarg0) {
7090 mov(dst, c_rarg0);
7091 }
7092
7093 pop(saved_regs, sp);
7094 authenticate_return_address();
7095 }
7096
7097 #ifdef COMPILER2
7098 // C2 compiled method's prolog code
7099 // Moved here from aarch64.ad to support Valhalla code below
7100 void MacroAssembler::verified_entry(Compile* C, int sp_inc) {
7101 if (C->clinit_barrier_on_entry()) {
7102 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
7103
7104 Label L_skip_barrier;
7105
7106 mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
7107 clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
7108 far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
7109 bind(L_skip_barrier);
7110 }
7111
7112 if (C->max_vector_size() > 0) {
7113 reinitialize_ptrue();
7114 }
7115
7116 int bangsize = C->output()->bang_size_in_bytes();
7117 if (C->output()->need_stack_bang(bangsize))
7118 generate_stack_overflow_check(bangsize);
7119
7120 // n.b. frame size includes space for return pc and rfp
7121 const long framesize = C->output()->frame_size_in_bytes();
7122 build_frame(framesize DEBUG_ONLY(COMMA sp_inc != 0));
7123
7124 if (C->needs_stack_repair()) {
7125 save_stack_increment(sp_inc, framesize);
7126 }
7127
7128 if (VerifyStackAtCalls) {
7129 Unimplemented();
7130 }
7131 }
7132 #endif // COMPILER2
7133
7134 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
7135 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
7136 // An inline type might be returned. If fields are in registers we
7137 // need to allocate an inline type instance and initialize it with
7138 // the value of the fields.
7139 Label skip;
7140 // We only need a new buffered inline type if a new one is not returned
7141 tbz(r0, 0, skip);
7142 int call_offset = -1;
7143
7144 // Be careful not to clobber r1-7 which hold returned fields
7145 // Also do not use callee-saved registers as these may be live in the interpreter
7146 Register tmp1 = r13, tmp2 = r14, klass = r15, r0_preserved = r12;
7147
7148 // The following code is similar to allocate_instance but has some slight differences,
7149 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
7150 // allocating is not necessary if vk != nullptr, etc. allocate_instance is not aware of these.
7151 Label slow_case;
7152 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
7153 mov(r0_preserved, r0); // save r0 for slow_case since *_allocate may corrupt it when allocation failed
7154
7155 if (vk != nullptr) {
7156 // Called from C1, where the return type is statically known.
7157 movptr(klass, (intptr_t)vk->get_InlineKlass());
7158 jint lh = vk->layout_helper();
7159 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
7160 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
7161 tlab_allocate(r0, noreg, lh, tmp1, tmp2, slow_case);
7162 } else {
7163 b(slow_case);
7164 }
7165 } else {
7166 // Call from interpreter. R0 contains ((the InlineKlass* of the return type) | 0x01)
7167 andr(klass, r0, -2);
7168 if (UseTLAB) {
7169 ldrw(tmp2, Address(klass, Klass::layout_helper_offset()));
7170 tst(tmp2, Klass::_lh_instance_slow_path_bit);
7171 br(Assembler::NE, slow_case);
7172 tlab_allocate(r0, tmp2, 0, tmp1, tmp2, slow_case);
7173 } else {
7174 b(slow_case);
7175 }
7176 }
7177 if (UseTLAB) {
7178 // 2. Initialize buffered inline instance header
7179 Register buffer_obj = r0;
7180 if (UseCompactObjectHeaders) {
7181 ldr(rscratch1, Address(klass, Klass::prototype_header_offset()));
7182 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7183 } else {
7184 mov(rscratch1, (intptr_t)markWord::inline_type_prototype().value());
7185 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7186 store_klass_gap(buffer_obj, zr);
7187 if (vk == nullptr) {
7188 // store_klass corrupts klass, so save it for later use (interpreter case only).
7189 mov(tmp1, klass);
7190 }
7191 store_klass(buffer_obj, klass);
7192 klass = tmp1;
7193 }
7194 // 3. Initialize its fields with an inline class specific handler
7195 if (vk != nullptr) {
7196 far_call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
7197 } else {
7198 ldr(tmp1, Address(klass, InlineKlass::adr_members_offset()));
7199 ldr(tmp1, Address(tmp1, InlineKlass::pack_handler_offset()));
7200 blr(tmp1);
7201 }
7202
7203 membar(Assembler::StoreStore);
7204 b(skip);
7205 } else {
7206 // Must have already branched to slow_case above.
7207 DEBUG_ONLY(should_not_reach_here());
7208 }
7209 bind(slow_case);
7210 // We failed to allocate a new inline type, fall back to a runtime
7211 // call. Some oop field may be live in some registers but we can't
7212 // tell. That runtime call will take care of preserving them
7213 // across a GC if there's one.
7214 mov(r0, r0_preserved);
7215
7216 if (from_interpreter) {
7217 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
7218 } else {
7219 far_call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
7220 call_offset = offset();
7221 }
7222 membar(Assembler::StoreStore);
7223
7224 bind(skip);
7225 return call_offset;
7226 }
7227
7228 // Move a value between registers/stack slots and update the reg_state
7229 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
7230 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
7231 if (reg_state[to->value()] == reg_written) {
7232 return true; // Already written
7233 }
7234
7235 if (from != to && bt != T_VOID) {
7236 if (reg_state[to->value()] == reg_readonly) {
7237 return false; // Not yet writable
7238 }
7239 if (from->is_reg()) {
7240 if (to->is_reg()) {
7241 if (from->is_Register() && to->is_Register()) {
7242 mov(to->as_Register(), from->as_Register());
7243 } else if (from->is_FloatRegister() && to->is_FloatRegister()) {
7244 fmovd(to->as_FloatRegister(), from->as_FloatRegister());
7245 } else {
7246 ShouldNotReachHere();
7247 }
7248 } else {
7249 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7250 Address to_addr = Address(sp, st_off);
7251 if (from->is_FloatRegister()) {
7252 if (bt == T_DOUBLE) {
7253 strd(from->as_FloatRegister(), to_addr);
7254 } else {
7255 assert(bt == T_FLOAT, "must be float");
7256 strs(from->as_FloatRegister(), to_addr);
7257 }
7258 } else {
7259 str(from->as_Register(), to_addr);
7260 }
7261 }
7262 } else {
7263 Address from_addr = Address(sp, from->reg2stack() * VMRegImpl::stack_slot_size);
7264 if (to->is_reg()) {
7265 if (to->is_FloatRegister()) {
7266 if (bt == T_DOUBLE) {
7267 ldrd(to->as_FloatRegister(), from_addr);
7268 } else {
7269 assert(bt == T_FLOAT, "must be float");
7270 ldrs(to->as_FloatRegister(), from_addr);
7271 }
7272 } else {
7273 ldr(to->as_Register(), from_addr);
7274 }
7275 } else {
7276 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7277 ldr(rscratch1, from_addr);
7278 str(rscratch1, Address(sp, st_off));
7279 }
7280 }
7281 }
7282
7283 // Update register states
7284 reg_state[from->value()] = reg_writable;
7285 reg_state[to->value()] = reg_written;
7286 return true;
7287 }
7288
7289 // Calculate the extra stack space required for packing or unpacking inline
7290 // args and adjust the stack pointer
7291 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
7292 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
7293 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
7294 assert(sp_inc > 0, "sanity");
7295
7296 // Save a copy of the FP and LR here for deoptimization patching and frame walking
7297 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
7298
7299 // Adjust the stack pointer. This will be repaired on return by MacroAssembler::remove_frame
7300 if (sp_inc < (1 << 9)) {
7301 sub(sp, sp, sp_inc); // Fits in an immediate
7302 } else {
7303 mov(rscratch1, sp_inc);
7304 sub(sp, sp, rscratch1);
7305 }
7306
7307 return sp_inc + 2 * wordSize; // Account for the FP/LR space
7308 }
7309
7310 // Read all fields from an inline type oop and store the values in registers/stack slots
7311 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
7312 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
7313 RegState reg_state[]) {
7314 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
7315 assert(from->is_valid(), "source must be valid");
7316 bool progress = false;
7317 #ifdef ASSERT
7318 const int start_offset = offset();
7319 #endif
7320
7321 Label L_null, L_notNull;
7322 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
7323 Register tmp1 = r10;
7324 Register tmp2 = r11;
7325
7326 #ifndef ASSERT
7327 RegSet clobbered_gp_regs = MacroAssembler::call_clobbered_gp_registers();
7328 assert(clobbered_gp_regs.contains(tmp1), "tmp1 must be saved explicitly if it's not a clobber");
7329 assert(clobbered_gp_regs.contains(tmp2), "tmp2 must be saved explicitly if it's not a clobber");
7330 assert(clobbered_gp_regs.contains(r14), "r14 must be saved explicitly if it's not a clobber");
7331 #endif
7332
7333 Register fromReg = noreg;
7334 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
7335 bool done = true;
7336 bool mark_done = true;
7337 VMReg toReg;
7338 BasicType bt;
7339 // Check if argument requires a null check
7340 bool null_check = false;
7341 VMReg nullCheckReg;
7342 while (stream.next(nullCheckReg, bt)) {
7343 if (sig->at(stream.sig_index())._offset == -1) {
7344 null_check = true;
7345 break;
7346 }
7347 }
7348 stream.reset(sig_index, to_index);
7349 while (stream.next(toReg, bt)) {
7350 assert(toReg->is_valid(), "destination must be valid");
7351 int idx = (int)toReg->value();
7352 if (reg_state[idx] == reg_readonly) {
7353 if (idx != from->value()) {
7354 mark_done = false;
7355 }
7356 done = false;
7357 continue;
7358 } else if (reg_state[idx] == reg_written) {
7359 continue;
7360 }
7361 assert(reg_state[idx] == reg_writable, "must be writable");
7362 reg_state[idx] = reg_written;
7363 progress = true;
7364
7365 if (fromReg == noreg) {
7366 if (from->is_reg()) {
7367 fromReg = from->as_Register();
7368 } else {
7369 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size;
7370 ldr(tmp1, Address(sp, st_off));
7371 fromReg = tmp1;
7372 }
7373 if (null_check) {
7374 // Nullable inline type argument, emit null check
7375 cbz(fromReg, L_null);
7376 }
7377 }
7378 int off = sig->at(stream.sig_index())._offset;
7379 if (off == -1) {
7380 assert(null_check, "Missing null check at");
7381 if (toReg->is_stack()) {
7382 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7383 mov(tmp2, 1);
7384 str(tmp2, Address(sp, st_off));
7385 } else {
7386 mov(toReg->as_Register(), 1);
7387 }
7388 continue;
7389 }
7390 if (sig->at(stream.sig_index())._vt_oop) {
7391 if (toReg->is_stack()) {
7392 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7393 str(fromReg, Address(sp, st_off));
7394 } else {
7395 mov(toReg->as_Register(), fromReg);
7396 }
7397 continue;
7398 }
7399 assert(off > 0, "offset in object should be positive");
7400 Address fromAddr = Address(fromReg, off);
7401 if (!toReg->is_FloatRegister()) {
7402 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
7403 if (is_reference_type(bt)) {
7404 load_heap_oop(dst, fromAddr, rscratch1, rscratch2);
7405 } else {
7406 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
7407 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
7408 }
7409 if (toReg->is_stack()) {
7410 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7411 str(dst, Address(sp, st_off));
7412 }
7413 } else if (bt == T_DOUBLE) {
7414 ldrd(toReg->as_FloatRegister(), fromAddr);
7415 } else {
7416 assert(bt == T_FLOAT, "must be float");
7417 ldrs(toReg->as_FloatRegister(), fromAddr);
7418 }
7419 }
7420 if (progress && null_check) {
7421 if (done) {
7422 b(L_notNull);
7423 bind(L_null);
7424 // Set null marker to zero to signal that the argument is null.
7425 // Also set all fields to zero since the runtime requires a canonical
7426 // representation of a flat null.
7427 stream.reset(sig_index, to_index);
7428 while (stream.next(toReg, bt)) {
7429 if (toReg->is_stack()) {
7430 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7431 str(zr, Address(sp, st_off));
7432 } else if (toReg->is_FloatRegister()) {
7433 mov(toReg->as_FloatRegister(), T2S, 0);
7434 } else {
7435 mov(toReg->as_Register(), zr);
7436 }
7437 }
7438 bind(L_notNull);
7439 } else {
7440 bind(L_null);
7441 }
7442 }
7443
7444 sig_index = stream.sig_index();
7445 to_index = stream.regs_index();
7446
7447 if (mark_done && reg_state[from->value()] != reg_written) {
7448 // This is okay because no one else will write to that slot
7449 reg_state[from->value()] = reg_writable;
7450 }
7451 from_index--;
7452 assert(progress || (start_offset == offset()), "should not emit code");
7453 return done;
7454 }
7455
7456 // Pack fields back into an inline type oop
7457 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
7458 VMRegPair* from, int from_count, int& from_index, VMReg to,
7459 RegState reg_state[], Register val_array) {
7460 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
7461 assert(to->is_valid(), "destination must be valid");
7462
7463 if (reg_state[to->value()] == reg_written) {
7464 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7465 return true; // Already written
7466 }
7467
7468 // The GC barrier expanded by store_heap_oop below may call into the
7469 // runtime so use callee-saved registers for any values that need to be
7470 // preserved. The GC barrier assembler should take care of saving the
7471 // Java argument registers.
7472 // TODO 8284443 Isn't it an issue if below code uses r14 as tmp when it contains a spilled value?
7473 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
7474 Register val_obj_tmp = r21;
7475 Register from_reg_tmp = r22;
7476 Register tmp1 = r14;
7477 Register tmp2 = r13;
7478 Register tmp3 = r12;
7479 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
7480
7481 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
7482
7483 if (reg_state[to->value()] == reg_readonly) {
7484 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
7485 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7486 return false; // Not yet writable
7487 }
7488 val_obj = val_obj_tmp;
7489 }
7490
7491 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
7492 VMReg fromReg;
7493 BasicType bt;
7494 Label L_null;
7495 while (stream.next(fromReg, bt)) {
7496 assert(fromReg->is_valid(), "source must be valid");
7497 reg_state[fromReg->value()] = reg_writable;
7498
7499 int off = sig->at(stream.sig_index())._offset;
7500 if (off == -1) {
7501 // Nullable inline type argument, emit null check
7502 Label L_notNull;
7503 if (fromReg->is_stack()) {
7504 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7505 ldrb(tmp2, Address(sp, ld_off));
7506 cbnz(tmp2, L_notNull);
7507 } else {
7508 cbnz(fromReg->as_Register(), L_notNull);
7509 }
7510 mov(val_obj, 0);
7511 b(L_null);
7512 bind(L_notNull);
7513 continue;
7514 }
7515 if (sig->at(stream.sig_index())._vt_oop) {
7516 if (fromReg->is_stack()) {
7517 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7518 ldr(val_obj, Address(sp, ld_off));
7519 } else {
7520 mov(val_obj, fromReg->as_Register());
7521 }
7522 cbnz(val_obj, L_null);
7523 // get the buffer from the just allocated pool of buffers
7524 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
7525 load_heap_oop(val_obj, Address(val_array, index), rscratch1, rscratch2);
7526 continue;
7527 }
7528
7529 assert(off > 0, "offset in object should be positive");
7530 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
7531
7532 // Pack the scalarized field into the value object.
7533 Address dst(val_obj, off);
7534 if (!fromReg->is_FloatRegister()) {
7535 Register src;
7536 if (fromReg->is_stack()) {
7537 src = from_reg_tmp;
7538 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7539 load_sized_value(src, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
7540 } else {
7541 src = fromReg->as_Register();
7542 }
7543 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
7544 if (is_reference_type(bt)) {
7545 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep val_obj valid.
7546 mov(tmp3, val_obj);
7547 Address dst_with_tmp3(tmp3, off);
7548 store_heap_oop(dst_with_tmp3, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
7549 } else {
7550 store_sized_value(dst, src, size_in_bytes);
7551 }
7552 } else if (bt == T_DOUBLE) {
7553 strd(fromReg->as_FloatRegister(), dst);
7554 } else {
7555 assert(bt == T_FLOAT, "must be float");
7556 strs(fromReg->as_FloatRegister(), dst);
7557 }
7558 }
7559 bind(L_null);
7560 sig_index = stream.sig_index();
7561 from_index = stream.regs_index();
7562
7563 assert(reg_state[to->value()] == reg_writable, "must have already been read");
7564 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
7565 assert(success, "to register must be writeable");
7566 return true;
7567 }
7568
7569 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
7570 return (reg->is_FloatRegister()) ? v8->as_VMReg() : r14->as_VMReg();
7571 }
7572
7573 void MacroAssembler::cache_wb(Address line) {
7574 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
7575 assert(line.index() == noreg, "index should be noreg");
7576 assert(line.offset() == 0, "offset should be 0");
7577 // would like to assert this
7578 // assert(line._ext.shift == 0, "shift should be zero");
7579 if (VM_Version::supports_dcpop()) {
7580 // writeback using clear virtual address to point of persistence
7581 dc(Assembler::CVAP, line.base());
7582 } else {
7583 // no need to generate anything as Unsafe.writebackMemory should
7584 // never invoke this stub
7585 }
7586 }
7587
7588 void MacroAssembler::cache_wbsync(bool is_pre) {
7589 // we only need a barrier post sync
7590 if (!is_pre) {
7591 membar(Assembler::AnyAny);
7592 }
7988 }
7989
7990 // Check if the lock-stack is full.
7991 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7992 cmpw(top, (unsigned)LockStack::end_offset());
7993 br(Assembler::GE, slow);
7994
7995 // Check for recursion.
7996 subw(t, top, oopSize);
7997 ldr(t, Address(rthread, t));
7998 cmp(obj, t);
7999 br(Assembler::EQ, push);
8000
8001 // Check header for monitor (0b10).
8002 tst(mark, markWord::monitor_value);
8003 br(Assembler::NE, slow);
8004
8005 // Try to lock. Transition lock bits 0b01 => 0b00
8006 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
8007 orr(mark, mark, markWord::unlocked_value);
8008 // Mask inline_type bit such that we go to the slow path if object is an inline type
8009 andr(mark, mark, ~((int) markWord::inline_type_bit_in_place));
8010
8011 eor(t, mark, markWord::unlocked_value);
8012 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
8013 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
8014 br(Assembler::NE, slow);
8015
8016 bind(push);
8017 // After successful lock, push object on lock-stack.
8018 str(obj, Address(rthread, top));
8019 addw(top, top, oopSize);
8020 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
8021 }
8022
8023 // Implements fast-unlocking.
8024 //
8025 // - obj: the object to be unlocked
8026 // - t1, t2, t3: temporary registers
8027 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
8028 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
8029 // cmpxchg clobbers rscratch1.
8030 assert_different_registers(obj, t1, t2, t3, rscratch1);
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