9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "code/compiledIC.hpp"
30 #include "compiler/compileTask.hpp"
31 #include "compiler/disassembler.hpp"
32 #include "compiler/oopMap.hpp"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/cardTable.hpp"
37 #include "gc/shared/collectedHeap.hpp"
38 #include "gc/shared/tlab_globals.hpp"
39 #include "interpreter/bytecodeHistogram.hpp"
40 #include "interpreter/interpreter.hpp"
41 #include "interpreter/interpreterRuntime.hpp"
42 #include "jvm.h"
43 #include "memory/resourceArea.hpp"
44 #include "memory/universe.hpp"
45 #include "nativeInst_aarch64.hpp"
46 #include "oops/accessDecorators.hpp"
47 #include "oops/compressedKlass.inline.hpp"
48 #include "oops/compressedOops.inline.hpp"
49 #include "oops/klass.inline.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/icache.hpp"
52 #include "runtime/interfaceSupport.inline.hpp"
53 #include "runtime/javaThread.hpp"
54 #include "runtime/jniHandles.inline.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/globalDefinitions.hpp"
58 #include "utilities/powerOfTwo.hpp"
59 #ifdef COMPILER1
60 #include "c1/c1_LIRAssembler.hpp"
61 #endif
62 #ifdef COMPILER2
63 #include "oops/oop.hpp"
64 #include "opto/compile.hpp"
65 #include "opto/node.hpp"
66 #include "opto/output.hpp"
67 #endif
68
69 #include <sys/types.h>
70
71 #ifdef PRODUCT
72 #define BLOCK_COMMENT(str) /* nothing */
73 #else
74 #define BLOCK_COMMENT(str) block_comment(str)
75 #endif
76 #define STOP(str) stop(str);
77 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
78
2016 ldarb(scratch, scratch);
2017 cmp(scratch, InstanceKlass::fully_initialized);
2018 br(Assembler::EQ, *L_fast_path);
2019
2020 // Fast path check: current thread is initializer thread
2021 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2022 cmp(rthread, scratch);
2023
2024 if (L_slow_path == &L_fallthrough) {
2025 br(Assembler::EQ, *L_fast_path);
2026 bind(*L_slow_path);
2027 } else if (L_fast_path == &L_fallthrough) {
2028 br(Assembler::NE, *L_slow_path);
2029 bind(*L_fast_path);
2030 } else {
2031 Unimplemented();
2032 }
2033 }
2034
2035 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2036 if (!VerifyOops) return;
2037
2038 // Pass register number to verify_oop_subroutine
2039 const char* b = nullptr;
2040 {
2041 ResourceMark rm;
2042 stringStream ss;
2043 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2044 b = code_string(ss.as_string());
2045 }
2046 BLOCK_COMMENT("verify_oop {");
2047
2048 strip_return_address(); // This might happen within a stack frame.
2049 protect_return_address();
2050 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2051 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2052
2053 mov(r0, reg);
2054 movptr(rscratch1, (uintptr_t)(address)b);
2055
2056 // call indirectly to solve generation ordering problem
2057 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2058 ldr(rscratch2, Address(rscratch2));
2059 blr(rscratch2);
2060
2061 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2062 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2063 authenticate_return_address();
2064
2065 BLOCK_COMMENT("} verify_oop");
2066 }
2067
2068 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2069 if (!VerifyOops) return;
2070
2071 const char* b = nullptr;
2072 {
2073 ResourceMark rm;
2074 stringStream ss;
2075 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2076 b = code_string(ss.as_string());
2077 }
2078 BLOCK_COMMENT("verify_oop_addr {");
2079
2080 strip_return_address(); // This might happen within a stack frame.
2081 protect_return_address();
2082 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2083 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2084
2085 // addr may contain sp so we will have to adjust it based on the
2086 // pushes that we just did.
2087 if (addr.uses(sp)) {
2088 lea(r0, addr);
2089 ldr(r0, Address(r0, 4 * wordSize));
2302 call_VM_leaf_base(entry_point, 1);
2303 }
2304
2305 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2306 assert_different_registers(arg_1, c_rarg0);
2307 pass_arg0(this, arg_0);
2308 pass_arg1(this, arg_1);
2309 call_VM_leaf_base(entry_point, 2);
2310 }
2311
2312 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2313 Register arg_1, Register arg_2) {
2314 assert_different_registers(arg_1, c_rarg0);
2315 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2316 pass_arg0(this, arg_0);
2317 pass_arg1(this, arg_1);
2318 pass_arg2(this, arg_2);
2319 call_VM_leaf_base(entry_point, 3);
2320 }
2321
2322 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2323 pass_arg0(this, arg_0);
2324 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2325 }
2326
2327 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2328
2329 assert_different_registers(arg_0, c_rarg1);
2330 pass_arg1(this, arg_1);
2331 pass_arg0(this, arg_0);
2332 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2333 }
2334
2335 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2336 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2337 assert_different_registers(arg_1, c_rarg2);
2338 pass_arg2(this, arg_2);
2339 pass_arg1(this, arg_1);
2340 pass_arg0(this, arg_0);
2341 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2347 assert_different_registers(arg_2, c_rarg3);
2348 pass_arg3(this, arg_3);
2349 pass_arg2(this, arg_2);
2350 pass_arg1(this, arg_1);
2351 pass_arg0(this, arg_0);
2352 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2353 }
2354
2355 void MacroAssembler::null_check(Register reg, int offset) {
2356 if (needs_explicit_null_check(offset)) {
2357 // provoke OS null exception if reg is null by
2358 // accessing M[reg] w/o changing any registers
2359 // NOTE: this is plenty to provoke a segv
2360 ldr(zr, Address(reg));
2361 } else {
2362 // nothing to do, (later) access of M[reg + offset]
2363 // will provoke OS null exception if reg is null
2364 }
2365 }
2366
2367 // MacroAssembler protected routines needed to implement
2368 // public methods
2369
2370 void MacroAssembler::mov(Register r, Address dest) {
2371 code_section()->relocate(pc(), dest.rspec());
2372 uint64_t imm64 = (uint64_t)dest.target();
2373 movptr(r, imm64);
2374 }
2375
2376 // Move a constant pointer into r. In AArch64 mode the virtual
2377 // address space is 48 bits in size, so we only need three
2378 // instructions to create a patchable instruction sequence that can
2379 // reach anywhere.
2380 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2381 #ifndef PRODUCT
2382 {
2383 char buffer[64];
2384 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2385 block_comment(buffer);
2386 }
5047 adrp(rscratch1, src2, offset);
5048 ldr(rscratch1, Address(rscratch1, offset));
5049 cmp(src1, rscratch1);
5050 }
5051
5052 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5053 cmp(obj1, obj2);
5054 }
5055
5056 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5057 load_method_holder(rresult, rmethod);
5058 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5059 }
5060
5061 void MacroAssembler::load_method_holder(Register holder, Register method) {
5062 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5063 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5064 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5065 }
5066
5067 // Loads the obj's Klass* into dst.
5068 // Preserves all registers (incl src, rscratch1 and rscratch2).
5069 // Input:
5070 // src - the oop we want to load the klass from.
5071 // dst - output narrow klass.
5072 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5073 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5074 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5075 lsr(dst, dst, markWord::klass_shift);
5076 }
5077
5078 void MacroAssembler::load_klass(Register dst, Register src) {
5079 if (UseCompactObjectHeaders) {
5080 load_narrow_klass_compact(dst, src);
5081 decode_klass_not_null(dst);
5082 } else if (UseCompressedClassPointers) {
5083 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5084 decode_klass_not_null(dst);
5085 } else {
5086 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5157 }
5158 cmp(klass, tmp);
5159 }
5160
5161 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5162 if (UseCompactObjectHeaders) {
5163 load_narrow_klass_compact(tmp1, obj1);
5164 load_narrow_klass_compact(tmp2, obj2);
5165 cmpw(tmp1, tmp2);
5166 } else if (UseCompressedClassPointers) {
5167 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5168 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5169 cmpw(tmp1, tmp2);
5170 } else {
5171 ldr(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5172 ldr(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5173 cmp(tmp1, tmp2);
5174 }
5175 }
5176
5177 void MacroAssembler::store_klass(Register dst, Register src) {
5178 // FIXME: Should this be a store release? concurrent gcs assumes
5179 // klass length is valid if klass field is not null.
5180 assert(!UseCompactObjectHeaders, "not with compact headers");
5181 if (UseCompressedClassPointers) {
5182 encode_klass_not_null(src);
5183 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5184 } else {
5185 str(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5186 }
5187 }
5188
5189 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5190 assert(!UseCompactObjectHeaders, "not with compact headers");
5191 if (UseCompressedClassPointers) {
5192 // Store to klass gap in destination
5193 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5194 }
5195 }
5196
5557 if (as_raw) {
5558 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5559 } else {
5560 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5561 }
5562 }
5563
5564 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5565 Address dst, Register val,
5566 Register tmp1, Register tmp2, Register tmp3) {
5567 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5568 decorators = AccessInternal::decorator_fixup(decorators, type);
5569 bool as_raw = (decorators & AS_RAW) != 0;
5570 if (as_raw) {
5571 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5572 } else {
5573 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5574 }
5575 }
5576
5577 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5578 Register tmp2, DecoratorSet decorators) {
5579 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5580 }
5581
5582 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5583 Register tmp2, DecoratorSet decorators) {
5584 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5585 }
5586
5587 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5588 Register tmp2, Register tmp3, DecoratorSet decorators) {
5589 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5590 }
5591
5592 // Used for storing nulls.
5593 void MacroAssembler::store_heap_oop_null(Address dst) {
5594 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5595 }
5596
5632 oop_index = oop_recorder()->allocate_metadata_index(obj);
5633 } else {
5634 oop_index = oop_recorder()->find_index(obj);
5635 }
5636 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5637 mov(dst, Address((address)obj, rspec));
5638 }
5639
5640 Address MacroAssembler::constant_oop_address(jobject obj) {
5641 #ifdef ASSERT
5642 {
5643 ThreadInVMfromUnknown tiv;
5644 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5645 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5646 }
5647 #endif
5648 int oop_index = oop_recorder()->find_index(obj);
5649 return Address((address)obj, oop_Relocation::spec(oop_index));
5650 }
5651
5652 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5653 void MacroAssembler::tlab_allocate(Register obj,
5654 Register var_size_in_bytes,
5655 int con_size_in_bytes,
5656 Register t1,
5657 Register t2,
5658 Label& slow_case) {
5659 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5660 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5661 }
5662
5663 void MacroAssembler::verify_tlab() {
5664 #ifdef ASSERT
5665 if (UseTLAB && VerifyOops) {
5666 Label next, ok;
5667
5668 stp(rscratch2, rscratch1, Address(pre(sp, -16)));
5669
5670 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5671 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5672 cmp(rscratch2, rscratch1);
5673 br(Assembler::HS, next);
5674 STOP("assert(top >= start)");
5675 should_not_reach_here();
5676
5677 bind(next);
5678 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5679 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5680 cmp(rscratch2, rscratch1);
5681 br(Assembler::HS, ok);
5682 STOP("assert(top <= end)");
5683 should_not_reach_here();
5684
5685 bind(ok);
5686 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5687 }
5688 #endif
5689 }
5690
5691 // Writes to stack successive pages until offset reached to check for
5692 // stack overflow + shadow pages. This clobbers tmp.
5693 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5694 assert_different_registers(tmp, size, rscratch1);
5695 mov(tmp, sp);
5696 // Bang stack for total size given plus shadow page size.
5697 // Bang one page at a time because large size can bang beyond yellow and
5698 // red zones.
5699 Label loop;
5700 mov(rscratch1, (int)os::vm_page_size());
5701 bind(loop);
5702 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5703 subsw(size, size, rscratch1);
5704 str(size, Address(tmp));
5705 br(Assembler::GT, loop);
5706
5707 // Bang down shadow pages too.
5708 // At this point, (tmp-0) is the last address touched, so don't
5709 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5710 // was post-decremented.) Skip this address by starting at i=1, and
5756 _adrp(reg1, dest.target());
5757 } else {
5758 uint64_t target = (uint64_t)dest.target();
5759 uint64_t adrp_target
5760 = (target & 0xffffffffULL) | ((uint64_t)pc() & 0xffff00000000ULL);
5761
5762 _adrp(reg1, (address)adrp_target);
5763 movk(reg1, target >> 32, 32);
5764 }
5765 byte_offset = (uint64_t)dest.target() & 0xfff;
5766 }
5767
5768 void MacroAssembler::load_byte_map_base(Register reg) {
5769 CardTableBarrierSet* ctbs = CardTableBarrierSet::barrier_set();
5770
5771 // Strictly speaking the card table base isn't an address at all, and it might
5772 // even be negative. It is thus materialised as a constant.
5773 mov(reg, (uint64_t)ctbs->card_table_base_const());
5774 }
5775
5776 void MacroAssembler::build_frame(int framesize) {
5777 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5778 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5779 protect_return_address();
5780 if (framesize < ((1 << 9) + 2 * wordSize)) {
5781 sub(sp, sp, framesize);
5782 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5783 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5784 } else {
5785 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5786 if (PreserveFramePointer) mov(rfp, sp);
5787 if (framesize < ((1 << 12) + 2 * wordSize))
5788 sub(sp, sp, framesize - 2 * wordSize);
5789 else {
5790 mov(rscratch1, framesize - 2 * wordSize);
5791 sub(sp, sp, rscratch1);
5792 }
5793 }
5794 verify_cross_modify_fence_not_required();
5795 }
5796
5797 void MacroAssembler::remove_frame(int framesize) {
5798 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5799 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5800 if (framesize < ((1 << 9) + 2 * wordSize)) {
5801 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5802 add(sp, sp, framesize);
5803 } else {
5804 if (framesize < ((1 << 12) + 2 * wordSize))
5805 add(sp, sp, framesize - 2 * wordSize);
5806 else {
5807 mov(rscratch1, framesize - 2 * wordSize);
5808 add(sp, sp, rscratch1);
5809 }
5810 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5811 }
5812 authenticate_return_address();
5813 }
5814
5815
5816 // This method counts leading positive bytes (highest bit not set) in provided byte array
5817 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
5818 // Simple and most common case of aligned small array which is not at the
5819 // end of memory page is placed here. All other cases are in stub.
5820 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
5821 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
5822 assert_different_registers(ary1, len, result);
5823
5824 mov(result, len);
5825 cmpw(len, 0);
5826 br(LE, DONE);
5827 cmpw(len, 4 * wordSize);
5828 br(GE, STUB_LONG); // size > 32 then go to stub
5829
5830 int shift = 64 - exact_log2(os::vm_page_size());
5831 lsl(rscratch1, ary1, shift);
5832 mov(rscratch2, (size_t)(4 * wordSize) << shift);
5833 adds(rscratch2, rscratch1, rscratch2); // At end of page?
5834 br(CS, STUB); // at the end of page then go to stub
6718 // On other systems, the helper is a usual C function.
6719 //
6720 void MacroAssembler::get_thread(Register dst) {
6721 RegSet saved_regs =
6722 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
6723 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
6724
6725 protect_return_address();
6726 push(saved_regs, sp);
6727
6728 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6729 blr(lr);
6730 if (dst != c_rarg0) {
6731 mov(dst, c_rarg0);
6732 }
6733
6734 pop(saved_regs, sp);
6735 authenticate_return_address();
6736 }
6737
6738 void MacroAssembler::cache_wb(Address line) {
6739 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
6740 assert(line.index() == noreg, "index should be noreg");
6741 assert(line.offset() == 0, "offset should be 0");
6742 // would like to assert this
6743 // assert(line._ext.shift == 0, "shift should be zero");
6744 if (VM_Version::supports_dcpop()) {
6745 // writeback using clear virtual address to point of persistence
6746 dc(Assembler::CVAP, line.base());
6747 } else {
6748 // no need to generate anything as Unsafe.writebackMemory should
6749 // never invoke this stub
6750 }
6751 }
6752
6753 void MacroAssembler::cache_wbsync(bool is_pre) {
6754 // we only need a barrier post sync
6755 if (!is_pre) {
6756 membar(Assembler::AnyAny);
6757 }
7128 }
7129
7130 // Check if the lock-stack is full.
7131 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7132 cmpw(top, (unsigned)LockStack::end_offset());
7133 br(Assembler::GE, slow);
7134
7135 // Check for recursion.
7136 subw(t, top, oopSize);
7137 ldr(t, Address(rthread, t));
7138 cmp(obj, t);
7139 br(Assembler::EQ, push);
7140
7141 // Check header for monitor (0b10).
7142 tst(mark, markWord::monitor_value);
7143 br(Assembler::NE, slow);
7144
7145 // Try to lock. Transition lock bits 0b01 => 0b00
7146 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7147 orr(mark, mark, markWord::unlocked_value);
7148 eor(t, mark, markWord::unlocked_value);
7149 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7150 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7151 br(Assembler::NE, slow);
7152
7153 bind(push);
7154 // After successful lock, push object on lock-stack.
7155 str(obj, Address(rthread, top));
7156 addw(top, top, oopSize);
7157 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7158 }
7159
7160 // Implements fast-unlocking.
7161 //
7162 // - obj: the object to be unlocked
7163 // - t1, t2, t3: temporary registers
7164 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7165 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7166 // cmpxchg clobbers rscratch1.
7167 assert_different_registers(obj, t1, t2, t3, rscratch1);
|
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "ci/ciInlineKlass.hpp"
30 #include "code/compiledIC.hpp"
31 #include "compiler/compileTask.hpp"
32 #include "compiler/disassembler.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "gc/shared/cardTableBarrierSet.hpp"
37 #include "gc/shared/cardTable.hpp"
38 #include "gc/shared/collectedHeap.hpp"
39 #include "gc/shared/tlab_globals.hpp"
40 #include "interpreter/bytecodeHistogram.hpp"
41 #include "interpreter/interpreter.hpp"
42 #include "interpreter/interpreterRuntime.hpp"
43 #include "jvm.h"
44 #include "memory/resourceArea.hpp"
45 #include "memory/universe.hpp"
46 #include "nativeInst_aarch64.hpp"
47 #include "oops/accessDecorators.hpp"
48 #include "oops/compressedKlass.inline.hpp"
49 #include "oops/compressedOops.inline.hpp"
50 #include "oops/klass.inline.hpp"
51 #include "oops/resolvedFieldEntry.hpp"
52 #include "runtime/arguments.hpp"
53 #include "runtime/continuation.hpp"
54 #include "runtime/globals.hpp"
55 #include "runtime/icache.hpp"
56 #include "runtime/interfaceSupport.inline.hpp"
57 #include "runtime/javaThread.hpp"
58 #include "runtime/jniHandles.inline.hpp"
59 #include "runtime/sharedRuntime.hpp"
60 #include "runtime/signature_cc.hpp"
61 #include "runtime/stubRoutines.hpp"
62 #include "utilities/globalDefinitions.hpp"
63 #include "utilities/powerOfTwo.hpp"
64 #include "vmreg_aarch64.inline.hpp"
65 #ifdef COMPILER1
66 #include "c1/c1_LIRAssembler.hpp"
67 #endif
68 #ifdef COMPILER2
69 #include "oops/oop.hpp"
70 #include "opto/compile.hpp"
71 #include "opto/node.hpp"
72 #include "opto/output.hpp"
73 #endif
74
75 #include <sys/types.h>
76
77 #ifdef PRODUCT
78 #define BLOCK_COMMENT(str) /* nothing */
79 #else
80 #define BLOCK_COMMENT(str) block_comment(str)
81 #endif
82 #define STOP(str) stop(str);
83 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
84
2022 ldarb(scratch, scratch);
2023 cmp(scratch, InstanceKlass::fully_initialized);
2024 br(Assembler::EQ, *L_fast_path);
2025
2026 // Fast path check: current thread is initializer thread
2027 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2028 cmp(rthread, scratch);
2029
2030 if (L_slow_path == &L_fallthrough) {
2031 br(Assembler::EQ, *L_fast_path);
2032 bind(*L_slow_path);
2033 } else if (L_fast_path == &L_fallthrough) {
2034 br(Assembler::NE, *L_slow_path);
2035 bind(*L_fast_path);
2036 } else {
2037 Unimplemented();
2038 }
2039 }
2040
2041 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2042 if (!VerifyOops || VerifyAdapterSharing) {
2043 // Below address of the code string confuses VerifyAdapterSharing
2044 // because it may differ between otherwise equivalent adapters.
2045 return;
2046 }
2047
2048 // Pass register number to verify_oop_subroutine
2049 const char* b = nullptr;
2050 {
2051 ResourceMark rm;
2052 stringStream ss;
2053 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2054 b = code_string(ss.as_string());
2055 }
2056 BLOCK_COMMENT("verify_oop {");
2057
2058 strip_return_address(); // This might happen within a stack frame.
2059 protect_return_address();
2060 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2061 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2062
2063 mov(r0, reg);
2064 movptr(rscratch1, (uintptr_t)(address)b);
2065
2066 // call indirectly to solve generation ordering problem
2067 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2068 ldr(rscratch2, Address(rscratch2));
2069 blr(rscratch2);
2070
2071 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2072 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2073 authenticate_return_address();
2074
2075 BLOCK_COMMENT("} verify_oop");
2076 }
2077
2078 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2079 if (!VerifyOops || VerifyAdapterSharing) {
2080 // Below address of the code string confuses VerifyAdapterSharing
2081 // because it may differ between otherwise equivalent adapters.
2082 return;
2083 }
2084
2085 const char* b = nullptr;
2086 {
2087 ResourceMark rm;
2088 stringStream ss;
2089 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2090 b = code_string(ss.as_string());
2091 }
2092 BLOCK_COMMENT("verify_oop_addr {");
2093
2094 strip_return_address(); // This might happen within a stack frame.
2095 protect_return_address();
2096 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2097 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2098
2099 // addr may contain sp so we will have to adjust it based on the
2100 // pushes that we just did.
2101 if (addr.uses(sp)) {
2102 lea(r0, addr);
2103 ldr(r0, Address(r0, 4 * wordSize));
2316 call_VM_leaf_base(entry_point, 1);
2317 }
2318
2319 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2320 assert_different_registers(arg_1, c_rarg0);
2321 pass_arg0(this, arg_0);
2322 pass_arg1(this, arg_1);
2323 call_VM_leaf_base(entry_point, 2);
2324 }
2325
2326 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2327 Register arg_1, Register arg_2) {
2328 assert_different_registers(arg_1, c_rarg0);
2329 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2330 pass_arg0(this, arg_0);
2331 pass_arg1(this, arg_1);
2332 pass_arg2(this, arg_2);
2333 call_VM_leaf_base(entry_point, 3);
2334 }
2335
2336 void MacroAssembler::super_call_VM_leaf(address entry_point) {
2337 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2338 }
2339
2340 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2341 pass_arg0(this, arg_0);
2342 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2343 }
2344
2345 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2346
2347 assert_different_registers(arg_0, c_rarg1);
2348 pass_arg1(this, arg_1);
2349 pass_arg0(this, arg_0);
2350 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2351 }
2352
2353 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2354 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2355 assert_different_registers(arg_1, c_rarg2);
2356 pass_arg2(this, arg_2);
2357 pass_arg1(this, arg_1);
2358 pass_arg0(this, arg_0);
2359 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2365 assert_different_registers(arg_2, c_rarg3);
2366 pass_arg3(this, arg_3);
2367 pass_arg2(this, arg_2);
2368 pass_arg1(this, arg_1);
2369 pass_arg0(this, arg_0);
2370 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2371 }
2372
2373 void MacroAssembler::null_check(Register reg, int offset) {
2374 if (needs_explicit_null_check(offset)) {
2375 // provoke OS null exception if reg is null by
2376 // accessing M[reg] w/o changing any registers
2377 // NOTE: this is plenty to provoke a segv
2378 ldr(zr, Address(reg));
2379 } else {
2380 // nothing to do, (later) access of M[reg + offset]
2381 // will provoke OS null exception if reg is null
2382 }
2383 }
2384
2385 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2386 assert_different_registers(markword, rscratch2);
2387 mov(rscratch2, markWord::inline_type_mask_in_place);
2388 andr(markword, markword, rscratch2);
2389 mov(rscratch2, markWord::inline_type_pattern);
2390 cmp(markword, rscratch2);
2391 br(Assembler::EQ, is_inline_type);
2392 }
2393
2394 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2395 assert_different_registers(tmp, rscratch1);
2396 if (can_be_null) {
2397 cbz(object, not_inline_type);
2398 }
2399 const int is_inline_type_mask = markWord::inline_type_pattern;
2400 ldr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2401 mov(rscratch1, is_inline_type_mask);
2402 andr(tmp, tmp, rscratch1);
2403 cmp(tmp, rscratch1);
2404 br(Assembler::NE, not_inline_type);
2405 }
2406
2407 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2408 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2409 tbnz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, is_null_free_inline_type);
2410 }
2411
2412 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2413 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2414 tbz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, not_null_free_inline_type);
2415 }
2416
2417 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2418 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2419 tbnz(flags, ResolvedFieldEntry::is_flat_shift, is_flat);
2420 }
2421
2422 void MacroAssembler::test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker) {
2423 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2424 tbnz(flags, ResolvedFieldEntry::has_null_marker_shift, has_null_marker);
2425 }
2426
2427 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2428 Label test_mark_word;
2429 // load mark word
2430 ldr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2431 // check displaced
2432 tst(temp_reg, markWord::unlocked_value);
2433 br(Assembler::NE, test_mark_word);
2434 // slow path use klass prototype
2435 load_prototype_header(temp_reg, oop);
2436
2437 bind(test_mark_word);
2438 andr(temp_reg, temp_reg, test_bit);
2439 if (jmp_set) {
2440 cbnz(temp_reg, jmp_label);
2441 } else {
2442 cbz(temp_reg, jmp_label);
2443 }
2444 }
2445
2446 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array) {
2447 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2448 }
2449
2450 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2451 Label&is_non_flat_array) {
2452 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2453 }
2454
2455 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array) {
2456 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2457 }
2458
2459 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2460 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2461 }
2462
2463 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2464 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2465 br(Assembler::NE, is_flat_array);
2466 }
2467
2468 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
2469 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2470 br(Assembler::EQ, is_non_flat_array);
2471 }
2472
2473 // MacroAssembler protected routines needed to implement
2474 // public methods
2475
2476 void MacroAssembler::mov(Register r, Address dest) {
2477 code_section()->relocate(pc(), dest.rspec());
2478 uint64_t imm64 = (uint64_t)dest.target();
2479 movptr(r, imm64);
2480 }
2481
2482 // Move a constant pointer into r. In AArch64 mode the virtual
2483 // address space is 48 bits in size, so we only need three
2484 // instructions to create a patchable instruction sequence that can
2485 // reach anywhere.
2486 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2487 #ifndef PRODUCT
2488 {
2489 char buffer[64];
2490 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2491 block_comment(buffer);
2492 }
5153 adrp(rscratch1, src2, offset);
5154 ldr(rscratch1, Address(rscratch1, offset));
5155 cmp(src1, rscratch1);
5156 }
5157
5158 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5159 cmp(obj1, obj2);
5160 }
5161
5162 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5163 load_method_holder(rresult, rmethod);
5164 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5165 }
5166
5167 void MacroAssembler::load_method_holder(Register holder, Register method) {
5168 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5169 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5170 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5171 }
5172
5173 void MacroAssembler::load_metadata(Register dst, Register src) {
5174 if (UseCompactObjectHeaders) {
5175 load_narrow_klass_compact(dst, src);
5176 } else if (UseCompressedClassPointers) {
5177 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5178 } else {
5179 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5180 }
5181 }
5182
5183 // Loads the obj's Klass* into dst.
5184 // Preserves all registers (incl src, rscratch1 and rscratch2).
5185 // Input:
5186 // src - the oop we want to load the klass from.
5187 // dst - output narrow klass.
5188 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5189 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5190 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5191 lsr(dst, dst, markWord::klass_shift);
5192 }
5193
5194 void MacroAssembler::load_klass(Register dst, Register src) {
5195 if (UseCompactObjectHeaders) {
5196 load_narrow_klass_compact(dst, src);
5197 decode_klass_not_null(dst);
5198 } else if (UseCompressedClassPointers) {
5199 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5200 decode_klass_not_null(dst);
5201 } else {
5202 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5273 }
5274 cmp(klass, tmp);
5275 }
5276
5277 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5278 if (UseCompactObjectHeaders) {
5279 load_narrow_klass_compact(tmp1, obj1);
5280 load_narrow_klass_compact(tmp2, obj2);
5281 cmpw(tmp1, tmp2);
5282 } else if (UseCompressedClassPointers) {
5283 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5284 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5285 cmpw(tmp1, tmp2);
5286 } else {
5287 ldr(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5288 ldr(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5289 cmp(tmp1, tmp2);
5290 }
5291 }
5292
5293 void MacroAssembler::load_prototype_header(Register dst, Register src) {
5294 load_klass(dst, src);
5295 ldr(dst, Address(dst, Klass::prototype_header_offset()));
5296 }
5297
5298 void MacroAssembler::store_klass(Register dst, Register src) {
5299 // FIXME: Should this be a store release? concurrent gcs assumes
5300 // klass length is valid if klass field is not null.
5301 assert(!UseCompactObjectHeaders, "not with compact headers");
5302 if (UseCompressedClassPointers) {
5303 encode_klass_not_null(src);
5304 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5305 } else {
5306 str(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5307 }
5308 }
5309
5310 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5311 assert(!UseCompactObjectHeaders, "not with compact headers");
5312 if (UseCompressedClassPointers) {
5313 // Store to klass gap in destination
5314 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5315 }
5316 }
5317
5678 if (as_raw) {
5679 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5680 } else {
5681 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5682 }
5683 }
5684
5685 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5686 Address dst, Register val,
5687 Register tmp1, Register tmp2, Register tmp3) {
5688 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5689 decorators = AccessInternal::decorator_fixup(decorators, type);
5690 bool as_raw = (decorators & AS_RAW) != 0;
5691 if (as_raw) {
5692 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5693 } else {
5694 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5695 }
5696 }
5697
5698 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5699 Register inline_layout_info) {
5700 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5701 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5702 }
5703
5704 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5705 ldr(offset, Address(inline_klass, InlineKlass::adr_members_offset()));
5706 ldrw(offset, Address(offset, InlineKlass::payload_offset_offset()));
5707 }
5708
5709 void MacroAssembler::payload_address(Register oop, Register data, Register inline_klass) {
5710 // ((address) (void*) o) + vk->payload_offset();
5711 Register offset = (data == oop) ? rscratch1 : data;
5712 payload_offset(inline_klass, offset);
5713 if (data == oop) {
5714 add(data, data, offset);
5715 } else {
5716 lea(data, Address(oop, offset));
5717 }
5718 }
5719
5720 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
5721 Register index, Register data) {
5722 assert_different_registers(array, array_klass, index);
5723 assert_different_registers(rscratch1, array, index);
5724
5725 // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
5726 ldrw(rscratch1, Address(array_klass, Klass::layout_helper_offset()));
5727
5728 // Klass::layout_helper_log2_element_size(lh)
5729 // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
5730 lsr(rscratch1, rscratch1, Klass::_lh_log2_element_size_shift);
5731 andr(rscratch1, rscratch1, Klass::_lh_log2_element_size_mask);
5732 lslv(index, index, rscratch1);
5733
5734 add(data, array, index);
5735 add(data, data, arrayOopDesc::base_offset_in_bytes(T_FLAT_ELEMENT));
5736 }
5737
5738 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5739 Register tmp2, DecoratorSet decorators) {
5740 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5741 }
5742
5743 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5744 Register tmp2, DecoratorSet decorators) {
5745 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5746 }
5747
5748 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5749 Register tmp2, Register tmp3, DecoratorSet decorators) {
5750 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5751 }
5752
5753 // Used for storing nulls.
5754 void MacroAssembler::store_heap_oop_null(Address dst) {
5755 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5756 }
5757
5793 oop_index = oop_recorder()->allocate_metadata_index(obj);
5794 } else {
5795 oop_index = oop_recorder()->find_index(obj);
5796 }
5797 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5798 mov(dst, Address((address)obj, rspec));
5799 }
5800
5801 Address MacroAssembler::constant_oop_address(jobject obj) {
5802 #ifdef ASSERT
5803 {
5804 ThreadInVMfromUnknown tiv;
5805 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5806 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5807 }
5808 #endif
5809 int oop_index = oop_recorder()->find_index(obj);
5810 return Address((address)obj, oop_Relocation::spec(oop_index));
5811 }
5812
5813 // Object / value buffer allocation...
5814 void MacroAssembler::allocate_instance(Register klass, Register new_obj,
5815 Register t1, Register t2,
5816 bool clear_fields, Label& alloc_failed)
5817 {
5818 Label done, initialize_header, initialize_object, slow_case, slow_case_no_pop;
5819 Register layout_size = t1;
5820 assert(new_obj == r0, "needs to be r0");
5821 assert_different_registers(klass, new_obj, t1, t2);
5822
5823 // get instance_size in InstanceKlass (scaled to a count of bytes)
5824 ldrw(layout_size, Address(klass, Klass::layout_helper_offset()));
5825 // test to see if it is malformed in some way
5826 tst(layout_size, Klass::_lh_instance_slow_path_bit);
5827 br(Assembler::NE, slow_case_no_pop);
5828
5829 // Allocate the instance:
5830 // If TLAB is enabled:
5831 // Try to allocate in the TLAB.
5832 // If fails, go to the slow path.
5833 // Initialize the allocation.
5834 // Exit.
5835 //
5836 // Go to slow path.
5837
5838 if (UseTLAB) {
5839 push(klass);
5840 tlab_allocate(new_obj, layout_size, 0, klass, t2, slow_case);
5841 if (ZeroTLAB || (!clear_fields)) {
5842 // the fields have been already cleared
5843 b(initialize_header);
5844 } else {
5845 // initialize both the header and fields
5846 b(initialize_object);
5847 }
5848
5849 if (clear_fields) {
5850 // The object is initialized before the header. If the object size is
5851 // zero, go directly to the header initialization.
5852 bind(initialize_object);
5853 int header_size = oopDesc::header_size() * HeapWordSize;
5854 assert(is_aligned(header_size, BytesPerLong), "oop header size must be 8-byte-aligned");
5855 subs(layout_size, layout_size, header_size);
5856 br(Assembler::EQ, initialize_header);
5857
5858 // Initialize topmost object field, divide size by 8, check if odd and
5859 // test if zero.
5860
5861 #ifdef ASSERT
5862 // make sure instance_size was multiple of 8
5863 Label L;
5864 tst(layout_size, 7);
5865 br(Assembler::EQ, L);
5866 stop("object size is not multiple of 8 - adjust this code");
5867 bind(L);
5868 // must be > 0, no extra check needed here
5869 #endif
5870
5871 lsr(layout_size, layout_size, LogBytesPerLong);
5872
5873 // initialize remaining object fields: instance_size was a multiple of 8
5874 {
5875 Label loop;
5876 Register base = t2;
5877
5878 bind(loop);
5879 add(rscratch1, new_obj, layout_size, Assembler::LSL, LogBytesPerLong);
5880 str(zr, Address(rscratch1, header_size - 1*oopSize));
5881 subs(layout_size, layout_size, 1);
5882 br(Assembler::NE, loop);
5883 }
5884 } // clear_fields
5885
5886 // initialize object header only.
5887 bind(initialize_header);
5888 pop(klass);
5889 Register mark_word = t2;
5890 if (UseCompactObjectHeaders || Arguments::is_valhalla_enabled()) {
5891 ldr(mark_word, Address(klass, Klass::prototype_header_offset()));
5892 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5893 } else {
5894 mov(mark_word, (intptr_t)markWord::prototype().value());
5895 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5896 }
5897 if (!UseCompactObjectHeaders) {
5898 store_klass_gap(new_obj, zr); // zero klass gap for compressed oops
5899 mov(t2, klass); // preserve klass
5900 store_klass(new_obj, t2); // src klass reg is potentially compressed
5901 }
5902 b(done);
5903 }
5904
5905 if (UseTLAB) {
5906 bind(slow_case);
5907 pop(klass);
5908 }
5909 bind(slow_case_no_pop);
5910 b(alloc_failed);
5911
5912 bind(done);
5913 }
5914
5915 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5916 void MacroAssembler::tlab_allocate(Register obj,
5917 Register var_size_in_bytes,
5918 int con_size_in_bytes,
5919 Register t1,
5920 Register t2,
5921 Label& slow_case) {
5922 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5923 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5924 }
5925
5926 void MacroAssembler::verify_tlab() {
5927 #ifdef ASSERT
5928 if (UseTLAB && VerifyOops) {
5929 Label next, ok;
5930
5931 stp(rscratch2, rscratch1, Address(pre(sp, -16)));
5932
5933 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5934 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5935 cmp(rscratch2, rscratch1);
5936 br(Assembler::HS, next);
5937 STOP("assert(top >= start)");
5938 should_not_reach_here();
5939
5940 bind(next);
5941 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5942 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5943 cmp(rscratch2, rscratch1);
5944 br(Assembler::HS, ok);
5945 STOP("assert(top <= end)");
5946 should_not_reach_here();
5947
5948 bind(ok);
5949 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5950 }
5951 #endif
5952 }
5953
5954 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
5955 assert_different_registers(holder_klass, index, layout_info);
5956 InlineLayoutInfo array[2];
5957 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
5958 if (is_power_of_2(size)) {
5959 lsl(index, index, log2i_exact(size)); // Scale index by power of 2
5960 } else {
5961 mov(layout_info, size);
5962 mul(index, index, layout_info); // Scale the index to be the entry index * array_element_size
5963 }
5964 ldr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
5965 add(layout_info, layout_info, Array<InlineLayoutInfo>::base_offset_in_bytes());
5966 lea(layout_info, Address(layout_info, index));
5967 }
5968
5969 // Writes to stack successive pages until offset reached to check for
5970 // stack overflow + shadow pages. This clobbers tmp.
5971 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5972 assert_different_registers(tmp, size, rscratch1);
5973 mov(tmp, sp);
5974 // Bang stack for total size given plus shadow page size.
5975 // Bang one page at a time because large size can bang beyond yellow and
5976 // red zones.
5977 Label loop;
5978 mov(rscratch1, (int)os::vm_page_size());
5979 bind(loop);
5980 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5981 subsw(size, size, rscratch1);
5982 str(size, Address(tmp));
5983 br(Assembler::GT, loop);
5984
5985 // Bang down shadow pages too.
5986 // At this point, (tmp-0) is the last address touched, so don't
5987 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5988 // was post-decremented.) Skip this address by starting at i=1, and
6034 _adrp(reg1, dest.target());
6035 } else {
6036 uint64_t target = (uint64_t)dest.target();
6037 uint64_t adrp_target
6038 = (target & 0xffffffffULL) | ((uint64_t)pc() & 0xffff00000000ULL);
6039
6040 _adrp(reg1, (address)adrp_target);
6041 movk(reg1, target >> 32, 32);
6042 }
6043 byte_offset = (uint64_t)dest.target() & 0xfff;
6044 }
6045
6046 void MacroAssembler::load_byte_map_base(Register reg) {
6047 CardTableBarrierSet* ctbs = CardTableBarrierSet::barrier_set();
6048
6049 // Strictly speaking the card table base isn't an address at all, and it might
6050 // even be negative. It is thus materialised as a constant.
6051 mov(reg, (uint64_t)ctbs->card_table_base_const());
6052 }
6053
6054 #ifdef ASSERT
6055 void MacroAssembler::build_frame(int framesize) {
6056 build_frame(framesize, false);
6057 }
6058 #endif
6059
6060 void MacroAssembler::build_frame(int framesize DEBUG_ONLY(COMMA bool zap_rfp_lr_spills)) {
6061 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
6062 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
6063 protect_return_address();
6064 if (framesize < ((1 << 9) + 2 * wordSize)) {
6065 sub(sp, sp, framesize);
6066 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
6067 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
6068 stp(rscratch1, rscratch1, Address(sp, framesize - 2 * wordSize));
6069 } else {
6070 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
6071 }
6072 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
6073 } else {
6074 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
6075 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
6076 stp(rscratch1, rscratch1, Address(pre(sp, -2 * wordSize)));
6077 } else {
6078 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
6079 }
6080 if (PreserveFramePointer) mov(rfp, sp);
6081 if (framesize < ((1 << 12) + 2 * wordSize))
6082 sub(sp, sp, framesize - 2 * wordSize);
6083 else {
6084 mov(rscratch1, framesize - 2 * wordSize);
6085 sub(sp, sp, rscratch1);
6086 }
6087 }
6088 verify_cross_modify_fence_not_required();
6089 }
6090
6091 void MacroAssembler::remove_frame(int framesize) {
6092 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
6093 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
6094 if (framesize < ((1 << 9) + 2 * wordSize)) {
6095 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
6096 add(sp, sp, framesize);
6097 } else {
6098 if (framesize < ((1 << 12) + 2 * wordSize))
6099 add(sp, sp, framesize - 2 * wordSize);
6100 else {
6101 mov(rscratch1, framesize - 2 * wordSize);
6102 add(sp, sp, rscratch1);
6103 }
6104 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6105 }
6106 authenticate_return_address();
6107 }
6108
6109 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6110 if (needs_stack_repair) {
6111 // The method has a scalarized entry point (where fields of value object arguments
6112 // are passed through registers and stack), and a non-scalarized entry point (where
6113 // value object arguments are given as oops). The non-scalarized entry point will
6114 // first load each field of value object arguments and store them in registers and on
6115 // the stack in a way compatible with the scalarized entry point. To do so, some extra
6116 // stack space might be reserved (if argument registers are not enough). On leaving the
6117 // method, this space must be freed.
6118 //
6119 // In case we used the non-scalarized entry point the stack looks like this:
6120 //
6121 // | Arguments from caller |
6122 // |---------------------------| <-- caller's SP
6123 // | Saved LR #1 |
6124 // | Saved FP #1 |
6125 // |---------------------------|
6126 // | Extension space for |
6127 // | inline arg (un)packing |
6128 // |---------------------------| <-- start of this method's frame
6129 // | Saved LR #2 |
6130 // | Saved FP #2 |
6131 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6132 // | sp_inc |
6133 // | method locals |
6134 // |---------------------------| <-- SP
6135 //
6136 // There are two copies of FP and LR on the stack. They will be identical at
6137 // first, but that can change.
6138 // If the caller has been deoptimized, LR #1 will be patched to point at the
6139 // deopt blob, and LR #2 will still point into the old method.
6140 // If the saved FP (x29) was not used as the frame pointer, but to store an
6141 // oop, the GC will be aware only of FP #1 as the spilled location of x29 and
6142 // will fix only this one. Overall, FP/LR #2 are not reliable and are simply
6143 // needed to add space between the extension space and the locals, as there
6144 // would be between the real arguments and the locals if we don't need to
6145 // do unpacking (from the scalarized entry point).
6146 //
6147 // When restoring, one must then load FP #1 into x29, and LR #1 into x30,
6148 // while keeping in mind that from the scalarized entry point, there will be
6149 // only one copy of each. Indeed, in the case we used the scalarized calling
6150 // convention, the stack looks like this:
6151 //
6152 // | Arguments from caller |
6153 // |---------------------------| <-- caller's SP / start of this method's frame
6154 // | Saved LR |
6155 // | Saved FP |
6156 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6157 // | sp_inc |
6158 // | method locals |
6159 // |---------------------------| <-- SP
6160 //
6161 // The sp_inc stack slot holds the total size of the frame including the
6162 // extension space minus two words for the saved FP and LR. That is how to
6163 // find FP/LR #1. This size is expressed in bytes. Be careful when using it
6164 // from C++ in pointer arithmetic; you might need to divide it by wordSize.
6165 //
6166 // One can find sp_inc since the start the method's frame is SP + initial_framesize.
6167
6168 int sp_inc_offset = initial_framesize - 3 * wordSize; // Immediately below saved LR and FP
6169
6170 ldr(rscratch1, Address(sp, sp_inc_offset));
6171 add(sp, sp, rscratch1);
6172 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6173 } else {
6174 remove_frame(initial_framesize);
6175 }
6176 }
6177
6178 void MacroAssembler::save_stack_increment(int sp_inc, int frame_size) {
6179 int real_frame_size = frame_size + sp_inc;
6180 assert(sp_inc == 0 || sp_inc > 2*wordSize, "invalid sp_inc value");
6181 assert(real_frame_size >= 2*wordSize, "frame size must include FP/LR space");
6182 assert((real_frame_size & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6183
6184 int sp_inc_offset = frame_size - 3 * wordSize; // Immediately below saved LR and FP
6185
6186 // Subtract two words for the saved FP and LR as these will be popped
6187 // separately. See remove_frame above.
6188 mov(rscratch1, real_frame_size - 2*wordSize);
6189 str(rscratch1, Address(sp, sp_inc_offset));
6190 }
6191
6192 // This method counts leading positive bytes (highest bit not set) in provided byte array
6193 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
6194 // Simple and most common case of aligned small array which is not at the
6195 // end of memory page is placed here. All other cases are in stub.
6196 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
6197 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
6198 assert_different_registers(ary1, len, result);
6199
6200 mov(result, len);
6201 cmpw(len, 0);
6202 br(LE, DONE);
6203 cmpw(len, 4 * wordSize);
6204 br(GE, STUB_LONG); // size > 32 then go to stub
6205
6206 int shift = 64 - exact_log2(os::vm_page_size());
6207 lsl(rscratch1, ary1, shift);
6208 mov(rscratch2, (size_t)(4 * wordSize) << shift);
6209 adds(rscratch2, rscratch1, rscratch2); // At end of page?
6210 br(CS, STUB); // at the end of page then go to stub
7094 // On other systems, the helper is a usual C function.
7095 //
7096 void MacroAssembler::get_thread(Register dst) {
7097 RegSet saved_regs =
7098 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
7099 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
7100
7101 protect_return_address();
7102 push(saved_regs, sp);
7103
7104 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
7105 blr(lr);
7106 if (dst != c_rarg0) {
7107 mov(dst, c_rarg0);
7108 }
7109
7110 pop(saved_regs, sp);
7111 authenticate_return_address();
7112 }
7113
7114 #ifdef COMPILER2
7115 // C2 compiled method's prolog code
7116 // Moved here from aarch64.ad to support Valhalla code below
7117 void MacroAssembler::verified_entry(Compile* C, int sp_inc) {
7118 if (C->clinit_barrier_on_entry()) {
7119 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
7120
7121 Label L_skip_barrier;
7122
7123 mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
7124 clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
7125 far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
7126 bind(L_skip_barrier);
7127 }
7128
7129 if (C->max_vector_size() > 0) {
7130 reinitialize_ptrue();
7131 }
7132
7133 int bangsize = C->output()->bang_size_in_bytes();
7134 if (C->output()->need_stack_bang(bangsize))
7135 generate_stack_overflow_check(bangsize);
7136
7137 // n.b. frame size includes space for return pc and rfp
7138 const long framesize = C->output()->frame_size_in_bytes();
7139 build_frame(framesize DEBUG_ONLY(COMMA sp_inc != 0));
7140
7141 if (C->needs_stack_repair()) {
7142 save_stack_increment(sp_inc, framesize);
7143 }
7144
7145 if (VerifyStackAtCalls) {
7146 Unimplemented();
7147 }
7148 }
7149 #endif // COMPILER2
7150
7151 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
7152 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
7153 // An inline type might be returned. If fields are in registers we
7154 // need to allocate an inline type instance and initialize it with
7155 // the value of the fields.
7156 Label skip;
7157 // We only need a new buffered inline type if a new one is not returned
7158 tbz(r0, 0, skip);
7159 int call_offset = -1;
7160
7161 // Be careful not to clobber r1-7 which hold returned fields
7162 // Also do not use callee-saved registers as these may be live in the interpreter
7163 Register tmp1 = r13, tmp2 = r14, klass = r15, r0_preserved = r12;
7164
7165 // The following code is similar to allocate_instance but has some slight differences,
7166 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
7167 // allocating is not necessary if vk != nullptr, etc. allocate_instance is not aware of these.
7168 Label slow_case;
7169 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
7170 mov(r0_preserved, r0); // save r0 for slow_case since *_allocate may corrupt it when allocation failed
7171
7172 if (vk != nullptr) {
7173 // Called from C1, where the return type is statically known.
7174 movptr(klass, (intptr_t)vk->get_InlineKlass());
7175 jint lh = vk->layout_helper();
7176 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
7177 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
7178 tlab_allocate(r0, noreg, lh, tmp1, tmp2, slow_case);
7179 } else {
7180 b(slow_case);
7181 }
7182 } else {
7183 // Call from interpreter. R0 contains ((the InlineKlass* of the return type) | 0x01)
7184 andr(klass, r0, -2);
7185 if (UseTLAB) {
7186 ldrw(tmp2, Address(klass, Klass::layout_helper_offset()));
7187 tst(tmp2, Klass::_lh_instance_slow_path_bit);
7188 br(Assembler::NE, slow_case);
7189 tlab_allocate(r0, tmp2, 0, tmp1, tmp2, slow_case);
7190 } else {
7191 b(slow_case);
7192 }
7193 }
7194 if (UseTLAB) {
7195 // 2. Initialize buffered inline instance header
7196 Register buffer_obj = r0;
7197 if (UseCompactObjectHeaders) {
7198 ldr(rscratch1, Address(klass, Klass::prototype_header_offset()));
7199 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7200 } else {
7201 mov(rscratch1, (intptr_t)markWord::inline_type_prototype().value());
7202 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7203 store_klass_gap(buffer_obj, zr);
7204 if (vk == nullptr) {
7205 // store_klass corrupts klass, so save it for later use (interpreter case only).
7206 mov(tmp1, klass);
7207 }
7208 store_klass(buffer_obj, klass);
7209 klass = tmp1;
7210 }
7211 // 3. Initialize its fields with an inline class specific handler
7212 if (vk != nullptr) {
7213 far_call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
7214 } else {
7215 ldr(tmp1, Address(klass, InlineKlass::adr_members_offset()));
7216 ldr(tmp1, Address(tmp1, InlineKlass::pack_handler_offset()));
7217 blr(tmp1);
7218 }
7219
7220 membar(Assembler::StoreStore);
7221 b(skip);
7222 } else {
7223 // Must have already branched to slow_case above.
7224 DEBUG_ONLY(should_not_reach_here());
7225 }
7226 bind(slow_case);
7227 // We failed to allocate a new inline type, fall back to a runtime
7228 // call. Some oop field may be live in some registers but we can't
7229 // tell. That runtime call will take care of preserving them
7230 // across a GC if there's one.
7231 mov(r0, r0_preserved);
7232
7233 if (from_interpreter) {
7234 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
7235 } else {
7236 far_call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
7237 call_offset = offset();
7238 }
7239 membar(Assembler::StoreStore);
7240
7241 bind(skip);
7242 return call_offset;
7243 }
7244
7245 // Move a value between registers/stack slots and update the reg_state
7246 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
7247 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
7248 if (reg_state[to->value()] == reg_written) {
7249 return true; // Already written
7250 }
7251
7252 if (from != to && bt != T_VOID) {
7253 if (reg_state[to->value()] == reg_readonly) {
7254 return false; // Not yet writable
7255 }
7256 if (from->is_reg()) {
7257 if (to->is_reg()) {
7258 if (from->is_Register() && to->is_Register()) {
7259 mov(to->as_Register(), from->as_Register());
7260 } else if (from->is_FloatRegister() && to->is_FloatRegister()) {
7261 fmovd(to->as_FloatRegister(), from->as_FloatRegister());
7262 } else {
7263 ShouldNotReachHere();
7264 }
7265 } else {
7266 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7267 Address to_addr = Address(sp, st_off);
7268 if (from->is_FloatRegister()) {
7269 if (bt == T_DOUBLE) {
7270 strd(from->as_FloatRegister(), to_addr);
7271 } else {
7272 assert(bt == T_FLOAT, "must be float");
7273 strs(from->as_FloatRegister(), to_addr);
7274 }
7275 } else {
7276 str(from->as_Register(), to_addr);
7277 }
7278 }
7279 } else {
7280 Address from_addr = Address(sp, from->reg2stack() * VMRegImpl::stack_slot_size);
7281 if (to->is_reg()) {
7282 if (to->is_FloatRegister()) {
7283 if (bt == T_DOUBLE) {
7284 ldrd(to->as_FloatRegister(), from_addr);
7285 } else {
7286 assert(bt == T_FLOAT, "must be float");
7287 ldrs(to->as_FloatRegister(), from_addr);
7288 }
7289 } else {
7290 ldr(to->as_Register(), from_addr);
7291 }
7292 } else {
7293 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7294 ldr(rscratch1, from_addr);
7295 str(rscratch1, Address(sp, st_off));
7296 }
7297 }
7298 }
7299
7300 // Update register states
7301 reg_state[from->value()] = reg_writable;
7302 reg_state[to->value()] = reg_written;
7303 return true;
7304 }
7305
7306 // Calculate the extra stack space required for packing or unpacking inline
7307 // args and adjust the stack pointer
7308 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
7309 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
7310 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
7311 assert(sp_inc > 0, "sanity");
7312
7313 // Save a copy of the FP and LR here for deoptimization patching and frame walking
7314 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
7315
7316 // Adjust the stack pointer. This will be repaired on return by MacroAssembler::remove_frame
7317 if (sp_inc < (1 << 9)) {
7318 sub(sp, sp, sp_inc); // Fits in an immediate
7319 } else {
7320 mov(rscratch1, sp_inc);
7321 sub(sp, sp, rscratch1);
7322 }
7323
7324 return sp_inc + 2 * wordSize; // Account for the FP/LR space
7325 }
7326
7327 // Read all fields from an inline type oop and store the values in registers/stack slots
7328 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
7329 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
7330 RegState reg_state[]) {
7331 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
7332 assert(from->is_valid(), "source must be valid");
7333 bool progress = false;
7334 #ifdef ASSERT
7335 const int start_offset = offset();
7336 #endif
7337
7338 Label L_null, L_notNull;
7339 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
7340 Register tmp1 = r10;
7341 Register tmp2 = r11;
7342
7343 #ifndef ASSERT
7344 RegSet clobbered_gp_regs = MacroAssembler::call_clobbered_gp_registers();
7345 assert(clobbered_gp_regs.contains(tmp1), "tmp1 must be saved explicitly if it's not a clobber");
7346 assert(clobbered_gp_regs.contains(tmp2), "tmp2 must be saved explicitly if it's not a clobber");
7347 assert(clobbered_gp_regs.contains(r14), "r14 must be saved explicitly if it's not a clobber");
7348 #endif
7349
7350 Register fromReg = noreg;
7351 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
7352 bool done = true;
7353 bool mark_done = true;
7354 VMReg toReg;
7355 BasicType bt;
7356 // Check if argument requires a null check
7357 bool null_check = false;
7358 VMReg nullCheckReg;
7359 while (stream.next(nullCheckReg, bt)) {
7360 if (sig->at(stream.sig_index())._offset == -1) {
7361 null_check = true;
7362 break;
7363 }
7364 }
7365 stream.reset(sig_index, to_index);
7366 while (stream.next(toReg, bt)) {
7367 assert(toReg->is_valid(), "destination must be valid");
7368 int idx = (int)toReg->value();
7369 if (reg_state[idx] == reg_readonly) {
7370 if (idx != from->value()) {
7371 mark_done = false;
7372 }
7373 done = false;
7374 continue;
7375 } else if (reg_state[idx] == reg_written) {
7376 continue;
7377 }
7378 assert(reg_state[idx] == reg_writable, "must be writable");
7379 reg_state[idx] = reg_written;
7380 progress = true;
7381
7382 if (fromReg == noreg) {
7383 if (from->is_reg()) {
7384 fromReg = from->as_Register();
7385 } else {
7386 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size;
7387 ldr(tmp1, Address(sp, st_off));
7388 fromReg = tmp1;
7389 }
7390 if (null_check) {
7391 // Nullable inline type argument, emit null check
7392 cbz(fromReg, L_null);
7393 }
7394 }
7395 int off = sig->at(stream.sig_index())._offset;
7396 if (off == -1) {
7397 assert(null_check, "Missing null check at");
7398 if (toReg->is_stack()) {
7399 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7400 mov(tmp2, 1);
7401 str(tmp2, Address(sp, st_off));
7402 } else {
7403 mov(toReg->as_Register(), 1);
7404 }
7405 continue;
7406 }
7407 assert(off > 0, "offset in object should be positive");
7408 Address fromAddr = Address(fromReg, off);
7409 if (!toReg->is_FloatRegister()) {
7410 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
7411 if (is_reference_type(bt)) {
7412 load_heap_oop(dst, fromAddr, rscratch1, rscratch2);
7413 } else {
7414 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
7415 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
7416 }
7417 if (toReg->is_stack()) {
7418 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7419 str(dst, Address(sp, st_off));
7420 }
7421 } else if (bt == T_DOUBLE) {
7422 ldrd(toReg->as_FloatRegister(), fromAddr);
7423 } else {
7424 assert(bt == T_FLOAT, "must be float");
7425 ldrs(toReg->as_FloatRegister(), fromAddr);
7426 }
7427 }
7428 if (progress && null_check) {
7429 if (done) {
7430 b(L_notNull);
7431 bind(L_null);
7432 // Set null marker to zero to signal that the argument is null.
7433 // Also set all fields to zero since the runtime requires a canonical
7434 // representation of a flat null.
7435 stream.reset(sig_index, to_index);
7436 while (stream.next(toReg, bt)) {
7437 if (toReg->is_stack()) {
7438 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7439 str(zr, Address(sp, st_off));
7440 } else if (toReg->is_FloatRegister()) {
7441 mov(toReg->as_FloatRegister(), T2S, 0);
7442 } else {
7443 mov(toReg->as_Register(), zr);
7444 }
7445 }
7446 bind(L_notNull);
7447 } else {
7448 bind(L_null);
7449 }
7450 }
7451
7452 sig_index = stream.sig_index();
7453 to_index = stream.regs_index();
7454
7455 if (mark_done && reg_state[from->value()] != reg_written) {
7456 // This is okay because no one else will write to that slot
7457 reg_state[from->value()] = reg_writable;
7458 }
7459 from_index--;
7460 assert(progress || (start_offset == offset()), "should not emit code");
7461 return done;
7462 }
7463
7464 // Pack fields back into an inline type oop
7465 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
7466 VMRegPair* from, int from_count, int& from_index, VMReg to,
7467 RegState reg_state[], Register val_array) {
7468 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
7469 assert(to->is_valid(), "destination must be valid");
7470
7471 if (reg_state[to->value()] == reg_written) {
7472 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7473 return true; // Already written
7474 }
7475
7476 // The GC barrier expanded by store_heap_oop below may call into the
7477 // runtime so use callee-saved registers for any values that need to be
7478 // preserved. The GC barrier assembler should take care of saving the
7479 // Java argument registers.
7480 // TODO 8284443 Isn't it an issue if below code uses r14 as tmp when it contains a spilled value?
7481 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
7482 Register val_obj_tmp = r21;
7483 Register from_reg_tmp = r22;
7484 Register tmp1 = r14;
7485 Register tmp2 = r13;
7486 Register tmp3 = r12;
7487 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
7488
7489 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
7490
7491 if (reg_state[to->value()] == reg_readonly) {
7492 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
7493 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7494 return false; // Not yet writable
7495 }
7496 val_obj = val_obj_tmp;
7497 }
7498
7499 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
7500 load_heap_oop(val_obj, Address(val_array, index), tmp1, tmp2);
7501
7502 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
7503 VMReg fromReg;
7504 BasicType bt;
7505 Label L_null;
7506 while (stream.next(fromReg, bt)) {
7507 assert(fromReg->is_valid(), "source must be valid");
7508 reg_state[fromReg->value()] = reg_writable;
7509
7510 int off = sig->at(stream.sig_index())._offset;
7511 if (off == -1) {
7512 // Nullable inline type argument, emit null check
7513 Label L_notNull;
7514 if (fromReg->is_stack()) {
7515 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7516 ldrb(tmp2, Address(sp, ld_off));
7517 cbnz(tmp2, L_notNull);
7518 } else {
7519 cbnz(fromReg->as_Register(), L_notNull);
7520 }
7521 mov(val_obj, 0);
7522 b(L_null);
7523 bind(L_notNull);
7524 continue;
7525 }
7526
7527 assert(off > 0, "offset in object should be positive");
7528 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
7529
7530 // Pack the scalarized field into the value object.
7531 Address dst(val_obj, off);
7532 if (!fromReg->is_FloatRegister()) {
7533 Register src;
7534 if (fromReg->is_stack()) {
7535 src = from_reg_tmp;
7536 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7537 load_sized_value(src, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
7538 } else {
7539 src = fromReg->as_Register();
7540 }
7541 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
7542 if (is_reference_type(bt)) {
7543 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep val_obj valid.
7544 mov(tmp3, val_obj);
7545 Address dst_with_tmp3(tmp3, off);
7546 store_heap_oop(dst_with_tmp3, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
7547 } else {
7548 store_sized_value(dst, src, size_in_bytes);
7549 }
7550 } else if (bt == T_DOUBLE) {
7551 strd(fromReg->as_FloatRegister(), dst);
7552 } else {
7553 assert(bt == T_FLOAT, "must be float");
7554 strs(fromReg->as_FloatRegister(), dst);
7555 }
7556 }
7557 bind(L_null);
7558 sig_index = stream.sig_index();
7559 from_index = stream.regs_index();
7560
7561 assert(reg_state[to->value()] == reg_writable, "must have already been read");
7562 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
7563 assert(success, "to register must be writeable");
7564 return true;
7565 }
7566
7567 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
7568 return (reg->is_FloatRegister()) ? v8->as_VMReg() : r14->as_VMReg();
7569 }
7570
7571 void MacroAssembler::cache_wb(Address line) {
7572 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
7573 assert(line.index() == noreg, "index should be noreg");
7574 assert(line.offset() == 0, "offset should be 0");
7575 // would like to assert this
7576 // assert(line._ext.shift == 0, "shift should be zero");
7577 if (VM_Version::supports_dcpop()) {
7578 // writeback using clear virtual address to point of persistence
7579 dc(Assembler::CVAP, line.base());
7580 } else {
7581 // no need to generate anything as Unsafe.writebackMemory should
7582 // never invoke this stub
7583 }
7584 }
7585
7586 void MacroAssembler::cache_wbsync(bool is_pre) {
7587 // we only need a barrier post sync
7588 if (!is_pre) {
7589 membar(Assembler::AnyAny);
7590 }
7961 }
7962
7963 // Check if the lock-stack is full.
7964 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7965 cmpw(top, (unsigned)LockStack::end_offset());
7966 br(Assembler::GE, slow);
7967
7968 // Check for recursion.
7969 subw(t, top, oopSize);
7970 ldr(t, Address(rthread, t));
7971 cmp(obj, t);
7972 br(Assembler::EQ, push);
7973
7974 // Check header for monitor (0b10).
7975 tst(mark, markWord::monitor_value);
7976 br(Assembler::NE, slow);
7977
7978 // Try to lock. Transition lock bits 0b01 => 0b00
7979 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7980 orr(mark, mark, markWord::unlocked_value);
7981 // Mask inline_type bit such that we go to the slow path if object is an inline type
7982 andr(mark, mark, ~((int) markWord::inline_type_bit_in_place));
7983
7984 eor(t, mark, markWord::unlocked_value);
7985 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7986 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7987 br(Assembler::NE, slow);
7988
7989 bind(push);
7990 // After successful lock, push object on lock-stack.
7991 str(obj, Address(rthread, top));
7992 addw(top, top, oopSize);
7993 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7994 }
7995
7996 // Implements fast-unlocking.
7997 //
7998 // - obj: the object to be unlocked
7999 // - t1, t2, t3: temporary registers
8000 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
8001 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
8002 // cmpxchg clobbers rscratch1.
8003 assert_different_registers(obj, t1, t2, t3, rscratch1);
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