9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "code/compiledIC.hpp"
30 #include "compiler/compileTask.hpp"
31 #include "compiler/disassembler.hpp"
32 #include "compiler/oopMap.hpp"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/cardTable.hpp"
37 #include "gc/shared/collectedHeap.hpp"
38 #include "gc/shared/tlab_globals.hpp"
39 #include "interpreter/bytecodeHistogram.hpp"
40 #include "interpreter/interpreter.hpp"
41 #include "interpreter/interpreterRuntime.hpp"
42 #include "jvm.h"
43 #include "memory/resourceArea.hpp"
44 #include "memory/universe.hpp"
45 #include "nativeInst_aarch64.hpp"
46 #include "oops/accessDecorators.hpp"
47 #include "oops/compressedKlass.inline.hpp"
48 #include "oops/compressedOops.inline.hpp"
49 #include "oops/klass.inline.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/icache.hpp"
52 #include "runtime/interfaceSupport.inline.hpp"
53 #include "runtime/javaThread.hpp"
54 #include "runtime/jniHandles.inline.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/globalDefinitions.hpp"
58 #include "utilities/powerOfTwo.hpp"
59 #ifdef COMPILER1
60 #include "c1/c1_LIRAssembler.hpp"
61 #endif
62 #ifdef COMPILER2
63 #include "oops/oop.hpp"
64 #include "opto/compile.hpp"
65 #include "opto/node.hpp"
66 #include "opto/output.hpp"
67 #endif
68
69 #include <sys/types.h>
70
71 #ifdef PRODUCT
72 #define BLOCK_COMMENT(str) /* nothing */
73 #else
74 #define BLOCK_COMMENT(str) block_comment(str)
75 #endif
76 #define STOP(str) stop(str);
77 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
78
1168 }
1169
1170 void MacroAssembler::post_call_nop() {
1171 if (!Continuations::enabled()) {
1172 return;
1173 }
1174 InstructionMark im(this);
1175 relocate(post_call_nop_Relocation::spec());
1176 InlineSkippedInstructionsCounter skipCounter(this);
1177 nop();
1178 movk(zr, 0);
1179 movk(zr, 0);
1180 }
1181
1182 // these are no-ops overridden by InterpreterMacroAssembler
1183
1184 void MacroAssembler::check_and_handle_earlyret(Register java_thread) { }
1185
1186 void MacroAssembler::check_and_handle_popframe(Register java_thread) { }
1187
1188 // Look up the method for a megamorphic invokeinterface call.
1189 // The target method is determined by <intf_klass, itable_index>.
1190 // The receiver klass is in recv_klass.
1191 // On success, the result will be in method_result, and execution falls through.
1192 // On failure, execution transfers to the given label.
1193 void MacroAssembler::lookup_interface_method(Register recv_klass,
1194 Register intf_klass,
1195 RegisterOrConstant itable_index,
1196 Register method_result,
1197 Register scan_temp,
1198 Label& L_no_such_interface,
1199 bool return_method) {
1200 assert_different_registers(recv_klass, intf_klass, scan_temp);
1201 assert_different_registers(method_result, intf_klass, scan_temp);
1202 assert(recv_klass != method_result || !return_method,
1203 "recv_klass can be destroyed when method isn't needed");
1204 assert(itable_index.is_constant() || itable_index.as_register() == method_result,
1205 "caller must use same register for non-constant itable index as for method");
1206
1207 // Compute start of first itableOffsetEntry (which is at the end of the vtable)
2043 ldarb(scratch, scratch);
2044 subs(zr, scratch, InstanceKlass::fully_initialized);
2045 br(Assembler::EQ, *L_fast_path);
2046
2047 // Fast path check: current thread is initializer thread
2048 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2049 cmp(rthread, scratch);
2050
2051 if (L_slow_path == &L_fallthrough) {
2052 br(Assembler::EQ, *L_fast_path);
2053 bind(*L_slow_path);
2054 } else if (L_fast_path == &L_fallthrough) {
2055 br(Assembler::NE, *L_slow_path);
2056 bind(*L_fast_path);
2057 } else {
2058 Unimplemented();
2059 }
2060 }
2061
2062 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2063 if (!VerifyOops) return;
2064
2065 // Pass register number to verify_oop_subroutine
2066 const char* b = nullptr;
2067 {
2068 ResourceMark rm;
2069 stringStream ss;
2070 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2071 b = code_string(ss.as_string());
2072 }
2073 BLOCK_COMMENT("verify_oop {");
2074
2075 strip_return_address(); // This might happen within a stack frame.
2076 protect_return_address();
2077 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2078 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2079
2080 mov(r0, reg);
2081 movptr(rscratch1, (uintptr_t)(address)b);
2082
2083 // call indirectly to solve generation ordering problem
2084 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2085 ldr(rscratch2, Address(rscratch2));
2086 blr(rscratch2);
2087
2088 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2089 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2090 authenticate_return_address();
2091
2092 BLOCK_COMMENT("} verify_oop");
2093 }
2094
2095 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2096 if (!VerifyOops) return;
2097
2098 const char* b = nullptr;
2099 {
2100 ResourceMark rm;
2101 stringStream ss;
2102 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2103 b = code_string(ss.as_string());
2104 }
2105 BLOCK_COMMENT("verify_oop_addr {");
2106
2107 strip_return_address(); // This might happen within a stack frame.
2108 protect_return_address();
2109 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2110 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2111
2112 // addr may contain sp so we will have to adjust it based on the
2113 // pushes that we just did.
2114 if (addr.uses(sp)) {
2115 lea(r0, addr);
2116 ldr(r0, Address(r0, 4 * wordSize));
2174 call_VM_leaf_base(entry_point, 1);
2175 }
2176
2177 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2178 assert_different_registers(arg_1, c_rarg0);
2179 pass_arg0(this, arg_0);
2180 pass_arg1(this, arg_1);
2181 call_VM_leaf_base(entry_point, 2);
2182 }
2183
2184 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2185 Register arg_1, Register arg_2) {
2186 assert_different_registers(arg_1, c_rarg0);
2187 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2188 pass_arg0(this, arg_0);
2189 pass_arg1(this, arg_1);
2190 pass_arg2(this, arg_2);
2191 call_VM_leaf_base(entry_point, 3);
2192 }
2193
2194 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2195 pass_arg0(this, arg_0);
2196 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2197 }
2198
2199 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2200
2201 assert_different_registers(arg_0, c_rarg1);
2202 pass_arg1(this, arg_1);
2203 pass_arg0(this, arg_0);
2204 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2205 }
2206
2207 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2208 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2209 assert_different_registers(arg_1, c_rarg2);
2210 pass_arg2(this, arg_2);
2211 pass_arg1(this, arg_1);
2212 pass_arg0(this, arg_0);
2213 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2219 assert_different_registers(arg_2, c_rarg3);
2220 pass_arg3(this, arg_3);
2221 pass_arg2(this, arg_2);
2222 pass_arg1(this, arg_1);
2223 pass_arg0(this, arg_0);
2224 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2225 }
2226
2227 void MacroAssembler::null_check(Register reg, int offset) {
2228 if (needs_explicit_null_check(offset)) {
2229 // provoke OS null exception if reg is null by
2230 // accessing M[reg] w/o changing any registers
2231 // NOTE: this is plenty to provoke a segv
2232 ldr(zr, Address(reg));
2233 } else {
2234 // nothing to do, (later) access of M[reg + offset]
2235 // will provoke OS null exception if reg is null
2236 }
2237 }
2238
2239 // MacroAssembler protected routines needed to implement
2240 // public methods
2241
2242 void MacroAssembler::mov(Register r, Address dest) {
2243 code_section()->relocate(pc(), dest.rspec());
2244 uint64_t imm64 = (uint64_t)dest.target();
2245 movptr(r, imm64);
2246 }
2247
2248 // Move a constant pointer into r. In AArch64 mode the virtual
2249 // address space is 48 bits in size, so we only need three
2250 // instructions to create a patchable instruction sequence that can
2251 // reach anywhere.
2252 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2253 #ifndef PRODUCT
2254 {
2255 char buffer[64];
2256 snprintf(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2257 block_comment(buffer);
2258 }
5006 adrp(rscratch1, src2, offset);
5007 ldr(rscratch1, Address(rscratch1, offset));
5008 cmp(src1, rscratch1);
5009 }
5010
5011 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5012 cmp(obj1, obj2);
5013 }
5014
5015 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5016 load_method_holder(rresult, rmethod);
5017 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5018 }
5019
5020 void MacroAssembler::load_method_holder(Register holder, Register method) {
5021 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5022 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5023 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5024 }
5025
5026 // Loads the obj's Klass* into dst.
5027 // Preserves all registers (incl src, rscratch1 and rscratch2).
5028 // Input:
5029 // src - the oop we want to load the klass from.
5030 // dst - output narrow klass.
5031 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5032 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5033 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5034 lsr(dst, dst, markWord::klass_shift);
5035 }
5036
5037 void MacroAssembler::load_klass(Register dst, Register src) {
5038 if (UseCompactObjectHeaders) {
5039 load_narrow_klass_compact(dst, src);
5040 decode_klass_not_null(dst);
5041 } else if (UseCompressedClassPointers) {
5042 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5043 decode_klass_not_null(dst);
5044 } else {
5045 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5116 }
5117 cmp(klass, tmp);
5118 }
5119
5120 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5121 if (UseCompactObjectHeaders) {
5122 load_narrow_klass_compact(tmp1, obj1);
5123 load_narrow_klass_compact(tmp2, obj2);
5124 cmpw(tmp1, tmp2);
5125 } else if (UseCompressedClassPointers) {
5126 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5127 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5128 cmpw(tmp1, tmp2);
5129 } else {
5130 ldr(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5131 ldr(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5132 cmp(tmp1, tmp2);
5133 }
5134 }
5135
5136 void MacroAssembler::store_klass(Register dst, Register src) {
5137 // FIXME: Should this be a store release? concurrent gcs assumes
5138 // klass length is valid if klass field is not null.
5139 assert(!UseCompactObjectHeaders, "not with compact headers");
5140 if (UseCompressedClassPointers) {
5141 encode_klass_not_null(src);
5142 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5143 } else {
5144 str(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5145 }
5146 }
5147
5148 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5149 assert(!UseCompactObjectHeaders, "not with compact headers");
5150 if (UseCompressedClassPointers) {
5151 // Store to klass gap in destination
5152 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5153 }
5154 }
5155
5456 if (as_raw) {
5457 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5458 } else {
5459 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5460 }
5461 }
5462
5463 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5464 Address dst, Register val,
5465 Register tmp1, Register tmp2, Register tmp3) {
5466 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5467 decorators = AccessInternal::decorator_fixup(decorators, type);
5468 bool as_raw = (decorators & AS_RAW) != 0;
5469 if (as_raw) {
5470 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5471 } else {
5472 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5473 }
5474 }
5475
5476 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5477 Register tmp2, DecoratorSet decorators) {
5478 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5479 }
5480
5481 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5482 Register tmp2, DecoratorSet decorators) {
5483 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5484 }
5485
5486 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5487 Register tmp2, Register tmp3, DecoratorSet decorators) {
5488 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5489 }
5490
5491 // Used for storing nulls.
5492 void MacroAssembler::store_heap_oop_null(Address dst) {
5493 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5494 }
5495
5532 oop_index = oop_recorder()->allocate_metadata_index(obj);
5533 } else {
5534 oop_index = oop_recorder()->find_index(obj);
5535 }
5536 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5537 mov(dst, Address((address)obj, rspec));
5538 }
5539
5540 Address MacroAssembler::constant_oop_address(jobject obj) {
5541 #ifdef ASSERT
5542 {
5543 ThreadInVMfromUnknown tiv;
5544 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5545 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5546 }
5547 #endif
5548 int oop_index = oop_recorder()->find_index(obj);
5549 return Address((address)obj, oop_Relocation::spec(oop_index));
5550 }
5551
5552 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5553 void MacroAssembler::tlab_allocate(Register obj,
5554 Register var_size_in_bytes,
5555 int con_size_in_bytes,
5556 Register t1,
5557 Register t2,
5558 Label& slow_case) {
5559 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5560 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5561 }
5562
5563 void MacroAssembler::inc_held_monitor_count(Register tmp) {
5564 Address dst(rthread, JavaThread::held_monitor_count_offset());
5565 #ifdef ASSERT
5566 ldr(tmp, dst);
5567 increment(tmp);
5568 str(tmp, dst);
5569 Label ok;
5570 tbz(tmp, 63, ok);
5571 STOP("assert(held monitor count underflow)");
5603 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5604 cmp(rscratch2, rscratch1);
5605 br(Assembler::HS, next);
5606 STOP("assert(top >= start)");
5607 should_not_reach_here();
5608
5609 bind(next);
5610 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5611 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5612 cmp(rscratch2, rscratch1);
5613 br(Assembler::HS, ok);
5614 STOP("assert(top <= end)");
5615 should_not_reach_here();
5616
5617 bind(ok);
5618 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5619 }
5620 #endif
5621 }
5622
5623 // Writes to stack successive pages until offset reached to check for
5624 // stack overflow + shadow pages. This clobbers tmp.
5625 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5626 assert_different_registers(tmp, size, rscratch1);
5627 mov(tmp, sp);
5628 // Bang stack for total size given plus shadow page size.
5629 // Bang one page at a time because large size can bang beyond yellow and
5630 // red zones.
5631 Label loop;
5632 mov(rscratch1, (int)os::vm_page_size());
5633 bind(loop);
5634 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5635 subsw(size, size, rscratch1);
5636 str(size, Address(tmp));
5637 br(Assembler::GT, loop);
5638
5639 // Bang down shadow pages too.
5640 // At this point, (tmp-0) is the last address touched, so don't
5641 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5642 // was post-decremented.) Skip this address by starting at i=1, and
5728 }
5729
5730 void MacroAssembler::remove_frame(int framesize) {
5731 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5732 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5733 if (framesize < ((1 << 9) + 2 * wordSize)) {
5734 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5735 add(sp, sp, framesize);
5736 } else {
5737 if (framesize < ((1 << 12) + 2 * wordSize))
5738 add(sp, sp, framesize - 2 * wordSize);
5739 else {
5740 mov(rscratch1, framesize - 2 * wordSize);
5741 add(sp, sp, rscratch1);
5742 }
5743 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5744 }
5745 authenticate_return_address();
5746 }
5747
5748
5749 // This method counts leading positive bytes (highest bit not set) in provided byte array
5750 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
5751 // Simple and most common case of aligned small array which is not at the
5752 // end of memory page is placed here. All other cases are in stub.
5753 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
5754 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
5755 assert_different_registers(ary1, len, result);
5756
5757 mov(result, len);
5758 cmpw(len, 0);
5759 br(LE, DONE);
5760 cmpw(len, 4 * wordSize);
5761 br(GE, STUB_LONG); // size > 32 then go to stub
5762
5763 int shift = 64 - exact_log2(os::vm_page_size());
5764 lsl(rscratch1, ary1, shift);
5765 mov(rscratch2, (size_t)(4 * wordSize) << shift);
5766 adds(rscratch2, rscratch1, rscratch2); // At end of page?
5767 br(CS, STUB); // at the end of page then go to stub
6641 // On other systems, the helper is a usual C function.
6642 //
6643 void MacroAssembler::get_thread(Register dst) {
6644 RegSet saved_regs =
6645 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
6646 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
6647
6648 protect_return_address();
6649 push(saved_regs, sp);
6650
6651 mov(lr, CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper));
6652 blr(lr);
6653 if (dst != c_rarg0) {
6654 mov(dst, c_rarg0);
6655 }
6656
6657 pop(saved_regs, sp);
6658 authenticate_return_address();
6659 }
6660
6661 void MacroAssembler::cache_wb(Address line) {
6662 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
6663 assert(line.index() == noreg, "index should be noreg");
6664 assert(line.offset() == 0, "offset should be 0");
6665 // would like to assert this
6666 // assert(line._ext.shift == 0, "shift should be zero");
6667 if (VM_Version::supports_dcpop()) {
6668 // writeback using clear virtual address to point of persistence
6669 dc(Assembler::CVAP, line.base());
6670 } else {
6671 // no need to generate anything as Unsafe.writebackMemory should
6672 // never invoke this stub
6673 }
6674 }
6675
6676 void MacroAssembler::cache_wbsync(bool is_pre) {
6677 // we only need a barrier post sync
6678 if (!is_pre) {
6679 membar(Assembler::AnyAny);
6680 }
7039 }
7040
7041 // Check if the lock-stack is full.
7042 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7043 cmpw(top, (unsigned)LockStack::end_offset());
7044 br(Assembler::GE, slow);
7045
7046 // Check for recursion.
7047 subw(t, top, oopSize);
7048 ldr(t, Address(rthread, t));
7049 cmp(obj, t);
7050 br(Assembler::EQ, push);
7051
7052 // Check header for monitor (0b10).
7053 tst(mark, markWord::monitor_value);
7054 br(Assembler::NE, slow);
7055
7056 // Try to lock. Transition lock bits 0b01 => 0b00
7057 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7058 orr(mark, mark, markWord::unlocked_value);
7059 eor(t, mark, markWord::unlocked_value);
7060 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7061 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7062 br(Assembler::NE, slow);
7063
7064 bind(push);
7065 // After successful lock, push object on lock-stack.
7066 str(obj, Address(rthread, top));
7067 addw(top, top, oopSize);
7068 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7069 }
7070
7071 // Implements lightweight-unlocking.
7072 //
7073 // - obj: the object to be unlocked
7074 // - t1, t2, t3: temporary registers
7075 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7076 void MacroAssembler::lightweight_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7077 assert(LockingMode == LM_LIGHTWEIGHT, "only used with new lightweight locking");
7078 // cmpxchg clobbers rscratch1.
|
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "ci/ciInlineKlass.hpp"
30 #include "code/compiledIC.hpp"
31 #include "compiler/compileTask.hpp"
32 #include "compiler/disassembler.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "gc/shared/cardTableBarrierSet.hpp"
37 #include "gc/shared/cardTable.hpp"
38 #include "gc/shared/collectedHeap.hpp"
39 #include "gc/shared/tlab_globals.hpp"
40 #include "interpreter/bytecodeHistogram.hpp"
41 #include "interpreter/interpreter.hpp"
42 #include "interpreter/interpreterRuntime.hpp"
43 #include "jvm.h"
44 #include "memory/resourceArea.hpp"
45 #include "memory/universe.hpp"
46 #include "nativeInst_aarch64.hpp"
47 #include "oops/accessDecorators.hpp"
48 #include "oops/compressedKlass.inline.hpp"
49 #include "oops/compressedOops.inline.hpp"
50 #include "oops/klass.inline.hpp"
51 #include "oops/resolvedFieldEntry.hpp"
52 #include "runtime/continuation.hpp"
53 #include "runtime/globals.hpp"
54 #include "runtime/icache.hpp"
55 #include "runtime/interfaceSupport.inline.hpp"
56 #include "runtime/javaThread.hpp"
57 #include "runtime/jniHandles.inline.hpp"
58 #include "runtime/sharedRuntime.hpp"
59 #include "runtime/signature_cc.hpp"
60 #include "runtime/stubRoutines.hpp"
61 #include "utilities/globalDefinitions.hpp"
62 #include "utilities/powerOfTwo.hpp"
63 #include "vmreg_aarch64.inline.hpp"
64 #ifdef COMPILER1
65 #include "c1/c1_LIRAssembler.hpp"
66 #endif
67 #ifdef COMPILER2
68 #include "oops/oop.hpp"
69 #include "opto/compile.hpp"
70 #include "opto/node.hpp"
71 #include "opto/output.hpp"
72 #endif
73
74 #include <sys/types.h>
75
76 #ifdef PRODUCT
77 #define BLOCK_COMMENT(str) /* nothing */
78 #else
79 #define BLOCK_COMMENT(str) block_comment(str)
80 #endif
81 #define STOP(str) stop(str);
82 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
83
1173 }
1174
1175 void MacroAssembler::post_call_nop() {
1176 if (!Continuations::enabled()) {
1177 return;
1178 }
1179 InstructionMark im(this);
1180 relocate(post_call_nop_Relocation::spec());
1181 InlineSkippedInstructionsCounter skipCounter(this);
1182 nop();
1183 movk(zr, 0);
1184 movk(zr, 0);
1185 }
1186
1187 // these are no-ops overridden by InterpreterMacroAssembler
1188
1189 void MacroAssembler::check_and_handle_earlyret(Register java_thread) { }
1190
1191 void MacroAssembler::check_and_handle_popframe(Register java_thread) { }
1192
1193 void MacroAssembler::get_default_value_oop(Register inline_klass, Register temp_reg, Register obj) {
1194 assert_different_registers(inline_klass, temp_reg, obj, rscratch2);
1195 #ifdef ASSERT
1196 {
1197 Label done_check;
1198 test_klass_is_inline_type(inline_klass, temp_reg, done_check);
1199 stop("get_default_value_oop from non inline type klass");
1200 bind(done_check);
1201 }
1202 #endif
1203 Register offset = temp_reg;
1204 // Getting the offset of the pre-allocated default value
1205 ldr(offset, Address(inline_klass, in_bytes(InstanceKlass::adr_inlineklass_fixed_block_offset())));
1206 load_sized_value(offset, Address(offset, in_bytes(InlineKlass::default_value_offset_offset())), sizeof(int), true /*is_signed*/);
1207
1208 // Getting the mirror
1209 ldr(obj, Address(inline_klass, in_bytes(Klass::java_mirror_offset())));
1210 resolve_oop_handle(obj, inline_klass, rscratch2);
1211
1212 // Getting the pre-allocated default value from the mirror
1213 Address field(obj, offset);
1214 load_heap_oop(obj, field, inline_klass, rscratch2);
1215 }
1216
1217 void MacroAssembler::get_empty_inline_type_oop(Register inline_klass, Register temp_reg, Register obj) {
1218 #ifdef ASSERT
1219 {
1220 Label done_check;
1221 test_klass_is_empty_inline_type(inline_klass, temp_reg, done_check);
1222 stop("get_empty_value from non-empty inline klass");
1223 bind(done_check);
1224 }
1225 #endif
1226 get_default_value_oop(inline_klass, temp_reg, obj);
1227 }
1228
1229 // Look up the method for a megamorphic invokeinterface call.
1230 // The target method is determined by <intf_klass, itable_index>.
1231 // The receiver klass is in recv_klass.
1232 // On success, the result will be in method_result, and execution falls through.
1233 // On failure, execution transfers to the given label.
1234 void MacroAssembler::lookup_interface_method(Register recv_klass,
1235 Register intf_klass,
1236 RegisterOrConstant itable_index,
1237 Register method_result,
1238 Register scan_temp,
1239 Label& L_no_such_interface,
1240 bool return_method) {
1241 assert_different_registers(recv_klass, intf_klass, scan_temp);
1242 assert_different_registers(method_result, intf_klass, scan_temp);
1243 assert(recv_klass != method_result || !return_method,
1244 "recv_klass can be destroyed when method isn't needed");
1245 assert(itable_index.is_constant() || itable_index.as_register() == method_result,
1246 "caller must use same register for non-constant itable index as for method");
1247
1248 // Compute start of first itableOffsetEntry (which is at the end of the vtable)
2084 ldarb(scratch, scratch);
2085 subs(zr, scratch, InstanceKlass::fully_initialized);
2086 br(Assembler::EQ, *L_fast_path);
2087
2088 // Fast path check: current thread is initializer thread
2089 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2090 cmp(rthread, scratch);
2091
2092 if (L_slow_path == &L_fallthrough) {
2093 br(Assembler::EQ, *L_fast_path);
2094 bind(*L_slow_path);
2095 } else if (L_fast_path == &L_fallthrough) {
2096 br(Assembler::NE, *L_slow_path);
2097 bind(*L_fast_path);
2098 } else {
2099 Unimplemented();
2100 }
2101 }
2102
2103 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2104 if (!VerifyOops || VerifyAdapterSharing) {
2105 // Below address of the code string confuses VerifyAdapterSharing
2106 // because it may differ between otherwise equivalent adapters.
2107 return;
2108 }
2109
2110 // Pass register number to verify_oop_subroutine
2111 const char* b = nullptr;
2112 {
2113 ResourceMark rm;
2114 stringStream ss;
2115 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2116 b = code_string(ss.as_string());
2117 }
2118 BLOCK_COMMENT("verify_oop {");
2119
2120 strip_return_address(); // This might happen within a stack frame.
2121 protect_return_address();
2122 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2123 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2124
2125 mov(r0, reg);
2126 movptr(rscratch1, (uintptr_t)(address)b);
2127
2128 // call indirectly to solve generation ordering problem
2129 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2130 ldr(rscratch2, Address(rscratch2));
2131 blr(rscratch2);
2132
2133 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2134 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2135 authenticate_return_address();
2136
2137 BLOCK_COMMENT("} verify_oop");
2138 }
2139
2140 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2141 if (!VerifyOops || VerifyAdapterSharing) {
2142 // Below address of the code string confuses VerifyAdapterSharing
2143 // because it may differ between otherwise equivalent adapters.
2144 return;
2145 }
2146
2147 const char* b = nullptr;
2148 {
2149 ResourceMark rm;
2150 stringStream ss;
2151 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2152 b = code_string(ss.as_string());
2153 }
2154 BLOCK_COMMENT("verify_oop_addr {");
2155
2156 strip_return_address(); // This might happen within a stack frame.
2157 protect_return_address();
2158 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2159 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2160
2161 // addr may contain sp so we will have to adjust it based on the
2162 // pushes that we just did.
2163 if (addr.uses(sp)) {
2164 lea(r0, addr);
2165 ldr(r0, Address(r0, 4 * wordSize));
2223 call_VM_leaf_base(entry_point, 1);
2224 }
2225
2226 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2227 assert_different_registers(arg_1, c_rarg0);
2228 pass_arg0(this, arg_0);
2229 pass_arg1(this, arg_1);
2230 call_VM_leaf_base(entry_point, 2);
2231 }
2232
2233 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2234 Register arg_1, Register arg_2) {
2235 assert_different_registers(arg_1, c_rarg0);
2236 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2237 pass_arg0(this, arg_0);
2238 pass_arg1(this, arg_1);
2239 pass_arg2(this, arg_2);
2240 call_VM_leaf_base(entry_point, 3);
2241 }
2242
2243 void MacroAssembler::super_call_VM_leaf(address entry_point) {
2244 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2245 }
2246
2247 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2248 pass_arg0(this, arg_0);
2249 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2250 }
2251
2252 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2253
2254 assert_different_registers(arg_0, c_rarg1);
2255 pass_arg1(this, arg_1);
2256 pass_arg0(this, arg_0);
2257 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2258 }
2259
2260 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2261 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2262 assert_different_registers(arg_1, c_rarg2);
2263 pass_arg2(this, arg_2);
2264 pass_arg1(this, arg_1);
2265 pass_arg0(this, arg_0);
2266 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2272 assert_different_registers(arg_2, c_rarg3);
2273 pass_arg3(this, arg_3);
2274 pass_arg2(this, arg_2);
2275 pass_arg1(this, arg_1);
2276 pass_arg0(this, arg_0);
2277 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2278 }
2279
2280 void MacroAssembler::null_check(Register reg, int offset) {
2281 if (needs_explicit_null_check(offset)) {
2282 // provoke OS null exception if reg is null by
2283 // accessing M[reg] w/o changing any registers
2284 // NOTE: this is plenty to provoke a segv
2285 ldr(zr, Address(reg));
2286 } else {
2287 // nothing to do, (later) access of M[reg + offset]
2288 // will provoke OS null exception if reg is null
2289 }
2290 }
2291
2292 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2293 assert_different_registers(markword, rscratch2);
2294 mov(rscratch2, markWord::inline_type_mask_in_place);
2295 andr(markword, markword, rscratch2);
2296 mov(rscratch2, markWord::inline_type_pattern);
2297 cmp(markword, rscratch2);
2298 br(Assembler::EQ, is_inline_type);
2299 }
2300
2301 void MacroAssembler::test_klass_is_inline_type(Register klass, Register temp_reg, Label& is_inline_type) {
2302 ldrh(temp_reg, Address(klass, Klass::access_flags_offset()));
2303 andr(temp_reg, temp_reg, JVM_ACC_IDENTITY);
2304 cbz(temp_reg, is_inline_type);
2305 }
2306
2307 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type) {
2308 assert_different_registers(tmp, rscratch1);
2309 cbz(object, not_inline_type);
2310 const int is_inline_type_mask = markWord::inline_type_pattern;
2311 ldr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2312 mov(rscratch1, is_inline_type_mask);
2313 andr(tmp, tmp, rscratch1);
2314 cmp(tmp, rscratch1);
2315 br(Assembler::NE, not_inline_type);
2316 }
2317
2318 void MacroAssembler::test_klass_is_empty_inline_type(Register klass, Register temp_reg, Label& is_empty_inline_type) {
2319 #ifdef ASSERT
2320 {
2321 Label done_check;
2322 test_klass_is_inline_type(klass, temp_reg, done_check);
2323 stop("test_klass_is_empty_inline_type with non inline type klass");
2324 bind(done_check);
2325 }
2326 #endif
2327 ldrw(temp_reg, Address(klass, InstanceKlass::misc_flags_offset()));
2328 andr(temp_reg, temp_reg, InstanceKlassFlags::is_empty_inline_type_value());
2329 cbnz(temp_reg, is_empty_inline_type);
2330 }
2331
2332 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2333 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2334 tbnz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, is_null_free_inline_type);
2335 }
2336
2337 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2338 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2339 tbz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, not_null_free_inline_type);
2340 }
2341
2342 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2343 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2344 tbnz(flags, ResolvedFieldEntry::is_flat_shift, is_flat);
2345 }
2346
2347 void MacroAssembler::test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker) {
2348 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2349 tbnz(flags, ResolvedFieldEntry::has_null_marker_shift, has_null_marker);
2350 }
2351
2352 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2353 Label test_mark_word;
2354 // load mark word
2355 ldr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2356 // check displaced
2357 tst(temp_reg, markWord::unlocked_value);
2358 br(Assembler::NE, test_mark_word);
2359 // slow path use klass prototype
2360 load_prototype_header(temp_reg, oop);
2361
2362 bind(test_mark_word);
2363 andr(temp_reg, temp_reg, test_bit);
2364 if (jmp_set) {
2365 cbnz(temp_reg, jmp_label);
2366 } else {
2367 cbz(temp_reg, jmp_label);
2368 }
2369 }
2370
2371 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array) {
2372 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2373 }
2374
2375 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2376 Label&is_non_flat_array) {
2377 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2378 }
2379
2380 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array) {
2381 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2382 }
2383
2384 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2385 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2386 }
2387
2388 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2389 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2390 br(Assembler::NE, is_flat_array);
2391 }
2392
2393 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
2394 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2395 br(Assembler::EQ, is_non_flat_array);
2396 }
2397
2398 // MacroAssembler protected routines needed to implement
2399 // public methods
2400
2401 void MacroAssembler::mov(Register r, Address dest) {
2402 code_section()->relocate(pc(), dest.rspec());
2403 uint64_t imm64 = (uint64_t)dest.target();
2404 movptr(r, imm64);
2405 }
2406
2407 // Move a constant pointer into r. In AArch64 mode the virtual
2408 // address space is 48 bits in size, so we only need three
2409 // instructions to create a patchable instruction sequence that can
2410 // reach anywhere.
2411 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2412 #ifndef PRODUCT
2413 {
2414 char buffer[64];
2415 snprintf(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2416 block_comment(buffer);
2417 }
5165 adrp(rscratch1, src2, offset);
5166 ldr(rscratch1, Address(rscratch1, offset));
5167 cmp(src1, rscratch1);
5168 }
5169
5170 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5171 cmp(obj1, obj2);
5172 }
5173
5174 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5175 load_method_holder(rresult, rmethod);
5176 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5177 }
5178
5179 void MacroAssembler::load_method_holder(Register holder, Register method) {
5180 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5181 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5182 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5183 }
5184
5185 void MacroAssembler::load_metadata(Register dst, Register src) {
5186 if (UseCompactObjectHeaders) {
5187 load_narrow_klass_compact(dst, src);
5188 } else if (UseCompressedClassPointers) {
5189 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5190 } else {
5191 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5192 }
5193 }
5194
5195 // Loads the obj's Klass* into dst.
5196 // Preserves all registers (incl src, rscratch1 and rscratch2).
5197 // Input:
5198 // src - the oop we want to load the klass from.
5199 // dst - output narrow klass.
5200 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5201 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5202 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5203 lsr(dst, dst, markWord::klass_shift);
5204 }
5205
5206 void MacroAssembler::load_klass(Register dst, Register src) {
5207 if (UseCompactObjectHeaders) {
5208 load_narrow_klass_compact(dst, src);
5209 decode_klass_not_null(dst);
5210 } else if (UseCompressedClassPointers) {
5211 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5212 decode_klass_not_null(dst);
5213 } else {
5214 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5285 }
5286 cmp(klass, tmp);
5287 }
5288
5289 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5290 if (UseCompactObjectHeaders) {
5291 load_narrow_klass_compact(tmp1, obj1);
5292 load_narrow_klass_compact(tmp2, obj2);
5293 cmpw(tmp1, tmp2);
5294 } else if (UseCompressedClassPointers) {
5295 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5296 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5297 cmpw(tmp1, tmp2);
5298 } else {
5299 ldr(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5300 ldr(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5301 cmp(tmp1, tmp2);
5302 }
5303 }
5304
5305 void MacroAssembler::load_prototype_header(Register dst, Register src) {
5306 load_klass(dst, src);
5307 ldr(dst, Address(dst, Klass::prototype_header_offset()));
5308 }
5309
5310 void MacroAssembler::store_klass(Register dst, Register src) {
5311 // FIXME: Should this be a store release? concurrent gcs assumes
5312 // klass length is valid if klass field is not null.
5313 assert(!UseCompactObjectHeaders, "not with compact headers");
5314 if (UseCompressedClassPointers) {
5315 encode_klass_not_null(src);
5316 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5317 } else {
5318 str(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5319 }
5320 }
5321
5322 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5323 assert(!UseCompactObjectHeaders, "not with compact headers");
5324 if (UseCompressedClassPointers) {
5325 // Store to klass gap in destination
5326 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5327 }
5328 }
5329
5630 if (as_raw) {
5631 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5632 } else {
5633 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5634 }
5635 }
5636
5637 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5638 Address dst, Register val,
5639 Register tmp1, Register tmp2, Register tmp3) {
5640 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5641 decorators = AccessInternal::decorator_fixup(decorators, type);
5642 bool as_raw = (decorators & AS_RAW) != 0;
5643 if (as_raw) {
5644 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5645 } else {
5646 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5647 }
5648 }
5649
5650 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5651 Register inline_layout_info) {
5652 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5653 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5654 }
5655
5656 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5657 ldr(offset, Address(inline_klass, InstanceKlass::adr_inlineklass_fixed_block_offset()));
5658 ldrw(offset, Address(offset, InlineKlass::payload_offset_offset()));
5659 }
5660
5661 void MacroAssembler::payload_address(Register oop, Register data, Register inline_klass) {
5662 // ((address) (void*) o) + vk->payload_offset();
5663 Register offset = (data == oop) ? rscratch1 : data;
5664 payload_offset(inline_klass, offset);
5665 if (data == oop) {
5666 add(data, data, offset);
5667 } else {
5668 lea(data, Address(oop, offset));
5669 }
5670 }
5671
5672 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
5673 Register index, Register data) {
5674 assert_different_registers(array, array_klass, index);
5675 assert_different_registers(rscratch1, array, index);
5676
5677 // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
5678 ldrw(rscratch1, Address(array_klass, Klass::layout_helper_offset()));
5679
5680 // Klass::layout_helper_log2_element_size(lh)
5681 // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
5682 lsr(rscratch1, rscratch1, Klass::_lh_log2_element_size_shift);
5683 andr(rscratch1, rscratch1, Klass::_lh_log2_element_size_mask);
5684 lslv(index, index, rscratch1);
5685
5686 add(data, array, index);
5687 add(data, data, arrayOopDesc::base_offset_in_bytes(T_FLAT_ELEMENT));
5688 }
5689
5690 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5691 Register tmp2, DecoratorSet decorators) {
5692 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5693 }
5694
5695 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5696 Register tmp2, DecoratorSet decorators) {
5697 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5698 }
5699
5700 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5701 Register tmp2, Register tmp3, DecoratorSet decorators) {
5702 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5703 }
5704
5705 // Used for storing nulls.
5706 void MacroAssembler::store_heap_oop_null(Address dst) {
5707 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5708 }
5709
5746 oop_index = oop_recorder()->allocate_metadata_index(obj);
5747 } else {
5748 oop_index = oop_recorder()->find_index(obj);
5749 }
5750 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5751 mov(dst, Address((address)obj, rspec));
5752 }
5753
5754 Address MacroAssembler::constant_oop_address(jobject obj) {
5755 #ifdef ASSERT
5756 {
5757 ThreadInVMfromUnknown tiv;
5758 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5759 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5760 }
5761 #endif
5762 int oop_index = oop_recorder()->find_index(obj);
5763 return Address((address)obj, oop_Relocation::spec(oop_index));
5764 }
5765
5766 // Object / value buffer allocation...
5767 void MacroAssembler::allocate_instance(Register klass, Register new_obj,
5768 Register t1, Register t2,
5769 bool clear_fields, Label& alloc_failed)
5770 {
5771 Label done, initialize_header, initialize_object, slow_case, slow_case_no_pop;
5772 Register layout_size = t1;
5773 assert(new_obj == r0, "needs to be r0");
5774 assert_different_registers(klass, new_obj, t1, t2);
5775
5776 // get instance_size in InstanceKlass (scaled to a count of bytes)
5777 ldrw(layout_size, Address(klass, Klass::layout_helper_offset()));
5778 // test to see if it is malformed in some way
5779 tst(layout_size, Klass::_lh_instance_slow_path_bit);
5780 br(Assembler::NE, slow_case_no_pop);
5781
5782 // Allocate the instance:
5783 // If TLAB is enabled:
5784 // Try to allocate in the TLAB.
5785 // If fails, go to the slow path.
5786 // Initialize the allocation.
5787 // Exit.
5788 //
5789 // Go to slow path.
5790
5791 if (UseTLAB) {
5792 push(klass);
5793 tlab_allocate(new_obj, layout_size, 0, klass, t2, slow_case);
5794 if (ZeroTLAB || (!clear_fields)) {
5795 // the fields have been already cleared
5796 b(initialize_header);
5797 } else {
5798 // initialize both the header and fields
5799 b(initialize_object);
5800 }
5801
5802 if (clear_fields) {
5803 // The object is initialized before the header. If the object size is
5804 // zero, go directly to the header initialization.
5805 bind(initialize_object);
5806 int header_size = oopDesc::header_size() * HeapWordSize;
5807 assert(is_aligned(header_size, BytesPerLong), "oop header size must be 8-byte-aligned");
5808 subs(layout_size, layout_size, header_size);
5809 br(Assembler::EQ, initialize_header);
5810
5811 // Initialize topmost object field, divide size by 8, check if odd and
5812 // test if zero.
5813
5814 #ifdef ASSERT
5815 // make sure instance_size was multiple of 8
5816 Label L;
5817 tst(layout_size, 7);
5818 br(Assembler::EQ, L);
5819 stop("object size is not multiple of 8 - adjust this code");
5820 bind(L);
5821 // must be > 0, no extra check needed here
5822 #endif
5823
5824 lsr(layout_size, layout_size, LogBytesPerLong);
5825
5826 // initialize remaining object fields: instance_size was a multiple of 8
5827 {
5828 Label loop;
5829 Register base = t2;
5830
5831 bind(loop);
5832 add(rscratch1, new_obj, layout_size, Assembler::LSL, LogBytesPerLong);
5833 str(zr, Address(rscratch1, header_size - 1*oopSize));
5834 subs(layout_size, layout_size, 1);
5835 br(Assembler::NE, loop);
5836 }
5837 } // clear_fields
5838
5839 // initialize object header only.
5840 bind(initialize_header);
5841 pop(klass);
5842 Register mark_word = t2;
5843 if (UseCompactObjectHeaders || EnableValhalla) {
5844 ldr(mark_word, Address(klass, Klass::prototype_header_offset()));
5845 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5846 } else {
5847 mov(mark_word, (intptr_t)markWord::prototype().value());
5848 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5849 }
5850 if (!UseCompactObjectHeaders) {
5851 store_klass_gap(new_obj, zr); // zero klass gap for compressed oops
5852 mov(t2, klass); // preserve klass
5853 store_klass(new_obj, t2); // src klass reg is potentially compressed
5854 }
5855 // TODO: Valhalla removed SharedRuntime::dtrace_object_alloc from here ?
5856
5857 b(done);
5858 }
5859
5860 if (UseTLAB) {
5861 bind(slow_case);
5862 pop(klass);
5863 }
5864 bind(slow_case_no_pop);
5865 b(alloc_failed);
5866
5867 bind(done);
5868 }
5869
5870 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5871 void MacroAssembler::tlab_allocate(Register obj,
5872 Register var_size_in_bytes,
5873 int con_size_in_bytes,
5874 Register t1,
5875 Register t2,
5876 Label& slow_case) {
5877 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5878 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5879 }
5880
5881 void MacroAssembler::inc_held_monitor_count(Register tmp) {
5882 Address dst(rthread, JavaThread::held_monitor_count_offset());
5883 #ifdef ASSERT
5884 ldr(tmp, dst);
5885 increment(tmp);
5886 str(tmp, dst);
5887 Label ok;
5888 tbz(tmp, 63, ok);
5889 STOP("assert(held monitor count underflow)");
5921 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5922 cmp(rscratch2, rscratch1);
5923 br(Assembler::HS, next);
5924 STOP("assert(top >= start)");
5925 should_not_reach_here();
5926
5927 bind(next);
5928 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5929 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5930 cmp(rscratch2, rscratch1);
5931 br(Assembler::HS, ok);
5932 STOP("assert(top <= end)");
5933 should_not_reach_here();
5934
5935 bind(ok);
5936 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5937 }
5938 #endif
5939 }
5940
5941 void MacroAssembler::get_inline_type_field_klass(Register holder_klass, Register index, Register inline_klass) {
5942 inline_layout_info(holder_klass, index, inline_klass);
5943 ldr(inline_klass, Address(inline_klass, InlineLayoutInfo::klass_offset()));
5944 }
5945
5946 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
5947 assert_different_registers(holder_klass, index, layout_info);
5948 InlineLayoutInfo array[2];
5949 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
5950 if (is_power_of_2(size)) {
5951 lsl(index, index, log2i_exact(size)); // Scale index by power of 2
5952 } else {
5953 mov(layout_info, size);
5954 mul(index, index, layout_info); // Scale the index to be the entry index * array_element_size
5955 }
5956 ldr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
5957 add(layout_info, layout_info, Array<InlineLayoutInfo>::base_offset_in_bytes());
5958 lea(layout_info, Address(layout_info, index));
5959 }
5960
5961 // Writes to stack successive pages until offset reached to check for
5962 // stack overflow + shadow pages. This clobbers tmp.
5963 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5964 assert_different_registers(tmp, size, rscratch1);
5965 mov(tmp, sp);
5966 // Bang stack for total size given plus shadow page size.
5967 // Bang one page at a time because large size can bang beyond yellow and
5968 // red zones.
5969 Label loop;
5970 mov(rscratch1, (int)os::vm_page_size());
5971 bind(loop);
5972 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5973 subsw(size, size, rscratch1);
5974 str(size, Address(tmp));
5975 br(Assembler::GT, loop);
5976
5977 // Bang down shadow pages too.
5978 // At this point, (tmp-0) is the last address touched, so don't
5979 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5980 // was post-decremented.) Skip this address by starting at i=1, and
6066 }
6067
6068 void MacroAssembler::remove_frame(int framesize) {
6069 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
6070 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
6071 if (framesize < ((1 << 9) + 2 * wordSize)) {
6072 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
6073 add(sp, sp, framesize);
6074 } else {
6075 if (framesize < ((1 << 12) + 2 * wordSize))
6076 add(sp, sp, framesize - 2 * wordSize);
6077 else {
6078 mov(rscratch1, framesize - 2 * wordSize);
6079 add(sp, sp, rscratch1);
6080 }
6081 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6082 }
6083 authenticate_return_address();
6084 }
6085
6086 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6087 if (needs_stack_repair) {
6088 // Remove the extension of the caller's frame used for inline type unpacking
6089 //
6090 // Right now the stack looks like this:
6091 //
6092 // | Arguments from caller |
6093 // |---------------------------| <-- caller's SP
6094 // | Saved LR #1 |
6095 // | Saved FP #1 |
6096 // |---------------------------|
6097 // | Extension space for |
6098 // | inline arg (un)packing |
6099 // |---------------------------| <-- start of this method's frame
6100 // | Saved LR #2 |
6101 // | Saved FP #2 |
6102 // |---------------------------| <-- FP
6103 // | sp_inc |
6104 // | method locals |
6105 // |---------------------------| <-- SP
6106 //
6107 // There are two copies of FP and LR on the stack. They will be identical
6108 // unless the caller has been deoptimized, in which case LR #1 will be patched
6109 // to point at the deopt blob, and LR #2 will still point into the old method.
6110 //
6111 // The sp_inc stack slot holds the total size of the frame including the
6112 // extension space minus two words for the saved FP and LR.
6113
6114 int sp_inc_offset = initial_framesize - 3 * wordSize; // Immediately below saved LR and FP
6115
6116 ldr(rscratch1, Address(sp, sp_inc_offset));
6117 add(sp, sp, rscratch1);
6118 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6119 } else {
6120 remove_frame(initial_framesize);
6121 }
6122 }
6123
6124 void MacroAssembler::save_stack_increment(int sp_inc, int frame_size) {
6125 int real_frame_size = frame_size + sp_inc;
6126 assert(sp_inc == 0 || sp_inc > 2*wordSize, "invalid sp_inc value");
6127 assert(real_frame_size >= 2*wordSize, "frame size must include FP/LR space");
6128 assert((real_frame_size & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6129
6130 int sp_inc_offset = frame_size - 3 * wordSize; // Immediately below saved LR and FP
6131
6132 // Subtract two words for the saved FP and LR as these will be popped
6133 // separately. See remove_frame above.
6134 mov(rscratch1, real_frame_size - 2*wordSize);
6135 str(rscratch1, Address(sp, sp_inc_offset));
6136 }
6137
6138 // This method counts leading positive bytes (highest bit not set) in provided byte array
6139 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
6140 // Simple and most common case of aligned small array which is not at the
6141 // end of memory page is placed here. All other cases are in stub.
6142 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
6143 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
6144 assert_different_registers(ary1, len, result);
6145
6146 mov(result, len);
6147 cmpw(len, 0);
6148 br(LE, DONE);
6149 cmpw(len, 4 * wordSize);
6150 br(GE, STUB_LONG); // size > 32 then go to stub
6151
6152 int shift = 64 - exact_log2(os::vm_page_size());
6153 lsl(rscratch1, ary1, shift);
6154 mov(rscratch2, (size_t)(4 * wordSize) << shift);
6155 adds(rscratch2, rscratch1, rscratch2); // At end of page?
6156 br(CS, STUB); // at the end of page then go to stub
7030 // On other systems, the helper is a usual C function.
7031 //
7032 void MacroAssembler::get_thread(Register dst) {
7033 RegSet saved_regs =
7034 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
7035 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
7036
7037 protect_return_address();
7038 push(saved_regs, sp);
7039
7040 mov(lr, CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper));
7041 blr(lr);
7042 if (dst != c_rarg0) {
7043 mov(dst, c_rarg0);
7044 }
7045
7046 pop(saved_regs, sp);
7047 authenticate_return_address();
7048 }
7049
7050 #ifdef COMPILER2
7051 // C2 compiled method's prolog code
7052 // Moved here from aarch64.ad to support Valhalla code belows
7053 void MacroAssembler::verified_entry(Compile* C, int sp_inc) {
7054 if (C->clinit_barrier_on_entry()) {
7055 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
7056
7057 Label L_skip_barrier;
7058
7059 mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
7060 clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
7061 far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
7062 bind(L_skip_barrier);
7063 }
7064
7065 if (C->max_vector_size() > 0) {
7066 reinitialize_ptrue();
7067 }
7068
7069 int bangsize = C->output()->bang_size_in_bytes();
7070 if (C->output()->need_stack_bang(bangsize))
7071 generate_stack_overflow_check(bangsize);
7072
7073 // n.b. frame size includes space for return pc and rfp
7074 const long framesize = C->output()->frame_size_in_bytes();
7075 build_frame(framesize);
7076
7077 if (C->needs_stack_repair()) {
7078 save_stack_increment(sp_inc, framesize);
7079 }
7080
7081 if (VerifyStackAtCalls) {
7082 Unimplemented();
7083 }
7084 }
7085 #endif // COMPILER2
7086
7087 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
7088 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
7089 // An inline type might be returned. If fields are in registers we
7090 // need to allocate an inline type instance and initialize it with
7091 // the value of the fields.
7092 Label skip;
7093 // We only need a new buffered inline type if a new one is not returned
7094 tbz(r0, 0, skip);
7095 int call_offset = -1;
7096
7097 // Be careful not to clobber r1-7 which hold returned fields
7098 // Also do not use callee-saved registers as these may be live in the interpreter
7099 Register tmp1 = r13, tmp2 = r14, klass = r15, r0_preserved = r12;
7100
7101 // The following code is similar to allocate_instance but has some slight differences,
7102 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
7103 // allocating is not necessary if vk != nullptr, etc. allocate_instance is not aware of these.
7104 Label slow_case;
7105 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
7106 mov(r0_preserved, r0); // save r0 for slow_case since *_allocate may corrupt it when allocation failed
7107
7108 if (vk != nullptr) {
7109 // Called from C1, where the return type is statically known.
7110 movptr(klass, (intptr_t)vk->get_InlineKlass());
7111 jint lh = vk->layout_helper();
7112 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
7113 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
7114 tlab_allocate(r0, noreg, lh, tmp1, tmp2, slow_case);
7115 } else {
7116 b(slow_case);
7117 }
7118 } else {
7119 // Call from interpreter. R0 contains ((the InlineKlass* of the return type) | 0x01)
7120 andr(klass, r0, -2);
7121 if (UseTLAB) {
7122 ldrw(tmp2, Address(klass, Klass::layout_helper_offset()));
7123 tst(tmp2, Klass::_lh_instance_slow_path_bit);
7124 br(Assembler::NE, slow_case);
7125 tlab_allocate(r0, tmp2, 0, tmp1, tmp2, slow_case);
7126 } else {
7127 b(slow_case);
7128 }
7129 }
7130 if (UseTLAB) {
7131 // 2. Initialize buffered inline instance header
7132 Register buffer_obj = r0;
7133 if (UseCompactObjectHeaders) {
7134 ldr(rscratch1, Address(klass, Klass::prototype_header_offset()));
7135 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7136 } else {
7137 mov(rscratch1, (intptr_t)markWord::inline_type_prototype().value());
7138 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7139 store_klass_gap(buffer_obj, zr);
7140 if (vk == nullptr) {
7141 // store_klass corrupts klass, so save it for later use (interpreter case only).
7142 mov(tmp1, klass);
7143 }
7144 store_klass(buffer_obj, klass);
7145 }
7146 // 3. Initialize its fields with an inline class specific handler
7147 if (vk != nullptr) {
7148 far_call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
7149 } else {
7150 // tmp1 holds klass preserved above
7151 ldr(tmp1, Address(tmp1, InstanceKlass::adr_inlineklass_fixed_block_offset()));
7152 ldr(tmp1, Address(tmp1, InlineKlass::pack_handler_offset()));
7153 blr(tmp1);
7154 }
7155
7156 membar(Assembler::StoreStore);
7157 b(skip);
7158 } else {
7159 // Must have already branched to slow_case above.
7160 DEBUG_ONLY(should_not_reach_here());
7161 }
7162 bind(slow_case);
7163 // We failed to allocate a new inline type, fall back to a runtime
7164 // call. Some oop field may be live in some registers but we can't
7165 // tell. That runtime call will take care of preserving them
7166 // across a GC if there's one.
7167 mov(r0, r0_preserved);
7168
7169 if (from_interpreter) {
7170 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
7171 } else {
7172 far_call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
7173 call_offset = offset();
7174 }
7175 membar(Assembler::StoreStore);
7176
7177 bind(skip);
7178 return call_offset;
7179 }
7180
7181 // Move a value between registers/stack slots and update the reg_state
7182 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
7183 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
7184 if (reg_state[to->value()] == reg_written) {
7185 return true; // Already written
7186 }
7187
7188 if (from != to && bt != T_VOID) {
7189 if (reg_state[to->value()] == reg_readonly) {
7190 return false; // Not yet writable
7191 }
7192 if (from->is_reg()) {
7193 if (to->is_reg()) {
7194 if (from->is_Register() && to->is_Register()) {
7195 mov(to->as_Register(), from->as_Register());
7196 } else if (from->is_FloatRegister() && to->is_FloatRegister()) {
7197 fmovd(to->as_FloatRegister(), from->as_FloatRegister());
7198 } else {
7199 ShouldNotReachHere();
7200 }
7201 } else {
7202 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7203 Address to_addr = Address(sp, st_off);
7204 if (from->is_FloatRegister()) {
7205 if (bt == T_DOUBLE) {
7206 strd(from->as_FloatRegister(), to_addr);
7207 } else {
7208 assert(bt == T_FLOAT, "must be float");
7209 strs(from->as_FloatRegister(), to_addr);
7210 }
7211 } else {
7212 str(from->as_Register(), to_addr);
7213 }
7214 }
7215 } else {
7216 Address from_addr = Address(sp, from->reg2stack() * VMRegImpl::stack_slot_size);
7217 if (to->is_reg()) {
7218 if (to->is_FloatRegister()) {
7219 if (bt == T_DOUBLE) {
7220 ldrd(to->as_FloatRegister(), from_addr);
7221 } else {
7222 assert(bt == T_FLOAT, "must be float");
7223 ldrs(to->as_FloatRegister(), from_addr);
7224 }
7225 } else {
7226 ldr(to->as_Register(), from_addr);
7227 }
7228 } else {
7229 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7230 ldr(rscratch1, from_addr);
7231 str(rscratch1, Address(sp, st_off));
7232 }
7233 }
7234 }
7235
7236 // Update register states
7237 reg_state[from->value()] = reg_writable;
7238 reg_state[to->value()] = reg_written;
7239 return true;
7240 }
7241
7242 // Calculate the extra stack space required for packing or unpacking inline
7243 // args and adjust the stack pointer
7244 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
7245 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
7246 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
7247 assert(sp_inc > 0, "sanity");
7248
7249 // Save a copy of the FP and LR here for deoptimization patching and frame walking
7250 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
7251
7252 // Adjust the stack pointer. This will be repaired on return by MacroAssembler::remove_frame
7253 if (sp_inc < (1 << 9)) {
7254 sub(sp, sp, sp_inc); // Fits in an immediate
7255 } else {
7256 mov(rscratch1, sp_inc);
7257 sub(sp, sp, rscratch1);
7258 }
7259
7260 return sp_inc + 2 * wordSize; // Account for the FP/LR space
7261 }
7262
7263 // Read all fields from an inline type oop and store the values in registers/stack slots
7264 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
7265 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
7266 RegState reg_state[]) {
7267 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
7268 assert(from->is_valid(), "source must be valid");
7269 bool progress = false;
7270 #ifdef ASSERT
7271 const int start_offset = offset();
7272 #endif
7273
7274 Label L_null, L_notNull;
7275 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
7276 Register tmp1 = r10;
7277 Register tmp2 = r11;
7278 Register fromReg = noreg;
7279 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, -1);
7280 bool done = true;
7281 bool mark_done = true;
7282 VMReg toReg;
7283 BasicType bt;
7284 // Check if argument requires a null check
7285 bool null_check = false;
7286 VMReg nullCheckReg;
7287 while (stream.next(nullCheckReg, bt)) {
7288 if (sig->at(stream.sig_index())._offset == -1) {
7289 null_check = true;
7290 break;
7291 }
7292 }
7293 stream.reset(sig_index, to_index);
7294 while (stream.next(toReg, bt)) {
7295 assert(toReg->is_valid(), "destination must be valid");
7296 int idx = (int)toReg->value();
7297 if (reg_state[idx] == reg_readonly) {
7298 if (idx != from->value()) {
7299 mark_done = false;
7300 }
7301 done = false;
7302 continue;
7303 } else if (reg_state[idx] == reg_written) {
7304 continue;
7305 }
7306 assert(reg_state[idx] == reg_writable, "must be writable");
7307 reg_state[idx] = reg_written;
7308 progress = true;
7309
7310 if (fromReg == noreg) {
7311 if (from->is_reg()) {
7312 fromReg = from->as_Register();
7313 } else {
7314 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size;
7315 ldr(tmp1, Address(sp, st_off));
7316 fromReg = tmp1;
7317 }
7318 if (null_check) {
7319 // Nullable inline type argument, emit null check
7320 cbz(fromReg, L_null);
7321 }
7322 }
7323 int off = sig->at(stream.sig_index())._offset;
7324 if (off == -1) {
7325 assert(null_check, "Missing null check at");
7326 if (toReg->is_stack()) {
7327 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7328 mov(tmp2, 1);
7329 str(tmp2, Address(sp, st_off));
7330 } else {
7331 mov(toReg->as_Register(), 1);
7332 }
7333 continue;
7334 }
7335 assert(off > 0, "offset in object should be positive");
7336 Address fromAddr = Address(fromReg, off);
7337 if (!toReg->is_FloatRegister()) {
7338 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
7339 if (is_reference_type(bt)) {
7340 load_heap_oop(dst, fromAddr, rscratch1, rscratch2);
7341 } else {
7342 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
7343 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
7344 }
7345 if (toReg->is_stack()) {
7346 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7347 str(dst, Address(sp, st_off));
7348 }
7349 } else if (bt == T_DOUBLE) {
7350 ldrd(toReg->as_FloatRegister(), fromAddr);
7351 } else {
7352 assert(bt == T_FLOAT, "must be float");
7353 ldrs(toReg->as_FloatRegister(), fromAddr);
7354 }
7355 }
7356 if (progress && null_check) {
7357 if (done) {
7358 b(L_notNull);
7359 bind(L_null);
7360 // Set IsInit field to zero to signal that the argument is null.
7361 // Also set all oop fields to zero to make the GC happy.
7362 stream.reset(sig_index, to_index);
7363 while (stream.next(toReg, bt)) {
7364 if (sig->at(stream.sig_index())._offset == -1 ||
7365 bt == T_OBJECT || bt == T_ARRAY) {
7366 if (toReg->is_stack()) {
7367 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7368 str(zr, Address(sp, st_off));
7369 } else {
7370 mov(toReg->as_Register(), zr);
7371 }
7372 }
7373 }
7374 bind(L_notNull);
7375 } else {
7376 bind(L_null);
7377 }
7378 }
7379
7380 sig_index = stream.sig_index();
7381 to_index = stream.regs_index();
7382
7383 if (mark_done && reg_state[from->value()] != reg_written) {
7384 // This is okay because no one else will write to that slot
7385 reg_state[from->value()] = reg_writable;
7386 }
7387 from_index--;
7388 assert(progress || (start_offset == offset()), "should not emit code");
7389 return done;
7390 }
7391
7392 // Pack fields back into an inline type oop
7393 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
7394 VMRegPair* from, int from_count, int& from_index, VMReg to,
7395 RegState reg_state[], Register val_array) {
7396 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
7397 assert(to->is_valid(), "destination must be valid");
7398
7399 if (reg_state[to->value()] == reg_written) {
7400 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7401 return true; // Already written
7402 }
7403
7404 // The GC barrier expanded by store_heap_oop below may call into the
7405 // runtime so use callee-saved registers for any values that need to be
7406 // preserved. The GC barrier assembler should take care of saving the
7407 // Java argument registers.
7408 // TODO 8284443 Isn't it an issue if below code uses r14 as tmp when it contains a spilled value?
7409 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
7410 Register val_obj_tmp = r21;
7411 Register from_reg_tmp = r22;
7412 Register tmp1 = r14;
7413 Register tmp2 = r13;
7414 Register tmp3 = r12;
7415 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
7416
7417 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
7418
7419 if (reg_state[to->value()] == reg_readonly) {
7420 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
7421 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7422 return false; // Not yet writable
7423 }
7424 val_obj = val_obj_tmp;
7425 }
7426
7427 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
7428 load_heap_oop(val_obj, Address(val_array, index), tmp1, tmp2);
7429
7430 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
7431 VMReg fromReg;
7432 BasicType bt;
7433 Label L_null;
7434 while (stream.next(fromReg, bt)) {
7435 assert(fromReg->is_valid(), "source must be valid");
7436 reg_state[fromReg->value()] = reg_writable;
7437
7438 int off = sig->at(stream.sig_index())._offset;
7439 if (off == -1) {
7440 // Nullable inline type argument, emit null check
7441 Label L_notNull;
7442 if (fromReg->is_stack()) {
7443 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7444 ldrb(tmp2, Address(sp, ld_off));
7445 cbnz(tmp2, L_notNull);
7446 } else {
7447 cbnz(fromReg->as_Register(), L_notNull);
7448 }
7449 mov(val_obj, 0);
7450 b(L_null);
7451 bind(L_notNull);
7452 continue;
7453 }
7454
7455 assert(off > 0, "offset in object should be positive");
7456 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
7457
7458 // Pack the scalarized field into the value object.
7459 Address dst(val_obj, off);
7460
7461 if (!fromReg->is_FloatRegister()) {
7462 Register src;
7463 if (fromReg->is_stack()) {
7464 src = from_reg_tmp;
7465 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7466 load_sized_value(src, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
7467 } else {
7468 src = fromReg->as_Register();
7469 }
7470 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
7471 if (is_reference_type(bt)) {
7472 store_heap_oop(dst, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
7473 } else {
7474 store_sized_value(dst, src, size_in_bytes);
7475 }
7476 } else if (bt == T_DOUBLE) {
7477 strd(fromReg->as_FloatRegister(), dst);
7478 } else {
7479 assert(bt == T_FLOAT, "must be float");
7480 strs(fromReg->as_FloatRegister(), dst);
7481 }
7482 }
7483 bind(L_null);
7484 sig_index = stream.sig_index();
7485 from_index = stream.regs_index();
7486
7487 assert(reg_state[to->value()] == reg_writable, "must have already been read");
7488 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
7489 assert(success, "to register must be writeable");
7490
7491 return true;
7492 }
7493
7494 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
7495 return (reg->is_FloatRegister()) ? v8->as_VMReg() : r14->as_VMReg();
7496 }
7497
7498 void MacroAssembler::cache_wb(Address line) {
7499 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
7500 assert(line.index() == noreg, "index should be noreg");
7501 assert(line.offset() == 0, "offset should be 0");
7502 // would like to assert this
7503 // assert(line._ext.shift == 0, "shift should be zero");
7504 if (VM_Version::supports_dcpop()) {
7505 // writeback using clear virtual address to point of persistence
7506 dc(Assembler::CVAP, line.base());
7507 } else {
7508 // no need to generate anything as Unsafe.writebackMemory should
7509 // never invoke this stub
7510 }
7511 }
7512
7513 void MacroAssembler::cache_wbsync(bool is_pre) {
7514 // we only need a barrier post sync
7515 if (!is_pre) {
7516 membar(Assembler::AnyAny);
7517 }
7876 }
7877
7878 // Check if the lock-stack is full.
7879 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7880 cmpw(top, (unsigned)LockStack::end_offset());
7881 br(Assembler::GE, slow);
7882
7883 // Check for recursion.
7884 subw(t, top, oopSize);
7885 ldr(t, Address(rthread, t));
7886 cmp(obj, t);
7887 br(Assembler::EQ, push);
7888
7889 // Check header for monitor (0b10).
7890 tst(mark, markWord::monitor_value);
7891 br(Assembler::NE, slow);
7892
7893 // Try to lock. Transition lock bits 0b01 => 0b00
7894 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7895 orr(mark, mark, markWord::unlocked_value);
7896 if (EnableValhalla) {
7897 // Mask inline_type bit such that we go to the slow path if object is an inline type
7898 andr(mark, mark, ~((int) markWord::inline_type_bit_in_place));
7899 }
7900 eor(t, mark, markWord::unlocked_value);
7901 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7902 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7903 br(Assembler::NE, slow);
7904
7905 bind(push);
7906 // After successful lock, push object on lock-stack.
7907 str(obj, Address(rthread, top));
7908 addw(top, top, oopSize);
7909 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7910 }
7911
7912 // Implements lightweight-unlocking.
7913 //
7914 // - obj: the object to be unlocked
7915 // - t1, t2, t3: temporary registers
7916 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7917 void MacroAssembler::lightweight_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7918 assert(LockingMode == LM_LIGHTWEIGHT, "only used with new lightweight locking");
7919 // cmpxchg clobbers rscratch1.
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