9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "code/compiledIC.hpp"
30 #include "compiler/compileTask.hpp"
31 #include "compiler/disassembler.hpp"
32 #include "compiler/oopMap.hpp"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/cardTable.hpp"
37 #include "gc/shared/collectedHeap.hpp"
38 #include "gc/shared/tlab_globals.hpp"
39 #include "interpreter/bytecodeHistogram.hpp"
40 #include "interpreter/interpreter.hpp"
41 #include "interpreter/interpreterRuntime.hpp"
42 #include "jvm.h"
43 #include "memory/resourceArea.hpp"
44 #include "memory/universe.hpp"
45 #include "nativeInst_aarch64.hpp"
46 #include "oops/accessDecorators.hpp"
47 #include "oops/compressedKlass.inline.hpp"
48 #include "oops/compressedOops.inline.hpp"
49 #include "oops/klass.inline.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/icache.hpp"
52 #include "runtime/interfaceSupport.inline.hpp"
53 #include "runtime/javaThread.hpp"
54 #include "runtime/jniHandles.inline.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/globalDefinitions.hpp"
58 #include "utilities/integerCast.hpp"
59 #include "utilities/powerOfTwo.hpp"
60 #ifdef COMPILER1
61 #include "c1/c1_LIRAssembler.hpp"
62 #endif
63 #ifdef COMPILER2
64 #include "oops/oop.hpp"
65 #include "opto/compile.hpp"
66 #include "opto/node.hpp"
67 #include "opto/output.hpp"
68 #endif
69
70 #include <sys/types.h>
71
72 #ifdef PRODUCT
73 #define BLOCK_COMMENT(str) /* nothing */
74 #else
75 #define BLOCK_COMMENT(str) block_comment(str)
76 #endif
77 #define STOP(str) stop(str);
78 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
79
2006 ldarb(scratch, scratch);
2007 cmp(scratch, InstanceKlass::fully_initialized);
2008 br(Assembler::EQ, *L_fast_path);
2009
2010 // Fast path check: current thread is initializer thread
2011 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2012 cmp(rthread, scratch);
2013
2014 if (L_slow_path == &L_fallthrough) {
2015 br(Assembler::EQ, *L_fast_path);
2016 bind(*L_slow_path);
2017 } else if (L_fast_path == &L_fallthrough) {
2018 br(Assembler::NE, *L_slow_path);
2019 bind(*L_fast_path);
2020 } else {
2021 Unimplemented();
2022 }
2023 }
2024
2025 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2026 if (!VerifyOops) return;
2027
2028 // Pass register number to verify_oop_subroutine
2029 const char* b = nullptr;
2030 {
2031 ResourceMark rm;
2032 stringStream ss;
2033 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2034 b = code_string(ss.as_string());
2035 }
2036 BLOCK_COMMENT("verify_oop {");
2037
2038 strip_return_address(); // This might happen within a stack frame.
2039 protect_return_address();
2040 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2041 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2042
2043 mov(r0, reg);
2044 movptr(rscratch1, (uintptr_t)(address)b);
2045
2046 // call indirectly to solve generation ordering problem
2047 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2048 ldr(rscratch2, Address(rscratch2));
2049 blr(rscratch2);
2050
2051 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2052 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2053 authenticate_return_address();
2054
2055 BLOCK_COMMENT("} verify_oop");
2056 }
2057
2058 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2059 if (!VerifyOops) return;
2060
2061 const char* b = nullptr;
2062 {
2063 ResourceMark rm;
2064 stringStream ss;
2065 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2066 b = code_string(ss.as_string());
2067 }
2068 BLOCK_COMMENT("verify_oop_addr {");
2069
2070 strip_return_address(); // This might happen within a stack frame.
2071 protect_return_address();
2072 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2073 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2074
2075 // addr may contain sp so we will have to adjust it based on the
2076 // pushes that we just did.
2077 if (addr.uses(sp)) {
2078 lea(r0, addr);
2079 ldr(r0, Address(r0, 4 * wordSize));
2292 call_VM_leaf_base(entry_point, 1);
2293 }
2294
2295 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2296 assert_different_registers(arg_1, c_rarg0);
2297 pass_arg0(this, arg_0);
2298 pass_arg1(this, arg_1);
2299 call_VM_leaf_base(entry_point, 2);
2300 }
2301
2302 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2303 Register arg_1, Register arg_2) {
2304 assert_different_registers(arg_1, c_rarg0);
2305 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2306 pass_arg0(this, arg_0);
2307 pass_arg1(this, arg_1);
2308 pass_arg2(this, arg_2);
2309 call_VM_leaf_base(entry_point, 3);
2310 }
2311
2312 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2313 pass_arg0(this, arg_0);
2314 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2315 }
2316
2317 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2318
2319 assert_different_registers(arg_0, c_rarg1);
2320 pass_arg1(this, arg_1);
2321 pass_arg0(this, arg_0);
2322 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2323 }
2324
2325 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2326 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2327 assert_different_registers(arg_1, c_rarg2);
2328 pass_arg2(this, arg_2);
2329 pass_arg1(this, arg_1);
2330 pass_arg0(this, arg_0);
2331 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2337 assert_different_registers(arg_2, c_rarg3);
2338 pass_arg3(this, arg_3);
2339 pass_arg2(this, arg_2);
2340 pass_arg1(this, arg_1);
2341 pass_arg0(this, arg_0);
2342 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2343 }
2344
2345 void MacroAssembler::null_check(Register reg, int offset) {
2346 if (needs_explicit_null_check(offset)) {
2347 // provoke OS null exception if reg is null by
2348 // accessing M[reg] w/o changing any registers
2349 // NOTE: this is plenty to provoke a segv
2350 ldr(zr, Address(reg));
2351 } else {
2352 // nothing to do, (later) access of M[reg + offset]
2353 // will provoke OS null exception if reg is null
2354 }
2355 }
2356
2357 // MacroAssembler protected routines needed to implement
2358 // public methods
2359
2360 void MacroAssembler::mov(Register r, Address dest) {
2361 code_section()->relocate(pc(), dest.rspec());
2362 uint64_t imm64 = (uint64_t)dest.target();
2363 movptr(r, imm64);
2364 }
2365
2366 // Move a constant pointer into r. In AArch64 mode the virtual
2367 // address space is 48 bits in size, so we only need three
2368 // instructions to create a patchable instruction sequence that can
2369 // reach anywhere.
2370 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2371 #ifndef PRODUCT
2372 {
2373 char buffer[64];
2374 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2375 block_comment(buffer);
2376 }
5059 adrp(rscratch1, src2, offset);
5060 ldr(rscratch1, Address(rscratch1, offset));
5061 cmp(src1, rscratch1);
5062 }
5063
5064 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5065 cmp(obj1, obj2);
5066 }
5067
5068 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5069 load_method_holder(rresult, rmethod);
5070 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5071 }
5072
5073 void MacroAssembler::load_method_holder(Register holder, Register method) {
5074 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5075 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5076 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5077 }
5078
5079 // Loads the obj's Klass* into dst.
5080 // Preserves all registers (incl src, rscratch1 and rscratch2).
5081 // Input:
5082 // src - the oop we want to load the klass from.
5083 // dst - output narrow klass.
5084 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5085 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5086 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5087 lsr(dst, dst, markWord::klass_shift);
5088 }
5089
5090 void MacroAssembler::load_klass(Register dst, Register src) {
5091 if (UseCompactObjectHeaders) {
5092 load_narrow_klass_compact(dst, src);
5093 } else {
5094 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5095 }
5096 decode_klass_not_null(dst);
5097 }
5098
5150 } else {
5151 ldrw(tmp, Address(obj, oopDesc::klass_offset_in_bytes()));
5152 }
5153 if (CompressedKlassPointers::base() == nullptr) {
5154 cmp(klass, tmp, LSL, CompressedKlassPointers::shift());
5155 return;
5156 } else if (!AOTCodeCache::is_on_for_dump() &&
5157 ((uint64_t)CompressedKlassPointers::base() & 0xffffffff) == 0
5158 && CompressedKlassPointers::shift() == 0) {
5159 // Only the bottom 32 bits matter
5160 cmpw(klass, tmp);
5161 return;
5162 }
5163 decode_klass_not_null(tmp);
5164 cmp(klass, tmp);
5165 }
5166
5167 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5168 if (UseCompactObjectHeaders) {
5169 load_narrow_klass_compact(tmp1, obj1);
5170 load_narrow_klass_compact(tmp2, obj2);
5171 } else {
5172 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5173 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5174 }
5175 cmpw(tmp1, tmp2);
5176 }
5177
5178 void MacroAssembler::store_klass(Register dst, Register src) {
5179 // FIXME: Should this be a store release? concurrent gcs assumes
5180 // klass length is valid if klass field is not null.
5181 assert(!UseCompactObjectHeaders, "not with compact headers");
5182 encode_klass_not_null(src);
5183 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5184 }
5185
5186 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5187 assert(!UseCompactObjectHeaders, "not with compact headers");
5188 // Store to klass gap in destination
5189 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5190 }
5191
5192 // Algorithm must match CompressedOops::encode.
5193 void MacroAssembler::encode_heap_oop(Register d, Register s) {
5194 #ifdef ASSERT
5195 verify_heapbase("MacroAssembler::encode_heap_oop: heap base corrupted?");
5196 #endif
5197 verify_oop_msg(s, "broken oop in encode_heap_oop");
5547 if (as_raw) {
5548 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5549 } else {
5550 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5551 }
5552 }
5553
5554 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5555 Address dst, Register val,
5556 Register tmp1, Register tmp2, Register tmp3) {
5557 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5558 decorators = AccessInternal::decorator_fixup(decorators, type);
5559 bool as_raw = (decorators & AS_RAW) != 0;
5560 if (as_raw) {
5561 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5562 } else {
5563 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5564 }
5565 }
5566
5567 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5568 Register tmp2, DecoratorSet decorators) {
5569 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5570 }
5571
5572 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5573 Register tmp2, DecoratorSet decorators) {
5574 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5575 }
5576
5577 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5578 Register tmp2, Register tmp3, DecoratorSet decorators) {
5579 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5580 }
5581
5582 // Used for storing nulls.
5583 void MacroAssembler::store_heap_oop_null(Address dst) {
5584 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5585 }
5586
5622 oop_index = oop_recorder()->allocate_metadata_index(obj);
5623 } else {
5624 oop_index = oop_recorder()->find_index(obj);
5625 }
5626 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5627 mov(dst, Address((address)obj, rspec));
5628 }
5629
5630 Address MacroAssembler::constant_oop_address(jobject obj) {
5631 #ifdef ASSERT
5632 {
5633 ThreadInVMfromUnknown tiv;
5634 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5635 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5636 }
5637 #endif
5638 int oop_index = oop_recorder()->find_index(obj);
5639 return Address((address)obj, oop_Relocation::spec(oop_index));
5640 }
5641
5642 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5643 void MacroAssembler::tlab_allocate(Register obj,
5644 Register var_size_in_bytes,
5645 int con_size_in_bytes,
5646 Register t1,
5647 Register t2,
5648 Label& slow_case) {
5649 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5650 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5651 }
5652
5653 void MacroAssembler::verify_tlab() {
5654 #ifdef ASSERT
5655 if (UseTLAB && VerifyOops) {
5656 Label next, ok;
5657
5658 stp(rscratch2, rscratch1, Address(pre(sp, -16)));
5659
5660 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5661 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5662 cmp(rscratch2, rscratch1);
5663 br(Assembler::HS, next);
5664 STOP("assert(top >= start)");
5665 should_not_reach_here();
5666
5667 bind(next);
5668 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5669 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5670 cmp(rscratch2, rscratch1);
5671 br(Assembler::HS, ok);
5672 STOP("assert(top <= end)");
5673 should_not_reach_here();
5674
5675 bind(ok);
5676 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5677 }
5678 #endif
5679 }
5680
5681 // Writes to stack successive pages until offset reached to check for
5682 // stack overflow + shadow pages. This clobbers tmp.
5683 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5684 assert_different_registers(tmp, size, rscratch1);
5685 mov(tmp, sp);
5686 // Bang stack for total size given plus shadow page size.
5687 // Bang one page at a time because large size can bang beyond yellow and
5688 // red zones.
5689 Label loop;
5690 mov(rscratch1, (int)os::vm_page_size());
5691 bind(loop);
5692 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5693 subsw(size, size, rscratch1);
5694 str(size, Address(tmp));
5695 br(Assembler::GT, loop);
5696
5697 // Bang down shadow pages too.
5698 // At this point, (tmp-0) is the last address touched, so don't
5699 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5700 // was post-decremented.) Skip this address by starting at i=1, and
5767
5768 // Strictly speaking the card table base isn't an address at all, and it might
5769 // even be negative. It is thus materialised as a constant.
5770 mov(reg, (uint64_t)ctbs->card_table_base_const());
5771 }
5772
5773 void MacroAssembler::load_aotrc_address(Register reg, address a) {
5774 #if INCLUDE_CDS
5775 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
5776 if (AOTCodeCache::is_on_for_dump()) {
5777 // all aotrc field addresses should be registered in the AOTCodeCache address table
5778 lea(reg, ExternalAddress(a));
5779 } else {
5780 mov(reg, (uint64_t)a);
5781 }
5782 #else
5783 ShouldNotReachHere();
5784 #endif
5785 }
5786
5787 void MacroAssembler::build_frame(int framesize) {
5788 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5789 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5790 protect_return_address();
5791 if (framesize < ((1 << 9) + 2 * wordSize)) {
5792 sub(sp, sp, framesize);
5793 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5794 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5795 } else {
5796 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5797 if (PreserveFramePointer) mov(rfp, sp);
5798 if (framesize < ((1 << 12) + 2 * wordSize))
5799 sub(sp, sp, framesize - 2 * wordSize);
5800 else {
5801 mov(rscratch1, framesize - 2 * wordSize);
5802 sub(sp, sp, rscratch1);
5803 }
5804 }
5805 verify_cross_modify_fence_not_required();
5806 }
5807
5808 void MacroAssembler::remove_frame(int framesize) {
5809 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5810 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5811 if (framesize < ((1 << 9) + 2 * wordSize)) {
5812 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5813 add(sp, sp, framesize);
5814 } else {
5815 if (framesize < ((1 << 12) + 2 * wordSize))
5816 add(sp, sp, framesize - 2 * wordSize);
5817 else {
5818 mov(rscratch1, framesize - 2 * wordSize);
5819 add(sp, sp, rscratch1);
5820 }
5821 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5822 }
5823 authenticate_return_address();
5824 }
5825
5826
5827 // This method counts leading positive bytes (highest bit not set) in provided byte array
5828 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
5829 // Simple and most common case of aligned small array which is not at the
5830 // end of memory page is placed here. All other cases are in stub.
5831 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
5832 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
5833 assert_different_registers(ary1, len, result);
5834
5835 mov(result, len);
5836 cmpw(len, 0);
5837 br(LE, DONE);
5838 cmpw(len, 4 * wordSize);
5839 br(GE, STUB_LONG); // size > 32 then go to stub
5840
5841 int shift = 64 - exact_log2(os::vm_page_size());
5842 lsl(rscratch1, ary1, shift);
5843 mov(rscratch2, (size_t)(4 * wordSize) << shift);
5844 adds(rscratch2, rscratch1, rscratch2); // At end of page?
5845 br(CS, STUB); // at the end of page then go to stub
6728 // On other systems, the helper is a usual C function.
6729 //
6730 void MacroAssembler::get_thread(Register dst) {
6731 RegSet saved_regs =
6732 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
6733 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
6734
6735 protect_return_address();
6736 push(saved_regs, sp);
6737
6738 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6739 blr(lr);
6740 if (dst != c_rarg0) {
6741 mov(dst, c_rarg0);
6742 }
6743
6744 pop(saved_regs, sp);
6745 authenticate_return_address();
6746 }
6747
6748 void MacroAssembler::cache_wb(Address line) {
6749 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
6750 assert(line.index() == noreg, "index should be noreg");
6751 assert(line.offset() == 0, "offset should be 0");
6752 // would like to assert this
6753 // assert(line._ext.shift == 0, "shift should be zero");
6754 if (VM_Version::supports_dcpop()) {
6755 // writeback using clear virtual address to point of persistence
6756 dc(Assembler::CVAP, line.base());
6757 } else {
6758 // no need to generate anything as Unsafe.writebackMemory should
6759 // never invoke this stub
6760 }
6761 }
6762
6763 void MacroAssembler::cache_wbsync(bool is_pre) {
6764 // we only need a barrier post sync
6765 if (!is_pre) {
6766 membar(Assembler::AnyAny);
6767 }
7163 }
7164
7165 // Check if the lock-stack is full.
7166 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7167 cmpw(top, (unsigned)LockStack::end_offset());
7168 br(Assembler::GE, slow);
7169
7170 // Check for recursion.
7171 subw(t, top, oopSize);
7172 ldr(t, Address(rthread, t));
7173 cmp(obj, t);
7174 br(Assembler::EQ, push);
7175
7176 // Check header for monitor (0b10).
7177 tst(mark, markWord::monitor_value);
7178 br(Assembler::NE, slow);
7179
7180 // Try to lock. Transition lock bits 0b01 => 0b00
7181 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7182 orr(mark, mark, markWord::unlocked_value);
7183 eor(t, mark, markWord::unlocked_value);
7184 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7185 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7186 br(Assembler::NE, slow);
7187
7188 bind(push);
7189 // After successful lock, push object on lock-stack.
7190 str(obj, Address(rthread, top));
7191 addw(top, top, oopSize);
7192 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7193 }
7194
7195 // Implements fast-unlocking.
7196 //
7197 // - obj: the object to be unlocked
7198 // - t1, t2, t3: temporary registers
7199 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7200 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7201 // cmpxchg clobbers rscratch1.
7202 assert_different_registers(obj, t1, t2, t3, rscratch1);
|
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "ci/ciInlineKlass.hpp"
30 #include "code/compiledIC.hpp"
31 #include "compiler/compileTask.hpp"
32 #include "compiler/disassembler.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "gc/shared/cardTableBarrierSet.hpp"
37 #include "gc/shared/cardTable.hpp"
38 #include "gc/shared/collectedHeap.hpp"
39 #include "gc/shared/tlab_globals.hpp"
40 #include "interpreter/bytecodeHistogram.hpp"
41 #include "interpreter/interpreter.hpp"
42 #include "interpreter/interpreterRuntime.hpp"
43 #include "jvm.h"
44 #include "memory/resourceArea.hpp"
45 #include "memory/universe.hpp"
46 #include "nativeInst_aarch64.hpp"
47 #include "oops/accessDecorators.hpp"
48 #include "oops/compressedKlass.inline.hpp"
49 #include "oops/compressedOops.inline.hpp"
50 #include "oops/klass.inline.hpp"
51 #include "oops/resolvedFieldEntry.hpp"
52 #include "runtime/arguments.hpp"
53 #include "runtime/continuation.hpp"
54 #include "runtime/globals.hpp"
55 #include "runtime/icache.hpp"
56 #include "runtime/interfaceSupport.inline.hpp"
57 #include "runtime/javaThread.hpp"
58 #include "runtime/jniHandles.inline.hpp"
59 #include "runtime/sharedRuntime.hpp"
60 #include "runtime/signature_cc.hpp"
61 #include "runtime/stubRoutines.hpp"
62 #include "utilities/globalDefinitions.hpp"
63 #include "utilities/integerCast.hpp"
64 #include "utilities/powerOfTwo.hpp"
65 #include "vmreg_aarch64.inline.hpp"
66 #ifdef COMPILER1
67 #include "c1/c1_LIRAssembler.hpp"
68 #endif
69 #ifdef COMPILER2
70 #include "oops/oop.hpp"
71 #include "opto/compile.hpp"
72 #include "opto/node.hpp"
73 #include "opto/output.hpp"
74 #endif
75
76 #include <sys/types.h>
77
78 #ifdef PRODUCT
79 #define BLOCK_COMMENT(str) /* nothing */
80 #else
81 #define BLOCK_COMMENT(str) block_comment(str)
82 #endif
83 #define STOP(str) stop(str);
84 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
85
2012 ldarb(scratch, scratch);
2013 cmp(scratch, InstanceKlass::fully_initialized);
2014 br(Assembler::EQ, *L_fast_path);
2015
2016 // Fast path check: current thread is initializer thread
2017 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2018 cmp(rthread, scratch);
2019
2020 if (L_slow_path == &L_fallthrough) {
2021 br(Assembler::EQ, *L_fast_path);
2022 bind(*L_slow_path);
2023 } else if (L_fast_path == &L_fallthrough) {
2024 br(Assembler::NE, *L_slow_path);
2025 bind(*L_fast_path);
2026 } else {
2027 Unimplemented();
2028 }
2029 }
2030
2031 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2032 if (!VerifyOops || VerifyAdapterSharing) {
2033 // Below address of the code string confuses VerifyAdapterSharing
2034 // because it may differ between otherwise equivalent adapters.
2035 return;
2036 }
2037
2038 // Pass register number to verify_oop_subroutine
2039 const char* b = nullptr;
2040 {
2041 ResourceMark rm;
2042 stringStream ss;
2043 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2044 b = code_string(ss.as_string());
2045 }
2046 BLOCK_COMMENT("verify_oop {");
2047
2048 strip_return_address(); // This might happen within a stack frame.
2049 protect_return_address();
2050 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2051 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2052
2053 mov(r0, reg);
2054 movptr(rscratch1, (uintptr_t)(address)b);
2055
2056 // call indirectly to solve generation ordering problem
2057 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2058 ldr(rscratch2, Address(rscratch2));
2059 blr(rscratch2);
2060
2061 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2062 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2063 authenticate_return_address();
2064
2065 BLOCK_COMMENT("} verify_oop");
2066 }
2067
2068 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2069 if (!VerifyOops || VerifyAdapterSharing) {
2070 // Below address of the code string confuses VerifyAdapterSharing
2071 // because it may differ between otherwise equivalent adapters.
2072 return;
2073 }
2074
2075 const char* b = nullptr;
2076 {
2077 ResourceMark rm;
2078 stringStream ss;
2079 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2080 b = code_string(ss.as_string());
2081 }
2082 BLOCK_COMMENT("verify_oop_addr {");
2083
2084 strip_return_address(); // This might happen within a stack frame.
2085 protect_return_address();
2086 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2087 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2088
2089 // addr may contain sp so we will have to adjust it based on the
2090 // pushes that we just did.
2091 if (addr.uses(sp)) {
2092 lea(r0, addr);
2093 ldr(r0, Address(r0, 4 * wordSize));
2306 call_VM_leaf_base(entry_point, 1);
2307 }
2308
2309 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2310 assert_different_registers(arg_1, c_rarg0);
2311 pass_arg0(this, arg_0);
2312 pass_arg1(this, arg_1);
2313 call_VM_leaf_base(entry_point, 2);
2314 }
2315
2316 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2317 Register arg_1, Register arg_2) {
2318 assert_different_registers(arg_1, c_rarg0);
2319 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2320 pass_arg0(this, arg_0);
2321 pass_arg1(this, arg_1);
2322 pass_arg2(this, arg_2);
2323 call_VM_leaf_base(entry_point, 3);
2324 }
2325
2326 void MacroAssembler::super_call_VM_leaf(address entry_point) {
2327 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2328 }
2329
2330 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2331 pass_arg0(this, arg_0);
2332 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2333 }
2334
2335 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2336
2337 assert_different_registers(arg_0, c_rarg1);
2338 pass_arg1(this, arg_1);
2339 pass_arg0(this, arg_0);
2340 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2341 }
2342
2343 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2344 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2345 assert_different_registers(arg_1, c_rarg2);
2346 pass_arg2(this, arg_2);
2347 pass_arg1(this, arg_1);
2348 pass_arg0(this, arg_0);
2349 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2355 assert_different_registers(arg_2, c_rarg3);
2356 pass_arg3(this, arg_3);
2357 pass_arg2(this, arg_2);
2358 pass_arg1(this, arg_1);
2359 pass_arg0(this, arg_0);
2360 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2361 }
2362
2363 void MacroAssembler::null_check(Register reg, int offset) {
2364 if (needs_explicit_null_check(offset)) {
2365 // provoke OS null exception if reg is null by
2366 // accessing M[reg] w/o changing any registers
2367 // NOTE: this is plenty to provoke a segv
2368 ldr(zr, Address(reg));
2369 } else {
2370 // nothing to do, (later) access of M[reg + offset]
2371 // will provoke OS null exception if reg is null
2372 }
2373 }
2374
2375 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2376 assert_different_registers(markword, rscratch2);
2377 mov(rscratch2, markWord::inline_type_pattern_mask);
2378 andr(markword, markword, rscratch2);
2379 mov(rscratch2, markWord::inline_type_pattern);
2380 cmp(markword, rscratch2);
2381 br(Assembler::EQ, is_inline_type);
2382 }
2383
2384 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2385 assert_different_registers(tmp, rscratch1);
2386 if (can_be_null) {
2387 cbz(object, not_inline_type);
2388 }
2389 const int is_inline_type_mask = markWord::inline_type_pattern;
2390 ldr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2391 mov(rscratch1, is_inline_type_mask);
2392 andr(tmp, tmp, rscratch1);
2393 cmp(tmp, rscratch1);
2394 br(Assembler::NE, not_inline_type);
2395 }
2396
2397 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2398 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2399 tbnz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, is_null_free_inline_type);
2400 }
2401
2402 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2403 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2404 tbz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, not_null_free_inline_type);
2405 }
2406
2407 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2408 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2409 tbnz(flags, ResolvedFieldEntry::is_flat_shift, is_flat);
2410 }
2411
2412 void MacroAssembler::test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker) {
2413 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2414 tbnz(flags, ResolvedFieldEntry::has_null_marker_shift, has_null_marker);
2415 }
2416
2417 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2418 Label test_mark_word;
2419 // load mark word
2420 ldr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2421 // check displaced
2422 tst(temp_reg, markWord::unlocked_value);
2423 br(Assembler::NE, test_mark_word);
2424 // slow path use klass prototype
2425 load_prototype_header(temp_reg, oop);
2426
2427 bind(test_mark_word);
2428 andr(temp_reg, temp_reg, test_bit);
2429 if (jmp_set) {
2430 cbnz(temp_reg, jmp_label);
2431 } else {
2432 cbz(temp_reg, jmp_label);
2433 }
2434 }
2435
2436 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array) {
2437 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2438 }
2439
2440 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2441 Label&is_non_flat_array) {
2442 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2443 }
2444
2445 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array) {
2446 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2447 }
2448
2449 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2450 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2451 }
2452
2453 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2454 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2455 br(Assembler::NE, is_flat_array);
2456 }
2457
2458 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
2459 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2460 br(Assembler::EQ, is_non_flat_array);
2461 }
2462
2463 // MacroAssembler protected routines needed to implement
2464 // public methods
2465
2466 void MacroAssembler::mov(Register r, Address dest) {
2467 code_section()->relocate(pc(), dest.rspec());
2468 uint64_t imm64 = (uint64_t)dest.target();
2469 movptr(r, imm64);
2470 }
2471
2472 // Move a constant pointer into r. In AArch64 mode the virtual
2473 // address space is 48 bits in size, so we only need three
2474 // instructions to create a patchable instruction sequence that can
2475 // reach anywhere.
2476 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2477 #ifndef PRODUCT
2478 {
2479 char buffer[64];
2480 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2481 block_comment(buffer);
2482 }
5165 adrp(rscratch1, src2, offset);
5166 ldr(rscratch1, Address(rscratch1, offset));
5167 cmp(src1, rscratch1);
5168 }
5169
5170 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5171 cmp(obj1, obj2);
5172 }
5173
5174 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5175 load_method_holder(rresult, rmethod);
5176 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5177 }
5178
5179 void MacroAssembler::load_method_holder(Register holder, Register method) {
5180 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5181 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5182 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5183 }
5184
5185 void MacroAssembler::load_metadata(Register dst, Register src) {
5186 if (UseCompactObjectHeaders) {
5187 load_narrow_klass_compact(dst, src);
5188 } else {
5189 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5190 }
5191 }
5192
5193 // Loads the obj's Klass* into dst.
5194 // Preserves all registers (incl src, rscratch1 and rscratch2).
5195 // Input:
5196 // src - the oop we want to load the klass from.
5197 // dst - output narrow klass.
5198 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5199 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5200 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5201 lsr(dst, dst, markWord::klass_shift);
5202 }
5203
5204 void MacroAssembler::load_klass(Register dst, Register src) {
5205 if (UseCompactObjectHeaders) {
5206 load_narrow_klass_compact(dst, src);
5207 } else {
5208 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5209 }
5210 decode_klass_not_null(dst);
5211 }
5212
5264 } else {
5265 ldrw(tmp, Address(obj, oopDesc::klass_offset_in_bytes()));
5266 }
5267 if (CompressedKlassPointers::base() == nullptr) {
5268 cmp(klass, tmp, LSL, CompressedKlassPointers::shift());
5269 return;
5270 } else if (!AOTCodeCache::is_on_for_dump() &&
5271 ((uint64_t)CompressedKlassPointers::base() & 0xffffffff) == 0
5272 && CompressedKlassPointers::shift() == 0) {
5273 // Only the bottom 32 bits matter
5274 cmpw(klass, tmp);
5275 return;
5276 }
5277 decode_klass_not_null(tmp);
5278 cmp(klass, tmp);
5279 }
5280
5281 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5282 if (UseCompactObjectHeaders) {
5283 load_narrow_klass_compact(tmp1, obj1);
5284 load_narrow_klass_compact(tmp2, obj2);
5285 } else {
5286 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5287 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5288 }
5289 cmpw(tmp1, tmp2);
5290 }
5291
5292 void MacroAssembler::load_prototype_header(Register dst, Register src) {
5293 load_klass(dst, src);
5294 ldr(dst, Address(dst, Klass::prototype_header_offset()));
5295 }
5296
5297 void MacroAssembler::store_klass(Register dst, Register src) {
5298 // FIXME: Should this be a store release? concurrent gcs assumes
5299 // klass length is valid if klass field is not null.
5300 assert(!UseCompactObjectHeaders, "not with compact headers");
5301 encode_klass_not_null(src);
5302 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5303 }
5304
5305 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5306 assert(!UseCompactObjectHeaders, "not with compact headers");
5307 // Store to klass gap in destination
5308 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5309 }
5310
5311 // Algorithm must match CompressedOops::encode.
5312 void MacroAssembler::encode_heap_oop(Register d, Register s) {
5313 #ifdef ASSERT
5314 verify_heapbase("MacroAssembler::encode_heap_oop: heap base corrupted?");
5315 #endif
5316 verify_oop_msg(s, "broken oop in encode_heap_oop");
5666 if (as_raw) {
5667 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5668 } else {
5669 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5670 }
5671 }
5672
5673 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5674 Address dst, Register val,
5675 Register tmp1, Register tmp2, Register tmp3) {
5676 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5677 decorators = AccessInternal::decorator_fixup(decorators, type);
5678 bool as_raw = (decorators & AS_RAW) != 0;
5679 if (as_raw) {
5680 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5681 } else {
5682 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5683 }
5684 }
5685
5686 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5687 Register inline_layout_info) {
5688 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5689 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5690 }
5691
5692 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5693 ldr(offset, Address(inline_klass, InlineKlass::adr_members_offset()));
5694 ldrw(offset, Address(offset, InlineKlass::payload_offset_offset()));
5695 }
5696
5697 void MacroAssembler::payload_address(Register oop, Register data, Register inline_klass) {
5698 // ((address) (void*) o) + vk->payload_offset();
5699 Register offset = (data == oop) ? rscratch1 : data;
5700 payload_offset(inline_klass, offset);
5701 if (data == oop) {
5702 add(data, data, offset);
5703 } else {
5704 lea(data, Address(oop, offset));
5705 }
5706 }
5707
5708 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
5709 Register index, Register data) {
5710 assert_different_registers(array, array_klass, index);
5711 assert_different_registers(rscratch1, array, index);
5712
5713 // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
5714 ldrw(rscratch1, Address(array_klass, Klass::layout_helper_offset()));
5715
5716 // Klass::layout_helper_log2_element_size(lh)
5717 // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
5718 lsr(rscratch1, rscratch1, Klass::_lh_log2_element_size_shift);
5719 andr(rscratch1, rscratch1, Klass::_lh_log2_element_size_mask);
5720 lslv(index, index, rscratch1);
5721
5722 add(data, array, index);
5723 add(data, data, arrayOopDesc::base_offset_in_bytes(T_FLAT_ELEMENT));
5724 }
5725
5726 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5727 Register tmp2, DecoratorSet decorators) {
5728 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5729 }
5730
5731 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5732 Register tmp2, DecoratorSet decorators) {
5733 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5734 }
5735
5736 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5737 Register tmp2, Register tmp3, DecoratorSet decorators) {
5738 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5739 }
5740
5741 // Used for storing nulls.
5742 void MacroAssembler::store_heap_oop_null(Address dst) {
5743 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5744 }
5745
5781 oop_index = oop_recorder()->allocate_metadata_index(obj);
5782 } else {
5783 oop_index = oop_recorder()->find_index(obj);
5784 }
5785 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5786 mov(dst, Address((address)obj, rspec));
5787 }
5788
5789 Address MacroAssembler::constant_oop_address(jobject obj) {
5790 #ifdef ASSERT
5791 {
5792 ThreadInVMfromUnknown tiv;
5793 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5794 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5795 }
5796 #endif
5797 int oop_index = oop_recorder()->find_index(obj);
5798 return Address((address)obj, oop_Relocation::spec(oop_index));
5799 }
5800
5801 // Object / value buffer allocation...
5802 void MacroAssembler::allocate_instance(Register klass, Register new_obj,
5803 Register t1, Register t2,
5804 bool clear_fields, Label& alloc_failed)
5805 {
5806 Label done, initialize_header, initialize_object, slow_case, slow_case_no_pop;
5807 Register layout_size = t1;
5808 assert(new_obj == r0, "needs to be r0");
5809 assert_different_registers(klass, new_obj, t1, t2);
5810
5811 // get instance_size in InstanceKlass (scaled to a count of bytes)
5812 ldrw(layout_size, Address(klass, Klass::layout_helper_offset()));
5813 // test to see if it is malformed in some way
5814 tst(layout_size, Klass::_lh_instance_slow_path_bit);
5815 br(Assembler::NE, slow_case_no_pop);
5816
5817 // Allocate the instance:
5818 // If TLAB is enabled:
5819 // Try to allocate in the TLAB.
5820 // If fails, go to the slow path.
5821 // Initialize the allocation.
5822 // Exit.
5823 //
5824 // Go to slow path.
5825
5826 if (UseTLAB) {
5827 push(klass);
5828 tlab_allocate(new_obj, layout_size, 0, klass, t2, slow_case);
5829 if (ZeroTLAB || (!clear_fields)) {
5830 // the fields have been already cleared
5831 b(initialize_header);
5832 } else {
5833 // initialize both the header and fields
5834 b(initialize_object);
5835 }
5836
5837 if (clear_fields) {
5838 // The object is initialized before the header. If the object size is
5839 // zero, go directly to the header initialization.
5840 bind(initialize_object);
5841 int header_size = oopDesc::header_size() * HeapWordSize;
5842 assert(is_aligned(header_size, BytesPerLong), "oop header size must be 8-byte-aligned");
5843 subs(layout_size, layout_size, header_size);
5844 br(Assembler::EQ, initialize_header);
5845
5846 // Initialize topmost object field, divide size by 8, check if odd and
5847 // test if zero.
5848
5849 #ifdef ASSERT
5850 // make sure instance_size was multiple of 8
5851 Label L;
5852 tst(layout_size, 7);
5853 br(Assembler::EQ, L);
5854 stop("object size is not multiple of 8 - adjust this code");
5855 bind(L);
5856 // must be > 0, no extra check needed here
5857 #endif
5858
5859 lsr(layout_size, layout_size, LogBytesPerLong);
5860
5861 // initialize remaining object fields: instance_size was a multiple of 8
5862 {
5863 Label loop;
5864 Register base = t2;
5865
5866 bind(loop);
5867 add(rscratch1, new_obj, layout_size, Assembler::LSL, LogBytesPerLong);
5868 str(zr, Address(rscratch1, header_size - 1*oopSize));
5869 subs(layout_size, layout_size, 1);
5870 br(Assembler::NE, loop);
5871 }
5872 } // clear_fields
5873
5874 // initialize object header only.
5875 bind(initialize_header);
5876 pop(klass);
5877 Register mark_word = t2;
5878 if (UseCompactObjectHeaders || Arguments::is_valhalla_enabled()) {
5879 ldr(mark_word, Address(klass, Klass::prototype_header_offset()));
5880 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5881 } else {
5882 mov(mark_word, (intptr_t)markWord::prototype().value());
5883 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5884 }
5885 if (!UseCompactObjectHeaders) {
5886 store_klass_gap(new_obj, zr); // zero klass gap for compressed oops
5887 mov(t2, klass); // preserve klass
5888 store_klass(new_obj, t2); // src klass reg is potentially compressed
5889 }
5890 b(done);
5891 }
5892
5893 if (UseTLAB) {
5894 bind(slow_case);
5895 pop(klass);
5896 }
5897 bind(slow_case_no_pop);
5898 b(alloc_failed);
5899
5900 bind(done);
5901 }
5902
5903 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5904 void MacroAssembler::tlab_allocate(Register obj,
5905 Register var_size_in_bytes,
5906 int con_size_in_bytes,
5907 Register t1,
5908 Register t2,
5909 Label& slow_case) {
5910 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5911 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5912 }
5913
5914 void MacroAssembler::verify_tlab() {
5915 #ifdef ASSERT
5916 if (UseTLAB && VerifyOops) {
5917 Label next, ok;
5918
5919 stp(rscratch2, rscratch1, Address(pre(sp, -16)));
5920
5921 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5922 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5923 cmp(rscratch2, rscratch1);
5924 br(Assembler::HS, next);
5925 STOP("assert(top >= start)");
5926 should_not_reach_here();
5927
5928 bind(next);
5929 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5930 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5931 cmp(rscratch2, rscratch1);
5932 br(Assembler::HS, ok);
5933 STOP("assert(top <= end)");
5934 should_not_reach_here();
5935
5936 bind(ok);
5937 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5938 }
5939 #endif
5940 }
5941
5942 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
5943 assert_different_registers(holder_klass, index, layout_info);
5944 InlineLayoutInfo array[2];
5945 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
5946 if (is_power_of_2(size)) {
5947 lsl(index, index, log2i_exact(size)); // Scale index by power of 2
5948 } else {
5949 mov(layout_info, size);
5950 mul(index, index, layout_info); // Scale the index to be the entry index * array_element_size
5951 }
5952 ldr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
5953 add(layout_info, layout_info, Array<InlineLayoutInfo>::base_offset_in_bytes());
5954 lea(layout_info, Address(layout_info, index));
5955 }
5956
5957 // Writes to stack successive pages until offset reached to check for
5958 // stack overflow + shadow pages. This clobbers tmp.
5959 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5960 assert_different_registers(tmp, size, rscratch1);
5961 mov(tmp, sp);
5962 // Bang stack for total size given plus shadow page size.
5963 // Bang one page at a time because large size can bang beyond yellow and
5964 // red zones.
5965 Label loop;
5966 mov(rscratch1, (int)os::vm_page_size());
5967 bind(loop);
5968 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5969 subsw(size, size, rscratch1);
5970 str(size, Address(tmp));
5971 br(Assembler::GT, loop);
5972
5973 // Bang down shadow pages too.
5974 // At this point, (tmp-0) is the last address touched, so don't
5975 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5976 // was post-decremented.) Skip this address by starting at i=1, and
6043
6044 // Strictly speaking the card table base isn't an address at all, and it might
6045 // even be negative. It is thus materialised as a constant.
6046 mov(reg, (uint64_t)ctbs->card_table_base_const());
6047 }
6048
6049 void MacroAssembler::load_aotrc_address(Register reg, address a) {
6050 #if INCLUDE_CDS
6051 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
6052 if (AOTCodeCache::is_on_for_dump()) {
6053 // all aotrc field addresses should be registered in the AOTCodeCache address table
6054 lea(reg, ExternalAddress(a));
6055 } else {
6056 mov(reg, (uint64_t)a);
6057 }
6058 #else
6059 ShouldNotReachHere();
6060 #endif
6061 }
6062
6063 #ifdef ASSERT
6064 void MacroAssembler::build_frame(int framesize) {
6065 build_frame(framesize, false);
6066 }
6067 #endif
6068
6069 void MacroAssembler::build_frame(int framesize DEBUG_ONLY(COMMA bool zap_rfp_lr_spills)) {
6070 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
6071 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
6072 protect_return_address();
6073 if (framesize < ((1 << 9) + 2 * wordSize)) {
6074 sub(sp, sp, framesize);
6075 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
6076 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
6077 stp(rscratch1, rscratch1, Address(sp, framesize - 2 * wordSize));
6078 } else {
6079 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
6080 }
6081 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
6082 } else {
6083 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
6084 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
6085 stp(rscratch1, rscratch1, Address(pre(sp, -2 * wordSize)));
6086 } else {
6087 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
6088 }
6089 if (PreserveFramePointer) mov(rfp, sp);
6090 if (framesize < ((1 << 12) + 2 * wordSize))
6091 sub(sp, sp, framesize - 2 * wordSize);
6092 else {
6093 mov(rscratch1, framesize - 2 * wordSize);
6094 sub(sp, sp, rscratch1);
6095 }
6096 }
6097 verify_cross_modify_fence_not_required();
6098 }
6099
6100 void MacroAssembler::remove_frame(int framesize) {
6101 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
6102 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
6103 if (framesize < ((1 << 9) + 2 * wordSize)) {
6104 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
6105 add(sp, sp, framesize);
6106 } else {
6107 if (framesize < ((1 << 12) + 2 * wordSize))
6108 add(sp, sp, framesize - 2 * wordSize);
6109 else {
6110 mov(rscratch1, framesize - 2 * wordSize);
6111 add(sp, sp, rscratch1);
6112 }
6113 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6114 }
6115 authenticate_return_address();
6116 }
6117
6118 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6119 if (needs_stack_repair) {
6120 // The method has a scalarized entry point (where fields of value object arguments
6121 // are passed through registers and stack), and a non-scalarized entry point (where
6122 // value object arguments are given as oops). The non-scalarized entry point will
6123 // first load each field of value object arguments and store them in registers and on
6124 // the stack in a way compatible with the scalarized entry point. To do so, some extra
6125 // stack space might be reserved (if argument registers are not enough). On leaving the
6126 // method, this space must be freed.
6127 //
6128 // In case we used the non-scalarized entry point the stack looks like this:
6129 //
6130 // | Arguments from caller |
6131 // |---------------------------| <-- caller's SP
6132 // | Saved LR #1 |
6133 // | Saved FP #1 |
6134 // |---------------------------|
6135 // | Extension space for |
6136 // | inline arg (un)packing |
6137 // |---------------------------| <-- start of this method's frame
6138 // | Saved LR #2 |
6139 // | Saved FP #2 |
6140 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6141 // | sp_inc |
6142 // | method locals |
6143 // |---------------------------| <-- SP
6144 //
6145 // There are two copies of FP and LR on the stack. They will be identical at
6146 // first, but that can change.
6147 // If the caller has been deoptimized, LR #1 will be patched to point at the
6148 // deopt blob, and LR #2 will still point into the old method.
6149 // If the saved FP (x29) was not used as the frame pointer, but to store an
6150 // oop, the GC will be aware only of FP #1 as the spilled location of x29 and
6151 // will fix only this one. Overall, FP/LR #2 are not reliable and are simply
6152 // needed to add space between the extension space and the locals, as there
6153 // would be between the real arguments and the locals if we don't need to
6154 // do unpacking (from the scalarized entry point).
6155 //
6156 // When restoring, one must then load FP #1 into x29, and LR #1 into x30,
6157 // while keeping in mind that from the scalarized entry point, there will be
6158 // only one copy of each. Indeed, in the case we used the scalarized calling
6159 // convention, the stack looks like this:
6160 //
6161 // | Arguments from caller |
6162 // |---------------------------| <-- caller's SP / start of this method's frame
6163 // | Saved LR |
6164 // | Saved FP |
6165 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6166 // | sp_inc |
6167 // | method locals |
6168 // |---------------------------| <-- SP
6169 //
6170 // The sp_inc stack slot holds the total size of the frame including the
6171 // extension space minus two words for the saved FP and LR. That is how to
6172 // find FP/LR #1. This size is expressed in bytes. Be careful when using it
6173 // from C++ in pointer arithmetic; you might need to divide it by wordSize.
6174 //
6175 // One can find sp_inc since the start the method's frame is SP + initial_framesize.
6176
6177 int sp_inc_offset = initial_framesize - 3 * wordSize; // Immediately below saved LR and FP
6178
6179 ldr(rscratch1, Address(sp, sp_inc_offset));
6180 add(sp, sp, rscratch1);
6181 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6182 } else {
6183 remove_frame(initial_framesize);
6184 }
6185 }
6186
6187 void MacroAssembler::save_stack_increment(int sp_inc, int frame_size) {
6188 int real_frame_size = frame_size + sp_inc;
6189 assert(sp_inc == 0 || sp_inc > 2*wordSize, "invalid sp_inc value");
6190 assert(real_frame_size >= 2*wordSize, "frame size must include FP/LR space");
6191 assert((real_frame_size & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6192
6193 int sp_inc_offset = frame_size - 3 * wordSize; // Immediately below saved LR and FP
6194
6195 // Subtract two words for the saved FP and LR as these will be popped
6196 // separately. See remove_frame above.
6197 mov(rscratch1, real_frame_size - 2*wordSize);
6198 str(rscratch1, Address(sp, sp_inc_offset));
6199 }
6200
6201 // This method counts leading positive bytes (highest bit not set) in provided byte array
6202 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
6203 // Simple and most common case of aligned small array which is not at the
6204 // end of memory page is placed here. All other cases are in stub.
6205 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
6206 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
6207 assert_different_registers(ary1, len, result);
6208
6209 mov(result, len);
6210 cmpw(len, 0);
6211 br(LE, DONE);
6212 cmpw(len, 4 * wordSize);
6213 br(GE, STUB_LONG); // size > 32 then go to stub
6214
6215 int shift = 64 - exact_log2(os::vm_page_size());
6216 lsl(rscratch1, ary1, shift);
6217 mov(rscratch2, (size_t)(4 * wordSize) << shift);
6218 adds(rscratch2, rscratch1, rscratch2); // At end of page?
6219 br(CS, STUB); // at the end of page then go to stub
7102 // On other systems, the helper is a usual C function.
7103 //
7104 void MacroAssembler::get_thread(Register dst) {
7105 RegSet saved_regs =
7106 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
7107 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
7108
7109 protect_return_address();
7110 push(saved_regs, sp);
7111
7112 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
7113 blr(lr);
7114 if (dst != c_rarg0) {
7115 mov(dst, c_rarg0);
7116 }
7117
7118 pop(saved_regs, sp);
7119 authenticate_return_address();
7120 }
7121
7122 #ifdef COMPILER2
7123 // C2 compiled method's prolog code
7124 // Moved here from aarch64.ad to support Valhalla code below
7125 void MacroAssembler::verified_entry(Compile* C, int sp_inc) {
7126 if (C->clinit_barrier_on_entry()) {
7127 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
7128
7129 Label L_skip_barrier;
7130
7131 mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
7132 clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
7133 far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
7134 bind(L_skip_barrier);
7135 }
7136
7137 if (C->max_vector_size() > 0) {
7138 reinitialize_ptrue();
7139 }
7140
7141 int bangsize = C->output()->bang_size_in_bytes();
7142 if (C->output()->need_stack_bang(bangsize))
7143 generate_stack_overflow_check(bangsize);
7144
7145 // n.b. frame size includes space for return pc and rfp
7146 const long framesize = C->output()->frame_size_in_bytes();
7147 build_frame(framesize DEBUG_ONLY(COMMA sp_inc != 0));
7148
7149 if (C->needs_stack_repair()) {
7150 save_stack_increment(sp_inc, framesize);
7151 }
7152
7153 if (VerifyStackAtCalls) {
7154 Unimplemented();
7155 }
7156 }
7157 #endif // COMPILER2
7158
7159 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
7160 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
7161 // An inline type might be returned. If fields are in registers we
7162 // need to allocate an inline type instance and initialize it with
7163 // the value of the fields.
7164 Label skip;
7165 // We only need a new buffered inline type if a new one is not returned
7166 tbz(r0, 0, skip);
7167 int call_offset = -1;
7168
7169 // Be careful not to clobber r1-7 which hold returned fields
7170 // Also do not use callee-saved registers as these may be live in the interpreter
7171 Register tmp1 = r13, tmp2 = r14, klass = r15, r0_preserved = r12;
7172
7173 // The following code is similar to allocate_instance but has some slight differences,
7174 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
7175 // allocating is not necessary if vk != nullptr, etc. allocate_instance is not aware of these.
7176 Label slow_case;
7177 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
7178 mov(r0_preserved, r0); // save r0 for slow_case since *_allocate may corrupt it when allocation failed
7179
7180 if (vk != nullptr) {
7181 // Called from C1, where the return type is statically known.
7182 movptr(klass, (intptr_t)vk->get_InlineKlass());
7183 jint lh = vk->layout_helper();
7184 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
7185 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
7186 tlab_allocate(r0, noreg, lh, tmp1, tmp2, slow_case);
7187 } else {
7188 b(slow_case);
7189 }
7190 } else {
7191 // Call from interpreter. R0 contains ((the InlineKlass* of the return type) | 0x01)
7192 andr(klass, r0, -2);
7193 if (UseTLAB) {
7194 ldrw(tmp2, Address(klass, Klass::layout_helper_offset()));
7195 tst(tmp2, Klass::_lh_instance_slow_path_bit);
7196 br(Assembler::NE, slow_case);
7197 tlab_allocate(r0, tmp2, 0, tmp1, tmp2, slow_case);
7198 } else {
7199 b(slow_case);
7200 }
7201 }
7202 if (UseTLAB) {
7203 // 2. Initialize buffered inline instance header
7204 Register buffer_obj = r0;
7205 if (UseCompactObjectHeaders) {
7206 ldr(rscratch1, Address(klass, Klass::prototype_header_offset()));
7207 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7208 } else {
7209 mov(rscratch1, (intptr_t)markWord::inline_type_prototype().value());
7210 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7211 store_klass_gap(buffer_obj, zr);
7212 if (vk == nullptr) {
7213 // store_klass corrupts klass, so save it for later use (interpreter case only).
7214 mov(tmp1, klass);
7215 }
7216 store_klass(buffer_obj, klass);
7217 klass = tmp1;
7218 }
7219 // 3. Initialize its fields with an inline class specific handler
7220 if (vk != nullptr) {
7221 far_call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
7222 } else {
7223 ldr(tmp1, Address(klass, InlineKlass::adr_members_offset()));
7224 ldr(tmp1, Address(tmp1, InlineKlass::pack_handler_offset()));
7225 blr(tmp1);
7226 }
7227
7228 membar(Assembler::StoreStore);
7229 b(skip);
7230 } else {
7231 // Must have already branched to slow_case above.
7232 DEBUG_ONLY(should_not_reach_here());
7233 }
7234 bind(slow_case);
7235 // We failed to allocate a new inline type, fall back to a runtime
7236 // call. Some oop field may be live in some registers but we can't
7237 // tell. That runtime call will take care of preserving them
7238 // across a GC if there's one.
7239 mov(r0, r0_preserved);
7240
7241 if (from_interpreter) {
7242 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
7243 } else {
7244 far_call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
7245 call_offset = offset();
7246 }
7247 membar(Assembler::StoreStore);
7248
7249 bind(skip);
7250 return call_offset;
7251 }
7252
7253 // Move a value between registers/stack slots and update the reg_state
7254 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
7255 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
7256 if (reg_state[to->value()] == reg_written) {
7257 return true; // Already written
7258 }
7259
7260 if (from != to && bt != T_VOID) {
7261 if (reg_state[to->value()] == reg_readonly) {
7262 return false; // Not yet writable
7263 }
7264 if (from->is_reg()) {
7265 if (to->is_reg()) {
7266 if (from->is_Register() && to->is_Register()) {
7267 mov(to->as_Register(), from->as_Register());
7268 } else if (from->is_FloatRegister() && to->is_FloatRegister()) {
7269 fmovd(to->as_FloatRegister(), from->as_FloatRegister());
7270 } else {
7271 ShouldNotReachHere();
7272 }
7273 } else {
7274 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7275 Address to_addr = Address(sp, st_off);
7276 if (from->is_FloatRegister()) {
7277 if (bt == T_DOUBLE) {
7278 strd(from->as_FloatRegister(), to_addr);
7279 } else {
7280 assert(bt == T_FLOAT, "must be float");
7281 strs(from->as_FloatRegister(), to_addr);
7282 }
7283 } else {
7284 str(from->as_Register(), to_addr);
7285 }
7286 }
7287 } else {
7288 Address from_addr = Address(sp, from->reg2stack() * VMRegImpl::stack_slot_size);
7289 if (to->is_reg()) {
7290 if (to->is_FloatRegister()) {
7291 if (bt == T_DOUBLE) {
7292 ldrd(to->as_FloatRegister(), from_addr);
7293 } else {
7294 assert(bt == T_FLOAT, "must be float");
7295 ldrs(to->as_FloatRegister(), from_addr);
7296 }
7297 } else {
7298 ldr(to->as_Register(), from_addr);
7299 }
7300 } else {
7301 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7302 ldr(rscratch1, from_addr);
7303 str(rscratch1, Address(sp, st_off));
7304 }
7305 }
7306 }
7307
7308 // Update register states
7309 reg_state[from->value()] = reg_writable;
7310 reg_state[to->value()] = reg_written;
7311 return true;
7312 }
7313
7314 // Calculate the extra stack space required for packing or unpacking inline
7315 // args and adjust the stack pointer
7316 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
7317 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
7318 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
7319 assert(sp_inc > 0, "sanity");
7320
7321 // Save a copy of the FP and LR here for deoptimization patching and frame walking
7322 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
7323
7324 // Adjust the stack pointer. This will be repaired on return by MacroAssembler::remove_frame
7325 if (sp_inc < (1 << 9)) {
7326 sub(sp, sp, sp_inc); // Fits in an immediate
7327 } else {
7328 mov(rscratch1, sp_inc);
7329 sub(sp, sp, rscratch1);
7330 }
7331
7332 return sp_inc + 2 * wordSize; // Account for the FP/LR space
7333 }
7334
7335 // Read all fields from an inline type oop and store the values in registers/stack slots
7336 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
7337 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
7338 RegState reg_state[]) {
7339 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
7340 assert(from->is_valid(), "source must be valid");
7341 bool progress = false;
7342 #ifdef ASSERT
7343 const int start_offset = offset();
7344 #endif
7345
7346 Label L_null, L_notNull;
7347 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
7348 Register tmp1 = r10;
7349 Register tmp2 = r11;
7350
7351 #ifndef ASSERT
7352 RegSet clobbered_gp_regs = MacroAssembler::call_clobbered_gp_registers();
7353 assert(clobbered_gp_regs.contains(tmp1), "tmp1 must be saved explicitly if it's not a clobber");
7354 assert(clobbered_gp_regs.contains(tmp2), "tmp2 must be saved explicitly if it's not a clobber");
7355 assert(clobbered_gp_regs.contains(r14), "r14 must be saved explicitly if it's not a clobber");
7356 #endif
7357
7358 Register fromReg = noreg;
7359 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
7360 bool done = true;
7361 bool mark_done = true;
7362 VMReg toReg;
7363 BasicType bt;
7364 // Check if argument requires a null check
7365 bool null_check = false;
7366 VMReg nullCheckReg;
7367 while (stream.next(nullCheckReg, bt)) {
7368 if (sig->at(stream.sig_index())._offset == -1) {
7369 null_check = true;
7370 break;
7371 }
7372 }
7373 stream.reset(sig_index, to_index);
7374 while (stream.next(toReg, bt)) {
7375 assert(toReg->is_valid(), "destination must be valid");
7376 int idx = (int)toReg->value();
7377 if (reg_state[idx] == reg_readonly) {
7378 if (idx != from->value()) {
7379 mark_done = false;
7380 }
7381 done = false;
7382 continue;
7383 } else if (reg_state[idx] == reg_written) {
7384 continue;
7385 }
7386 assert(reg_state[idx] == reg_writable, "must be writable");
7387 reg_state[idx] = reg_written;
7388 progress = true;
7389
7390 if (fromReg == noreg) {
7391 if (from->is_reg()) {
7392 fromReg = from->as_Register();
7393 } else {
7394 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size;
7395 ldr(tmp1, Address(sp, st_off));
7396 fromReg = tmp1;
7397 }
7398 if (null_check) {
7399 // Nullable inline type argument, emit null check
7400 cbz(fromReg, L_null);
7401 }
7402 }
7403 int off = sig->at(stream.sig_index())._offset;
7404 if (off == -1) {
7405 assert(null_check, "Missing null check at");
7406 if (toReg->is_stack()) {
7407 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7408 mov(tmp2, 1);
7409 str(tmp2, Address(sp, st_off));
7410 } else {
7411 mov(toReg->as_Register(), 1);
7412 }
7413 continue;
7414 }
7415 if (sig->at(stream.sig_index())._vt_oop) {
7416 if (toReg->is_stack()) {
7417 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7418 str(fromReg, Address(sp, st_off));
7419 } else {
7420 mov(toReg->as_Register(), fromReg);
7421 }
7422 continue;
7423 }
7424 assert(off > 0, "offset in object should be positive");
7425 Address fromAddr = Address(fromReg, off);
7426 if (!toReg->is_FloatRegister()) {
7427 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
7428 if (is_reference_type(bt)) {
7429 load_heap_oop(dst, fromAddr, rscratch1, rscratch2);
7430 } else {
7431 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
7432 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
7433 }
7434 if (toReg->is_stack()) {
7435 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7436 str(dst, Address(sp, st_off));
7437 }
7438 } else if (bt == T_DOUBLE) {
7439 ldrd(toReg->as_FloatRegister(), fromAddr);
7440 } else {
7441 assert(bt == T_FLOAT, "must be float");
7442 ldrs(toReg->as_FloatRegister(), fromAddr);
7443 }
7444 }
7445 if (progress && null_check) {
7446 if (done) {
7447 b(L_notNull);
7448 bind(L_null);
7449 // Set null marker to zero to signal that the argument is null.
7450 // Also set all fields to zero since the runtime requires a canonical
7451 // representation of a flat null.
7452 stream.reset(sig_index, to_index);
7453 while (stream.next(toReg, bt)) {
7454 if (toReg->is_stack()) {
7455 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7456 str(zr, Address(sp, st_off));
7457 } else if (toReg->is_FloatRegister()) {
7458 mov(toReg->as_FloatRegister(), T2S, 0);
7459 } else {
7460 mov(toReg->as_Register(), zr);
7461 }
7462 }
7463 bind(L_notNull);
7464 } else {
7465 bind(L_null);
7466 }
7467 }
7468
7469 sig_index = stream.sig_index();
7470 to_index = stream.regs_index();
7471
7472 if (mark_done && reg_state[from->value()] != reg_written) {
7473 // This is okay because no one else will write to that slot
7474 reg_state[from->value()] = reg_writable;
7475 }
7476 from_index--;
7477 assert(progress || (start_offset == offset()), "should not emit code");
7478 return done;
7479 }
7480
7481 // Pack fields back into an inline type oop
7482 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
7483 VMRegPair* from, int from_count, int& from_index, VMReg to,
7484 RegState reg_state[], Register val_array) {
7485 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
7486 assert(to->is_valid(), "destination must be valid");
7487
7488 if (reg_state[to->value()] == reg_written) {
7489 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7490 return true; // Already written
7491 }
7492
7493 // The GC barrier expanded by store_heap_oop below may call into the
7494 // runtime so use callee-saved registers for any values that need to be
7495 // preserved. The GC barrier assembler should take care of saving the
7496 // Java argument registers.
7497 // TODO 8284443 Isn't it an issue if below code uses r14 as tmp when it contains a spilled value?
7498 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
7499 Register val_obj_tmp = r21;
7500 Register from_reg_tmp = r22;
7501 Register tmp1 = r14;
7502 Register tmp2 = r13;
7503 Register tmp3 = r12;
7504 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
7505
7506 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
7507
7508 if (reg_state[to->value()] == reg_readonly) {
7509 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
7510 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7511 return false; // Not yet writable
7512 }
7513 val_obj = val_obj_tmp;
7514 }
7515
7516 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
7517 VMReg fromReg;
7518 BasicType bt;
7519 Label L_null;
7520 while (stream.next(fromReg, bt)) {
7521 assert(fromReg->is_valid(), "source must be valid");
7522 reg_state[fromReg->value()] = reg_writable;
7523
7524 int off = sig->at(stream.sig_index())._offset;
7525 if (off == -1) {
7526 // Nullable inline type argument, emit null check
7527 Label L_notNull;
7528 if (fromReg->is_stack()) {
7529 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7530 ldrb(tmp2, Address(sp, ld_off));
7531 cbnz(tmp2, L_notNull);
7532 } else {
7533 cbnz(fromReg->as_Register(), L_notNull);
7534 }
7535 mov(val_obj, 0);
7536 b(L_null);
7537 bind(L_notNull);
7538 continue;
7539 }
7540 if (sig->at(stream.sig_index())._vt_oop) {
7541 if (fromReg->is_stack()) {
7542 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7543 ldr(val_obj, Address(sp, ld_off));
7544 } else {
7545 mov(val_obj, fromReg->as_Register());
7546 }
7547 cbnz(val_obj, L_null);
7548 // get the buffer from the just allocated pool of buffers
7549 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
7550 load_heap_oop(val_obj, Address(val_array, index), rscratch1, rscratch2);
7551 continue;
7552 }
7553
7554 assert(off > 0, "offset in object should be positive");
7555 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
7556
7557 // Pack the scalarized field into the value object.
7558 Address dst(val_obj, off);
7559 if (!fromReg->is_FloatRegister()) {
7560 Register src;
7561 if (fromReg->is_stack()) {
7562 src = from_reg_tmp;
7563 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7564 load_sized_value(src, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
7565 } else {
7566 src = fromReg->as_Register();
7567 }
7568 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
7569 if (is_reference_type(bt)) {
7570 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep val_obj valid.
7571 mov(tmp3, val_obj);
7572 Address dst_with_tmp3(tmp3, off);
7573 store_heap_oop(dst_with_tmp3, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
7574 } else {
7575 store_sized_value(dst, src, size_in_bytes);
7576 }
7577 } else if (bt == T_DOUBLE) {
7578 strd(fromReg->as_FloatRegister(), dst);
7579 } else {
7580 assert(bt == T_FLOAT, "must be float");
7581 strs(fromReg->as_FloatRegister(), dst);
7582 }
7583 }
7584 bind(L_null);
7585 sig_index = stream.sig_index();
7586 from_index = stream.regs_index();
7587
7588 assert(reg_state[to->value()] == reg_writable, "must have already been read");
7589 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
7590 assert(success, "to register must be writeable");
7591 return true;
7592 }
7593
7594 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
7595 return (reg->is_FloatRegister()) ? v8->as_VMReg() : r14->as_VMReg();
7596 }
7597
7598 void MacroAssembler::cache_wb(Address line) {
7599 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
7600 assert(line.index() == noreg, "index should be noreg");
7601 assert(line.offset() == 0, "offset should be 0");
7602 // would like to assert this
7603 // assert(line._ext.shift == 0, "shift should be zero");
7604 if (VM_Version::supports_dcpop()) {
7605 // writeback using clear virtual address to point of persistence
7606 dc(Assembler::CVAP, line.base());
7607 } else {
7608 // no need to generate anything as Unsafe.writebackMemory should
7609 // never invoke this stub
7610 }
7611 }
7612
7613 void MacroAssembler::cache_wbsync(bool is_pre) {
7614 // we only need a barrier post sync
7615 if (!is_pre) {
7616 membar(Assembler::AnyAny);
7617 }
8013 }
8014
8015 // Check if the lock-stack is full.
8016 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
8017 cmpw(top, (unsigned)LockStack::end_offset());
8018 br(Assembler::GE, slow);
8019
8020 // Check for recursion.
8021 subw(t, top, oopSize);
8022 ldr(t, Address(rthread, t));
8023 cmp(obj, t);
8024 br(Assembler::EQ, push);
8025
8026 // Check header for monitor (0b10).
8027 tst(mark, markWord::monitor_value);
8028 br(Assembler::NE, slow);
8029
8030 // Try to lock. Transition lock bits 0b01 => 0b00
8031 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
8032 orr(mark, mark, markWord::unlocked_value);
8033 // Mask inline_type bit such that we go to the slow path if object is an inline type
8034 andr(mark, mark, ~((int) markWord::inline_type_bit_in_place));
8035
8036 eor(t, mark, markWord::unlocked_value);
8037 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
8038 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
8039 br(Assembler::NE, slow);
8040
8041 bind(push);
8042 // After successful lock, push object on lock-stack.
8043 str(obj, Address(rthread, top));
8044 addw(top, top, oopSize);
8045 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
8046 }
8047
8048 // Implements fast-unlocking.
8049 //
8050 // - obj: the object to be unlocked
8051 // - t1, t2, t3: temporary registers
8052 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
8053 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
8054 // cmpxchg clobbers rscratch1.
8055 assert_different_registers(obj, t1, t2, t3, rscratch1);
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