9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "code/compiledIC.hpp"
30 #include "compiler/compileTask.hpp"
31 #include "compiler/disassembler.hpp"
32 #include "compiler/oopMap.hpp"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/cardTable.hpp"
37 #include "gc/shared/collectedHeap.hpp"
38 #include "gc/shared/tlab_globals.hpp"
39 #include "interpreter/bytecodeHistogram.hpp"
40 #include "interpreter/interpreter.hpp"
41 #include "interpreter/interpreterRuntime.hpp"
42 #include "jvm.h"
43 #include "memory/resourceArea.hpp"
44 #include "memory/universe.hpp"
45 #include "nativeInst_aarch64.hpp"
46 #include "oops/accessDecorators.hpp"
47 #include "oops/compressedKlass.inline.hpp"
48 #include "oops/compressedOops.inline.hpp"
49 #include "oops/klass.inline.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/icache.hpp"
52 #include "runtime/interfaceSupport.inline.hpp"
53 #include "runtime/javaThread.hpp"
54 #include "runtime/jniHandles.inline.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/globalDefinitions.hpp"
58 #include "utilities/integerCast.hpp"
59 #include "utilities/powerOfTwo.hpp"
60 #ifdef COMPILER1
61 #include "c1/c1_LIRAssembler.hpp"
62 #endif
63 #ifdef COMPILER2
64 #include "oops/oop.hpp"
65 #include "opto/compile.hpp"
66 #include "opto/node.hpp"
67 #include "opto/output.hpp"
68 #endif
69
70 #include <sys/types.h>
71
72 #ifdef PRODUCT
73 #define BLOCK_COMMENT(str) /* nothing */
74 #else
75 #define BLOCK_COMMENT(str) block_comment(str)
76 #endif
77 #define STOP(str) stop(str);
78 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
79
2006 ldarb(scratch, scratch);
2007 cmp(scratch, InstanceKlass::fully_initialized);
2008 br(Assembler::EQ, *L_fast_path);
2009
2010 // Fast path check: current thread is initializer thread
2011 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2012 cmp(rthread, scratch);
2013
2014 if (L_slow_path == &L_fallthrough) {
2015 br(Assembler::EQ, *L_fast_path);
2016 bind(*L_slow_path);
2017 } else if (L_fast_path == &L_fallthrough) {
2018 br(Assembler::NE, *L_slow_path);
2019 bind(*L_fast_path);
2020 } else {
2021 Unimplemented();
2022 }
2023 }
2024
2025 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2026 if (!VerifyOops) return;
2027
2028 // Pass register number to verify_oop_subroutine
2029 const char* b = nullptr;
2030 {
2031 ResourceMark rm;
2032 stringStream ss;
2033 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2034 b = code_string(ss.as_string());
2035 }
2036 BLOCK_COMMENT("verify_oop {");
2037
2038 strip_return_address(); // This might happen within a stack frame.
2039 protect_return_address();
2040 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2041 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2042
2043 mov(r0, reg);
2044 movptr(rscratch1, (uintptr_t)(address)b);
2045
2046 // call indirectly to solve generation ordering problem
2047 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2048 ldr(rscratch2, Address(rscratch2));
2049 blr(rscratch2);
2050
2051 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2052 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2053 authenticate_return_address();
2054
2055 BLOCK_COMMENT("} verify_oop");
2056 }
2057
2058 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2059 if (!VerifyOops) return;
2060
2061 const char* b = nullptr;
2062 {
2063 ResourceMark rm;
2064 stringStream ss;
2065 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2066 b = code_string(ss.as_string());
2067 }
2068 BLOCK_COMMENT("verify_oop_addr {");
2069
2070 strip_return_address(); // This might happen within a stack frame.
2071 protect_return_address();
2072 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2073 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2074
2075 // addr may contain sp so we will have to adjust it based on the
2076 // pushes that we just did.
2077 if (addr.uses(sp)) {
2078 lea(r0, addr);
2079 ldr(r0, Address(r0, 4 * wordSize));
2292 call_VM_leaf_base(entry_point, 1);
2293 }
2294
2295 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2296 assert_different_registers(arg_1, c_rarg0);
2297 pass_arg0(this, arg_0);
2298 pass_arg1(this, arg_1);
2299 call_VM_leaf_base(entry_point, 2);
2300 }
2301
2302 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2303 Register arg_1, Register arg_2) {
2304 assert_different_registers(arg_1, c_rarg0);
2305 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2306 pass_arg0(this, arg_0);
2307 pass_arg1(this, arg_1);
2308 pass_arg2(this, arg_2);
2309 call_VM_leaf_base(entry_point, 3);
2310 }
2311
2312 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2313 pass_arg0(this, arg_0);
2314 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2315 }
2316
2317 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2318
2319 assert_different_registers(arg_0, c_rarg1);
2320 pass_arg1(this, arg_1);
2321 pass_arg0(this, arg_0);
2322 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2323 }
2324
2325 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2326 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2327 assert_different_registers(arg_1, c_rarg2);
2328 pass_arg2(this, arg_2);
2329 pass_arg1(this, arg_1);
2330 pass_arg0(this, arg_0);
2331 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2337 assert_different_registers(arg_2, c_rarg3);
2338 pass_arg3(this, arg_3);
2339 pass_arg2(this, arg_2);
2340 pass_arg1(this, arg_1);
2341 pass_arg0(this, arg_0);
2342 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2343 }
2344
2345 void MacroAssembler::null_check(Register reg, int offset) {
2346 if (needs_explicit_null_check(offset)) {
2347 // provoke OS null exception if reg is null by
2348 // accessing M[reg] w/o changing any registers
2349 // NOTE: this is plenty to provoke a segv
2350 ldr(zr, Address(reg));
2351 } else {
2352 // nothing to do, (later) access of M[reg + offset]
2353 // will provoke OS null exception if reg is null
2354 }
2355 }
2356
2357 // MacroAssembler protected routines needed to implement
2358 // public methods
2359
2360 void MacroAssembler::mov(Register r, Address dest) {
2361 code_section()->relocate(pc(), dest.rspec());
2362 uint64_t imm64 = (uint64_t)dest.target();
2363 movptr(r, imm64);
2364 }
2365
2366 // Move a constant pointer into r. In AArch64 mode the virtual
2367 // address space is 48 bits in size, so we only need three
2368 // instructions to create a patchable instruction sequence that can
2369 // reach anywhere.
2370 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2371 #ifndef PRODUCT
2372 {
2373 char buffer[64];
2374 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2375 block_comment(buffer);
2376 }
5071 adrp(rscratch1, src2, offset);
5072 ldr(rscratch1, Address(rscratch1, offset));
5073 cmp(src1, rscratch1);
5074 }
5075
5076 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5077 cmp(obj1, obj2);
5078 }
5079
5080 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5081 load_method_holder(rresult, rmethod);
5082 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5083 }
5084
5085 void MacroAssembler::load_method_holder(Register holder, Register method) {
5086 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5087 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5088 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5089 }
5090
5091 // Loads the obj's Klass* into dst.
5092 // Preserves all registers (incl src, rscratch1 and rscratch2).
5093 // Input:
5094 // src - the oop we want to load the klass from.
5095 // dst - output narrow klass.
5096 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5097 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5098 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5099 lsr(dst, dst, markWord::klass_shift);
5100 }
5101
5102 void MacroAssembler::load_klass(Register dst, Register src) {
5103 if (UseCompactObjectHeaders) {
5104 load_narrow_klass_compact(dst, src);
5105 } else {
5106 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5107 }
5108 decode_klass_not_null(dst);
5109 }
5110
5162 } else {
5163 ldrw(tmp, Address(obj, oopDesc::klass_offset_in_bytes()));
5164 }
5165 if (CompressedKlassPointers::base() == nullptr) {
5166 cmp(klass, tmp, LSL, CompressedKlassPointers::shift());
5167 return;
5168 } else if (!AOTCodeCache::is_on_for_dump() &&
5169 ((uint64_t)CompressedKlassPointers::base() & 0xffffffff) == 0
5170 && CompressedKlassPointers::shift() == 0) {
5171 // Only the bottom 32 bits matter
5172 cmpw(klass, tmp);
5173 return;
5174 }
5175 decode_klass_not_null(tmp);
5176 cmp(klass, tmp);
5177 }
5178
5179 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5180 if (UseCompactObjectHeaders) {
5181 load_narrow_klass_compact(tmp1, obj1);
5182 load_narrow_klass_compact(tmp2, obj2);
5183 } else {
5184 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5185 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5186 }
5187 cmpw(tmp1, tmp2);
5188 }
5189
5190 void MacroAssembler::store_klass(Register dst, Register src) {
5191 // FIXME: Should this be a store release? concurrent gcs assumes
5192 // klass length is valid if klass field is not null.
5193 assert(!UseCompactObjectHeaders, "not with compact headers");
5194 encode_klass_not_null(src);
5195 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5196 }
5197
5198 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5199 assert(!UseCompactObjectHeaders, "not with compact headers");
5200 // Store to klass gap in destination
5201 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5202 }
5203
5204 // Algorithm must match CompressedOops::encode.
5205 void MacroAssembler::encode_heap_oop(Register d, Register s) {
5206 #ifdef ASSERT
5207 verify_heapbase("MacroAssembler::encode_heap_oop: heap base corrupted?");
5208 #endif
5209 verify_oop_msg(s, "broken oop in encode_heap_oop");
5559 if (as_raw) {
5560 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5561 } else {
5562 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5563 }
5564 }
5565
5566 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5567 Address dst, Register val,
5568 Register tmp1, Register tmp2, Register tmp3) {
5569 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5570 decorators = AccessInternal::decorator_fixup(decorators, type);
5571 bool as_raw = (decorators & AS_RAW) != 0;
5572 if (as_raw) {
5573 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5574 } else {
5575 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5576 }
5577 }
5578
5579 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5580 Register tmp2, DecoratorSet decorators) {
5581 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5582 }
5583
5584 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5585 Register tmp2, DecoratorSet decorators) {
5586 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5587 }
5588
5589 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5590 Register tmp2, Register tmp3, DecoratorSet decorators) {
5591 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5592 }
5593
5594 // Used for storing nulls.
5595 void MacroAssembler::store_heap_oop_null(Address dst) {
5596 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5597 }
5598
5673 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5674 cmp(rscratch2, rscratch1);
5675 br(Assembler::HS, next);
5676 STOP("assert(top >= start)");
5677 should_not_reach_here();
5678
5679 bind(next);
5680 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5681 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5682 cmp(rscratch2, rscratch1);
5683 br(Assembler::HS, ok);
5684 STOP("assert(top <= end)");
5685 should_not_reach_here();
5686
5687 bind(ok);
5688 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5689 }
5690 #endif
5691 }
5692
5693 // Writes to stack successive pages until offset reached to check for
5694 // stack overflow + shadow pages. This clobbers tmp.
5695 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5696 assert_different_registers(tmp, size, rscratch1);
5697 mov(tmp, sp);
5698 // Bang stack for total size given plus shadow page size.
5699 // Bang one page at a time because large size can bang beyond yellow and
5700 // red zones.
5701 Label loop;
5702 mov(rscratch1, (int)os::vm_page_size());
5703 bind(loop);
5704 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5705 subsw(size, size, rscratch1);
5706 str(size, Address(tmp));
5707 br(Assembler::GT, loop);
5708
5709 // Bang down shadow pages too.
5710 // At this point, (tmp-0) is the last address touched, so don't
5711 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5712 // was post-decremented.) Skip this address by starting at i=1, and
5779
5780 // Strictly speaking the card table base isn't an address at all, and it might
5781 // even be negative. It is thus materialised as a constant.
5782 mov(reg, (uint64_t)ctbs->card_table_base_const());
5783 }
5784
5785 void MacroAssembler::load_aotrc_address(Register reg, address a) {
5786 #if INCLUDE_CDS
5787 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
5788 if (AOTCodeCache::is_on_for_dump()) {
5789 // all aotrc field addresses should be registered in the AOTCodeCache address table
5790 lea(reg, ExternalAddress(a));
5791 } else {
5792 mov(reg, (uint64_t)a);
5793 }
5794 #else
5795 ShouldNotReachHere();
5796 #endif
5797 }
5798
5799 void MacroAssembler::build_frame(int framesize) {
5800 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5801 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5802 protect_return_address();
5803 if (framesize < ((1 << 9) + 2 * wordSize)) {
5804 sub(sp, sp, framesize);
5805 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5806 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5807 } else {
5808 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5809 if (PreserveFramePointer) mov(rfp, sp);
5810 if (framesize < ((1 << 12) + 2 * wordSize))
5811 sub(sp, sp, framesize - 2 * wordSize);
5812 else {
5813 mov(rscratch1, framesize - 2 * wordSize);
5814 sub(sp, sp, rscratch1);
5815 }
5816 }
5817 verify_cross_modify_fence_not_required();
5818 }
5819
5820 void MacroAssembler::remove_frame(int framesize) {
5821 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5822 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5823 if (framesize < ((1 << 9) + 2 * wordSize)) {
5824 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5825 add(sp, sp, framesize);
5826 } else {
5827 if (framesize < ((1 << 12) + 2 * wordSize))
5828 add(sp, sp, framesize - 2 * wordSize);
5829 else {
5830 mov(rscratch1, framesize - 2 * wordSize);
5831 add(sp, sp, rscratch1);
5832 }
5833 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5834 }
5835 authenticate_return_address();
5836 }
5837
5838
5839 // This method counts leading positive bytes (highest bit not set) in provided byte array
5840 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
5841 // Simple and most common case of aligned small array which is not at the
5842 // end of memory page is placed here. All other cases are in stub.
5843 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
5844 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
5845 assert_different_registers(ary1, len, result);
5846
5847 mov(result, len);
5848 cmpw(len, 0);
5849 br(LE, DONE);
5850 cmpw(len, 4 * wordSize);
5851 br(GE, STUB_LONG); // size > 32 then go to stub
5852
5853 int shift = 64 - exact_log2(os::vm_page_size());
5854 lsl(rscratch1, ary1, shift);
5855 mov(rscratch2, (size_t)(4 * wordSize) << shift);
5856 adds(rscratch2, rscratch1, rscratch2); // At end of page?
5857 br(CS, STUB); // at the end of page then go to stub
6741 // On other systems, the helper is a usual C function.
6742 //
6743 void MacroAssembler::get_thread(Register dst) {
6744 RegSet saved_regs =
6745 BSD_ONLY(RegSet::range(r0, r17) + lr - dst)
6746 NOT_BSD (RegSet::range(r0, r1) + lr - dst);
6747
6748 protect_return_address();
6749 push(saved_regs, sp);
6750
6751 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6752 blr(lr);
6753 if (dst != c_rarg0) {
6754 mov(dst, c_rarg0);
6755 }
6756
6757 pop(saved_regs, sp);
6758 authenticate_return_address();
6759 }
6760
6761 void MacroAssembler::cache_wb(Address line) {
6762 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
6763 assert(line.index() == noreg, "index should be noreg");
6764 assert(line.offset() == 0, "offset should be 0");
6765 // would like to assert this
6766 // assert(line._ext.shift == 0, "shift should be zero");
6767 if (VM_Version::supports_dcpop()) {
6768 // writeback using clear virtual address to point of persistence
6769 dc(Assembler::CVAP, line.base());
6770 } else {
6771 // no need to generate anything as Unsafe.writebackMemory should
6772 // never invoke this stub
6773 }
6774 }
6775
6776 void MacroAssembler::cache_wbsync(bool is_pre) {
6777 // we only need a barrier post sync
6778 if (!is_pre) {
6779 membar(Assembler::AnyAny);
6780 }
7176 }
7177
7178 // Check if the lock-stack is full.
7179 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7180 cmpw(top, (unsigned)LockStack::end_offset());
7181 br(Assembler::GE, slow);
7182
7183 // Check for recursion.
7184 subw(t, top, oopSize);
7185 ldr(t, Address(rthread, t));
7186 cmp(obj, t);
7187 br(Assembler::EQ, push);
7188
7189 // Check header for monitor (0b10).
7190 tst(mark, markWord::monitor_value);
7191 br(Assembler::NE, slow);
7192
7193 // Try to lock. Transition lock bits 0b01 => 0b00
7194 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7195 orr(mark, mark, markWord::unlocked_value);
7196 eor(t, mark, markWord::unlocked_value);
7197 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7198 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7199 br(Assembler::NE, slow);
7200
7201 bind(push);
7202 // After successful lock, push object on lock-stack.
7203 str(obj, Address(rthread, top));
7204 addw(top, top, oopSize);
7205 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7206 }
7207
7208 // Implements fast-unlocking.
7209 //
7210 // - obj: the object to be unlocked
7211 // - t1, t2, t3: temporary registers
7212 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7213 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7214 // cmpxchg clobbers rscratch1.
7215 assert_different_registers(obj, t1, t2, t3, rscratch1);
|
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "ci/ciInlineKlass.hpp"
30 #include "code/compiledIC.hpp"
31 #include "compiler/compileTask.hpp"
32 #include "compiler/disassembler.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "gc/shared/cardTableBarrierSet.hpp"
37 #include "gc/shared/cardTable.hpp"
38 #include "gc/shared/collectedHeap.hpp"
39 #include "gc/shared/tlab_globals.hpp"
40 #include "interpreter/bytecodeHistogram.hpp"
41 #include "interpreter/interpreter.hpp"
42 #include "interpreter/interpreterRuntime.hpp"
43 #include "jvm.h"
44 #include "memory/resourceArea.hpp"
45 #include "memory/universe.hpp"
46 #include "nativeInst_aarch64.hpp"
47 #include "oops/accessDecorators.hpp"
48 #include "oops/compressedKlass.inline.hpp"
49 #include "oops/compressedOops.inline.hpp"
50 #include "oops/klass.inline.hpp"
51 #include "oops/resolvedFieldEntry.hpp"
52 #include "runtime/arguments.hpp"
53 #include "runtime/continuation.hpp"
54 #include "runtime/globals.hpp"
55 #include "runtime/icache.hpp"
56 #include "runtime/interfaceSupport.inline.hpp"
57 #include "runtime/javaThread.hpp"
58 #include "runtime/jniHandles.inline.hpp"
59 #include "runtime/sharedRuntime.hpp"
60 #include "runtime/signature_cc.hpp"
61 #include "runtime/stubRoutines.hpp"
62 #include "utilities/globalDefinitions.hpp"
63 #include "utilities/integerCast.hpp"
64 #include "utilities/powerOfTwo.hpp"
65 #include "vmreg_aarch64.inline.hpp"
66 #ifdef COMPILER1
67 #include "c1/c1_LIRAssembler.hpp"
68 #endif
69 #ifdef COMPILER2
70 #include "oops/oop.hpp"
71 #include "opto/compile.hpp"
72 #include "opto/node.hpp"
73 #include "opto/output.hpp"
74 #endif
75
76 #include <sys/types.h>
77
78 #ifdef PRODUCT
79 #define BLOCK_COMMENT(str) /* nothing */
80 #else
81 #define BLOCK_COMMENT(str) block_comment(str)
82 #endif
83 #define STOP(str) stop(str);
84 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
85
2012 ldarb(scratch, scratch);
2013 cmp(scratch, InstanceKlass::fully_initialized);
2014 br(Assembler::EQ, *L_fast_path);
2015
2016 // Fast path check: current thread is initializer thread
2017 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2018 cmp(rthread, scratch);
2019
2020 if (L_slow_path == &L_fallthrough) {
2021 br(Assembler::EQ, *L_fast_path);
2022 bind(*L_slow_path);
2023 } else if (L_fast_path == &L_fallthrough) {
2024 br(Assembler::NE, *L_slow_path);
2025 bind(*L_fast_path);
2026 } else {
2027 Unimplemented();
2028 }
2029 }
2030
2031 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2032 if (!VerifyOops || VerifyAdapterSharing) {
2033 // Below address of the code string confuses VerifyAdapterSharing
2034 // because it may differ between otherwise equivalent adapters.
2035 return;
2036 }
2037
2038 // Pass register number to verify_oop_subroutine
2039 const char* b = nullptr;
2040 {
2041 ResourceMark rm;
2042 stringStream ss;
2043 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2044 b = code_string(ss.as_string());
2045 }
2046 BLOCK_COMMENT("verify_oop {");
2047
2048 strip_return_address(); // This might happen within a stack frame.
2049 protect_return_address();
2050 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2051 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2052
2053 mov(r0, reg);
2054 movptr(rscratch1, (uintptr_t)(address)b);
2055
2056 // call indirectly to solve generation ordering problem
2057 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2058 ldr(rscratch2, Address(rscratch2));
2059 blr(rscratch2);
2060
2061 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2062 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2063 authenticate_return_address();
2064
2065 BLOCK_COMMENT("} verify_oop");
2066 }
2067
2068 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2069 if (!VerifyOops || VerifyAdapterSharing) {
2070 // Below address of the code string confuses VerifyAdapterSharing
2071 // because it may differ between otherwise equivalent adapters.
2072 return;
2073 }
2074
2075 const char* b = nullptr;
2076 {
2077 ResourceMark rm;
2078 stringStream ss;
2079 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2080 b = code_string(ss.as_string());
2081 }
2082 BLOCK_COMMENT("verify_oop_addr {");
2083
2084 strip_return_address(); // This might happen within a stack frame.
2085 protect_return_address();
2086 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2087 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2088
2089 // addr may contain sp so we will have to adjust it based on the
2090 // pushes that we just did.
2091 if (addr.uses(sp)) {
2092 lea(r0, addr);
2093 ldr(r0, Address(r0, 4 * wordSize));
2306 call_VM_leaf_base(entry_point, 1);
2307 }
2308
2309 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2310 assert_different_registers(arg_1, c_rarg0);
2311 pass_arg0(this, arg_0);
2312 pass_arg1(this, arg_1);
2313 call_VM_leaf_base(entry_point, 2);
2314 }
2315
2316 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2317 Register arg_1, Register arg_2) {
2318 assert_different_registers(arg_1, c_rarg0);
2319 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2320 pass_arg0(this, arg_0);
2321 pass_arg1(this, arg_1);
2322 pass_arg2(this, arg_2);
2323 call_VM_leaf_base(entry_point, 3);
2324 }
2325
2326 void MacroAssembler::super_call_VM_leaf(address entry_point) {
2327 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2328 }
2329
2330 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2331 pass_arg0(this, arg_0);
2332 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2333 }
2334
2335 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2336
2337 assert_different_registers(arg_0, c_rarg1);
2338 pass_arg1(this, arg_1);
2339 pass_arg0(this, arg_0);
2340 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2341 }
2342
2343 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2344 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2345 assert_different_registers(arg_1, c_rarg2);
2346 pass_arg2(this, arg_2);
2347 pass_arg1(this, arg_1);
2348 pass_arg0(this, arg_0);
2349 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2355 assert_different_registers(arg_2, c_rarg3);
2356 pass_arg3(this, arg_3);
2357 pass_arg2(this, arg_2);
2358 pass_arg1(this, arg_1);
2359 pass_arg0(this, arg_0);
2360 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2361 }
2362
2363 void MacroAssembler::null_check(Register reg, int offset) {
2364 if (needs_explicit_null_check(offset)) {
2365 // provoke OS null exception if reg is null by
2366 // accessing M[reg] w/o changing any registers
2367 // NOTE: this is plenty to provoke a segv
2368 ldr(zr, Address(reg));
2369 } else {
2370 // nothing to do, (later) access of M[reg + offset]
2371 // will provoke OS null exception if reg is null
2372 }
2373 }
2374
2375 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2376 assert_different_registers(markword, rscratch2);
2377 mov(rscratch2, markWord::inline_type_pattern_mask);
2378 andr(markword, markword, rscratch2);
2379 mov(rscratch2, markWord::inline_type_pattern);
2380 cmp(markword, rscratch2);
2381 br(Assembler::EQ, is_inline_type);
2382 }
2383
2384 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2385 assert_different_registers(tmp, rscratch1);
2386 if (can_be_null) {
2387 cbz(object, not_inline_type);
2388 }
2389 const int is_inline_type_mask = markWord::inline_type_pattern;
2390 ldr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2391 mov(rscratch1, is_inline_type_mask);
2392 andr(tmp, tmp, rscratch1);
2393 cmp(tmp, rscratch1);
2394 br(Assembler::NE, not_inline_type);
2395 }
2396
2397 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2398 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2399 tbnz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, is_null_free_inline_type);
2400 }
2401
2402 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2403 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2404 tbz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, not_null_free_inline_type);
2405 }
2406
2407 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2408 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2409 tbnz(flags, ResolvedFieldEntry::is_flat_shift, is_flat);
2410 }
2411
2412 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2413 Label test_mark_word;
2414 // load mark word
2415 ldr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2416 // check displaced
2417 tst(temp_reg, markWord::unlocked_value);
2418 br(Assembler::NE, test_mark_word);
2419 // slow path use klass prototype
2420 load_prototype_header(temp_reg, oop);
2421
2422 bind(test_mark_word);
2423 andr(temp_reg, temp_reg, test_bit);
2424 if (jmp_set) {
2425 cbnz(temp_reg, jmp_label);
2426 } else {
2427 cbz(temp_reg, jmp_label);
2428 }
2429 }
2430
2431 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array) {
2432 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2433 }
2434
2435 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2436 Label&is_non_flat_array) {
2437 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2438 }
2439
2440 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array) {
2441 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2442 }
2443
2444 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2445 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2446 }
2447
2448 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2449 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2450 br(Assembler::NE, is_flat_array);
2451 }
2452
2453 // MacroAssembler protected routines needed to implement
2454 // public methods
2455
2456 void MacroAssembler::mov(Register r, Address dest) {
2457 code_section()->relocate(pc(), dest.rspec());
2458 uint64_t imm64 = (uint64_t)dest.target();
2459 movptr(r, imm64);
2460 }
2461
2462 // Move a constant pointer into r. In AArch64 mode the virtual
2463 // address space is 48 bits in size, so we only need three
2464 // instructions to create a patchable instruction sequence that can
2465 // reach anywhere.
2466 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2467 #ifndef PRODUCT
2468 {
2469 char buffer[64];
2470 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2471 block_comment(buffer);
2472 }
5167 adrp(rscratch1, src2, offset);
5168 ldr(rscratch1, Address(rscratch1, offset));
5169 cmp(src1, rscratch1);
5170 }
5171
5172 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5173 cmp(obj1, obj2);
5174 }
5175
5176 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5177 load_method_holder(rresult, rmethod);
5178 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5179 }
5180
5181 void MacroAssembler::load_method_holder(Register holder, Register method) {
5182 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5183 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5184 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5185 }
5186
5187 void MacroAssembler::load_metadata(Register dst, Register src) {
5188 if (UseCompactObjectHeaders) {
5189 load_narrow_klass_compact(dst, src);
5190 } else {
5191 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5192 }
5193 }
5194
5195 // Loads the obj's Klass* into dst.
5196 // Preserves all registers (incl src, rscratch1 and rscratch2).
5197 // Input:
5198 // src - the oop we want to load the klass from.
5199 // dst - output narrow klass.
5200 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5201 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5202 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5203 lsr(dst, dst, markWord::klass_shift);
5204 }
5205
5206 void MacroAssembler::load_klass(Register dst, Register src) {
5207 if (UseCompactObjectHeaders) {
5208 load_narrow_klass_compact(dst, src);
5209 } else {
5210 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5211 }
5212 decode_klass_not_null(dst);
5213 }
5214
5266 } else {
5267 ldrw(tmp, Address(obj, oopDesc::klass_offset_in_bytes()));
5268 }
5269 if (CompressedKlassPointers::base() == nullptr) {
5270 cmp(klass, tmp, LSL, CompressedKlassPointers::shift());
5271 return;
5272 } else if (!AOTCodeCache::is_on_for_dump() &&
5273 ((uint64_t)CompressedKlassPointers::base() & 0xffffffff) == 0
5274 && CompressedKlassPointers::shift() == 0) {
5275 // Only the bottom 32 bits matter
5276 cmpw(klass, tmp);
5277 return;
5278 }
5279 decode_klass_not_null(tmp);
5280 cmp(klass, tmp);
5281 }
5282
5283 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5284 if (UseCompactObjectHeaders) {
5285 load_narrow_klass_compact(tmp1, obj1);
5286 load_narrow_klass_compact(tmp2, obj2);
5287 } else {
5288 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5289 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5290 }
5291 cmpw(tmp1, tmp2);
5292 }
5293
5294 void MacroAssembler::load_prototype_header(Register dst, Register src) {
5295 load_klass(dst, src);
5296 ldr(dst, Address(dst, Klass::prototype_header_offset()));
5297 }
5298
5299 void MacroAssembler::store_klass(Register dst, Register src) {
5300 // FIXME: Should this be a store release? concurrent gcs assumes
5301 // klass length is valid if klass field is not null.
5302 assert(!UseCompactObjectHeaders, "not with compact headers");
5303 encode_klass_not_null(src);
5304 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5305 }
5306
5307 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5308 assert(!UseCompactObjectHeaders, "not with compact headers");
5309 // Store to klass gap in destination
5310 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5311 }
5312
5313 // Algorithm must match CompressedOops::encode.
5314 void MacroAssembler::encode_heap_oop(Register d, Register s) {
5315 #ifdef ASSERT
5316 verify_heapbase("MacroAssembler::encode_heap_oop: heap base corrupted?");
5317 #endif
5318 verify_oop_msg(s, "broken oop in encode_heap_oop");
5668 if (as_raw) {
5669 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5670 } else {
5671 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5672 }
5673 }
5674
5675 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5676 Address dst, Register val,
5677 Register tmp1, Register tmp2, Register tmp3) {
5678 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5679 decorators = AccessInternal::decorator_fixup(decorators, type);
5680 bool as_raw = (decorators & AS_RAW) != 0;
5681 if (as_raw) {
5682 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5683 } else {
5684 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5685 }
5686 }
5687
5688 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5689 Register inline_layout_info) {
5690 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5691 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5692 }
5693
5694 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5695 ldr(offset, Address(inline_klass, InlineKlass::adr_members_offset()));
5696 ldrw(offset, Address(offset, InlineKlass::payload_offset_offset()));
5697 }
5698
5699 void MacroAssembler::payload_address(Register oop, Register data, Register inline_klass) {
5700 // ((address) (void*) o) + vk->payload_offset();
5701 Register offset = (data == oop) ? rscratch1 : data;
5702 payload_offset(inline_klass, offset);
5703 if (data == oop) {
5704 add(data, data, offset);
5705 } else {
5706 lea(data, Address(oop, offset));
5707 }
5708 }
5709
5710 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5711 Register tmp2, DecoratorSet decorators) {
5712 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5713 }
5714
5715 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5716 Register tmp2, DecoratorSet decorators) {
5717 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5718 }
5719
5720 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5721 Register tmp2, Register tmp3, DecoratorSet decorators) {
5722 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5723 }
5724
5725 // Used for storing nulls.
5726 void MacroAssembler::store_heap_oop_null(Address dst) {
5727 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5728 }
5729
5804 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5805 cmp(rscratch2, rscratch1);
5806 br(Assembler::HS, next);
5807 STOP("assert(top >= start)");
5808 should_not_reach_here();
5809
5810 bind(next);
5811 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5812 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5813 cmp(rscratch2, rscratch1);
5814 br(Assembler::HS, ok);
5815 STOP("assert(top <= end)");
5816 should_not_reach_here();
5817
5818 bind(ok);
5819 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5820 }
5821 #endif
5822 }
5823
5824 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
5825 assert_different_registers(holder_klass, index, layout_info);
5826 InlineLayoutInfo array[2];
5827 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
5828 if (is_power_of_2(size)) {
5829 lsl(index, index, log2i_exact(size)); // Scale index by power of 2
5830 } else {
5831 mov(layout_info, size);
5832 mul(index, index, layout_info); // Scale the index to be the entry index * array_element_size
5833 }
5834 ldr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
5835 add(layout_info, layout_info, Array<InlineLayoutInfo>::base_offset_in_bytes());
5836 lea(layout_info, Address(layout_info, index));
5837 }
5838
5839 // Writes to stack successive pages until offset reached to check for
5840 // stack overflow + shadow pages. This clobbers tmp.
5841 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5842 assert_different_registers(tmp, size, rscratch1);
5843 mov(tmp, sp);
5844 // Bang stack for total size given plus shadow page size.
5845 // Bang one page at a time because large size can bang beyond yellow and
5846 // red zones.
5847 Label loop;
5848 mov(rscratch1, (int)os::vm_page_size());
5849 bind(loop);
5850 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5851 subsw(size, size, rscratch1);
5852 str(size, Address(tmp));
5853 br(Assembler::GT, loop);
5854
5855 // Bang down shadow pages too.
5856 // At this point, (tmp-0) is the last address touched, so don't
5857 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5858 // was post-decremented.) Skip this address by starting at i=1, and
5925
5926 // Strictly speaking the card table base isn't an address at all, and it might
5927 // even be negative. It is thus materialised as a constant.
5928 mov(reg, (uint64_t)ctbs->card_table_base_const());
5929 }
5930
5931 void MacroAssembler::load_aotrc_address(Register reg, address a) {
5932 #if INCLUDE_CDS
5933 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
5934 if (AOTCodeCache::is_on_for_dump()) {
5935 // all aotrc field addresses should be registered in the AOTCodeCache address table
5936 lea(reg, ExternalAddress(a));
5937 } else {
5938 mov(reg, (uint64_t)a);
5939 }
5940 #else
5941 ShouldNotReachHere();
5942 #endif
5943 }
5944
5945 #ifdef ASSERT
5946 void MacroAssembler::build_frame(int framesize) {
5947 build_frame(framesize, false);
5948 }
5949 #endif
5950
5951 void MacroAssembler::build_frame(int framesize DEBUG_ONLY(COMMA bool zap_rfp_lr_spills)) {
5952 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5953 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5954 protect_return_address();
5955 if (framesize < ((1 << 9) + 2 * wordSize)) {
5956 sub(sp, sp, framesize);
5957 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
5958 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
5959 stp(rscratch1, rscratch1, Address(sp, framesize - 2 * wordSize));
5960 } else {
5961 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5962 }
5963 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5964 } else {
5965 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
5966 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
5967 stp(rscratch1, rscratch1, Address(pre(sp, -2 * wordSize)));
5968 } else {
5969 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5970 }
5971 if (PreserveFramePointer) mov(rfp, sp);
5972 if (framesize < ((1 << 12) + 2 * wordSize))
5973 sub(sp, sp, framesize - 2 * wordSize);
5974 else {
5975 mov(rscratch1, framesize - 2 * wordSize);
5976 sub(sp, sp, rscratch1);
5977 }
5978 }
5979 verify_cross_modify_fence_not_required();
5980 }
5981
5982 void MacroAssembler::remove_frame(int framesize) {
5983 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5984 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5985 if (framesize < ((1 << 9) + 2 * wordSize)) {
5986 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5987 add(sp, sp, framesize);
5988 } else {
5989 if (framesize < ((1 << 12) + 2 * wordSize))
5990 add(sp, sp, framesize - 2 * wordSize);
5991 else {
5992 mov(rscratch1, framesize - 2 * wordSize);
5993 add(sp, sp, rscratch1);
5994 }
5995 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5996 }
5997 authenticate_return_address();
5998 }
5999
6000 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6001 if (needs_stack_repair) {
6002 // The method has a scalarized entry point (where fields of value object arguments
6003 // are passed through registers and stack), and a non-scalarized entry point (where
6004 // value object arguments are given as oops). The non-scalarized entry point will
6005 // first load each field of value object arguments and store them in registers and on
6006 // the stack in a way compatible with the scalarized entry point. To do so, some extra
6007 // stack space might be reserved (if argument registers are not enough). On leaving the
6008 // method, this space must be freed.
6009 //
6010 // In case we used the non-scalarized entry point the stack looks like this:
6011 //
6012 // | Arguments from caller |
6013 // |---------------------------| <-- caller's SP
6014 // | Saved LR #1 |
6015 // | Saved FP #1 |
6016 // |---------------------------|
6017 // | Extension space for |
6018 // | inline arg (un)packing |
6019 // |---------------------------| <-- start of this method's frame
6020 // | Saved LR #2 |
6021 // | Saved FP #2 |
6022 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6023 // | sp_inc |
6024 // | method locals |
6025 // |---------------------------| <-- SP
6026 //
6027 // There are two copies of FP and LR on the stack. They will be identical at
6028 // first, but that can change.
6029 // If the caller has been deoptimized, LR #1 will be patched to point at the
6030 // deopt blob, and LR #2 will still point into the old method.
6031 // If the saved FP (x29) was not used as the frame pointer, but to store an
6032 // oop, the GC will be aware only of FP #1 as the spilled location of x29 and
6033 // will fix only this one. Overall, FP/LR #2 are not reliable and are simply
6034 // needed to add space between the extension space and the locals, as there
6035 // would be between the real arguments and the locals if we don't need to
6036 // do unpacking (from the scalarized entry point).
6037 //
6038 // When restoring, one must then load FP #1 into x29, and LR #1 into x30,
6039 // while keeping in mind that from the scalarized entry point, there will be
6040 // only one copy of each. Indeed, in the case we used the scalarized calling
6041 // convention, the stack looks like this:
6042 //
6043 // | Arguments from caller |
6044 // |---------------------------| <-- caller's SP / start of this method's frame
6045 // | Saved LR |
6046 // | Saved FP |
6047 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6048 // | sp_inc |
6049 // | method locals |
6050 // |---------------------------| <-- SP
6051 //
6052 // The sp_inc stack slot holds the total size of the frame including the
6053 // extension space minus two words for the saved FP and LR. That is how to
6054 // find FP/LR #1. This size is expressed in bytes. Be careful when using it
6055 // from C++ in pointer arithmetic; you might need to divide it by wordSize.
6056 //
6057 // One can find sp_inc since the start the method's frame is SP + initial_framesize.
6058
6059 int sp_inc_offset = initial_framesize - 3 * wordSize; // Immediately below saved LR and FP
6060
6061 ldr(rscratch1, Address(sp, sp_inc_offset));
6062 add(sp, sp, rscratch1);
6063 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6064 } else {
6065 remove_frame(initial_framesize);
6066 }
6067 }
6068
6069 void MacroAssembler::save_stack_increment(int sp_inc, int frame_size) {
6070 int real_frame_size = frame_size + sp_inc;
6071 assert(sp_inc == 0 || sp_inc > 2*wordSize, "invalid sp_inc value");
6072 assert(real_frame_size >= 2*wordSize, "frame size must include FP/LR space");
6073 assert((real_frame_size & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6074
6075 int sp_inc_offset = frame_size - 3 * wordSize; // Immediately below saved LR and FP
6076
6077 // Subtract two words for the saved FP and LR as these will be popped
6078 // separately. See remove_frame above.
6079 mov(rscratch1, real_frame_size - 2*wordSize);
6080 str(rscratch1, Address(sp, sp_inc_offset));
6081 }
6082
6083 // This method counts leading positive bytes (highest bit not set) in provided byte array
6084 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
6085 // Simple and most common case of aligned small array which is not at the
6086 // end of memory page is placed here. All other cases are in stub.
6087 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
6088 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
6089 assert_different_registers(ary1, len, result);
6090
6091 mov(result, len);
6092 cmpw(len, 0);
6093 br(LE, DONE);
6094 cmpw(len, 4 * wordSize);
6095 br(GE, STUB_LONG); // size > 32 then go to stub
6096
6097 int shift = 64 - exact_log2(os::vm_page_size());
6098 lsl(rscratch1, ary1, shift);
6099 mov(rscratch2, (size_t)(4 * wordSize) << shift);
6100 adds(rscratch2, rscratch1, rscratch2); // At end of page?
6101 br(CS, STUB); // at the end of page then go to stub
6985 // On other systems, the helper is a usual C function.
6986 //
6987 void MacroAssembler::get_thread(Register dst) {
6988 RegSet saved_regs =
6989 BSD_ONLY(RegSet::range(r0, r17) + lr - dst)
6990 NOT_BSD (RegSet::range(r0, r1) + lr - dst);
6991
6992 protect_return_address();
6993 push(saved_regs, sp);
6994
6995 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6996 blr(lr);
6997 if (dst != c_rarg0) {
6998 mov(dst, c_rarg0);
6999 }
7000
7001 pop(saved_regs, sp);
7002 authenticate_return_address();
7003 }
7004
7005 #ifdef COMPILER2
7006 // C2 compiled method's prolog code
7007 // Moved here from aarch64.ad to support Valhalla code below
7008 void MacroAssembler::verified_entry(Compile* C, int sp_inc) {
7009 if (C->clinit_barrier_on_entry()) {
7010 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
7011
7012 Label L_skip_barrier;
7013
7014 mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
7015 clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
7016 far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
7017 bind(L_skip_barrier);
7018 }
7019
7020 if (C->max_vector_size() > 0) {
7021 reinitialize_ptrue();
7022 }
7023
7024 int bangsize = C->output()->bang_size_in_bytes();
7025 if (C->output()->need_stack_bang(bangsize))
7026 generate_stack_overflow_check(bangsize);
7027
7028 // n.b. frame size includes space for return pc and rfp
7029 const long framesize = C->output()->frame_size_in_bytes();
7030 build_frame(framesize DEBUG_ONLY(COMMA sp_inc != 0));
7031
7032 if (C->needs_stack_repair()) {
7033 save_stack_increment(sp_inc, framesize);
7034 }
7035
7036 if (VerifyStackAtCalls) {
7037 Unimplemented();
7038 }
7039 }
7040 #endif // COMPILER2
7041
7042 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
7043 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
7044 // An inline type might be returned. If fields are in registers we
7045 // need to allocate an inline type instance and initialize it with
7046 // the value of the fields.
7047 Label skip;
7048 // We only need a new buffered inline type if a new one is not returned
7049 tbz(r0, 0, skip);
7050 int call_offset = -1;
7051
7052 // Be careful not to clobber r1-7 which hold returned fields
7053 // Also do not use callee-saved registers as these may be live in the interpreter
7054 Register tmp1 = r13, tmp2 = r14, klass = r15, r0_preserved = r12;
7055
7056 // The following code is similar to the instance allocation code in TemplateTable::_new
7057 // but has some slight differences,
7058 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
7059 // allocating is not necessary if vk != nullptr, etc.
7060 Label slow_case;
7061 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
7062 mov(r0_preserved, r0); // save r0 for slow_case since *_allocate may corrupt it when allocation failed
7063
7064 if (vk != nullptr) {
7065 // Called from C1, where the return type is statically known.
7066 movptr(klass, (intptr_t)vk->get_InlineKlass());
7067 jint lh = vk->layout_helper();
7068 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
7069 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
7070 tlab_allocate(r0, noreg, lh, tmp1, tmp2, slow_case);
7071 } else {
7072 b(slow_case);
7073 }
7074 } else {
7075 // Call from interpreter. R0 contains ((the InlineKlass* of the return type) | 0x01)
7076 andr(klass, r0, -2);
7077 if (UseTLAB) {
7078 ldrw(tmp2, Address(klass, Klass::layout_helper_offset()));
7079 tst(tmp2, Klass::_lh_instance_slow_path_bit);
7080 br(Assembler::NE, slow_case);
7081 tlab_allocate(r0, tmp2, 0, tmp1, tmp2, slow_case);
7082 } else {
7083 b(slow_case);
7084 }
7085 }
7086 if (UseTLAB) {
7087 // 2. Initialize buffered inline instance header
7088 Register buffer_obj = r0;
7089 if (UseCompactObjectHeaders) {
7090 ldr(rscratch1, Address(klass, Klass::prototype_header_offset()));
7091 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7092 } else {
7093 mov(rscratch1, (intptr_t)markWord::inline_type_prototype().value());
7094 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7095 store_klass_gap(buffer_obj, zr);
7096 if (vk == nullptr) {
7097 // store_klass corrupts klass, so save it for later use (interpreter case only).
7098 mov(tmp1, klass);
7099 }
7100 store_klass(buffer_obj, klass);
7101 klass = tmp1;
7102 }
7103 // 3. Initialize its fields with an inline class specific handler
7104 if (vk != nullptr) {
7105 far_call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
7106 } else {
7107 ldr(tmp1, Address(klass, InlineKlass::adr_members_offset()));
7108 ldr(tmp1, Address(tmp1, InlineKlass::pack_handler_offset()));
7109 blr(tmp1);
7110 }
7111
7112 membar(Assembler::StoreStore);
7113 b(skip);
7114 } else {
7115 // Must have already branched to slow_case above.
7116 DEBUG_ONLY(should_not_reach_here());
7117 }
7118 bind(slow_case);
7119 // We failed to allocate a new inline type, fall back to a runtime
7120 // call. Some oop field may be live in some registers but we can't
7121 // tell. That runtime call will take care of preserving them
7122 // across a GC if there's one.
7123 mov(r0, r0_preserved);
7124
7125 if (from_interpreter) {
7126 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
7127 } else {
7128 far_call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
7129 call_offset = offset();
7130 }
7131 membar(Assembler::StoreStore);
7132
7133 bind(skip);
7134 return call_offset;
7135 }
7136
7137 // Move a value between registers/stack slots and update the reg_state
7138 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
7139 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
7140 if (reg_state[to->value()] == reg_written) {
7141 return true; // Already written
7142 }
7143
7144 if (from != to && bt != T_VOID) {
7145 if (reg_state[to->value()] == reg_readonly) {
7146 return false; // Not yet writable
7147 }
7148 if (from->is_reg()) {
7149 if (to->is_reg()) {
7150 if (from->is_Register() && to->is_Register()) {
7151 mov(to->as_Register(), from->as_Register());
7152 } else if (from->is_FloatRegister() && to->is_FloatRegister()) {
7153 fmovd(to->as_FloatRegister(), from->as_FloatRegister());
7154 } else {
7155 ShouldNotReachHere();
7156 }
7157 } else {
7158 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7159 Address to_addr = Address(sp, st_off);
7160 if (from->is_FloatRegister()) {
7161 if (bt == T_DOUBLE) {
7162 strd(from->as_FloatRegister(), to_addr);
7163 } else {
7164 assert(bt == T_FLOAT, "must be float");
7165 strs(from->as_FloatRegister(), to_addr);
7166 }
7167 } else {
7168 str(from->as_Register(), to_addr);
7169 }
7170 }
7171 } else {
7172 Address from_addr = Address(sp, from->reg2stack() * VMRegImpl::stack_slot_size);
7173 if (to->is_reg()) {
7174 if (to->is_FloatRegister()) {
7175 if (bt == T_DOUBLE) {
7176 ldrd(to->as_FloatRegister(), from_addr);
7177 } else {
7178 assert(bt == T_FLOAT, "must be float");
7179 ldrs(to->as_FloatRegister(), from_addr);
7180 }
7181 } else {
7182 ldr(to->as_Register(), from_addr);
7183 }
7184 } else {
7185 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7186 ldr(rscratch1, from_addr);
7187 str(rscratch1, Address(sp, st_off));
7188 }
7189 }
7190 }
7191
7192 // Update register states
7193 reg_state[from->value()] = reg_writable;
7194 reg_state[to->value()] = reg_written;
7195 return true;
7196 }
7197
7198 // Calculate the extra stack space required for packing or unpacking inline
7199 // args and adjust the stack pointer
7200 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
7201 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
7202 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
7203 assert(sp_inc > 0, "sanity");
7204
7205 // Save a copy of the FP and LR here for deoptimization patching and frame walking
7206 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
7207
7208 // Adjust the stack pointer. This will be repaired on return by MacroAssembler::remove_frame
7209 if (sp_inc < (1 << 9)) {
7210 sub(sp, sp, sp_inc); // Fits in an immediate
7211 } else {
7212 mov(rscratch1, sp_inc);
7213 sub(sp, sp, rscratch1);
7214 }
7215
7216 return sp_inc + 2 * wordSize; // Account for the FP/LR space
7217 }
7218
7219 // Read all fields from an inline type oop and store the values in registers/stack slots
7220 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
7221 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
7222 RegState reg_state[]) {
7223 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
7224 assert(from->is_valid(), "source must be valid");
7225 bool progress = false;
7226 #ifdef ASSERT
7227 const int start_offset = offset();
7228 #endif
7229
7230 Label L_null, L_notNull;
7231 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
7232 Register tmp1 = r10;
7233 Register tmp2 = r11;
7234
7235 #ifdef ASSERT
7236 RegSet clobbered_gp_regs = MacroAssembler::call_clobbered_gp_registers();
7237 assert(clobbered_gp_regs.contains(tmp1), "tmp1 must be saved explicitly if it's not a clobber");
7238 assert(clobbered_gp_regs.contains(tmp2), "tmp2 must be saved explicitly if it's not a clobber");
7239 assert(clobbered_gp_regs.contains(r14), "r14 must be saved explicitly if it's not a clobber");
7240 #endif
7241
7242 Register fromReg = noreg;
7243 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
7244 bool done = true;
7245 bool mark_done = true;
7246 VMReg toReg;
7247 BasicType bt;
7248 // Check if argument requires a null check
7249 bool null_check = false;
7250 VMReg nullCheckReg;
7251 while (stream.next(nullCheckReg, bt)) {
7252 if (sig->at(stream.sig_index())._offset == -1) {
7253 null_check = true;
7254 break;
7255 }
7256 }
7257 stream.reset(sig_index, to_index);
7258 while (stream.next(toReg, bt)) {
7259 assert(toReg->is_valid(), "destination must be valid");
7260 int idx = (int)toReg->value();
7261 if (reg_state[idx] == reg_readonly) {
7262 if (idx != from->value()) {
7263 mark_done = false;
7264 }
7265 done = false;
7266 continue;
7267 } else if (reg_state[idx] == reg_written) {
7268 continue;
7269 }
7270 assert(reg_state[idx] == reg_writable, "must be writable");
7271 reg_state[idx] = reg_written;
7272 progress = true;
7273
7274 if (fromReg == noreg) {
7275 if (from->is_reg()) {
7276 fromReg = from->as_Register();
7277 } else {
7278 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size;
7279 ldr(tmp1, Address(sp, st_off));
7280 fromReg = tmp1;
7281 }
7282 if (null_check) {
7283 // Nullable inline type argument, emit null check
7284 cbz(fromReg, L_null);
7285 }
7286 }
7287 int off = sig->at(stream.sig_index())._offset;
7288 if (off == -1) {
7289 assert(null_check, "Missing null check at");
7290 if (toReg->is_stack()) {
7291 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7292 mov(tmp2, 1);
7293 str(tmp2, Address(sp, st_off));
7294 } else {
7295 mov(toReg->as_Register(), 1);
7296 }
7297 continue;
7298 }
7299 if (sig->at(stream.sig_index())._vt_oop) {
7300 if (toReg->is_stack()) {
7301 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7302 str(fromReg, Address(sp, st_off));
7303 } else {
7304 mov(toReg->as_Register(), fromReg);
7305 }
7306 continue;
7307 }
7308 assert(off > 0, "offset in object should be positive");
7309 Address fromAddr = Address(fromReg, off);
7310 if (!toReg->is_FloatRegister()) {
7311 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
7312 if (is_reference_type(bt)) {
7313 load_heap_oop(dst, fromAddr, rscratch1, rscratch2);
7314 } else {
7315 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
7316 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
7317 }
7318 if (toReg->is_stack()) {
7319 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7320 str(dst, Address(sp, st_off));
7321 }
7322 } else if (bt == T_DOUBLE) {
7323 ldrd(toReg->as_FloatRegister(), fromAddr);
7324 } else {
7325 assert(bt == T_FLOAT, "must be float");
7326 ldrs(toReg->as_FloatRegister(), fromAddr);
7327 }
7328 }
7329 if (progress && null_check) {
7330 if (done) {
7331 b(L_notNull);
7332 bind(L_null);
7333 // Set null marker to zero to signal that the argument is null.
7334 // Also set all fields to zero since the runtime requires a canonical
7335 // representation of a flat null.
7336 stream.reset(sig_index, to_index);
7337 while (stream.next(toReg, bt)) {
7338 if (toReg->is_stack()) {
7339 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7340 str(zr, Address(sp, st_off));
7341 } else if (toReg->is_FloatRegister()) {
7342 mov(toReg->as_FloatRegister(), T2S, 0);
7343 } else {
7344 mov(toReg->as_Register(), zr);
7345 }
7346 }
7347 bind(L_notNull);
7348 } else {
7349 bind(L_null);
7350 }
7351 }
7352
7353 sig_index = stream.sig_index();
7354 to_index = stream.regs_index();
7355
7356 if (mark_done && reg_state[from->value()] != reg_written) {
7357 // This is okay because no one else will write to that slot
7358 reg_state[from->value()] = reg_writable;
7359 }
7360 from_index--;
7361 assert(progress || (start_offset == offset()), "should not emit code");
7362 return done;
7363 }
7364
7365 // Pack fields back into an inline type oop
7366 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
7367 VMRegPair* from, int from_count, int& from_index, VMReg to,
7368 RegState reg_state[], Register val_array) {
7369 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
7370 assert(to->is_valid(), "destination must be valid");
7371
7372 if (reg_state[to->value()] == reg_written) {
7373 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7374 return true; // Already written
7375 }
7376
7377 // The GC barrier expanded by store_heap_oop below may call into the
7378 // runtime so use callee-saved registers for any values that need to be
7379 // preserved. The GC barrier assembler should take care of saving the
7380 // Java argument registers.
7381 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
7382 Register val_obj_tmp = r21;
7383 Register from_reg_tmp = r22;
7384 Register tmp1 = r14;
7385 Register tmp2 = r13;
7386 Register tmp3 = r12;
7387 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
7388
7389 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
7390
7391 if (reg_state[to->value()] == reg_readonly) {
7392 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
7393 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7394 return false; // Not yet writable
7395 }
7396 val_obj = val_obj_tmp;
7397 }
7398
7399 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
7400 VMReg fromReg;
7401 BasicType bt;
7402 Label L_null;
7403 while (stream.next(fromReg, bt)) {
7404 assert(fromReg->is_valid(), "source must be valid");
7405 reg_state[fromReg->value()] = reg_writable;
7406
7407 int off = sig->at(stream.sig_index())._offset;
7408 if (off == -1) {
7409 // Nullable inline type argument, emit null check
7410 Label L_notNull;
7411 if (fromReg->is_stack()) {
7412 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7413 ldrb(tmp2, Address(sp, ld_off));
7414 cbnz(tmp2, L_notNull);
7415 } else {
7416 cbnz(fromReg->as_Register(), L_notNull);
7417 }
7418 mov(val_obj, 0);
7419 b(L_null);
7420 bind(L_notNull);
7421 continue;
7422 }
7423 if (sig->at(stream.sig_index())._vt_oop) {
7424 if (fromReg->is_stack()) {
7425 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7426 ldr(val_obj, Address(sp, ld_off));
7427 } else {
7428 mov(val_obj, fromReg->as_Register());
7429 }
7430 cbnz(val_obj, L_null);
7431 // get the buffer from the just allocated pool of buffers
7432 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
7433 load_heap_oop(val_obj, Address(val_array, index), rscratch1, rscratch2);
7434 continue;
7435 }
7436
7437 assert(off > 0, "offset in object should be positive");
7438 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
7439
7440 // Pack the scalarized field into the value object.
7441 Address dst(val_obj, off);
7442 if (!fromReg->is_FloatRegister()) {
7443 Register src;
7444 if (fromReg->is_stack()) {
7445 src = from_reg_tmp;
7446 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7447 load_sized_value(src, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
7448 } else {
7449 src = fromReg->as_Register();
7450 }
7451 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
7452 if (is_reference_type(bt)) {
7453 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep val_obj valid.
7454 mov(tmp3, val_obj);
7455 Address dst_with_tmp3(tmp3, off);
7456 store_heap_oop(dst_with_tmp3, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
7457 } else {
7458 store_sized_value(dst, src, size_in_bytes);
7459 }
7460 } else if (bt == T_DOUBLE) {
7461 strd(fromReg->as_FloatRegister(), dst);
7462 } else {
7463 assert(bt == T_FLOAT, "must be float");
7464 strs(fromReg->as_FloatRegister(), dst);
7465 }
7466 }
7467 bind(L_null);
7468 sig_index = stream.sig_index();
7469 from_index = stream.regs_index();
7470
7471 assert(reg_state[to->value()] == reg_writable, "must have already been read");
7472 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
7473 assert(success, "to register must be writeable");
7474 return true;
7475 }
7476
7477 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
7478 return (reg->is_FloatRegister()) ? v8->as_VMReg() : r14->as_VMReg();
7479 }
7480
7481 void MacroAssembler::cache_wb(Address line) {
7482 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
7483 assert(line.index() == noreg, "index should be noreg");
7484 assert(line.offset() == 0, "offset should be 0");
7485 // would like to assert this
7486 // assert(line._ext.shift == 0, "shift should be zero");
7487 if (VM_Version::supports_dcpop()) {
7488 // writeback using clear virtual address to point of persistence
7489 dc(Assembler::CVAP, line.base());
7490 } else {
7491 // no need to generate anything as Unsafe.writebackMemory should
7492 // never invoke this stub
7493 }
7494 }
7495
7496 void MacroAssembler::cache_wbsync(bool is_pre) {
7497 // we only need a barrier post sync
7498 if (!is_pre) {
7499 membar(Assembler::AnyAny);
7500 }
7896 }
7897
7898 // Check if the lock-stack is full.
7899 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7900 cmpw(top, (unsigned)LockStack::end_offset());
7901 br(Assembler::GE, slow);
7902
7903 // Check for recursion.
7904 subw(t, top, oopSize);
7905 ldr(t, Address(rthread, t));
7906 cmp(obj, t);
7907 br(Assembler::EQ, push);
7908
7909 // Check header for monitor (0b10).
7910 tst(mark, markWord::monitor_value);
7911 br(Assembler::NE, slow);
7912
7913 // Try to lock. Transition lock bits 0b01 => 0b00
7914 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7915 orr(mark, mark, markWord::unlocked_value);
7916 // Mask inline_type bit such that we go to the slow path if object is an inline type
7917 andr(mark, mark, ~((int) markWord::inline_type_bit_in_place));
7918
7919 eor(t, mark, markWord::unlocked_value);
7920 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7921 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7922 br(Assembler::NE, slow);
7923
7924 bind(push);
7925 // After successful lock, push object on lock-stack.
7926 str(obj, Address(rthread, top));
7927 addw(top, top, oopSize);
7928 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7929 }
7930
7931 // Implements fast-unlocking.
7932 //
7933 // - obj: the object to be unlocked
7934 // - t1, t2, t3: temporary registers
7935 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7936 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7937 // cmpxchg clobbers rscratch1.
7938 assert_different_registers(obj, t1, t2, t3, rscratch1);
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