9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "code/compiledIC.hpp"
30 #include "compiler/compileTask.hpp"
31 #include "compiler/disassembler.hpp"
32 #include "compiler/oopMap.hpp"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/cardTable.hpp"
37 #include "gc/shared/collectedHeap.hpp"
38 #include "gc/shared/tlab_globals.hpp"
39 #include "interpreter/bytecodeHistogram.hpp"
40 #include "interpreter/interpreter.hpp"
41 #include "interpreter/interpreterRuntime.hpp"
42 #include "jvm.h"
43 #include "memory/resourceArea.hpp"
44 #include "memory/universe.hpp"
45 #include "nativeInst_aarch64.hpp"
46 #include "oops/accessDecorators.hpp"
47 #include "oops/compressedKlass.inline.hpp"
48 #include "oops/compressedOops.inline.hpp"
49 #include "oops/klass.inline.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/icache.hpp"
52 #include "runtime/interfaceSupport.inline.hpp"
53 #include "runtime/javaThread.hpp"
54 #include "runtime/jniHandles.inline.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/globalDefinitions.hpp"
58 #include "utilities/integerCast.hpp"
59 #include "utilities/powerOfTwo.hpp"
60 #ifdef COMPILER1
61 #include "c1/c1_LIRAssembler.hpp"
62 #endif
63 #ifdef COMPILER2
64 #include "oops/oop.hpp"
65 #include "opto/compile.hpp"
66 #include "opto/node.hpp"
67 #include "opto/output.hpp"
68 #endif
69
70 #include <sys/types.h>
71
72 #ifdef PRODUCT
73 #define BLOCK_COMMENT(str) /* nothing */
74 #else
75 #define BLOCK_COMMENT(str) block_comment(str)
76 #endif
77 #define STOP(str) stop(str);
78 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
79
1991 ldarb(scratch, scratch);
1992 cmp(scratch, InstanceKlass::fully_initialized);
1993 br(Assembler::EQ, *L_fast_path);
1994
1995 // Fast path check: current thread is initializer thread
1996 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
1997 cmp(rthread, scratch);
1998
1999 if (L_slow_path == &L_fallthrough) {
2000 br(Assembler::EQ, *L_fast_path);
2001 bind(*L_slow_path);
2002 } else if (L_fast_path == &L_fallthrough) {
2003 br(Assembler::NE, *L_slow_path);
2004 bind(*L_fast_path);
2005 } else {
2006 Unimplemented();
2007 }
2008 }
2009
2010 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2011 if (!VerifyOops) return;
2012
2013 // Pass register number to verify_oop_subroutine
2014 const char* b = nullptr;
2015 {
2016 ResourceMark rm;
2017 stringStream ss;
2018 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2019 b = code_string(ss.as_string());
2020 }
2021 BLOCK_COMMENT("verify_oop {");
2022
2023 strip_return_address(); // This might happen within a stack frame.
2024 protect_return_address();
2025 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2026 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2027
2028 mov(r0, reg);
2029 movptr(rscratch1, (uintptr_t)(address)b);
2030
2031 // call indirectly to solve generation ordering problem
2032 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2033 ldr(rscratch2, Address(rscratch2));
2034 blr(rscratch2);
2035
2036 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2037 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2038 authenticate_return_address();
2039
2040 BLOCK_COMMENT("} verify_oop");
2041 }
2042
2043 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2044 if (!VerifyOops) return;
2045
2046 const char* b = nullptr;
2047 {
2048 ResourceMark rm;
2049 stringStream ss;
2050 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2051 b = code_string(ss.as_string());
2052 }
2053 BLOCK_COMMENT("verify_oop_addr {");
2054
2055 strip_return_address(); // This might happen within a stack frame.
2056 protect_return_address();
2057 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2058 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2059
2060 // addr may contain sp so we will have to adjust it based on the
2061 // pushes that we just did.
2062 if (addr.uses(sp)) {
2063 lea(r0, addr);
2064 ldr(r0, Address(r0, 4 * wordSize));
2273 call_VM_leaf_base(entry_point, 1);
2274 }
2275
2276 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2277 assert_different_registers(arg_1, c_rarg0);
2278 pass_arg0(this, arg_0);
2279 pass_arg1(this, arg_1);
2280 call_VM_leaf_base(entry_point, 2);
2281 }
2282
2283 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2284 Register arg_1, Register arg_2) {
2285 assert_different_registers(arg_1, c_rarg0);
2286 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2287 pass_arg0(this, arg_0);
2288 pass_arg1(this, arg_1);
2289 pass_arg2(this, arg_2);
2290 call_VM_leaf_base(entry_point, 3);
2291 }
2292
2293 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2294 pass_arg0(this, arg_0);
2295 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2296 }
2297
2298 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2299
2300 assert_different_registers(arg_0, c_rarg1);
2301 pass_arg1(this, arg_1);
2302 pass_arg0(this, arg_0);
2303 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2304 }
2305
2306 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2307 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2308 assert_different_registers(arg_1, c_rarg2);
2309 pass_arg2(this, arg_2);
2310 pass_arg1(this, arg_1);
2311 pass_arg0(this, arg_0);
2312 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2318 assert_different_registers(arg_2, c_rarg3);
2319 pass_arg3(this, arg_3);
2320 pass_arg2(this, arg_2);
2321 pass_arg1(this, arg_1);
2322 pass_arg0(this, arg_0);
2323 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2324 }
2325
2326 void MacroAssembler::null_check(Register reg, int offset) {
2327 if (needs_explicit_null_check(offset)) {
2328 // provoke OS null exception if reg is null by
2329 // accessing M[reg] w/o changing any registers
2330 // NOTE: this is plenty to provoke a segv
2331 ldr(zr, Address(reg));
2332 } else {
2333 // nothing to do, (later) access of M[reg + offset]
2334 // will provoke OS null exception if reg is null
2335 }
2336 }
2337
2338 // MacroAssembler protected routines needed to implement
2339 // public methods
2340
2341 void MacroAssembler::mov(Register r, Address dest) {
2342 code_section()->relocate(pc(), dest.rspec());
2343 uint64_t imm64 = (uint64_t)dest.target();
2344 movptr(r, imm64);
2345 }
2346
2347 // Move a constant pointer into r. In AArch64 mode the virtual
2348 // address space is 48 bits in size, so we only need three
2349 // instructions to create a patchable instruction sequence that can
2350 // reach anywhere.
2351 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2352 #ifndef PRODUCT
2353 {
2354 char buffer[64];
2355 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2356 block_comment(buffer);
2357 }
5080 adrp(rscratch1, src2, offset);
5081 ldr(rscratch1, Address(rscratch1, offset));
5082 cmp(src1, rscratch1);
5083 }
5084
5085 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5086 cmp(obj1, obj2);
5087 }
5088
5089 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5090 load_method_holder(rresult, rmethod);
5091 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5092 }
5093
5094 void MacroAssembler::load_method_holder(Register holder, Register method) {
5095 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5096 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5097 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5098 }
5099
5100 // Loads the obj's Klass* into dst.
5101 // Preserves all registers (incl src, rscratch1 and rscratch2).
5102 // Input:
5103 // src - the oop we want to load the klass from.
5104 // dst - output narrow klass.
5105 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5106 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5107 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5108 lsr(dst, dst, markWord::klass_shift);
5109 }
5110
5111 void MacroAssembler::load_klass(Register dst, Register src) {
5112 if (UseCompactObjectHeaders) {
5113 load_narrow_klass_compact(dst, src);
5114 } else {
5115 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5116 }
5117 decode_klass_not_null(dst);
5118 }
5119
5171 } else {
5172 ldrw(tmp, Address(obj, oopDesc::klass_offset_in_bytes()));
5173 }
5174 if (CompressedKlassPointers::base() == nullptr) {
5175 cmp(klass, tmp, LSL, CompressedKlassPointers::shift());
5176 return;
5177 } else if (!AOTCodeCache::is_on_for_dump() &&
5178 ((uint64_t)CompressedKlassPointers::base() & 0xffffffff) == 0
5179 && CompressedKlassPointers::shift() == 0) {
5180 // Only the bottom 32 bits matter
5181 cmpw(klass, tmp);
5182 return;
5183 }
5184 decode_klass_not_null(tmp);
5185 cmp(klass, tmp);
5186 }
5187
5188 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5189 if (UseCompactObjectHeaders) {
5190 load_narrow_klass_compact(tmp1, obj1);
5191 load_narrow_klass_compact(tmp2, obj2);
5192 } else {
5193 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5194 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5195 }
5196 cmpw(tmp1, tmp2);
5197 }
5198
5199 void MacroAssembler::store_klass(Register dst, Register src) {
5200 // FIXME: Should this be a store release? concurrent gcs assumes
5201 // klass length is valid if klass field is not null.
5202 assert(!UseCompactObjectHeaders, "not with compact headers");
5203 encode_klass_not_null(src);
5204 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5205 }
5206
5207 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5208 assert(!UseCompactObjectHeaders, "not with compact headers");
5209 // Store to klass gap in destination
5210 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5211 }
5212
5213 // Algorithm must match CompressedOops::encode.
5214 void MacroAssembler::encode_heap_oop(Register d, Register s) {
5215 #ifdef ASSERT
5216 verify_heapbase("MacroAssembler::encode_heap_oop: heap base corrupted?");
5217 #endif
5218 verify_oop_msg(s, "broken oop in encode_heap_oop");
5568 if (as_raw) {
5569 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5570 } else {
5571 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5572 }
5573 }
5574
5575 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5576 Address dst, Register val,
5577 Register tmp1, Register tmp2, Register tmp3) {
5578 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5579 decorators = AccessInternal::decorator_fixup(decorators, type);
5580 bool as_raw = (decorators & AS_RAW) != 0;
5581 if (as_raw) {
5582 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5583 } else {
5584 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5585 }
5586 }
5587
5588 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5589 Register tmp2, DecoratorSet decorators) {
5590 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5591 }
5592
5593 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5594 Register tmp2, DecoratorSet decorators) {
5595 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5596 }
5597
5598 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5599 Register tmp2, Register tmp3, DecoratorSet decorators) {
5600 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5601 }
5602
5603 // Used for storing nulls.
5604 void MacroAssembler::store_heap_oop_null(Address dst) {
5605 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5606 }
5607
5682 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5683 cmp(rscratch2, rscratch1);
5684 br(Assembler::HS, next);
5685 STOP("assert(top >= start)");
5686 should_not_reach_here();
5687
5688 bind(next);
5689 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5690 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5691 cmp(rscratch2, rscratch1);
5692 br(Assembler::HS, ok);
5693 STOP("assert(top <= end)");
5694 should_not_reach_here();
5695
5696 bind(ok);
5697 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5698 }
5699 #endif
5700 }
5701
5702 // Writes to stack successive pages until offset reached to check for
5703 // stack overflow + shadow pages. This clobbers tmp.
5704 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5705 assert_different_registers(tmp, size, rscratch1);
5706 mov(tmp, sp);
5707 // Bang stack for total size given plus shadow page size.
5708 // Bang one page at a time because large size can bang beyond yellow and
5709 // red zones.
5710 Label loop;
5711 mov(rscratch1, (int)os::vm_page_size());
5712 bind(loop);
5713 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5714 subsw(size, size, rscratch1);
5715 str(size, Address(tmp));
5716 br(Assembler::GT, loop);
5717
5718 // Bang down shadow pages too.
5719 // At this point, (tmp-0) is the last address touched, so don't
5720 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5721 // was post-decremented.) Skip this address by starting at i=1, and
5788
5789 // Strictly speaking the card table base isn't an address at all, and it might
5790 // even be negative. It is thus materialised as a constant.
5791 mov(reg, (uint64_t)ctbs->card_table_base_const());
5792 }
5793
5794 void MacroAssembler::load_aotrc_address(Register reg, address a) {
5795 #if INCLUDE_CDS
5796 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
5797 if (AOTCodeCache::is_on_for_dump()) {
5798 // all aotrc field addresses should be registered in the AOTCodeCache address table
5799 lea(reg, ExternalAddress(a));
5800 } else {
5801 mov(reg, (uint64_t)a);
5802 }
5803 #else
5804 ShouldNotReachHere();
5805 #endif
5806 }
5807
5808 void MacroAssembler::build_frame(int framesize) {
5809 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5810 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5811 protect_return_address();
5812 if (framesize < ((1 << 9) + 2 * wordSize)) {
5813 sub(sp, sp, framesize);
5814 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5815 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5816 } else {
5817 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5818 if (PreserveFramePointer) mov(rfp, sp);
5819 if (framesize < ((1 << 12) + 2 * wordSize))
5820 sub(sp, sp, framesize - 2 * wordSize);
5821 else {
5822 mov(rscratch1, framesize - 2 * wordSize);
5823 sub(sp, sp, rscratch1);
5824 }
5825 }
5826 verify_cross_modify_fence_not_required();
5827 }
5828
5829 void MacroAssembler::remove_frame(int framesize) {
5830 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5831 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5832 if (framesize < ((1 << 9) + 2 * wordSize)) {
5833 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5834 add(sp, sp, framesize);
5835 } else {
5836 if (framesize < ((1 << 12) + 2 * wordSize))
5837 add(sp, sp, framesize - 2 * wordSize);
5838 else {
5839 mov(rscratch1, framesize - 2 * wordSize);
5840 add(sp, sp, rscratch1);
5841 }
5842 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5843 }
5844 authenticate_return_address();
5845 }
5846
5847
5848 // This method counts leading positive bytes (highest bit not set) in provided byte array
5849 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
5850 // Simple and most common case of aligned small array which is not at the
5851 // end of memory page is placed here. All other cases are in stub.
5852 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
5853 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
5854 assert_different_registers(ary1, len, result);
5855
5856 mov(result, len);
5857 cmpw(len, 0);
5858 br(LE, DONE);
5859 cmpw(len, 4 * wordSize);
5860 br(GE, STUB_LONG); // size > 32 then go to stub
5861
5862 int shift = 64 - exact_log2(os::vm_page_size());
5863 lsl(rscratch1, ary1, shift);
5864 mov(rscratch2, (size_t)(4 * wordSize) << shift);
5865 adds(rscratch2, rscratch1, rscratch2); // At end of page?
5866 br(CS, STUB); // at the end of page then go to stub
6750 // On other systems, the helper is a usual C function.
6751 //
6752 void MacroAssembler::get_thread(Register dst) {
6753 RegSet saved_regs =
6754 BSD_ONLY(RegSet::range(r0, r17) + lr - dst)
6755 NOT_BSD (RegSet::range(r0, r1) + lr - dst);
6756
6757 protect_return_address();
6758 push(saved_regs, sp);
6759
6760 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6761 blr(lr);
6762 if (dst != c_rarg0) {
6763 mov(dst, c_rarg0);
6764 }
6765
6766 pop(saved_regs, sp);
6767 authenticate_return_address();
6768 }
6769
6770 void MacroAssembler::cache_wb(Address line) {
6771 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
6772 assert(line.index() == noreg, "index should be noreg");
6773 assert(line.offset() == 0, "offset should be 0");
6774 // would like to assert this
6775 // assert(line._ext.shift == 0, "shift should be zero");
6776 if (VM_Version::supports_dcpop()) {
6777 // writeback using clear virtual address to point of persistence
6778 dc(Assembler::CVAP, line.base());
6779 } else {
6780 // no need to generate anything as Unsafe.writebackMemory should
6781 // never invoke this stub
6782 }
6783 }
6784
6785 void MacroAssembler::cache_wbsync(bool is_pre) {
6786 // we only need a barrier post sync
6787 if (!is_pre) {
6788 membar(Assembler::AnyAny);
6789 }
7185 }
7186
7187 // Check if the lock-stack is full.
7188 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7189 cmpw(top, (unsigned)LockStack::end_offset());
7190 br(Assembler::GE, slow);
7191
7192 // Check for recursion.
7193 subw(t, top, oopSize);
7194 ldr(t, Address(rthread, t));
7195 cmp(obj, t);
7196 br(Assembler::EQ, push);
7197
7198 // Check header for monitor (0b10).
7199 tst(mark, markWord::monitor_value);
7200 br(Assembler::NE, slow);
7201
7202 // Try to lock. Transition lock bits 0b01 => 0b00
7203 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7204 orr(mark, mark, markWord::unlocked_value);
7205 eor(t, mark, markWord::unlocked_value);
7206 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword, memory_order_acquire);
7207 br(Assembler::NE, slow);
7208
7209 bind(push);
7210 // After successful lock, push object on lock-stack.
7211 str(obj, Address(rthread, top));
7212 addw(top, top, oopSize);
7213 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7214 }
7215
7216 // Implements fast-unlocking.
7217 //
7218 // - obj: the object to be unlocked
7219 // - t1, t2, t3: temporary registers
7220 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7221 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7222 // cmpxchg clobbers rscratch1.
7223 assert_different_registers(obj, t1, t2, t3, rscratch1);
7224
|
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "ci/ciInlineKlass.hpp"
30 #include "code/compiledIC.hpp"
31 #include "compiler/compileTask.hpp"
32 #include "compiler/disassembler.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "gc/shared/cardTableBarrierSet.hpp"
37 #include "gc/shared/cardTable.hpp"
38 #include "gc/shared/collectedHeap.hpp"
39 #include "gc/shared/tlab_globals.hpp"
40 #include "interpreter/bytecodeHistogram.hpp"
41 #include "interpreter/interpreter.hpp"
42 #include "interpreter/interpreterRuntime.hpp"
43 #include "jvm.h"
44 #include "memory/resourceArea.hpp"
45 #include "memory/universe.hpp"
46 #include "nativeInst_aarch64.hpp"
47 #include "oops/accessDecorators.hpp"
48 #include "oops/compressedKlass.inline.hpp"
49 #include "oops/compressedOops.inline.hpp"
50 #include "oops/klass.inline.hpp"
51 #include "oops/resolvedFieldEntry.hpp"
52 #include "runtime/arguments.hpp"
53 #include "runtime/continuation.hpp"
54 #include "runtime/globals.hpp"
55 #include "runtime/icache.hpp"
56 #include "runtime/interfaceSupport.inline.hpp"
57 #include "runtime/javaThread.hpp"
58 #include "runtime/jniHandles.inline.hpp"
59 #include "runtime/sharedRuntime.hpp"
60 #include "runtime/signature_cc.hpp"
61 #include "runtime/stubRoutines.hpp"
62 #include "utilities/globalDefinitions.hpp"
63 #include "utilities/integerCast.hpp"
64 #include "utilities/powerOfTwo.hpp"
65 #include "vmreg_aarch64.inline.hpp"
66 #ifdef COMPILER1
67 #include "c1/c1_LIRAssembler.hpp"
68 #endif
69 #ifdef COMPILER2
70 #include "oops/oop.hpp"
71 #include "opto/compile.hpp"
72 #include "opto/node.hpp"
73 #include "opto/output.hpp"
74 #endif
75
76 #include <sys/types.h>
77
78 #ifdef PRODUCT
79 #define BLOCK_COMMENT(str) /* nothing */
80 #else
81 #define BLOCK_COMMENT(str) block_comment(str)
82 #endif
83 #define STOP(str) stop(str);
84 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
85
1997 ldarb(scratch, scratch);
1998 cmp(scratch, InstanceKlass::fully_initialized);
1999 br(Assembler::EQ, *L_fast_path);
2000
2001 // Fast path check: current thread is initializer thread
2002 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2003 cmp(rthread, scratch);
2004
2005 if (L_slow_path == &L_fallthrough) {
2006 br(Assembler::EQ, *L_fast_path);
2007 bind(*L_slow_path);
2008 } else if (L_fast_path == &L_fallthrough) {
2009 br(Assembler::NE, *L_slow_path);
2010 bind(*L_fast_path);
2011 } else {
2012 Unimplemented();
2013 }
2014 }
2015
2016 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2017 if (!VerifyOops || VerifyAdapterSharing) {
2018 // Below address of the code string confuses VerifyAdapterSharing
2019 // because it may differ between otherwise equivalent adapters.
2020 return;
2021 }
2022
2023 // Pass register number to verify_oop_subroutine
2024 const char* b = nullptr;
2025 {
2026 ResourceMark rm;
2027 stringStream ss;
2028 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2029 b = code_string(ss.as_string());
2030 }
2031 BLOCK_COMMENT("verify_oop {");
2032
2033 strip_return_address(); // This might happen within a stack frame.
2034 protect_return_address();
2035 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2036 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2037
2038 mov(r0, reg);
2039 movptr(rscratch1, (uintptr_t)(address)b);
2040
2041 // call indirectly to solve generation ordering problem
2042 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2043 ldr(rscratch2, Address(rscratch2));
2044 blr(rscratch2);
2045
2046 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2047 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2048 authenticate_return_address();
2049
2050 BLOCK_COMMENT("} verify_oop");
2051 }
2052
2053 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2054 if (!VerifyOops || VerifyAdapterSharing) {
2055 // Below address of the code string confuses VerifyAdapterSharing
2056 // because it may differ between otherwise equivalent adapters.
2057 return;
2058 }
2059
2060 const char* b = nullptr;
2061 {
2062 ResourceMark rm;
2063 stringStream ss;
2064 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2065 b = code_string(ss.as_string());
2066 }
2067 BLOCK_COMMENT("verify_oop_addr {");
2068
2069 strip_return_address(); // This might happen within a stack frame.
2070 protect_return_address();
2071 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2072 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2073
2074 // addr may contain sp so we will have to adjust it based on the
2075 // pushes that we just did.
2076 if (addr.uses(sp)) {
2077 lea(r0, addr);
2078 ldr(r0, Address(r0, 4 * wordSize));
2287 call_VM_leaf_base(entry_point, 1);
2288 }
2289
2290 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2291 assert_different_registers(arg_1, c_rarg0);
2292 pass_arg0(this, arg_0);
2293 pass_arg1(this, arg_1);
2294 call_VM_leaf_base(entry_point, 2);
2295 }
2296
2297 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2298 Register arg_1, Register arg_2) {
2299 assert_different_registers(arg_1, c_rarg0);
2300 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2301 pass_arg0(this, arg_0);
2302 pass_arg1(this, arg_1);
2303 pass_arg2(this, arg_2);
2304 call_VM_leaf_base(entry_point, 3);
2305 }
2306
2307 void MacroAssembler::super_call_VM_leaf(address entry_point) {
2308 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2309 }
2310
2311 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2312 pass_arg0(this, arg_0);
2313 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2314 }
2315
2316 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2317
2318 assert_different_registers(arg_0, c_rarg1);
2319 pass_arg1(this, arg_1);
2320 pass_arg0(this, arg_0);
2321 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2322 }
2323
2324 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2325 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2326 assert_different_registers(arg_1, c_rarg2);
2327 pass_arg2(this, arg_2);
2328 pass_arg1(this, arg_1);
2329 pass_arg0(this, arg_0);
2330 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2336 assert_different_registers(arg_2, c_rarg3);
2337 pass_arg3(this, arg_3);
2338 pass_arg2(this, arg_2);
2339 pass_arg1(this, arg_1);
2340 pass_arg0(this, arg_0);
2341 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2342 }
2343
2344 void MacroAssembler::null_check(Register reg, int offset) {
2345 if (needs_explicit_null_check(offset)) {
2346 // provoke OS null exception if reg is null by
2347 // accessing M[reg] w/o changing any registers
2348 // NOTE: this is plenty to provoke a segv
2349 ldr(zr, Address(reg));
2350 } else {
2351 // nothing to do, (later) access of M[reg + offset]
2352 // will provoke OS null exception if reg is null
2353 }
2354 }
2355
2356 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2357 assert_different_registers(markword, rscratch2);
2358 mov(rscratch2, markWord::inline_type_pattern_mask);
2359 andr(markword, markword, rscratch2);
2360 mov(rscratch2, markWord::inline_type_pattern);
2361 cmp(markword, rscratch2);
2362 br(Assembler::EQ, is_inline_type);
2363 }
2364
2365 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2366 assert_different_registers(tmp, rscratch1);
2367 if (can_be_null) {
2368 cbz(object, not_inline_type);
2369 }
2370 const int is_inline_type_mask = markWord::inline_type_pattern;
2371 ldr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2372 mov(rscratch1, is_inline_type_mask);
2373 andr(tmp, tmp, rscratch1);
2374 cmp(tmp, rscratch1);
2375 br(Assembler::NE, not_inline_type);
2376 }
2377
2378 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2379 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2380 tbnz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, is_null_free_inline_type);
2381 }
2382
2383 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2384 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2385 tbz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, not_null_free_inline_type);
2386 }
2387
2388 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2389 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2390 tbnz(flags, ResolvedFieldEntry::is_flat_shift, is_flat);
2391 }
2392
2393 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2394 // load mark word
2395 ldr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2396 if (!UseObjectMonitorTable) {
2397 Label test_mark_word;
2398 // check displaced
2399 tst(temp_reg, markWord::unlocked_value);
2400 br(Assembler::NE, test_mark_word);
2401 // slow path use klass prototype
2402 load_prototype_header(temp_reg, oop);
2403
2404 bind(test_mark_word);
2405 }
2406 andr(temp_reg, temp_reg, test_bit);
2407 if (jmp_set) {
2408 cbnz(temp_reg, jmp_label);
2409 } else {
2410 cbz(temp_reg, jmp_label);
2411 }
2412 }
2413
2414 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array) {
2415 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2416 }
2417
2418 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2419 Label&is_non_flat_array) {
2420 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2421 }
2422
2423 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array) {
2424 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2425 }
2426
2427 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2428 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2429 }
2430
2431 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2432 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2433 br(Assembler::NE, is_flat_array);
2434 }
2435
2436 // MacroAssembler protected routines needed to implement
2437 // public methods
2438
2439 void MacroAssembler::mov(Register r, Address dest) {
2440 code_section()->relocate(pc(), dest.rspec());
2441 uint64_t imm64 = (uint64_t)dest.target();
2442 movptr(r, imm64);
2443 }
2444
2445 // Move a constant pointer into r. In AArch64 mode the virtual
2446 // address space is 48 bits in size, so we only need three
2447 // instructions to create a patchable instruction sequence that can
2448 // reach anywhere.
2449 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2450 #ifndef PRODUCT
2451 {
2452 char buffer[64];
2453 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2454 block_comment(buffer);
2455 }
5178 adrp(rscratch1, src2, offset);
5179 ldr(rscratch1, Address(rscratch1, offset));
5180 cmp(src1, rscratch1);
5181 }
5182
5183 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5184 cmp(obj1, obj2);
5185 }
5186
5187 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5188 load_method_holder(rresult, rmethod);
5189 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5190 }
5191
5192 void MacroAssembler::load_method_holder(Register holder, Register method) {
5193 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5194 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5195 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5196 }
5197
5198 void MacroAssembler::load_metadata(Register dst, Register src) {
5199 if (UseCompactObjectHeaders) {
5200 load_narrow_klass_compact(dst, src);
5201 } else {
5202 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5203 }
5204 }
5205
5206 // Loads the obj's Klass* into dst.
5207 // Preserves all registers (incl src, rscratch1 and rscratch2).
5208 // Input:
5209 // src - the oop we want to load the klass from.
5210 // dst - output narrow klass.
5211 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5212 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5213 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5214 lsr(dst, dst, markWord::klass_shift);
5215 }
5216
5217 void MacroAssembler::load_klass(Register dst, Register src) {
5218 if (UseCompactObjectHeaders) {
5219 load_narrow_klass_compact(dst, src);
5220 } else {
5221 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5222 }
5223 decode_klass_not_null(dst);
5224 }
5225
5277 } else {
5278 ldrw(tmp, Address(obj, oopDesc::klass_offset_in_bytes()));
5279 }
5280 if (CompressedKlassPointers::base() == nullptr) {
5281 cmp(klass, tmp, LSL, CompressedKlassPointers::shift());
5282 return;
5283 } else if (!AOTCodeCache::is_on_for_dump() &&
5284 ((uint64_t)CompressedKlassPointers::base() & 0xffffffff) == 0
5285 && CompressedKlassPointers::shift() == 0) {
5286 // Only the bottom 32 bits matter
5287 cmpw(klass, tmp);
5288 return;
5289 }
5290 decode_klass_not_null(tmp);
5291 cmp(klass, tmp);
5292 }
5293
5294 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5295 if (UseCompactObjectHeaders) {
5296 load_narrow_klass_compact(tmp1, obj1);
5297 load_narrow_klass_compact(tmp2, obj2);
5298 } else {
5299 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5300 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5301 }
5302 cmpw(tmp1, tmp2);
5303 }
5304
5305 void MacroAssembler::load_prototype_header(Register dst, Register src) {
5306 load_klass(dst, src);
5307 ldr(dst, Address(dst, Klass::prototype_header_offset()));
5308 }
5309
5310 void MacroAssembler::store_klass(Register dst, Register src) {
5311 // FIXME: Should this be a store release? concurrent gcs assumes
5312 // klass length is valid if klass field is not null.
5313 assert(!UseCompactObjectHeaders, "not with compact headers");
5314 encode_klass_not_null(src);
5315 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5316 }
5317
5318 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5319 assert(!UseCompactObjectHeaders, "not with compact headers");
5320 // Store to klass gap in destination
5321 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5322 }
5323
5324 // Algorithm must match CompressedOops::encode.
5325 void MacroAssembler::encode_heap_oop(Register d, Register s) {
5326 #ifdef ASSERT
5327 verify_heapbase("MacroAssembler::encode_heap_oop: heap base corrupted?");
5328 #endif
5329 verify_oop_msg(s, "broken oop in encode_heap_oop");
5679 if (as_raw) {
5680 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5681 } else {
5682 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5683 }
5684 }
5685
5686 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5687 Address dst, Register val,
5688 Register tmp1, Register tmp2, Register tmp3) {
5689 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5690 decorators = AccessInternal::decorator_fixup(decorators, type);
5691 bool as_raw = (decorators & AS_RAW) != 0;
5692 if (as_raw) {
5693 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5694 } else {
5695 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5696 }
5697 }
5698
5699 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5700 Register inline_layout_info) {
5701 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5702 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5703 }
5704
5705 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5706 ldr(offset, Address(inline_klass, InlineKlass::adr_members_offset()));
5707 ldrw(offset, Address(offset, InlineKlass::payload_offset_offset()));
5708 }
5709
5710 void MacroAssembler::payload_address(Register oop, Register data, Register inline_klass) {
5711 // ((address) (void*) o) + vk->payload_offset();
5712 Register offset = (data == oop) ? rscratch1 : data;
5713 payload_offset(inline_klass, offset);
5714 if (data == oop) {
5715 add(data, data, offset);
5716 } else {
5717 lea(data, Address(oop, offset));
5718 }
5719 }
5720
5721 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5722 Register tmp2, DecoratorSet decorators) {
5723 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5724 }
5725
5726 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5727 Register tmp2, DecoratorSet decorators) {
5728 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5729 }
5730
5731 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5732 Register tmp2, Register tmp3, DecoratorSet decorators) {
5733 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5734 }
5735
5736 // Used for storing nulls.
5737 void MacroAssembler::store_heap_oop_null(Address dst) {
5738 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5739 }
5740
5815 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5816 cmp(rscratch2, rscratch1);
5817 br(Assembler::HS, next);
5818 STOP("assert(top >= start)");
5819 should_not_reach_here();
5820
5821 bind(next);
5822 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5823 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5824 cmp(rscratch2, rscratch1);
5825 br(Assembler::HS, ok);
5826 STOP("assert(top <= end)");
5827 should_not_reach_here();
5828
5829 bind(ok);
5830 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5831 }
5832 #endif
5833 }
5834
5835 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
5836 assert_different_registers(holder_klass, index, layout_info);
5837 InlineLayoutInfo array[2];
5838 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
5839 if (is_power_of_2(size)) {
5840 lsl(index, index, log2i_exact(size)); // Scale index by power of 2
5841 } else {
5842 mov(layout_info, size);
5843 mul(index, index, layout_info); // Scale the index to be the entry index * array_element_size
5844 }
5845 ldr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
5846 add(layout_info, layout_info, Array<InlineLayoutInfo>::base_offset_in_bytes());
5847 lea(layout_info, Address(layout_info, index));
5848 }
5849
5850 // Writes to stack successive pages until offset reached to check for
5851 // stack overflow + shadow pages. This clobbers tmp.
5852 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5853 assert_different_registers(tmp, size, rscratch1);
5854 mov(tmp, sp);
5855 // Bang stack for total size given plus shadow page size.
5856 // Bang one page at a time because large size can bang beyond yellow and
5857 // red zones.
5858 Label loop;
5859 mov(rscratch1, (int)os::vm_page_size());
5860 bind(loop);
5861 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5862 subsw(size, size, rscratch1);
5863 str(size, Address(tmp));
5864 br(Assembler::GT, loop);
5865
5866 // Bang down shadow pages too.
5867 // At this point, (tmp-0) is the last address touched, so don't
5868 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5869 // was post-decremented.) Skip this address by starting at i=1, and
5936
5937 // Strictly speaking the card table base isn't an address at all, and it might
5938 // even be negative. It is thus materialised as a constant.
5939 mov(reg, (uint64_t)ctbs->card_table_base_const());
5940 }
5941
5942 void MacroAssembler::load_aotrc_address(Register reg, address a) {
5943 #if INCLUDE_CDS
5944 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
5945 if (AOTCodeCache::is_on_for_dump()) {
5946 // all aotrc field addresses should be registered in the AOTCodeCache address table
5947 lea(reg, ExternalAddress(a));
5948 } else {
5949 mov(reg, (uint64_t)a);
5950 }
5951 #else
5952 ShouldNotReachHere();
5953 #endif
5954 }
5955
5956 #ifdef ASSERT
5957 void MacroAssembler::build_frame(int framesize) {
5958 build_frame(framesize, false);
5959 }
5960 #endif
5961
5962 void MacroAssembler::build_frame(int framesize DEBUG_ONLY(COMMA bool zap_rfp_lr_spills)) {
5963 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5964 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5965 protect_return_address();
5966 if (framesize < ((1 << 9) + 2 * wordSize)) {
5967 sub(sp, sp, framesize);
5968 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
5969 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
5970 stp(rscratch1, rscratch1, Address(sp, framesize - 2 * wordSize));
5971 } else {
5972 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5973 }
5974 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5975 } else {
5976 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
5977 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
5978 stp(rscratch1, rscratch1, Address(pre(sp, -2 * wordSize)));
5979 } else {
5980 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5981 }
5982 if (PreserveFramePointer) mov(rfp, sp);
5983 if (framesize < ((1 << 12) + 2 * wordSize))
5984 sub(sp, sp, framesize - 2 * wordSize);
5985 else {
5986 mov(rscratch1, framesize - 2 * wordSize);
5987 sub(sp, sp, rscratch1);
5988 }
5989 }
5990 verify_cross_modify_fence_not_required();
5991 }
5992
5993 void MacroAssembler::remove_frame(int framesize) {
5994 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5995 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5996 if (framesize < ((1 << 9) + 2 * wordSize)) {
5997 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5998 add(sp, sp, framesize);
5999 } else {
6000 if (framesize < ((1 << 12) + 2 * wordSize))
6001 add(sp, sp, framesize - 2 * wordSize);
6002 else {
6003 mov(rscratch1, framesize - 2 * wordSize);
6004 add(sp, sp, rscratch1);
6005 }
6006 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6007 }
6008 authenticate_return_address();
6009 }
6010
6011 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6012 if (needs_stack_repair) {
6013 // The method has a scalarized entry point (where fields of value object arguments
6014 // are passed through registers and stack), and a non-scalarized entry point (where
6015 // value object arguments are given as oops). The non-scalarized entry point will
6016 // first load each field of value object arguments and store them in registers and on
6017 // the stack in a way compatible with the scalarized entry point. To do so, some extra
6018 // stack space might be reserved (if argument registers are not enough). On leaving the
6019 // method, this space must be freed.
6020 //
6021 // In case we used the non-scalarized entry point the stack looks like this:
6022 //
6023 // | Arguments from caller |
6024 // |---------------------------| <-- caller's SP
6025 // | Saved LR #1 |
6026 // | Saved FP #1 |
6027 // |---------------------------|
6028 // | Extension space for |
6029 // | inline arg (un)packing |
6030 // |---------------------------| <-- start of this method's frame
6031 // | Saved LR #2 |
6032 // | Saved FP #2 |
6033 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6034 // | sp_inc |
6035 // | method locals |
6036 // |---------------------------| <-- SP
6037 //
6038 // There are two copies of FP and LR on the stack. They will be identical at
6039 // first, but that can change.
6040 // If the caller has been deoptimized, LR #1 will be patched to point at the
6041 // deopt blob, and LR #2 will still point into the old method.
6042 // If the saved FP (x29) was not used as the frame pointer, but to store an
6043 // oop, the GC will be aware only of FP #1 as the spilled location of x29 and
6044 // will fix only this one. Overall, FP/LR #2 are not reliable and are simply
6045 // needed to add space between the extension space and the locals, as there
6046 // would be between the real arguments and the locals if we don't need to
6047 // do unpacking (from the scalarized entry point).
6048 //
6049 // When restoring, one must then load FP #1 into x29, and LR #1 into x30,
6050 // while keeping in mind that from the scalarized entry point, there will be
6051 // only one copy of each. Indeed, in the case we used the scalarized calling
6052 // convention, the stack looks like this:
6053 //
6054 // | Arguments from caller |
6055 // |---------------------------| <-- caller's SP / start of this method's frame
6056 // | Saved LR |
6057 // | Saved FP |
6058 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6059 // | sp_inc |
6060 // | method locals |
6061 // |---------------------------| <-- SP
6062 //
6063 // The sp_inc stack slot holds the total size of the frame including the
6064 // extension space minus two words for the saved FP and LR. That is how to
6065 // find FP/LR #1. This size is expressed in bytes. Be careful when using it
6066 // from C++ in pointer arithmetic; you might need to divide it by wordSize.
6067 //
6068 // One can find sp_inc since the start the method's frame is SP + initial_framesize.
6069
6070 int sp_inc_offset = initial_framesize - 3 * wordSize; // Immediately below saved LR and FP
6071
6072 ldr(rscratch1, Address(sp, sp_inc_offset));
6073 add(sp, sp, rscratch1);
6074 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6075 } else {
6076 remove_frame(initial_framesize);
6077 }
6078 }
6079
6080 void MacroAssembler::save_stack_increment(int sp_inc, int frame_size) {
6081 int real_frame_size = frame_size + sp_inc;
6082 assert(sp_inc == 0 || sp_inc > 2*wordSize, "invalid sp_inc value");
6083 assert(real_frame_size >= 2*wordSize, "frame size must include FP/LR space");
6084 assert((real_frame_size & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6085
6086 int sp_inc_offset = frame_size - 3 * wordSize; // Immediately below saved LR and FP
6087
6088 // Subtract two words for the saved FP and LR as these will be popped
6089 // separately. See remove_frame above.
6090 mov(rscratch1, real_frame_size - 2*wordSize);
6091 str(rscratch1, Address(sp, sp_inc_offset));
6092 }
6093
6094 // This method counts leading positive bytes (highest bit not set) in provided byte array
6095 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
6096 // Simple and most common case of aligned small array which is not at the
6097 // end of memory page is placed here. All other cases are in stub.
6098 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
6099 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
6100 assert_different_registers(ary1, len, result);
6101
6102 mov(result, len);
6103 cmpw(len, 0);
6104 br(LE, DONE);
6105 cmpw(len, 4 * wordSize);
6106 br(GE, STUB_LONG); // size > 32 then go to stub
6107
6108 int shift = 64 - exact_log2(os::vm_page_size());
6109 lsl(rscratch1, ary1, shift);
6110 mov(rscratch2, (size_t)(4 * wordSize) << shift);
6111 adds(rscratch2, rscratch1, rscratch2); // At end of page?
6112 br(CS, STUB); // at the end of page then go to stub
6996 // On other systems, the helper is a usual C function.
6997 //
6998 void MacroAssembler::get_thread(Register dst) {
6999 RegSet saved_regs =
7000 BSD_ONLY(RegSet::range(r0, r17) + lr - dst)
7001 NOT_BSD (RegSet::range(r0, r1) + lr - dst);
7002
7003 protect_return_address();
7004 push(saved_regs, sp);
7005
7006 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
7007 blr(lr);
7008 if (dst != c_rarg0) {
7009 mov(dst, c_rarg0);
7010 }
7011
7012 pop(saved_regs, sp);
7013 authenticate_return_address();
7014 }
7015
7016 #ifdef COMPILER2
7017 // C2 compiled method's prolog code
7018 // Moved here from aarch64.ad to support Valhalla code below
7019 void MacroAssembler::verified_entry(Compile* C, int sp_inc) {
7020 if (C->clinit_barrier_on_entry()) {
7021 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
7022
7023 Label L_skip_barrier;
7024
7025 mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
7026 clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
7027 far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
7028 bind(L_skip_barrier);
7029 }
7030
7031 if (C->max_vector_size() > 0) {
7032 reinitialize_ptrue();
7033 }
7034
7035 int bangsize = C->output()->bang_size_in_bytes();
7036 if (C->output()->need_stack_bang(bangsize))
7037 generate_stack_overflow_check(bangsize);
7038
7039 // n.b. frame size includes space for return pc and rfp
7040 const long framesize = C->output()->frame_size_in_bytes();
7041 build_frame(framesize DEBUG_ONLY(COMMA sp_inc != 0));
7042
7043 if (C->needs_stack_repair()) {
7044 save_stack_increment(sp_inc, framesize);
7045 }
7046
7047 if (VerifyStackAtCalls) {
7048 Unimplemented();
7049 }
7050 }
7051 #endif // COMPILER2
7052
7053 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
7054 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
7055 // An inline type might be returned. If fields are in registers we
7056 // need to allocate an inline type instance and initialize it with
7057 // the value of the fields.
7058 Label skip;
7059 // We only need a new buffered inline type if a new one is not returned
7060 tbz(r0, 0, skip);
7061 int call_offset = -1;
7062
7063 // Be careful not to clobber r1-7 which hold returned fields
7064 // Also do not use callee-saved registers as these may be live in the interpreter
7065 Register tmp1 = r13, tmp2 = r14, klass = r15, r0_preserved = r12;
7066
7067 // The following code is similar to the instance allocation code in TemplateTable::_new
7068 // but has some slight differences,
7069 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
7070 // allocating is not necessary if vk != nullptr, etc.
7071 Label slow_case;
7072 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
7073 mov(r0_preserved, r0); // save r0 for slow_case since *_allocate may corrupt it when allocation failed
7074
7075 if (vk != nullptr) {
7076 // Called from C1, where the return type is statically known.
7077 movptr(klass, (intptr_t)vk->get_InlineKlass());
7078 jint lh = vk->layout_helper();
7079 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
7080 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
7081 tlab_allocate(r0, noreg, lh, tmp1, tmp2, slow_case);
7082 } else {
7083 b(slow_case);
7084 }
7085 } else {
7086 // Call from interpreter. R0 contains ((the InlineKlass* of the return type) | 0x01)
7087 andr(klass, r0, -2);
7088 if (UseTLAB) {
7089 ldrw(tmp2, Address(klass, Klass::layout_helper_offset()));
7090 tst(tmp2, Klass::_lh_instance_slow_path_bit);
7091 br(Assembler::NE, slow_case);
7092 tlab_allocate(r0, tmp2, 0, tmp1, tmp2, slow_case);
7093 } else {
7094 b(slow_case);
7095 }
7096 }
7097 if (UseTLAB) {
7098 // 2. Initialize buffered inline instance header
7099 Register buffer_obj = r0;
7100 if (UseCompactObjectHeaders) {
7101 ldr(rscratch1, Address(klass, Klass::prototype_header_offset()));
7102 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7103 } else {
7104 mov(rscratch1, (intptr_t)markWord::inline_type_prototype().value());
7105 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7106 store_klass_gap(buffer_obj, zr);
7107 if (vk == nullptr) {
7108 // store_klass corrupts klass, so save it for later use (interpreter case only).
7109 mov(tmp1, klass);
7110 }
7111 store_klass(buffer_obj, klass);
7112 klass = tmp1;
7113 }
7114 // 3. Initialize its fields with an inline class specific handler
7115 if (vk != nullptr) {
7116 far_call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
7117 } else {
7118 ldr(tmp1, Address(klass, InlineKlass::adr_members_offset()));
7119 ldr(tmp1, Address(tmp1, InlineKlass::pack_handler_offset()));
7120 blr(tmp1);
7121 }
7122
7123 membar(Assembler::StoreStore);
7124 b(skip);
7125 } else {
7126 // Must have already branched to slow_case above.
7127 DEBUG_ONLY(should_not_reach_here());
7128 }
7129 bind(slow_case);
7130 // We failed to allocate a new inline type, fall back to a runtime
7131 // call. Some oop field may be live in some registers but we can't
7132 // tell. That runtime call will take care of preserving them
7133 // across a GC if there's one.
7134 mov(r0, r0_preserved);
7135
7136 if (from_interpreter) {
7137 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
7138 } else {
7139 far_call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
7140 call_offset = offset();
7141 }
7142 membar(Assembler::StoreStore);
7143
7144 bind(skip);
7145 return call_offset;
7146 }
7147
7148 // Move a value between registers/stack slots and update the reg_state
7149 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
7150 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
7151 if (reg_state[to->value()] == reg_written) {
7152 return true; // Already written
7153 }
7154
7155 if (from != to && bt != T_VOID) {
7156 if (reg_state[to->value()] == reg_readonly) {
7157 return false; // Not yet writable
7158 }
7159 if (from->is_reg()) {
7160 if (to->is_reg()) {
7161 if (from->is_Register() && to->is_Register()) {
7162 mov(to->as_Register(), from->as_Register());
7163 } else if (from->is_FloatRegister() && to->is_FloatRegister()) {
7164 fmovd(to->as_FloatRegister(), from->as_FloatRegister());
7165 } else {
7166 ShouldNotReachHere();
7167 }
7168 } else {
7169 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7170 Address to_addr = Address(sp, st_off);
7171 if (from->is_FloatRegister()) {
7172 if (bt == T_DOUBLE) {
7173 strd(from->as_FloatRegister(), to_addr);
7174 } else {
7175 assert(bt == T_FLOAT, "must be float");
7176 strs(from->as_FloatRegister(), to_addr);
7177 }
7178 } else {
7179 str(from->as_Register(), to_addr);
7180 }
7181 }
7182 } else {
7183 Address from_addr = Address(sp, from->reg2stack() * VMRegImpl::stack_slot_size);
7184 if (to->is_reg()) {
7185 if (to->is_FloatRegister()) {
7186 if (bt == T_DOUBLE) {
7187 ldrd(to->as_FloatRegister(), from_addr);
7188 } else {
7189 assert(bt == T_FLOAT, "must be float");
7190 ldrs(to->as_FloatRegister(), from_addr);
7191 }
7192 } else {
7193 ldr(to->as_Register(), from_addr);
7194 }
7195 } else {
7196 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7197 ldr(rscratch1, from_addr);
7198 str(rscratch1, Address(sp, st_off));
7199 }
7200 }
7201 }
7202
7203 // Update register states
7204 reg_state[from->value()] = reg_writable;
7205 reg_state[to->value()] = reg_written;
7206 return true;
7207 }
7208
7209 // Calculate the extra stack space required for packing or unpacking inline
7210 // args and adjust the stack pointer
7211 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
7212 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
7213 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
7214 assert(sp_inc > 0, "sanity");
7215
7216 // Save a copy of the FP and LR here for deoptimization patching and frame walking
7217 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
7218
7219 // Adjust the stack pointer. This will be repaired on return by MacroAssembler::remove_frame
7220 if (sp_inc < (1 << 9)) {
7221 sub(sp, sp, sp_inc); // Fits in an immediate
7222 } else {
7223 mov(rscratch1, sp_inc);
7224 sub(sp, sp, rscratch1);
7225 }
7226
7227 return sp_inc + 2 * wordSize; // Account for the FP/LR space
7228 }
7229
7230 // Read all fields from an inline type oop and store the values in registers/stack slots
7231 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
7232 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
7233 RegState reg_state[]) {
7234 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
7235 assert(from->is_valid(), "source must be valid");
7236 bool progress = false;
7237 #ifdef ASSERT
7238 const int start_offset = offset();
7239 #endif
7240
7241 Label L_null, L_notNull;
7242 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
7243 Register tmp1 = r10;
7244 Register tmp2 = r11;
7245
7246 #ifdef ASSERT
7247 RegSet clobbered_gp_regs = MacroAssembler::call_clobbered_gp_registers();
7248 assert(clobbered_gp_regs.contains(tmp1), "tmp1 must be saved explicitly if it's not a clobber");
7249 assert(clobbered_gp_regs.contains(tmp2), "tmp2 must be saved explicitly if it's not a clobber");
7250 assert(clobbered_gp_regs.contains(r14), "r14 must be saved explicitly if it's not a clobber");
7251 #endif
7252
7253 Register fromReg = noreg;
7254 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
7255 bool done = true;
7256 bool mark_done = true;
7257 VMReg toReg;
7258 BasicType bt;
7259 // Check if argument requires a null check
7260 bool null_check = false;
7261 VMReg nullCheckReg;
7262 while (stream.next(nullCheckReg, bt)) {
7263 if (sig->at(stream.sig_index())._offset == -1) {
7264 null_check = true;
7265 break;
7266 }
7267 }
7268 stream.reset(sig_index, to_index);
7269 while (stream.next(toReg, bt)) {
7270 assert(toReg->is_valid(), "destination must be valid");
7271 int idx = (int)toReg->value();
7272 if (reg_state[idx] == reg_readonly) {
7273 if (idx != from->value()) {
7274 mark_done = false;
7275 }
7276 done = false;
7277 continue;
7278 } else if (reg_state[idx] == reg_written) {
7279 continue;
7280 }
7281 assert(reg_state[idx] == reg_writable, "must be writable");
7282 reg_state[idx] = reg_written;
7283 progress = true;
7284
7285 if (fromReg == noreg) {
7286 if (from->is_reg()) {
7287 fromReg = from->as_Register();
7288 } else {
7289 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size;
7290 ldr(tmp1, Address(sp, st_off));
7291 fromReg = tmp1;
7292 }
7293 if (null_check) {
7294 // Nullable inline type argument, emit null check
7295 cbz(fromReg, L_null);
7296 }
7297 }
7298 int off = sig->at(stream.sig_index())._offset;
7299 if (off == -1) {
7300 assert(null_check, "Missing null check at");
7301 if (toReg->is_stack()) {
7302 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7303 mov(tmp2, 1);
7304 str(tmp2, Address(sp, st_off));
7305 } else {
7306 mov(toReg->as_Register(), 1);
7307 }
7308 continue;
7309 }
7310 if (sig->at(stream.sig_index())._vt_oop) {
7311 if (toReg->is_stack()) {
7312 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7313 str(fromReg, Address(sp, st_off));
7314 } else {
7315 mov(toReg->as_Register(), fromReg);
7316 }
7317 continue;
7318 }
7319 assert(off > 0, "offset in object should be positive");
7320 Address fromAddr = Address(fromReg, off);
7321 if (!toReg->is_FloatRegister()) {
7322 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
7323 if (is_reference_type(bt)) {
7324 load_heap_oop(dst, fromAddr, rscratch1, rscratch2);
7325 } else {
7326 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
7327 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
7328 }
7329 if (toReg->is_stack()) {
7330 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7331 str(dst, Address(sp, st_off));
7332 }
7333 } else if (bt == T_DOUBLE) {
7334 ldrd(toReg->as_FloatRegister(), fromAddr);
7335 } else {
7336 assert(bt == T_FLOAT, "must be float");
7337 ldrs(toReg->as_FloatRegister(), fromAddr);
7338 }
7339 }
7340 if (progress && null_check) {
7341 if (done) {
7342 b(L_notNull);
7343 bind(L_null);
7344 // Set null marker to zero to signal that the argument is null.
7345 // Also set all fields to zero since the runtime requires a canonical
7346 // representation of a flat null.
7347 stream.reset(sig_index, to_index);
7348 while (stream.next(toReg, bt)) {
7349 if (toReg->is_stack()) {
7350 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7351 str(zr, Address(sp, st_off));
7352 } else if (toReg->is_FloatRegister()) {
7353 mov(toReg->as_FloatRegister(), T2S, 0);
7354 } else {
7355 mov(toReg->as_Register(), zr);
7356 }
7357 }
7358 bind(L_notNull);
7359 } else {
7360 bind(L_null);
7361 }
7362 }
7363
7364 sig_index = stream.sig_index();
7365 to_index = stream.regs_index();
7366
7367 if (mark_done && reg_state[from->value()] != reg_written) {
7368 // This is okay because no one else will write to that slot
7369 reg_state[from->value()] = reg_writable;
7370 }
7371 from_index--;
7372 assert(progress || (start_offset == offset()), "should not emit code");
7373 return done;
7374 }
7375
7376 // Pack fields back into an inline type oop
7377 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
7378 VMRegPair* from, int from_count, int& from_index, VMReg to,
7379 RegState reg_state[], Register val_array) {
7380 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
7381 assert(to->is_valid(), "destination must be valid");
7382
7383 if (reg_state[to->value()] == reg_written) {
7384 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7385 return true; // Already written
7386 }
7387
7388 // The GC barrier expanded by store_heap_oop below may call into the
7389 // runtime so use callee-saved registers for any values that need to be
7390 // preserved. The GC barrier assembler should take care of saving the
7391 // Java argument registers.
7392 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
7393 Register val_obj_tmp = r21;
7394 Register from_reg_tmp = r22;
7395 Register tmp1 = r14;
7396 Register tmp2 = r13;
7397 Register tmp3 = r12;
7398 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
7399
7400 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
7401
7402 if (reg_state[to->value()] == reg_readonly) {
7403 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
7404 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7405 return false; // Not yet writable
7406 }
7407 val_obj = val_obj_tmp;
7408 }
7409
7410 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
7411 VMReg fromReg;
7412 BasicType bt;
7413 Label L_null;
7414 while (stream.next(fromReg, bt)) {
7415 assert(fromReg->is_valid(), "source must be valid");
7416 reg_state[fromReg->value()] = reg_writable;
7417
7418 int off = sig->at(stream.sig_index())._offset;
7419 if (off == -1) {
7420 // Nullable inline type argument, emit null check
7421 Label L_notNull;
7422 if (fromReg->is_stack()) {
7423 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7424 ldrb(tmp2, Address(sp, ld_off));
7425 cbnz(tmp2, L_notNull);
7426 } else {
7427 cbnz(fromReg->as_Register(), L_notNull);
7428 }
7429 mov(val_obj, 0);
7430 b(L_null);
7431 bind(L_notNull);
7432 continue;
7433 }
7434 if (sig->at(stream.sig_index())._vt_oop) {
7435 if (fromReg->is_stack()) {
7436 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7437 ldr(val_obj, Address(sp, ld_off));
7438 } else {
7439 mov(val_obj, fromReg->as_Register());
7440 }
7441 cbnz(val_obj, L_null);
7442 // get the buffer from the just allocated pool of buffers
7443 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
7444 load_heap_oop(val_obj, Address(val_array, index), rscratch1, rscratch2);
7445 continue;
7446 }
7447
7448 assert(off > 0, "offset in object should be positive");
7449 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
7450
7451 // Pack the scalarized field into the value object.
7452 Address dst(val_obj, off);
7453 if (!fromReg->is_FloatRegister()) {
7454 Register src;
7455 if (fromReg->is_stack()) {
7456 src = from_reg_tmp;
7457 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7458 load_sized_value(src, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
7459 } else {
7460 src = fromReg->as_Register();
7461 }
7462 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
7463 if (is_reference_type(bt)) {
7464 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep val_obj valid.
7465 mov(tmp3, val_obj);
7466 Address dst_with_tmp3(tmp3, off);
7467 store_heap_oop(dst_with_tmp3, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
7468 } else {
7469 store_sized_value(dst, src, size_in_bytes);
7470 }
7471 } else if (bt == T_DOUBLE) {
7472 strd(fromReg->as_FloatRegister(), dst);
7473 } else {
7474 assert(bt == T_FLOAT, "must be float");
7475 strs(fromReg->as_FloatRegister(), dst);
7476 }
7477 }
7478 bind(L_null);
7479 sig_index = stream.sig_index();
7480 from_index = stream.regs_index();
7481
7482 assert(reg_state[to->value()] == reg_writable, "must have already been read");
7483 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
7484 assert(success, "to register must be writable");
7485 return true;
7486 }
7487
7488 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
7489 return (reg->is_FloatRegister()) ? v8->as_VMReg() : r14->as_VMReg();
7490 }
7491
7492 void MacroAssembler::cache_wb(Address line) {
7493 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
7494 assert(line.index() == noreg, "index should be noreg");
7495 assert(line.offset() == 0, "offset should be 0");
7496 // would like to assert this
7497 // assert(line._ext.shift == 0, "shift should be zero");
7498 if (VM_Version::supports_dcpop()) {
7499 // writeback using clear virtual address to point of persistence
7500 dc(Assembler::CVAP, line.base());
7501 } else {
7502 // no need to generate anything as Unsafe.writebackMemory should
7503 // never invoke this stub
7504 }
7505 }
7506
7507 void MacroAssembler::cache_wbsync(bool is_pre) {
7508 // we only need a barrier post sync
7509 if (!is_pre) {
7510 membar(Assembler::AnyAny);
7511 }
7907 }
7908
7909 // Check if the lock-stack is full.
7910 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7911 cmpw(top, (unsigned)LockStack::end_offset());
7912 br(Assembler::GE, slow);
7913
7914 // Check for recursion.
7915 subw(t, top, oopSize);
7916 ldr(t, Address(rthread, t));
7917 cmp(obj, t);
7918 br(Assembler::EQ, push);
7919
7920 // Check header for monitor (0b10).
7921 tst(mark, markWord::monitor_value);
7922 br(Assembler::NE, slow);
7923
7924 // Try to lock. Transition lock bits 0b01 => 0b00
7925 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7926 orr(mark, mark, markWord::unlocked_value);
7927 // Mask inline_type bit such that we go to the slow path if object is an inline type
7928 andr(mark, mark, ~((int) markWord::inline_type_bit_in_place));
7929
7930 eor(t, mark, markWord::unlocked_value);
7931 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword, memory_order_acquire);
7932 br(Assembler::NE, slow);
7933
7934 bind(push);
7935 // After successful lock, push object on lock-stack.
7936 str(obj, Address(rthread, top));
7937 addw(top, top, oopSize);
7938 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7939 }
7940
7941 // Implements fast-unlocking.
7942 //
7943 // - obj: the object to be unlocked
7944 // - t1, t2, t3: temporary registers
7945 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7946 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7947 // cmpxchg clobbers rscratch1.
7948 assert_different_registers(obj, t1, t2, t3, rscratch1);
7949
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