1 /*
2 * Copyright (c) 1997, 2025, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, 2024, Red Hat Inc. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "code/compiledIC.hpp"
30 #include "compiler/compileTask.hpp"
31 #include "compiler/disassembler.hpp"
32 #include "compiler/oopMap.hpp"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/cardTable.hpp"
37 #include "gc/shared/collectedHeap.hpp"
38 #include "gc/shared/tlab_globals.hpp"
39 #include "interpreter/bytecodeHistogram.hpp"
40 #include "interpreter/interpreter.hpp"
41 #include "interpreter/interpreterRuntime.hpp"
42 #include "jvm.h"
43 #include "memory/resourceArea.hpp"
44 #include "memory/universe.hpp"
45 #include "nativeInst_aarch64.hpp"
46 #include "oops/accessDecorators.hpp"
47 #include "oops/compressedKlass.inline.hpp"
48 #include "oops/compressedOops.inline.hpp"
49 #include "oops/klass.inline.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/icache.hpp"
52 #include "runtime/interfaceSupport.inline.hpp"
53 #include "runtime/javaThread.hpp"
54 #include "runtime/jniHandles.inline.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/globalDefinitions.hpp"
58 #include "utilities/powerOfTwo.hpp"
59 #ifdef COMPILER1
60 #include "c1/c1_LIRAssembler.hpp"
61 #endif
62 #ifdef COMPILER2
63 #include "oops/oop.hpp"
64 #include "opto/compile.hpp"
65 #include "opto/node.hpp"
66 #include "opto/output.hpp"
67 #endif
68
69 #include <sys/types.h>
70
71 #ifdef PRODUCT
72 #define BLOCK_COMMENT(str) /* nothing */
73 #else
74 #define BLOCK_COMMENT(str) block_comment(str)
75 #endif
76 #define STOP(str) stop(str);
77 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
78
2011 ldarb(scratch, scratch);
2012 cmp(scratch, InstanceKlass::fully_initialized);
2013 br(Assembler::EQ, *L_fast_path);
2014
2015 // Fast path check: current thread is initializer thread
2016 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2017 cmp(rthread, scratch);
2018
2019 if (L_slow_path == &L_fallthrough) {
2020 br(Assembler::EQ, *L_fast_path);
2021 bind(*L_slow_path);
2022 } else if (L_fast_path == &L_fallthrough) {
2023 br(Assembler::NE, *L_slow_path);
2024 bind(*L_fast_path);
2025 } else {
2026 Unimplemented();
2027 }
2028 }
2029
2030 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2031 if (!VerifyOops) return;
2032
2033 // Pass register number to verify_oop_subroutine
2034 const char* b = nullptr;
2035 {
2036 ResourceMark rm;
2037 stringStream ss;
2038 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2039 b = code_string(ss.as_string());
2040 }
2041 BLOCK_COMMENT("verify_oop {");
2042
2043 strip_return_address(); // This might happen within a stack frame.
2044 protect_return_address();
2045 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2046 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2047
2048 mov(r0, reg);
2049 movptr(rscratch1, (uintptr_t)(address)b);
2050
2051 // call indirectly to solve generation ordering problem
2052 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2053 ldr(rscratch2, Address(rscratch2));
2054 blr(rscratch2);
2055
2056 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2057 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2058 authenticate_return_address();
2059
2060 BLOCK_COMMENT("} verify_oop");
2061 }
2062
2063 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2064 if (!VerifyOops) return;
2065
2066 const char* b = nullptr;
2067 {
2068 ResourceMark rm;
2069 stringStream ss;
2070 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2071 b = code_string(ss.as_string());
2072 }
2073 BLOCK_COMMENT("verify_oop_addr {");
2074
2075 strip_return_address(); // This might happen within a stack frame.
2076 protect_return_address();
2077 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2078 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2079
2080 // addr may contain sp so we will have to adjust it based on the
2081 // pushes that we just did.
2082 if (addr.uses(sp)) {
2083 lea(r0, addr);
2084 ldr(r0, Address(r0, 4 * wordSize));
2142 call_VM_leaf_base(entry_point, 1);
2143 }
2144
2145 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2146 assert_different_registers(arg_1, c_rarg0);
2147 pass_arg0(this, arg_0);
2148 pass_arg1(this, arg_1);
2149 call_VM_leaf_base(entry_point, 2);
2150 }
2151
2152 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2153 Register arg_1, Register arg_2) {
2154 assert_different_registers(arg_1, c_rarg0);
2155 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2156 pass_arg0(this, arg_0);
2157 pass_arg1(this, arg_1);
2158 pass_arg2(this, arg_2);
2159 call_VM_leaf_base(entry_point, 3);
2160 }
2161
2162 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2163 pass_arg0(this, arg_0);
2164 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2165 }
2166
2167 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2168
2169 assert_different_registers(arg_0, c_rarg1);
2170 pass_arg1(this, arg_1);
2171 pass_arg0(this, arg_0);
2172 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2173 }
2174
2175 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2176 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2177 assert_different_registers(arg_1, c_rarg2);
2178 pass_arg2(this, arg_2);
2179 pass_arg1(this, arg_1);
2180 pass_arg0(this, arg_0);
2181 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2187 assert_different_registers(arg_2, c_rarg3);
2188 pass_arg3(this, arg_3);
2189 pass_arg2(this, arg_2);
2190 pass_arg1(this, arg_1);
2191 pass_arg0(this, arg_0);
2192 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2193 }
2194
2195 void MacroAssembler::null_check(Register reg, int offset) {
2196 if (needs_explicit_null_check(offset)) {
2197 // provoke OS null exception if reg is null by
2198 // accessing M[reg] w/o changing any registers
2199 // NOTE: this is plenty to provoke a segv
2200 ldr(zr, Address(reg));
2201 } else {
2202 // nothing to do, (later) access of M[reg + offset]
2203 // will provoke OS null exception if reg is null
2204 }
2205 }
2206
2207 // MacroAssembler protected routines needed to implement
2208 // public methods
2209
2210 void MacroAssembler::mov(Register r, Address dest) {
2211 code_section()->relocate(pc(), dest.rspec());
2212 uint64_t imm64 = (uint64_t)dest.target();
2213 movptr(r, imm64);
2214 }
2215
2216 // Move a constant pointer into r. In AArch64 mode the virtual
2217 // address space is 48 bits in size, so we only need three
2218 // instructions to create a patchable instruction sequence that can
2219 // reach anywhere.
2220 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2221 #ifndef PRODUCT
2222 {
2223 char buffer[64];
2224 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2225 block_comment(buffer);
2226 }
4887 adrp(rscratch1, src2, offset);
4888 ldr(rscratch1, Address(rscratch1, offset));
4889 cmp(src1, rscratch1);
4890 }
4891
4892 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
4893 cmp(obj1, obj2);
4894 }
4895
4896 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
4897 load_method_holder(rresult, rmethod);
4898 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
4899 }
4900
4901 void MacroAssembler::load_method_holder(Register holder, Register method) {
4902 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
4903 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
4904 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
4905 }
4906
4907 // Loads the obj's Klass* into dst.
4908 // Preserves all registers (incl src, rscratch1 and rscratch2).
4909 // Input:
4910 // src - the oop we want to load the klass from.
4911 // dst - output narrow klass.
4912 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
4913 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
4914 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
4915 lsr(dst, dst, markWord::klass_shift);
4916 }
4917
4918 void MacroAssembler::load_klass(Register dst, Register src) {
4919 if (UseCompactObjectHeaders) {
4920 load_narrow_klass_compact(dst, src);
4921 decode_klass_not_null(dst);
4922 } else if (UseCompressedClassPointers) {
4923 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
4924 decode_klass_not_null(dst);
4925 } else {
4926 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
4997 }
4998 cmp(klass, tmp);
4999 }
5000
5001 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5002 if (UseCompactObjectHeaders) {
5003 load_narrow_klass_compact(tmp1, obj1);
5004 load_narrow_klass_compact(tmp2, obj2);
5005 cmpw(tmp1, tmp2);
5006 } else if (UseCompressedClassPointers) {
5007 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5008 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5009 cmpw(tmp1, tmp2);
5010 } else {
5011 ldr(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5012 ldr(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5013 cmp(tmp1, tmp2);
5014 }
5015 }
5016
5017 void MacroAssembler::store_klass(Register dst, Register src) {
5018 // FIXME: Should this be a store release? concurrent gcs assumes
5019 // klass length is valid if klass field is not null.
5020 assert(!UseCompactObjectHeaders, "not with compact headers");
5021 if (UseCompressedClassPointers) {
5022 encode_klass_not_null(src);
5023 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5024 } else {
5025 str(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5026 }
5027 }
5028
5029 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5030 assert(!UseCompactObjectHeaders, "not with compact headers");
5031 if (UseCompressedClassPointers) {
5032 // Store to klass gap in destination
5033 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5034 }
5035 }
5036
5397 if (as_raw) {
5398 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5399 } else {
5400 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5401 }
5402 }
5403
5404 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5405 Address dst, Register val,
5406 Register tmp1, Register tmp2, Register tmp3) {
5407 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5408 decorators = AccessInternal::decorator_fixup(decorators, type);
5409 bool as_raw = (decorators & AS_RAW) != 0;
5410 if (as_raw) {
5411 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5412 } else {
5413 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5414 }
5415 }
5416
5417 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5418 Register tmp2, DecoratorSet decorators) {
5419 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5420 }
5421
5422 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5423 Register tmp2, DecoratorSet decorators) {
5424 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5425 }
5426
5427 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5428 Register tmp2, Register tmp3, DecoratorSet decorators) {
5429 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5430 }
5431
5432 // Used for storing nulls.
5433 void MacroAssembler::store_heap_oop_null(Address dst) {
5434 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5435 }
5436
5472 oop_index = oop_recorder()->allocate_metadata_index(obj);
5473 } else {
5474 oop_index = oop_recorder()->find_index(obj);
5475 }
5476 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5477 mov(dst, Address((address)obj, rspec));
5478 }
5479
5480 Address MacroAssembler::constant_oop_address(jobject obj) {
5481 #ifdef ASSERT
5482 {
5483 ThreadInVMfromUnknown tiv;
5484 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5485 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5486 }
5487 #endif
5488 int oop_index = oop_recorder()->find_index(obj);
5489 return Address((address)obj, oop_Relocation::spec(oop_index));
5490 }
5491
5492 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5493 void MacroAssembler::tlab_allocate(Register obj,
5494 Register var_size_in_bytes,
5495 int con_size_in_bytes,
5496 Register t1,
5497 Register t2,
5498 Label& slow_case) {
5499 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5500 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5501 }
5502
5503 void MacroAssembler::verify_tlab() {
5504 #ifdef ASSERT
5505 if (UseTLAB && VerifyOops) {
5506 Label next, ok;
5507
5508 stp(rscratch2, rscratch1, Address(pre(sp, -16)));
5509
5510 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5511 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5512 cmp(rscratch2, rscratch1);
5513 br(Assembler::HS, next);
5514 STOP("assert(top >= start)");
5515 should_not_reach_here();
5516
5517 bind(next);
5518 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5519 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5520 cmp(rscratch2, rscratch1);
5521 br(Assembler::HS, ok);
5522 STOP("assert(top <= end)");
5523 should_not_reach_here();
5524
5525 bind(ok);
5526 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5527 }
5528 #endif
5529 }
5530
5531 // Writes to stack successive pages until offset reached to check for
5532 // stack overflow + shadow pages. This clobbers tmp.
5533 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5534 assert_different_registers(tmp, size, rscratch1);
5535 mov(tmp, sp);
5536 // Bang stack for total size given plus shadow page size.
5537 // Bang one page at a time because large size can bang beyond yellow and
5538 // red zones.
5539 Label loop;
5540 mov(rscratch1, (int)os::vm_page_size());
5541 bind(loop);
5542 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5543 subsw(size, size, rscratch1);
5544 str(size, Address(tmp));
5545 br(Assembler::GT, loop);
5546
5547 // Bang down shadow pages too.
5548 // At this point, (tmp-0) is the last address touched, so don't
5549 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5550 // was post-decremented.) Skip this address by starting at i=1, and
5597 } else {
5598 uint64_t target = (uint64_t)dest.target();
5599 uint64_t adrp_target
5600 = (target & 0xffffffffULL) | ((uint64_t)pc() & 0xffff00000000ULL);
5601
5602 _adrp(reg1, (address)adrp_target);
5603 movk(reg1, target >> 32, 32);
5604 }
5605 byte_offset = (uint64_t)dest.target() & 0xfff;
5606 }
5607
5608 void MacroAssembler::load_byte_map_base(Register reg) {
5609 CardTable::CardValue* byte_map_base =
5610 ((CardTableBarrierSet*)(BarrierSet::barrier_set()))->card_table()->byte_map_base();
5611
5612 // Strictly speaking the byte_map_base isn't an address at all, and it might
5613 // even be negative. It is thus materialised as a constant.
5614 mov(reg, (uint64_t)byte_map_base);
5615 }
5616
5617 void MacroAssembler::build_frame(int framesize) {
5618 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5619 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5620 protect_return_address();
5621 if (framesize < ((1 << 9) + 2 * wordSize)) {
5622 sub(sp, sp, framesize);
5623 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5624 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5625 } else {
5626 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5627 if (PreserveFramePointer) mov(rfp, sp);
5628 if (framesize < ((1 << 12) + 2 * wordSize))
5629 sub(sp, sp, framesize - 2 * wordSize);
5630 else {
5631 mov(rscratch1, framesize - 2 * wordSize);
5632 sub(sp, sp, rscratch1);
5633 }
5634 }
5635 verify_cross_modify_fence_not_required();
5636 }
5637
5638 void MacroAssembler::remove_frame(int framesize) {
5639 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5640 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5641 if (framesize < ((1 << 9) + 2 * wordSize)) {
5642 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5643 add(sp, sp, framesize);
5644 } else {
5645 if (framesize < ((1 << 12) + 2 * wordSize))
5646 add(sp, sp, framesize - 2 * wordSize);
5647 else {
5648 mov(rscratch1, framesize - 2 * wordSize);
5649 add(sp, sp, rscratch1);
5650 }
5651 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5652 }
5653 authenticate_return_address();
5654 }
5655
5656
5657 // This method counts leading positive bytes (highest bit not set) in provided byte array
5658 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
5659 // Simple and most common case of aligned small array which is not at the
5660 // end of memory page is placed here. All other cases are in stub.
5661 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
5662 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
5663 assert_different_registers(ary1, len, result);
5664
5665 mov(result, len);
5666 cmpw(len, 0);
5667 br(LE, DONE);
5668 cmpw(len, 4 * wordSize);
5669 br(GE, STUB_LONG); // size > 32 then go to stub
5670
5671 int shift = 64 - exact_log2(os::vm_page_size());
5672 lsl(rscratch1, ary1, shift);
5673 mov(rscratch2, (size_t)(4 * wordSize) << shift);
5674 adds(rscratch2, rscratch1, rscratch2); // At end of page?
5675 br(CS, STUB); // at the end of page then go to stub
6549 // On other systems, the helper is a usual C function.
6550 //
6551 void MacroAssembler::get_thread(Register dst) {
6552 RegSet saved_regs =
6553 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
6554 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
6555
6556 protect_return_address();
6557 push(saved_regs, sp);
6558
6559 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6560 blr(lr);
6561 if (dst != c_rarg0) {
6562 mov(dst, c_rarg0);
6563 }
6564
6565 pop(saved_regs, sp);
6566 authenticate_return_address();
6567 }
6568
6569 void MacroAssembler::cache_wb(Address line) {
6570 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
6571 assert(line.index() == noreg, "index should be noreg");
6572 assert(line.offset() == 0, "offset should be 0");
6573 // would like to assert this
6574 // assert(line._ext.shift == 0, "shift should be zero");
6575 if (VM_Version::supports_dcpop()) {
6576 // writeback using clear virtual address to point of persistence
6577 dc(Assembler::CVAP, line.base());
6578 } else {
6579 // no need to generate anything as Unsafe.writebackMemory should
6580 // never invoke this stub
6581 }
6582 }
6583
6584 void MacroAssembler::cache_wbsync(bool is_pre) {
6585 // we only need a barrier post sync
6586 if (!is_pre) {
6587 membar(Assembler::AnyAny);
6588 }
6959 }
6960
6961 // Check if the lock-stack is full.
6962 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
6963 cmpw(top, (unsigned)LockStack::end_offset());
6964 br(Assembler::GE, slow);
6965
6966 // Check for recursion.
6967 subw(t, top, oopSize);
6968 ldr(t, Address(rthread, t));
6969 cmp(obj, t);
6970 br(Assembler::EQ, push);
6971
6972 // Check header for monitor (0b10).
6973 tst(mark, markWord::monitor_value);
6974 br(Assembler::NE, slow);
6975
6976 // Try to lock. Transition lock bits 0b01 => 0b00
6977 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
6978 orr(mark, mark, markWord::unlocked_value);
6979 eor(t, mark, markWord::unlocked_value);
6980 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
6981 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
6982 br(Assembler::NE, slow);
6983
6984 bind(push);
6985 // After successful lock, push object on lock-stack.
6986 str(obj, Address(rthread, top));
6987 addw(top, top, oopSize);
6988 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
6989 }
6990
6991 // Implements fast-unlocking.
6992 //
6993 // - obj: the object to be unlocked
6994 // - t1, t2, t3: temporary registers
6995 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
6996 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
6997 // cmpxchg clobbers rscratch1.
6998 assert_different_registers(obj, t1, t2, t3, rscratch1);
|
1 /*
2 * Copyright (c) 1997, 2026, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, 2024, Red Hat Inc. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "ci/ciInlineKlass.hpp"
30 #include "code/compiledIC.hpp"
31 #include "compiler/compileTask.hpp"
32 #include "compiler/disassembler.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "gc/shared/cardTableBarrierSet.hpp"
37 #include "gc/shared/cardTable.hpp"
38 #include "gc/shared/collectedHeap.hpp"
39 #include "gc/shared/tlab_globals.hpp"
40 #include "interpreter/bytecodeHistogram.hpp"
41 #include "interpreter/interpreter.hpp"
42 #include "interpreter/interpreterRuntime.hpp"
43 #include "jvm.h"
44 #include "memory/resourceArea.hpp"
45 #include "memory/universe.hpp"
46 #include "nativeInst_aarch64.hpp"
47 #include "oops/accessDecorators.hpp"
48 #include "oops/compressedKlass.inline.hpp"
49 #include "oops/compressedOops.inline.hpp"
50 #include "oops/klass.inline.hpp"
51 #include "oops/resolvedFieldEntry.hpp"
52 #include "runtime/arguments.hpp"
53 #include "runtime/continuation.hpp"
54 #include "runtime/globals.hpp"
55 #include "runtime/icache.hpp"
56 #include "runtime/interfaceSupport.inline.hpp"
57 #include "runtime/javaThread.hpp"
58 #include "runtime/jniHandles.inline.hpp"
59 #include "runtime/sharedRuntime.hpp"
60 #include "runtime/signature_cc.hpp"
61 #include "runtime/stubRoutines.hpp"
62 #include "utilities/globalDefinitions.hpp"
63 #include "utilities/powerOfTwo.hpp"
64 #include "vmreg_aarch64.inline.hpp"
65 #ifdef COMPILER1
66 #include "c1/c1_LIRAssembler.hpp"
67 #endif
68 #ifdef COMPILER2
69 #include "oops/oop.hpp"
70 #include "opto/compile.hpp"
71 #include "opto/node.hpp"
72 #include "opto/output.hpp"
73 #endif
74
75 #include <sys/types.h>
76
77 #ifdef PRODUCT
78 #define BLOCK_COMMENT(str) /* nothing */
79 #else
80 #define BLOCK_COMMENT(str) block_comment(str)
81 #endif
82 #define STOP(str) stop(str);
83 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
84
2017 ldarb(scratch, scratch);
2018 cmp(scratch, InstanceKlass::fully_initialized);
2019 br(Assembler::EQ, *L_fast_path);
2020
2021 // Fast path check: current thread is initializer thread
2022 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2023 cmp(rthread, scratch);
2024
2025 if (L_slow_path == &L_fallthrough) {
2026 br(Assembler::EQ, *L_fast_path);
2027 bind(*L_slow_path);
2028 } else if (L_fast_path == &L_fallthrough) {
2029 br(Assembler::NE, *L_slow_path);
2030 bind(*L_fast_path);
2031 } else {
2032 Unimplemented();
2033 }
2034 }
2035
2036 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2037 if (!VerifyOops || VerifyAdapterSharing) {
2038 // Below address of the code string confuses VerifyAdapterSharing
2039 // because it may differ between otherwise equivalent adapters.
2040 return;
2041 }
2042
2043 // Pass register number to verify_oop_subroutine
2044 const char* b = nullptr;
2045 {
2046 ResourceMark rm;
2047 stringStream ss;
2048 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2049 b = code_string(ss.as_string());
2050 }
2051 BLOCK_COMMENT("verify_oop {");
2052
2053 strip_return_address(); // This might happen within a stack frame.
2054 protect_return_address();
2055 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2056 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2057
2058 mov(r0, reg);
2059 movptr(rscratch1, (uintptr_t)(address)b);
2060
2061 // call indirectly to solve generation ordering problem
2062 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2063 ldr(rscratch2, Address(rscratch2));
2064 blr(rscratch2);
2065
2066 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2067 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2068 authenticate_return_address();
2069
2070 BLOCK_COMMENT("} verify_oop");
2071 }
2072
2073 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2074 if (!VerifyOops || VerifyAdapterSharing) {
2075 // Below address of the code string confuses VerifyAdapterSharing
2076 // because it may differ between otherwise equivalent adapters.
2077 return;
2078 }
2079
2080 const char* b = nullptr;
2081 {
2082 ResourceMark rm;
2083 stringStream ss;
2084 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2085 b = code_string(ss.as_string());
2086 }
2087 BLOCK_COMMENT("verify_oop_addr {");
2088
2089 strip_return_address(); // This might happen within a stack frame.
2090 protect_return_address();
2091 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2092 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2093
2094 // addr may contain sp so we will have to adjust it based on the
2095 // pushes that we just did.
2096 if (addr.uses(sp)) {
2097 lea(r0, addr);
2098 ldr(r0, Address(r0, 4 * wordSize));
2156 call_VM_leaf_base(entry_point, 1);
2157 }
2158
2159 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2160 assert_different_registers(arg_1, c_rarg0);
2161 pass_arg0(this, arg_0);
2162 pass_arg1(this, arg_1);
2163 call_VM_leaf_base(entry_point, 2);
2164 }
2165
2166 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2167 Register arg_1, Register arg_2) {
2168 assert_different_registers(arg_1, c_rarg0);
2169 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2170 pass_arg0(this, arg_0);
2171 pass_arg1(this, arg_1);
2172 pass_arg2(this, arg_2);
2173 call_VM_leaf_base(entry_point, 3);
2174 }
2175
2176 void MacroAssembler::super_call_VM_leaf(address entry_point) {
2177 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2178 }
2179
2180 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2181 pass_arg0(this, arg_0);
2182 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2183 }
2184
2185 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2186
2187 assert_different_registers(arg_0, c_rarg1);
2188 pass_arg1(this, arg_1);
2189 pass_arg0(this, arg_0);
2190 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2191 }
2192
2193 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2194 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2195 assert_different_registers(arg_1, c_rarg2);
2196 pass_arg2(this, arg_2);
2197 pass_arg1(this, arg_1);
2198 pass_arg0(this, arg_0);
2199 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2205 assert_different_registers(arg_2, c_rarg3);
2206 pass_arg3(this, arg_3);
2207 pass_arg2(this, arg_2);
2208 pass_arg1(this, arg_1);
2209 pass_arg0(this, arg_0);
2210 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2211 }
2212
2213 void MacroAssembler::null_check(Register reg, int offset) {
2214 if (needs_explicit_null_check(offset)) {
2215 // provoke OS null exception if reg is null by
2216 // accessing M[reg] w/o changing any registers
2217 // NOTE: this is plenty to provoke a segv
2218 ldr(zr, Address(reg));
2219 } else {
2220 // nothing to do, (later) access of M[reg + offset]
2221 // will provoke OS null exception if reg is null
2222 }
2223 }
2224
2225 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2226 assert_different_registers(markword, rscratch2);
2227 mov(rscratch2, markWord::inline_type_mask_in_place);
2228 andr(markword, markword, rscratch2);
2229 mov(rscratch2, markWord::inline_type_pattern);
2230 cmp(markword, rscratch2);
2231 br(Assembler::EQ, is_inline_type);
2232 }
2233
2234 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2235 assert_different_registers(tmp, rscratch1);
2236 if (can_be_null) {
2237 cbz(object, not_inline_type);
2238 }
2239 const int is_inline_type_mask = markWord::inline_type_pattern;
2240 ldr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2241 mov(rscratch1, is_inline_type_mask);
2242 andr(tmp, tmp, rscratch1);
2243 cmp(tmp, rscratch1);
2244 br(Assembler::NE, not_inline_type);
2245 }
2246
2247 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2248 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2249 tbnz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, is_null_free_inline_type);
2250 }
2251
2252 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2253 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2254 tbz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, not_null_free_inline_type);
2255 }
2256
2257 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2258 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2259 tbnz(flags, ResolvedFieldEntry::is_flat_shift, is_flat);
2260 }
2261
2262 void MacroAssembler::test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker) {
2263 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2264 tbnz(flags, ResolvedFieldEntry::has_null_marker_shift, has_null_marker);
2265 }
2266
2267 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2268 Label test_mark_word;
2269 // load mark word
2270 ldr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2271 // check displaced
2272 tst(temp_reg, markWord::unlocked_value);
2273 br(Assembler::NE, test_mark_word);
2274 // slow path use klass prototype
2275 load_prototype_header(temp_reg, oop);
2276
2277 bind(test_mark_word);
2278 andr(temp_reg, temp_reg, test_bit);
2279 if (jmp_set) {
2280 cbnz(temp_reg, jmp_label);
2281 } else {
2282 cbz(temp_reg, jmp_label);
2283 }
2284 }
2285
2286 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array) {
2287 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2288 }
2289
2290 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2291 Label&is_non_flat_array) {
2292 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2293 }
2294
2295 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array) {
2296 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2297 }
2298
2299 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2300 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2301 }
2302
2303 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2304 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2305 br(Assembler::NE, is_flat_array);
2306 }
2307
2308 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
2309 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2310 br(Assembler::EQ, is_non_flat_array);
2311 }
2312
2313 // MacroAssembler protected routines needed to implement
2314 // public methods
2315
2316 void MacroAssembler::mov(Register r, Address dest) {
2317 code_section()->relocate(pc(), dest.rspec());
2318 uint64_t imm64 = (uint64_t)dest.target();
2319 movptr(r, imm64);
2320 }
2321
2322 // Move a constant pointer into r. In AArch64 mode the virtual
2323 // address space is 48 bits in size, so we only need three
2324 // instructions to create a patchable instruction sequence that can
2325 // reach anywhere.
2326 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2327 #ifndef PRODUCT
2328 {
2329 char buffer[64];
2330 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2331 block_comment(buffer);
2332 }
4993 adrp(rscratch1, src2, offset);
4994 ldr(rscratch1, Address(rscratch1, offset));
4995 cmp(src1, rscratch1);
4996 }
4997
4998 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
4999 cmp(obj1, obj2);
5000 }
5001
5002 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5003 load_method_holder(rresult, rmethod);
5004 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5005 }
5006
5007 void MacroAssembler::load_method_holder(Register holder, Register method) {
5008 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5009 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5010 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5011 }
5012
5013 void MacroAssembler::load_metadata(Register dst, Register src) {
5014 if (UseCompactObjectHeaders) {
5015 load_narrow_klass_compact(dst, src);
5016 } else if (UseCompressedClassPointers) {
5017 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5018 } else {
5019 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5020 }
5021 }
5022
5023 // Loads the obj's Klass* into dst.
5024 // Preserves all registers (incl src, rscratch1 and rscratch2).
5025 // Input:
5026 // src - the oop we want to load the klass from.
5027 // dst - output narrow klass.
5028 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5029 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5030 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5031 lsr(dst, dst, markWord::klass_shift);
5032 }
5033
5034 void MacroAssembler::load_klass(Register dst, Register src) {
5035 if (UseCompactObjectHeaders) {
5036 load_narrow_klass_compact(dst, src);
5037 decode_klass_not_null(dst);
5038 } else if (UseCompressedClassPointers) {
5039 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5040 decode_klass_not_null(dst);
5041 } else {
5042 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5113 }
5114 cmp(klass, tmp);
5115 }
5116
5117 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5118 if (UseCompactObjectHeaders) {
5119 load_narrow_klass_compact(tmp1, obj1);
5120 load_narrow_klass_compact(tmp2, obj2);
5121 cmpw(tmp1, tmp2);
5122 } else if (UseCompressedClassPointers) {
5123 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5124 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5125 cmpw(tmp1, tmp2);
5126 } else {
5127 ldr(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5128 ldr(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5129 cmp(tmp1, tmp2);
5130 }
5131 }
5132
5133 void MacroAssembler::load_prototype_header(Register dst, Register src) {
5134 load_klass(dst, src);
5135 ldr(dst, Address(dst, Klass::prototype_header_offset()));
5136 }
5137
5138 void MacroAssembler::store_klass(Register dst, Register src) {
5139 // FIXME: Should this be a store release? concurrent gcs assumes
5140 // klass length is valid if klass field is not null.
5141 assert(!UseCompactObjectHeaders, "not with compact headers");
5142 if (UseCompressedClassPointers) {
5143 encode_klass_not_null(src);
5144 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5145 } else {
5146 str(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5147 }
5148 }
5149
5150 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5151 assert(!UseCompactObjectHeaders, "not with compact headers");
5152 if (UseCompressedClassPointers) {
5153 // Store to klass gap in destination
5154 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5155 }
5156 }
5157
5518 if (as_raw) {
5519 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5520 } else {
5521 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5522 }
5523 }
5524
5525 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5526 Address dst, Register val,
5527 Register tmp1, Register tmp2, Register tmp3) {
5528 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5529 decorators = AccessInternal::decorator_fixup(decorators, type);
5530 bool as_raw = (decorators & AS_RAW) != 0;
5531 if (as_raw) {
5532 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5533 } else {
5534 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5535 }
5536 }
5537
5538 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5539 Register inline_layout_info) {
5540 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5541 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5542 }
5543
5544 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5545 ldr(offset, Address(inline_klass, InlineKlass::adr_members_offset()));
5546 ldrw(offset, Address(offset, InlineKlass::payload_offset_offset()));
5547 }
5548
5549 void MacroAssembler::payload_address(Register oop, Register data, Register inline_klass) {
5550 // ((address) (void*) o) + vk->payload_offset();
5551 Register offset = (data == oop) ? rscratch1 : data;
5552 payload_offset(inline_klass, offset);
5553 if (data == oop) {
5554 add(data, data, offset);
5555 } else {
5556 lea(data, Address(oop, offset));
5557 }
5558 }
5559
5560 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
5561 Register index, Register data) {
5562 assert_different_registers(array, array_klass, index);
5563 assert_different_registers(rscratch1, array, index);
5564
5565 // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
5566 ldrw(rscratch1, Address(array_klass, Klass::layout_helper_offset()));
5567
5568 // Klass::layout_helper_log2_element_size(lh)
5569 // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
5570 lsr(rscratch1, rscratch1, Klass::_lh_log2_element_size_shift);
5571 andr(rscratch1, rscratch1, Klass::_lh_log2_element_size_mask);
5572 lslv(index, index, rscratch1);
5573
5574 add(data, array, index);
5575 add(data, data, arrayOopDesc::base_offset_in_bytes(T_FLAT_ELEMENT));
5576 }
5577
5578 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5579 Register tmp2, DecoratorSet decorators) {
5580 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5581 }
5582
5583 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5584 Register tmp2, DecoratorSet decorators) {
5585 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5586 }
5587
5588 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5589 Register tmp2, Register tmp3, DecoratorSet decorators) {
5590 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5591 }
5592
5593 // Used for storing nulls.
5594 void MacroAssembler::store_heap_oop_null(Address dst) {
5595 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5596 }
5597
5633 oop_index = oop_recorder()->allocate_metadata_index(obj);
5634 } else {
5635 oop_index = oop_recorder()->find_index(obj);
5636 }
5637 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5638 mov(dst, Address((address)obj, rspec));
5639 }
5640
5641 Address MacroAssembler::constant_oop_address(jobject obj) {
5642 #ifdef ASSERT
5643 {
5644 ThreadInVMfromUnknown tiv;
5645 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5646 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5647 }
5648 #endif
5649 int oop_index = oop_recorder()->find_index(obj);
5650 return Address((address)obj, oop_Relocation::spec(oop_index));
5651 }
5652
5653 // Object / value buffer allocation...
5654 void MacroAssembler::allocate_instance(Register klass, Register new_obj,
5655 Register t1, Register t2,
5656 bool clear_fields, Label& alloc_failed)
5657 {
5658 Label done, initialize_header, initialize_object, slow_case, slow_case_no_pop;
5659 Register layout_size = t1;
5660 assert(new_obj == r0, "needs to be r0");
5661 assert_different_registers(klass, new_obj, t1, t2);
5662
5663 // get instance_size in InstanceKlass (scaled to a count of bytes)
5664 ldrw(layout_size, Address(klass, Klass::layout_helper_offset()));
5665 // test to see if it is malformed in some way
5666 tst(layout_size, Klass::_lh_instance_slow_path_bit);
5667 br(Assembler::NE, slow_case_no_pop);
5668
5669 // Allocate the instance:
5670 // If TLAB is enabled:
5671 // Try to allocate in the TLAB.
5672 // If fails, go to the slow path.
5673 // Initialize the allocation.
5674 // Exit.
5675 //
5676 // Go to slow path.
5677
5678 if (UseTLAB) {
5679 push(klass);
5680 tlab_allocate(new_obj, layout_size, 0, klass, t2, slow_case);
5681 if (ZeroTLAB || (!clear_fields)) {
5682 // the fields have been already cleared
5683 b(initialize_header);
5684 } else {
5685 // initialize both the header and fields
5686 b(initialize_object);
5687 }
5688
5689 if (clear_fields) {
5690 // The object is initialized before the header. If the object size is
5691 // zero, go directly to the header initialization.
5692 bind(initialize_object);
5693 int header_size = oopDesc::header_size() * HeapWordSize;
5694 assert(is_aligned(header_size, BytesPerLong), "oop header size must be 8-byte-aligned");
5695 subs(layout_size, layout_size, header_size);
5696 br(Assembler::EQ, initialize_header);
5697
5698 // Initialize topmost object field, divide size by 8, check if odd and
5699 // test if zero.
5700
5701 #ifdef ASSERT
5702 // make sure instance_size was multiple of 8
5703 Label L;
5704 tst(layout_size, 7);
5705 br(Assembler::EQ, L);
5706 stop("object size is not multiple of 8 - adjust this code");
5707 bind(L);
5708 // must be > 0, no extra check needed here
5709 #endif
5710
5711 lsr(layout_size, layout_size, LogBytesPerLong);
5712
5713 // initialize remaining object fields: instance_size was a multiple of 8
5714 {
5715 Label loop;
5716 Register base = t2;
5717
5718 bind(loop);
5719 add(rscratch1, new_obj, layout_size, Assembler::LSL, LogBytesPerLong);
5720 str(zr, Address(rscratch1, header_size - 1*oopSize));
5721 subs(layout_size, layout_size, 1);
5722 br(Assembler::NE, loop);
5723 }
5724 } // clear_fields
5725
5726 // initialize object header only.
5727 bind(initialize_header);
5728 pop(klass);
5729 Register mark_word = t2;
5730 if (UseCompactObjectHeaders || Arguments::is_valhalla_enabled()) {
5731 ldr(mark_word, Address(klass, Klass::prototype_header_offset()));
5732 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5733 } else {
5734 mov(mark_word, (intptr_t)markWord::prototype().value());
5735 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5736 }
5737 if (!UseCompactObjectHeaders) {
5738 store_klass_gap(new_obj, zr); // zero klass gap for compressed oops
5739 mov(t2, klass); // preserve klass
5740 store_klass(new_obj, t2); // src klass reg is potentially compressed
5741 }
5742 b(done);
5743 }
5744
5745 if (UseTLAB) {
5746 bind(slow_case);
5747 pop(klass);
5748 }
5749 bind(slow_case_no_pop);
5750 b(alloc_failed);
5751
5752 bind(done);
5753 }
5754
5755 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5756 void MacroAssembler::tlab_allocate(Register obj,
5757 Register var_size_in_bytes,
5758 int con_size_in_bytes,
5759 Register t1,
5760 Register t2,
5761 Label& slow_case) {
5762 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5763 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5764 }
5765
5766 void MacroAssembler::verify_tlab() {
5767 #ifdef ASSERT
5768 if (UseTLAB && VerifyOops) {
5769 Label next, ok;
5770
5771 stp(rscratch2, rscratch1, Address(pre(sp, -16)));
5772
5773 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5774 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5775 cmp(rscratch2, rscratch1);
5776 br(Assembler::HS, next);
5777 STOP("assert(top >= start)");
5778 should_not_reach_here();
5779
5780 bind(next);
5781 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5782 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5783 cmp(rscratch2, rscratch1);
5784 br(Assembler::HS, ok);
5785 STOP("assert(top <= end)");
5786 should_not_reach_here();
5787
5788 bind(ok);
5789 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5790 }
5791 #endif
5792 }
5793
5794 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
5795 assert_different_registers(holder_klass, index, layout_info);
5796 InlineLayoutInfo array[2];
5797 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
5798 if (is_power_of_2(size)) {
5799 lsl(index, index, log2i_exact(size)); // Scale index by power of 2
5800 } else {
5801 mov(layout_info, size);
5802 mul(index, index, layout_info); // Scale the index to be the entry index * array_element_size
5803 }
5804 ldr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
5805 add(layout_info, layout_info, Array<InlineLayoutInfo>::base_offset_in_bytes());
5806 lea(layout_info, Address(layout_info, index));
5807 }
5808
5809 // Writes to stack successive pages until offset reached to check for
5810 // stack overflow + shadow pages. This clobbers tmp.
5811 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5812 assert_different_registers(tmp, size, rscratch1);
5813 mov(tmp, sp);
5814 // Bang stack for total size given plus shadow page size.
5815 // Bang one page at a time because large size can bang beyond yellow and
5816 // red zones.
5817 Label loop;
5818 mov(rscratch1, (int)os::vm_page_size());
5819 bind(loop);
5820 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5821 subsw(size, size, rscratch1);
5822 str(size, Address(tmp));
5823 br(Assembler::GT, loop);
5824
5825 // Bang down shadow pages too.
5826 // At this point, (tmp-0) is the last address touched, so don't
5827 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5828 // was post-decremented.) Skip this address by starting at i=1, and
5875 } else {
5876 uint64_t target = (uint64_t)dest.target();
5877 uint64_t adrp_target
5878 = (target & 0xffffffffULL) | ((uint64_t)pc() & 0xffff00000000ULL);
5879
5880 _adrp(reg1, (address)adrp_target);
5881 movk(reg1, target >> 32, 32);
5882 }
5883 byte_offset = (uint64_t)dest.target() & 0xfff;
5884 }
5885
5886 void MacroAssembler::load_byte_map_base(Register reg) {
5887 CardTable::CardValue* byte_map_base =
5888 ((CardTableBarrierSet*)(BarrierSet::barrier_set()))->card_table()->byte_map_base();
5889
5890 // Strictly speaking the byte_map_base isn't an address at all, and it might
5891 // even be negative. It is thus materialised as a constant.
5892 mov(reg, (uint64_t)byte_map_base);
5893 }
5894
5895 #ifdef ASSERT
5896 void MacroAssembler::build_frame(int framesize) {
5897 build_frame(framesize, false);
5898 }
5899 #endif
5900
5901 void MacroAssembler::build_frame(int framesize DEBUG_ONLY(COMMA bool zap_rfp_lr_spills)) {
5902 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5903 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5904 protect_return_address();
5905 if (framesize < ((1 << 9) + 2 * wordSize)) {
5906 sub(sp, sp, framesize);
5907 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
5908 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
5909 stp(rscratch1, rscratch1, Address(sp, framesize - 2 * wordSize));
5910 } else {
5911 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5912 }
5913 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5914 } else {
5915 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
5916 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
5917 stp(rscratch1, rscratch1, Address(pre(sp, -2 * wordSize)));
5918 } else {
5919 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5920 }
5921 if (PreserveFramePointer) mov(rfp, sp);
5922 if (framesize < ((1 << 12) + 2 * wordSize))
5923 sub(sp, sp, framesize - 2 * wordSize);
5924 else {
5925 mov(rscratch1, framesize - 2 * wordSize);
5926 sub(sp, sp, rscratch1);
5927 }
5928 }
5929 verify_cross_modify_fence_not_required();
5930 }
5931
5932 void MacroAssembler::remove_frame(int framesize) {
5933 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5934 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5935 if (framesize < ((1 << 9) + 2 * wordSize)) {
5936 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5937 add(sp, sp, framesize);
5938 } else {
5939 if (framesize < ((1 << 12) + 2 * wordSize))
5940 add(sp, sp, framesize - 2 * wordSize);
5941 else {
5942 mov(rscratch1, framesize - 2 * wordSize);
5943 add(sp, sp, rscratch1);
5944 }
5945 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5946 }
5947 authenticate_return_address();
5948 }
5949
5950 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
5951 if (needs_stack_repair) {
5952 // The method has a scalarized entry point (where fields of value object arguments
5953 // are passed through registers and stack), and a non-scalarized entry point (where
5954 // value object arguments are given as oops). The non-scalarized entry point will
5955 // first load each field of value object arguments and store them in registers and on
5956 // the stack in a way compatible with the scalarized entry point. To do so, some extra
5957 // stack space might be reserved (if argument registers are not enough). On leaving the
5958 // method, this space must be freed.
5959 //
5960 // In case we used the non-scalarized entry point the stack looks like this:
5961 //
5962 // | Arguments from caller |
5963 // |---------------------------| <-- caller's SP
5964 // | Saved LR #1 |
5965 // | Saved FP #1 |
5966 // |---------------------------|
5967 // | Extension space for |
5968 // | inline arg (un)packing |
5969 // |---------------------------| <-- start of this method's frame
5970 // | Saved LR #2 |
5971 // | Saved FP #2 |
5972 // |---------------------------| <-- FP
5973 // | sp_inc |
5974 // | method locals |
5975 // |---------------------------| <-- SP
5976 //
5977 // There are two copies of FP and LR on the stack. They will be identical at
5978 // first, but that can change.
5979 // If the caller has been deoptimized, LR #1 will be patched to point at the
5980 // deopt blob, and LR #2 will still point into the old method.
5981 // If the saved FP (x29) was not used as the frame pointer, but to store an
5982 // oop, the GC will be aware only of FP #1 as the spilled location of x29 and
5983 // will fix only this one. Overall, FP/LR #2 are not reliable and are simply
5984 // needed to add space between the extension space and the locals, as there
5985 // would be between the real arguments and the locals if we don't need to
5986 // do unpacking (from the scalarized entry point).
5987 //
5988 // When restoring, one must then load FP #1 into x29, and LR #1 into x30,
5989 // while keeping in mind that from the scalarized entry point, there will be
5990 // only one copy of each. Indeed, in the case we used the scalarized calling
5991 // convention, the stack looks like this:
5992 //
5993 // | Arguments from caller |
5994 // |---------------------------| <-- caller's SP / start of this method's frame
5995 // | Saved LR |
5996 // | Saved FP |
5997 // |---------------------------| <-- FP
5998 // | sp_inc |
5999 // | method locals |
6000 // |---------------------------| <-- SP
6001 //
6002 // The sp_inc stack slot holds the total size of the frame including the
6003 // extension space minus two words for the saved FP and LR. That is how to
6004 // find FP/LR #1. This size is expressed in bytes. Be careful when using it
6005 // from C++ in pointer arithmetic; you might need to divide it by wordSize.
6006 //
6007 // One can find sp_inc since the start the method's frame is SP + initial_framesize.
6008
6009 int sp_inc_offset = initial_framesize - 3 * wordSize; // Immediately below saved LR and FP
6010
6011 ldr(rscratch1, Address(sp, sp_inc_offset));
6012 add(sp, sp, rscratch1);
6013 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6014 } else {
6015 remove_frame(initial_framesize);
6016 }
6017 }
6018
6019 void MacroAssembler::save_stack_increment(int sp_inc, int frame_size) {
6020 int real_frame_size = frame_size + sp_inc;
6021 assert(sp_inc == 0 || sp_inc > 2*wordSize, "invalid sp_inc value");
6022 assert(real_frame_size >= 2*wordSize, "frame size must include FP/LR space");
6023 assert((real_frame_size & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6024
6025 int sp_inc_offset = frame_size - 3 * wordSize; // Immediately below saved LR and FP
6026
6027 // Subtract two words for the saved FP and LR as these will be popped
6028 // separately. See remove_frame above.
6029 mov(rscratch1, real_frame_size - 2*wordSize);
6030 str(rscratch1, Address(sp, sp_inc_offset));
6031 }
6032
6033 // This method counts leading positive bytes (highest bit not set) in provided byte array
6034 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
6035 // Simple and most common case of aligned small array which is not at the
6036 // end of memory page is placed here. All other cases are in stub.
6037 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
6038 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
6039 assert_different_registers(ary1, len, result);
6040
6041 mov(result, len);
6042 cmpw(len, 0);
6043 br(LE, DONE);
6044 cmpw(len, 4 * wordSize);
6045 br(GE, STUB_LONG); // size > 32 then go to stub
6046
6047 int shift = 64 - exact_log2(os::vm_page_size());
6048 lsl(rscratch1, ary1, shift);
6049 mov(rscratch2, (size_t)(4 * wordSize) << shift);
6050 adds(rscratch2, rscratch1, rscratch2); // At end of page?
6051 br(CS, STUB); // at the end of page then go to stub
6925 // On other systems, the helper is a usual C function.
6926 //
6927 void MacroAssembler::get_thread(Register dst) {
6928 RegSet saved_regs =
6929 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
6930 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
6931
6932 protect_return_address();
6933 push(saved_regs, sp);
6934
6935 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6936 blr(lr);
6937 if (dst != c_rarg0) {
6938 mov(dst, c_rarg0);
6939 }
6940
6941 pop(saved_regs, sp);
6942 authenticate_return_address();
6943 }
6944
6945 #ifdef COMPILER2
6946 // C2 compiled method's prolog code
6947 // Moved here from aarch64.ad to support Valhalla code belows
6948 void MacroAssembler::verified_entry(Compile* C, int sp_inc) {
6949 if (C->clinit_barrier_on_entry()) {
6950 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
6951
6952 Label L_skip_barrier;
6953
6954 mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
6955 clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
6956 far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
6957 bind(L_skip_barrier);
6958 }
6959
6960 if (C->max_vector_size() > 0) {
6961 reinitialize_ptrue();
6962 }
6963
6964 int bangsize = C->output()->bang_size_in_bytes();
6965 if (C->output()->need_stack_bang(bangsize))
6966 generate_stack_overflow_check(bangsize);
6967
6968 // n.b. frame size includes space for return pc and rfp
6969 const long framesize = C->output()->frame_size_in_bytes();
6970 build_frame(framesize DEBUG_ONLY(COMMA sp_inc != 0));
6971
6972 if (C->needs_stack_repair()) {
6973 save_stack_increment(sp_inc, framesize);
6974 }
6975
6976 if (VerifyStackAtCalls) {
6977 Unimplemented();
6978 }
6979 }
6980 #endif // COMPILER2
6981
6982 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
6983 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
6984 // An inline type might be returned. If fields are in registers we
6985 // need to allocate an inline type instance and initialize it with
6986 // the value of the fields.
6987 Label skip;
6988 // We only need a new buffered inline type if a new one is not returned
6989 tbz(r0, 0, skip);
6990 int call_offset = -1;
6991
6992 // Be careful not to clobber r1-7 which hold returned fields
6993 // Also do not use callee-saved registers as these may be live in the interpreter
6994 Register tmp1 = r13, tmp2 = r14, klass = r15, r0_preserved = r12;
6995
6996 // The following code is similar to allocate_instance but has some slight differences,
6997 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
6998 // allocating is not necessary if vk != nullptr, etc. allocate_instance is not aware of these.
6999 Label slow_case;
7000 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
7001 mov(r0_preserved, r0); // save r0 for slow_case since *_allocate may corrupt it when allocation failed
7002
7003 if (vk != nullptr) {
7004 // Called from C1, where the return type is statically known.
7005 movptr(klass, (intptr_t)vk->get_InlineKlass());
7006 jint lh = vk->layout_helper();
7007 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
7008 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
7009 tlab_allocate(r0, noreg, lh, tmp1, tmp2, slow_case);
7010 } else {
7011 b(slow_case);
7012 }
7013 } else {
7014 // Call from interpreter. R0 contains ((the InlineKlass* of the return type) | 0x01)
7015 andr(klass, r0, -2);
7016 if (UseTLAB) {
7017 ldrw(tmp2, Address(klass, Klass::layout_helper_offset()));
7018 tst(tmp2, Klass::_lh_instance_slow_path_bit);
7019 br(Assembler::NE, slow_case);
7020 tlab_allocate(r0, tmp2, 0, tmp1, tmp2, slow_case);
7021 } else {
7022 b(slow_case);
7023 }
7024 }
7025 if (UseTLAB) {
7026 // 2. Initialize buffered inline instance header
7027 Register buffer_obj = r0;
7028 if (UseCompactObjectHeaders) {
7029 ldr(rscratch1, Address(klass, Klass::prototype_header_offset()));
7030 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7031 } else {
7032 mov(rscratch1, (intptr_t)markWord::inline_type_prototype().value());
7033 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7034 store_klass_gap(buffer_obj, zr);
7035 if (vk == nullptr) {
7036 // store_klass corrupts klass, so save it for later use (interpreter case only).
7037 mov(tmp1, klass);
7038 }
7039 store_klass(buffer_obj, klass);
7040 klass = tmp1;
7041 }
7042 // 3. Initialize its fields with an inline class specific handler
7043 if (vk != nullptr) {
7044 far_call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
7045 } else {
7046 ldr(tmp1, Address(klass, InlineKlass::adr_members_offset()));
7047 ldr(tmp1, Address(tmp1, InlineKlass::pack_handler_offset()));
7048 blr(tmp1);
7049 }
7050
7051 membar(Assembler::StoreStore);
7052 b(skip);
7053 } else {
7054 // Must have already branched to slow_case above.
7055 DEBUG_ONLY(should_not_reach_here());
7056 }
7057 bind(slow_case);
7058 // We failed to allocate a new inline type, fall back to a runtime
7059 // call. Some oop field may be live in some registers but we can't
7060 // tell. That runtime call will take care of preserving them
7061 // across a GC if there's one.
7062 mov(r0, r0_preserved);
7063
7064 if (from_interpreter) {
7065 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
7066 } else {
7067 far_call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
7068 call_offset = offset();
7069 }
7070 membar(Assembler::StoreStore);
7071
7072 bind(skip);
7073 return call_offset;
7074 }
7075
7076 // Move a value between registers/stack slots and update the reg_state
7077 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
7078 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
7079 if (reg_state[to->value()] == reg_written) {
7080 return true; // Already written
7081 }
7082
7083 if (from != to && bt != T_VOID) {
7084 if (reg_state[to->value()] == reg_readonly) {
7085 return false; // Not yet writable
7086 }
7087 if (from->is_reg()) {
7088 if (to->is_reg()) {
7089 if (from->is_Register() && to->is_Register()) {
7090 mov(to->as_Register(), from->as_Register());
7091 } else if (from->is_FloatRegister() && to->is_FloatRegister()) {
7092 fmovd(to->as_FloatRegister(), from->as_FloatRegister());
7093 } else {
7094 ShouldNotReachHere();
7095 }
7096 } else {
7097 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7098 Address to_addr = Address(sp, st_off);
7099 if (from->is_FloatRegister()) {
7100 if (bt == T_DOUBLE) {
7101 strd(from->as_FloatRegister(), to_addr);
7102 } else {
7103 assert(bt == T_FLOAT, "must be float");
7104 strs(from->as_FloatRegister(), to_addr);
7105 }
7106 } else {
7107 str(from->as_Register(), to_addr);
7108 }
7109 }
7110 } else {
7111 Address from_addr = Address(sp, from->reg2stack() * VMRegImpl::stack_slot_size);
7112 if (to->is_reg()) {
7113 if (to->is_FloatRegister()) {
7114 if (bt == T_DOUBLE) {
7115 ldrd(to->as_FloatRegister(), from_addr);
7116 } else {
7117 assert(bt == T_FLOAT, "must be float");
7118 ldrs(to->as_FloatRegister(), from_addr);
7119 }
7120 } else {
7121 ldr(to->as_Register(), from_addr);
7122 }
7123 } else {
7124 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7125 ldr(rscratch1, from_addr);
7126 str(rscratch1, Address(sp, st_off));
7127 }
7128 }
7129 }
7130
7131 // Update register states
7132 reg_state[from->value()] = reg_writable;
7133 reg_state[to->value()] = reg_written;
7134 return true;
7135 }
7136
7137 // Calculate the extra stack space required for packing or unpacking inline
7138 // args and adjust the stack pointer
7139 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
7140 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
7141 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
7142 assert(sp_inc > 0, "sanity");
7143
7144 // Save a copy of the FP and LR here for deoptimization patching and frame walking
7145 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
7146
7147 // Adjust the stack pointer. This will be repaired on return by MacroAssembler::remove_frame
7148 if (sp_inc < (1 << 9)) {
7149 sub(sp, sp, sp_inc); // Fits in an immediate
7150 } else {
7151 mov(rscratch1, sp_inc);
7152 sub(sp, sp, rscratch1);
7153 }
7154
7155 return sp_inc + 2 * wordSize; // Account for the FP/LR space
7156 }
7157
7158 // Read all fields from an inline type oop and store the values in registers/stack slots
7159 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
7160 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
7161 RegState reg_state[]) {
7162 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
7163 assert(from->is_valid(), "source must be valid");
7164 bool progress = false;
7165 #ifdef ASSERT
7166 const int start_offset = offset();
7167 #endif
7168
7169 Label L_null, L_notNull;
7170 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
7171 Register tmp1 = r10;
7172 Register tmp2 = r11;
7173
7174 #ifndef ASSERT
7175 RegSet clobbered_gp_regs = MacroAssembler::call_clobbered_gp_registers();
7176 assert(clobbered_gp_regs.contains(tmp1), "tmp1 must be saved explicitly if it's not a clobber");
7177 assert(clobbered_gp_regs.contains(tmp2), "tmp2 must be saved explicitly if it's not a clobber");
7178 assert(clobbered_gp_regs.contains(r14), "r14 must be saved explicitly if it's not a clobber");
7179 #endif
7180
7181 Register fromReg = noreg;
7182 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
7183 bool done = true;
7184 bool mark_done = true;
7185 VMReg toReg;
7186 BasicType bt;
7187 // Check if argument requires a null check
7188 bool null_check = false;
7189 VMReg nullCheckReg;
7190 while (stream.next(nullCheckReg, bt)) {
7191 if (sig->at(stream.sig_index())._offset == -1) {
7192 null_check = true;
7193 break;
7194 }
7195 }
7196 stream.reset(sig_index, to_index);
7197 while (stream.next(toReg, bt)) {
7198 assert(toReg->is_valid(), "destination must be valid");
7199 int idx = (int)toReg->value();
7200 if (reg_state[idx] == reg_readonly) {
7201 if (idx != from->value()) {
7202 mark_done = false;
7203 }
7204 done = false;
7205 continue;
7206 } else if (reg_state[idx] == reg_written) {
7207 continue;
7208 }
7209 assert(reg_state[idx] == reg_writable, "must be writable");
7210 reg_state[idx] = reg_written;
7211 progress = true;
7212
7213 if (fromReg == noreg) {
7214 if (from->is_reg()) {
7215 fromReg = from->as_Register();
7216 } else {
7217 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size;
7218 ldr(tmp1, Address(sp, st_off));
7219 fromReg = tmp1;
7220 }
7221 if (null_check) {
7222 // Nullable inline type argument, emit null check
7223 cbz(fromReg, L_null);
7224 }
7225 }
7226 int off = sig->at(stream.sig_index())._offset;
7227 if (off == -1) {
7228 assert(null_check, "Missing null check at");
7229 if (toReg->is_stack()) {
7230 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7231 mov(tmp2, 1);
7232 str(tmp2, Address(sp, st_off));
7233 } else {
7234 mov(toReg->as_Register(), 1);
7235 }
7236 continue;
7237 }
7238 assert(off > 0, "offset in object should be positive");
7239 Address fromAddr = Address(fromReg, off);
7240 if (!toReg->is_FloatRegister()) {
7241 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
7242 if (is_reference_type(bt)) {
7243 load_heap_oop(dst, fromAddr, rscratch1, rscratch2);
7244 } else {
7245 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
7246 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
7247 }
7248 if (toReg->is_stack()) {
7249 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7250 str(dst, Address(sp, st_off));
7251 }
7252 } else if (bt == T_DOUBLE) {
7253 ldrd(toReg->as_FloatRegister(), fromAddr);
7254 } else {
7255 assert(bt == T_FLOAT, "must be float");
7256 ldrs(toReg->as_FloatRegister(), fromAddr);
7257 }
7258 }
7259 if (progress && null_check) {
7260 if (done) {
7261 b(L_notNull);
7262 bind(L_null);
7263 // Set null marker to zero to signal that the argument is null.
7264 // Also set all oop fields to zero to make the GC happy.
7265 stream.reset(sig_index, to_index);
7266 while (stream.next(toReg, bt)) {
7267 if (sig->at(stream.sig_index())._offset == -1 ||
7268 bt == T_OBJECT || bt == T_ARRAY) {
7269 if (toReg->is_stack()) {
7270 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7271 str(zr, Address(sp, st_off));
7272 } else {
7273 mov(toReg->as_Register(), zr);
7274 }
7275 }
7276 }
7277 bind(L_notNull);
7278 } else {
7279 bind(L_null);
7280 }
7281 }
7282
7283 sig_index = stream.sig_index();
7284 to_index = stream.regs_index();
7285
7286 if (mark_done && reg_state[from->value()] != reg_written) {
7287 // This is okay because no one else will write to that slot
7288 reg_state[from->value()] = reg_writable;
7289 }
7290 from_index--;
7291 assert(progress || (start_offset == offset()), "should not emit code");
7292 return done;
7293 }
7294
7295 // Pack fields back into an inline type oop
7296 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
7297 VMRegPair* from, int from_count, int& from_index, VMReg to,
7298 RegState reg_state[], Register val_array) {
7299 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
7300 assert(to->is_valid(), "destination must be valid");
7301
7302 if (reg_state[to->value()] == reg_written) {
7303 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7304 return true; // Already written
7305 }
7306
7307 // The GC barrier expanded by store_heap_oop below may call into the
7308 // runtime so use callee-saved registers for any values that need to be
7309 // preserved. The GC barrier assembler should take care of saving the
7310 // Java argument registers.
7311 // TODO 8284443 Isn't it an issue if below code uses r14 as tmp when it contains a spilled value?
7312 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
7313 Register val_obj_tmp = r21;
7314 Register from_reg_tmp = r22;
7315 Register tmp1 = r14;
7316 Register tmp2 = r13;
7317 Register tmp3 = r12;
7318 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
7319
7320 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
7321
7322 if (reg_state[to->value()] == reg_readonly) {
7323 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
7324 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7325 return false; // Not yet writable
7326 }
7327 val_obj = val_obj_tmp;
7328 }
7329
7330 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
7331 load_heap_oop(val_obj, Address(val_array, index), tmp1, tmp2);
7332
7333 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
7334 VMReg fromReg;
7335 BasicType bt;
7336 Label L_null;
7337 while (stream.next(fromReg, bt)) {
7338 assert(fromReg->is_valid(), "source must be valid");
7339 reg_state[fromReg->value()] = reg_writable;
7340
7341 int off = sig->at(stream.sig_index())._offset;
7342 if (off == -1) {
7343 // Nullable inline type argument, emit null check
7344 Label L_notNull;
7345 if (fromReg->is_stack()) {
7346 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7347 ldrb(tmp2, Address(sp, ld_off));
7348 cbnz(tmp2, L_notNull);
7349 } else {
7350 cbnz(fromReg->as_Register(), L_notNull);
7351 }
7352 mov(val_obj, 0);
7353 b(L_null);
7354 bind(L_notNull);
7355 continue;
7356 }
7357
7358 assert(off > 0, "offset in object should be positive");
7359 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
7360
7361 // Pack the scalarized field into the value object.
7362 Address dst(val_obj, off);
7363 if (!fromReg->is_FloatRegister()) {
7364 Register src;
7365 if (fromReg->is_stack()) {
7366 src = from_reg_tmp;
7367 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7368 load_sized_value(src, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
7369 } else {
7370 src = fromReg->as_Register();
7371 }
7372 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
7373 if (is_reference_type(bt)) {
7374 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep val_obj valid.
7375 mov(tmp3, val_obj);
7376 Address dst_with_tmp3(tmp3, off);
7377 store_heap_oop(dst_with_tmp3, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
7378 } else {
7379 store_sized_value(dst, src, size_in_bytes);
7380 }
7381 } else if (bt == T_DOUBLE) {
7382 strd(fromReg->as_FloatRegister(), dst);
7383 } else {
7384 assert(bt == T_FLOAT, "must be float");
7385 strs(fromReg->as_FloatRegister(), dst);
7386 }
7387 }
7388 bind(L_null);
7389 sig_index = stream.sig_index();
7390 from_index = stream.regs_index();
7391
7392 assert(reg_state[to->value()] == reg_writable, "must have already been read");
7393 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
7394 assert(success, "to register must be writeable");
7395 return true;
7396 }
7397
7398 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
7399 return (reg->is_FloatRegister()) ? v8->as_VMReg() : r14->as_VMReg();
7400 }
7401
7402 void MacroAssembler::cache_wb(Address line) {
7403 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
7404 assert(line.index() == noreg, "index should be noreg");
7405 assert(line.offset() == 0, "offset should be 0");
7406 // would like to assert this
7407 // assert(line._ext.shift == 0, "shift should be zero");
7408 if (VM_Version::supports_dcpop()) {
7409 // writeback using clear virtual address to point of persistence
7410 dc(Assembler::CVAP, line.base());
7411 } else {
7412 // no need to generate anything as Unsafe.writebackMemory should
7413 // never invoke this stub
7414 }
7415 }
7416
7417 void MacroAssembler::cache_wbsync(bool is_pre) {
7418 // we only need a barrier post sync
7419 if (!is_pre) {
7420 membar(Assembler::AnyAny);
7421 }
7792 }
7793
7794 // Check if the lock-stack is full.
7795 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7796 cmpw(top, (unsigned)LockStack::end_offset());
7797 br(Assembler::GE, slow);
7798
7799 // Check for recursion.
7800 subw(t, top, oopSize);
7801 ldr(t, Address(rthread, t));
7802 cmp(obj, t);
7803 br(Assembler::EQ, push);
7804
7805 // Check header for monitor (0b10).
7806 tst(mark, markWord::monitor_value);
7807 br(Assembler::NE, slow);
7808
7809 // Try to lock. Transition lock bits 0b01 => 0b00
7810 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7811 orr(mark, mark, markWord::unlocked_value);
7812 // Mask inline_type bit such that we go to the slow path if object is an inline type
7813 andr(mark, mark, ~((int) markWord::inline_type_bit_in_place));
7814
7815 eor(t, mark, markWord::unlocked_value);
7816 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7817 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7818 br(Assembler::NE, slow);
7819
7820 bind(push);
7821 // After successful lock, push object on lock-stack.
7822 str(obj, Address(rthread, top));
7823 addw(top, top, oopSize);
7824 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7825 }
7826
7827 // Implements fast-unlocking.
7828 //
7829 // - obj: the object to be unlocked
7830 // - t1, t2, t3: temporary registers
7831 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7832 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7833 // cmpxchg clobbers rscratch1.
7834 assert_different_registers(obj, t1, t2, t3, rscratch1);
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