10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "cds/archiveBuilder.hpp"
29 #include "ci/ciEnv.hpp"
30 #include "code/compiledIC.hpp"
31 #include "compiler/compileTask.hpp"
32 #include "compiler/disassembler.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "gc/shared/cardTableBarrierSet.hpp"
37 #include "gc/shared/cardTable.hpp"
38 #include "gc/shared/collectedHeap.hpp"
39 #include "gc/shared/tlab_globals.hpp"
40 #include "interpreter/bytecodeHistogram.hpp"
41 #include "interpreter/interpreter.hpp"
42 #include "interpreter/interpreterRuntime.hpp"
43 #include "jvm.h"
44 #include "memory/resourceArea.hpp"
45 #include "memory/universe.hpp"
46 #include "nativeInst_aarch64.hpp"
47 #include "oops/accessDecorators.hpp"
48 #include "oops/compressedKlass.inline.hpp"
49 #include "oops/compressedOops.inline.hpp"
50 #include "oops/klass.inline.hpp"
51 #include "runtime/continuation.hpp"
52 #include "runtime/icache.hpp"
53 #include "runtime/interfaceSupport.inline.hpp"
54 #include "runtime/javaThread.hpp"
55 #include "runtime/jniHandles.inline.hpp"
56 #include "runtime/sharedRuntime.hpp"
57 #include "runtime/stubRoutines.hpp"
58 #include "utilities/globalDefinitions.hpp"
59 #include "utilities/integerCast.hpp"
60 #include "utilities/powerOfTwo.hpp"
61 #ifdef COMPILER1
62 #include "c1/c1_LIRAssembler.hpp"
63 #endif
64 #ifdef COMPILER2
65 #include "oops/oop.hpp"
66 #include "opto/compile.hpp"
67 #include "opto/node.hpp"
68 #include "opto/output.hpp"
69 #endif
70
71 #include <sys/types.h>
72
73 #ifdef PRODUCT
74 #define BLOCK_COMMENT(str) /* nothing */
75 #else
76 #define BLOCK_COMMENT(str) block_comment(str)
77 #endif
78 #define STOP(str) stop(str);
79 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
80
1990 ldarb(scratch, scratch);
1991 cmp(scratch, InstanceKlass::fully_initialized);
1992 br(Assembler::EQ, *L_fast_path);
1993
1994 // Fast path check: current thread is initializer thread
1995 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
1996 cmp(rthread, scratch);
1997
1998 if (L_slow_path == &L_fallthrough) {
1999 br(Assembler::EQ, *L_fast_path);
2000 bind(*L_slow_path);
2001 } else if (L_fast_path == &L_fallthrough) {
2002 br(Assembler::NE, *L_slow_path);
2003 bind(*L_fast_path);
2004 } else {
2005 Unimplemented();
2006 }
2007 }
2008
2009 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2010 if (!VerifyOops) return;
2011
2012 // Pass register number to verify_oop_subroutine
2013 const char* b = nullptr;
2014 {
2015 ResourceMark rm;
2016 stringStream ss;
2017 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2018 b = code_string(ss.as_string());
2019 }
2020 BLOCK_COMMENT("verify_oop {");
2021
2022 strip_return_address(); // This might happen within a stack frame.
2023 protect_return_address();
2024 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2025 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2026
2027 mov(r0, reg);
2028 movptr(rscratch1, (uintptr_t)(address)b);
2029
2030 // call indirectly to solve generation ordering problem
2031 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2032 ldr(rscratch2, Address(rscratch2));
2033 blr(rscratch2);
2034
2035 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2036 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2037 authenticate_return_address();
2038
2039 BLOCK_COMMENT("} verify_oop");
2040 }
2041
2042 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2043 if (!VerifyOops) return;
2044
2045 const char* b = nullptr;
2046 {
2047 ResourceMark rm;
2048 stringStream ss;
2049 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2050 b = code_string(ss.as_string());
2051 }
2052 BLOCK_COMMENT("verify_oop_addr {");
2053
2054 strip_return_address(); // This might happen within a stack frame.
2055 protect_return_address();
2056 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2057 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2058
2059 // addr may contain sp so we will have to adjust it based on the
2060 // pushes that we just did.
2061 if (addr.uses(sp)) {
2062 lea(r0, addr);
2063 ldr(r0, Address(r0, 4 * wordSize));
2272 call_VM_leaf_base(entry_point, 1);
2273 }
2274
2275 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2276 assert_different_registers(arg_1, c_rarg0);
2277 pass_arg0(this, arg_0);
2278 pass_arg1(this, arg_1);
2279 call_VM_leaf_base(entry_point, 2);
2280 }
2281
2282 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2283 Register arg_1, Register arg_2) {
2284 assert_different_registers(arg_1, c_rarg0);
2285 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2286 pass_arg0(this, arg_0);
2287 pass_arg1(this, arg_1);
2288 pass_arg2(this, arg_2);
2289 call_VM_leaf_base(entry_point, 3);
2290 }
2291
2292 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2293 pass_arg0(this, arg_0);
2294 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2295 }
2296
2297 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2298
2299 assert_different_registers(arg_0, c_rarg1);
2300 pass_arg1(this, arg_1);
2301 pass_arg0(this, arg_0);
2302 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2303 }
2304
2305 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2306 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2307 assert_different_registers(arg_1, c_rarg2);
2308 pass_arg2(this, arg_2);
2309 pass_arg1(this, arg_1);
2310 pass_arg0(this, arg_0);
2311 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2317 assert_different_registers(arg_2, c_rarg3);
2318 pass_arg3(this, arg_3);
2319 pass_arg2(this, arg_2);
2320 pass_arg1(this, arg_1);
2321 pass_arg0(this, arg_0);
2322 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2323 }
2324
2325 void MacroAssembler::null_check(Register reg, int offset) {
2326 if (needs_explicit_null_check(offset)) {
2327 // provoke OS null exception if reg is null by
2328 // accessing M[reg] w/o changing any registers
2329 // NOTE: this is plenty to provoke a segv
2330 ldr(zr, Address(reg));
2331 } else {
2332 // nothing to do, (later) access of M[reg + offset]
2333 // will provoke OS null exception if reg is null
2334 }
2335 }
2336
2337 // MacroAssembler protected routines needed to implement
2338 // public methods
2339
2340 void MacroAssembler::mov(Register r, Address dest) {
2341 code_section()->relocate(pc(), dest.rspec());
2342 uint64_t imm64 = (uint64_t)dest.target();
2343 movptr(r, imm64);
2344 }
2345
2346 // Move a constant pointer into r. In AArch64 mode the virtual
2347 // address space is 48 bits in size, so we only need three
2348 // instructions to create a patchable instruction sequence that can
2349 // reach anywhere.
2350 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2351 #ifndef PRODUCT
2352 {
2353 char buffer[64];
2354 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2355 block_comment(buffer);
2356 }
5079 adrp(rscratch1, src2, offset);
5080 ldr(rscratch1, Address(rscratch1, offset));
5081 cmp(src1, rscratch1);
5082 }
5083
5084 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5085 cmp(obj1, obj2);
5086 }
5087
5088 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5089 load_method_holder(rresult, rmethod);
5090 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5091 }
5092
5093 void MacroAssembler::load_method_holder(Register holder, Register method) {
5094 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5095 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5096 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5097 }
5098
5099 // Loads the obj's narrow Klass from a compact object header (+COH) into dst.
5100 // Preserves all registers (incl src, rscratch1 and rscratch2).
5101 // Input:
5102 // src - the oop we want to load the klass from.
5103 // dst - output narrow klass.
5104 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5105 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5106 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5107 lsr(dst, dst, markWord::klass_shift);
5108 }
5109
5110 // Loads the obj's narrow Klass from any header (compact or not) into dst.
5111 void MacroAssembler::load_narrow_klass(Register dst, Register src) {
5112 if (UseCompactObjectHeaders) {
5113 load_narrow_klass_compact(dst, src);
5114 } else {
5115 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5116 }
5117 }
5118
5175 } else {
5176 ldrw(tmp, Address(obj, oopDesc::klass_offset_in_bytes()));
5177 }
5178 if (CompressedKlassPointers::base() == nullptr) {
5179 cmp(klass, tmp, LSL, CompressedKlassPointers::shift());
5180 return;
5181 } else if (!AOTCodeCache::is_on_for_dump() &&
5182 ((uint64_t)CompressedKlassPointers::base() & 0xffffffff) == 0
5183 && CompressedKlassPointers::shift() == 0) {
5184 // Only the bottom 32 bits matter
5185 cmpw(klass, tmp);
5186 return;
5187 }
5188 decode_klass_not_null(tmp, tmp, tmp2);
5189 cmp(klass, tmp);
5190 }
5191
5192 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5193 if (UseCompactObjectHeaders) {
5194 load_narrow_klass_compact(tmp1, obj1);
5195 load_narrow_klass_compact(tmp2, obj2);
5196 } else {
5197 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5198 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5199 }
5200 cmpw(tmp1, tmp2);
5201 }
5202
5203 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
5204 // FIXME: Should this be a store release? concurrent gcs assumes
5205 // klass length is valid if klass field is not null.
5206 assert(!UseCompactObjectHeaders, "not with compact headers");
5207 encode_klass_not_null(src, src, tmp);
5208 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5209 }
5210
5211 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5212 assert(!UseCompactObjectHeaders, "not with compact headers");
5213 // Store to klass gap in destination
5214 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5215 }
5216
5217 // Algorithm must match CompressedOops::encode.
5218 void MacroAssembler::encode_heap_oop(Register d, Register s) {
5219 #ifdef ASSERT
5220 verify_heapbase("MacroAssembler::encode_heap_oop: heap base corrupted?");
5221 #endif
5222 verify_oop_msg(s, "broken oop in encode_heap_oop");
5554 if (as_raw) {
5555 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5556 } else {
5557 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5558 }
5559 }
5560
5561 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5562 Address dst, Register val,
5563 Register tmp1, Register tmp2, Register tmp3) {
5564 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5565 decorators = AccessInternal::decorator_fixup(decorators, type);
5566 bool as_raw = (decorators & AS_RAW) != 0;
5567 if (as_raw) {
5568 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5569 } else {
5570 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5571 }
5572 }
5573
5574 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5575 Register tmp2, DecoratorSet decorators) {
5576 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5577 }
5578
5579 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5580 Register tmp2, DecoratorSet decorators) {
5581 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5582 }
5583
5584 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5585 Register tmp2, Register tmp3, DecoratorSet decorators) {
5586 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5587 }
5588
5589 // Used for storing nulls.
5590 void MacroAssembler::store_heap_oop_null(Address dst) {
5591 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5592 }
5593
5668 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5669 cmp(rscratch2, rscratch1);
5670 br(Assembler::HS, next);
5671 STOP("assert(top >= start)");
5672 should_not_reach_here();
5673
5674 bind(next);
5675 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5676 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5677 cmp(rscratch2, rscratch1);
5678 br(Assembler::HS, ok);
5679 STOP("assert(top <= end)");
5680 should_not_reach_here();
5681
5682 bind(ok);
5683 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5684 }
5685 #endif
5686 }
5687
5688 // Writes to stack successive pages until offset reached to check for
5689 // stack overflow + shadow pages. This clobbers tmp.
5690 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5691 assert_different_registers(tmp, size, rscratch1);
5692 mov(tmp, sp);
5693 // Bang stack for total size given plus shadow page size.
5694 // Bang one page at a time because large size can bang beyond yellow and
5695 // red zones.
5696 Label loop;
5697 mov(rscratch1, (int)os::vm_page_size());
5698 bind(loop);
5699 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5700 subsw(size, size, rscratch1);
5701 str(size, Address(tmp));
5702 br(Assembler::GT, loop);
5703
5704 // Bang down shadow pages too.
5705 // At this point, (tmp-0) is the last address touched, so don't
5706 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5707 // was post-decremented.) Skip this address by starting at i=1, and
5774
5775 // Strictly speaking the card table base isn't an address at all, and it might
5776 // even be negative. It is thus materialised as a constant.
5777 mov(reg, (uint64_t)ctbs->card_table_base_const());
5778 }
5779
5780 void MacroAssembler::load_aotrc_address(Register reg, address a) {
5781 #if INCLUDE_CDS
5782 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
5783 if (AOTCodeCache::is_on_for_dump()) {
5784 // all aotrc field addresses should be registered in the AOTCodeCache address table
5785 lea(reg, ExternalAddress(a));
5786 } else {
5787 mov(reg, (uint64_t)a);
5788 }
5789 #else
5790 ShouldNotReachHere();
5791 #endif
5792 }
5793
5794 void MacroAssembler::build_frame(int framesize) {
5795 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5796 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5797 protect_return_address();
5798 if (framesize < ((1 << 9) + 2 * wordSize)) {
5799 sub(sp, sp, framesize);
5800 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5801 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5802 } else {
5803 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5804 if (PreserveFramePointer) mov(rfp, sp);
5805 if (framesize < ((1 << 12) + 2 * wordSize))
5806 sub(sp, sp, framesize - 2 * wordSize);
5807 else {
5808 mov(rscratch1, framesize - 2 * wordSize);
5809 sub(sp, sp, rscratch1);
5810 }
5811 }
5812 verify_cross_modify_fence_not_required();
5813 }
5814
5815 void MacroAssembler::remove_frame(int framesize) {
5816 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5817 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5818 if (framesize < ((1 << 9) + 2 * wordSize)) {
5819 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5820 add(sp, sp, framesize);
5821 } else {
5822 if (framesize < ((1 << 12) + 2 * wordSize))
5823 add(sp, sp, framesize - 2 * wordSize);
5824 else {
5825 mov(rscratch1, framesize - 2 * wordSize);
5826 add(sp, sp, rscratch1);
5827 }
5828 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5829 }
5830 authenticate_return_address();
5831 }
5832
5833
5834 // This method counts leading positive bytes (highest bit not set) in provided byte array
5835 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
5836 // Simple and most common case of aligned small array which is not at the
5837 // end of memory page is placed here. All other cases are in stub.
5838 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
5839 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
5840 assert_different_registers(ary1, len, result);
5841
5842 mov(result, len);
5843 cmpw(len, 0);
5844 br(LE, DONE);
5845 cmpw(len, 4 * wordSize);
5846 br(GE, STUB_LONG); // size > 32 then go to stub
5847
5848 int shift = 64 - exact_log2(os::vm_page_size());
5849 lsl(rscratch1, ary1, shift);
5850 mov(rscratch2, (size_t)(4 * wordSize) << shift);
5851 adds(rscratch2, rscratch1, rscratch2); // At end of page?
5852 br(CS, STUB); // at the end of page then go to stub
6736 // On other systems, the helper is a usual C function.
6737 //
6738 void MacroAssembler::get_thread(Register dst) {
6739 RegSet saved_regs =
6740 BSD_ONLY(RegSet::range(r0, r17) + lr - dst)
6741 NOT_BSD (RegSet::range(r0, r1) + lr - dst);
6742
6743 protect_return_address();
6744 push(saved_regs, sp);
6745
6746 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6747 blr(lr);
6748 if (dst != c_rarg0) {
6749 mov(dst, c_rarg0);
6750 }
6751
6752 pop(saved_regs, sp);
6753 authenticate_return_address();
6754 }
6755
6756 void MacroAssembler::cache_wb(Address line) {
6757 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
6758 assert(line.index() == noreg, "index should be noreg");
6759 assert(line.offset() == 0, "offset should be 0");
6760 // would like to assert this
6761 // assert(line._ext.shift == 0, "shift should be zero");
6762 if (VM_Version::supports_dcpop()) {
6763 // writeback using clear virtual address to point of persistence
6764 dc(Assembler::CVAP, line.base());
6765 } else {
6766 // no need to generate anything as Unsafe.writebackMemory should
6767 // never invoke this stub
6768 }
6769 }
6770
6771 void MacroAssembler::cache_wbsync(bool is_pre) {
6772 // we only need a barrier post sync
6773 if (!is_pre) {
6774 membar(Assembler::AnyAny);
6775 }
7171 }
7172
7173 // Check if the lock-stack is full.
7174 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7175 cmpw(top, (unsigned)LockStack::end_offset());
7176 br(Assembler::GE, slow);
7177
7178 // Check for recursion.
7179 subw(t, top, oopSize);
7180 ldr(t, Address(rthread, t));
7181 cmp(obj, t);
7182 br(Assembler::EQ, push);
7183
7184 // Check header for monitor (0b10).
7185 tst(mark, markWord::monitor_value);
7186 br(Assembler::NE, slow);
7187
7188 // Try to lock. Transition lock bits 0b01 => 0b00
7189 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7190 orr(mark, mark, markWord::unlocked_value);
7191 eor(t, mark, markWord::unlocked_value);
7192 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword, memory_order_acquire);
7193 br(Assembler::NE, slow);
7194
7195 bind(push);
7196 // After successful lock, push object on lock-stack.
7197 str(obj, Address(rthread, top));
7198 addw(top, top, oopSize);
7199 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7200 }
7201
7202 // Implements fast-unlocking.
7203 //
7204 // - obj: the object to be unlocked
7205 // - t1, t2, t3: temporary registers
7206 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7207 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7208 // cmpxchg clobbers rscratch1.
7209 assert_different_registers(obj, t1, t2, t3, rscratch1);
7210
|
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "cds/archiveBuilder.hpp"
29 #include "ci/ciEnv.hpp"
30 #include "ci/ciInlineKlass.hpp"
31 #include "code/compiledIC.hpp"
32 #include "compiler/compileTask.hpp"
33 #include "compiler/disassembler.hpp"
34 #include "compiler/oopMap.hpp"
35 #include "gc/shared/barrierSet.hpp"
36 #include "gc/shared/barrierSetAssembler.hpp"
37 #include "gc/shared/cardTableBarrierSet.hpp"
38 #include "gc/shared/cardTable.hpp"
39 #include "gc/shared/collectedHeap.hpp"
40 #include "gc/shared/tlab_globals.hpp"
41 #include "interpreter/bytecodeHistogram.hpp"
42 #include "interpreter/interpreter.hpp"
43 #include "interpreter/interpreterRuntime.hpp"
44 #include "jvm.h"
45 #include "memory/resourceArea.hpp"
46 #include "memory/universe.hpp"
47 #include "nativeInst_aarch64.hpp"
48 #include "oops/accessDecorators.hpp"
49 #include "oops/compressedKlass.inline.hpp"
50 #include "oops/compressedOops.inline.hpp"
51 #include "oops/klass.inline.hpp"
52 #include "oops/resolvedFieldEntry.hpp"
53 #include "runtime/arguments.hpp"
54 #include "runtime/continuation.hpp"
55 #include "runtime/globals.hpp"
56 #include "runtime/icache.hpp"
57 #include "runtime/interfaceSupport.inline.hpp"
58 #include "runtime/javaThread.hpp"
59 #include "runtime/jniHandles.inline.hpp"
60 #include "runtime/sharedRuntime.hpp"
61 #include "runtime/signature_cc.hpp"
62 #include "runtime/stubRoutines.hpp"
63 #include "utilities/globalDefinitions.hpp"
64 #include "utilities/integerCast.hpp"
65 #include "utilities/powerOfTwo.hpp"
66 #include "vmreg_aarch64.inline.hpp"
67 #ifdef COMPILER1
68 #include "c1/c1_LIRAssembler.hpp"
69 #endif
70 #ifdef COMPILER2
71 #include "oops/oop.hpp"
72 #include "opto/compile.hpp"
73 #include "opto/node.hpp"
74 #include "opto/output.hpp"
75 #endif
76
77 #include <sys/types.h>
78
79 #ifdef PRODUCT
80 #define BLOCK_COMMENT(str) /* nothing */
81 #else
82 #define BLOCK_COMMENT(str) block_comment(str)
83 #endif
84 #define STOP(str) stop(str);
85 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
86
1996 ldarb(scratch, scratch);
1997 cmp(scratch, InstanceKlass::fully_initialized);
1998 br(Assembler::EQ, *L_fast_path);
1999
2000 // Fast path check: current thread is initializer thread
2001 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2002 cmp(rthread, scratch);
2003
2004 if (L_slow_path == &L_fallthrough) {
2005 br(Assembler::EQ, *L_fast_path);
2006 bind(*L_slow_path);
2007 } else if (L_fast_path == &L_fallthrough) {
2008 br(Assembler::NE, *L_slow_path);
2009 bind(*L_fast_path);
2010 } else {
2011 Unimplemented();
2012 }
2013 }
2014
2015 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2016 if (!VerifyOops || VerifyAdapterSharing) {
2017 // Below address of the code string confuses VerifyAdapterSharing
2018 // because it may differ between otherwise equivalent adapters.
2019 return;
2020 }
2021
2022 // Pass register number to verify_oop_subroutine
2023 const char* b = nullptr;
2024 {
2025 ResourceMark rm;
2026 stringStream ss;
2027 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2028 b = code_string(ss.as_string());
2029 }
2030 BLOCK_COMMENT("verify_oop {");
2031
2032 strip_return_address(); // This might happen within a stack frame.
2033 protect_return_address();
2034 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2035 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2036
2037 mov(r0, reg);
2038 movptr(rscratch1, (uintptr_t)(address)b);
2039
2040 // call indirectly to solve generation ordering problem
2041 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2042 ldr(rscratch2, Address(rscratch2));
2043 blr(rscratch2);
2044
2045 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2046 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2047 authenticate_return_address();
2048
2049 BLOCK_COMMENT("} verify_oop");
2050 }
2051
2052 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2053 if (!VerifyOops || VerifyAdapterSharing) {
2054 // Below address of the code string confuses VerifyAdapterSharing
2055 // because it may differ between otherwise equivalent adapters.
2056 return;
2057 }
2058
2059 const char* b = nullptr;
2060 {
2061 ResourceMark rm;
2062 stringStream ss;
2063 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2064 b = code_string(ss.as_string());
2065 }
2066 BLOCK_COMMENT("verify_oop_addr {");
2067
2068 strip_return_address(); // This might happen within a stack frame.
2069 protect_return_address();
2070 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2071 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2072
2073 // addr may contain sp so we will have to adjust it based on the
2074 // pushes that we just did.
2075 if (addr.uses(sp)) {
2076 lea(r0, addr);
2077 ldr(r0, Address(r0, 4 * wordSize));
2286 call_VM_leaf_base(entry_point, 1);
2287 }
2288
2289 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2290 assert_different_registers(arg_1, c_rarg0);
2291 pass_arg0(this, arg_0);
2292 pass_arg1(this, arg_1);
2293 call_VM_leaf_base(entry_point, 2);
2294 }
2295
2296 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2297 Register arg_1, Register arg_2) {
2298 assert_different_registers(arg_1, c_rarg0);
2299 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2300 pass_arg0(this, arg_0);
2301 pass_arg1(this, arg_1);
2302 pass_arg2(this, arg_2);
2303 call_VM_leaf_base(entry_point, 3);
2304 }
2305
2306 void MacroAssembler::super_call_VM_leaf(address entry_point) {
2307 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2308 }
2309
2310 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2311 pass_arg0(this, arg_0);
2312 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2313 }
2314
2315 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2316
2317 assert_different_registers(arg_0, c_rarg1);
2318 pass_arg1(this, arg_1);
2319 pass_arg0(this, arg_0);
2320 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2321 }
2322
2323 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2324 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2325 assert_different_registers(arg_1, c_rarg2);
2326 pass_arg2(this, arg_2);
2327 pass_arg1(this, arg_1);
2328 pass_arg0(this, arg_0);
2329 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2335 assert_different_registers(arg_2, c_rarg3);
2336 pass_arg3(this, arg_3);
2337 pass_arg2(this, arg_2);
2338 pass_arg1(this, arg_1);
2339 pass_arg0(this, arg_0);
2340 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2341 }
2342
2343 void MacroAssembler::null_check(Register reg, int offset) {
2344 if (needs_explicit_null_check(offset)) {
2345 // provoke OS null exception if reg is null by
2346 // accessing M[reg] w/o changing any registers
2347 // NOTE: this is plenty to provoke a segv
2348 ldr(zr, Address(reg));
2349 } else {
2350 // nothing to do, (later) access of M[reg + offset]
2351 // will provoke OS null exception if reg is null
2352 }
2353 }
2354
2355 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2356 assert_different_registers(markword, rscratch2);
2357 mov(rscratch2, markWord::inline_type_pattern_mask);
2358 andr(markword, markword, rscratch2);
2359 mov(rscratch2, markWord::inline_type_pattern);
2360 cmp(markword, rscratch2);
2361 br(Assembler::EQ, is_inline_type);
2362 }
2363
2364 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2365 assert_different_registers(tmp, rscratch1);
2366 if (can_be_null) {
2367 cbz(object, not_inline_type);
2368 }
2369 const int is_inline_type_mask = markWord::inline_type_pattern;
2370 ldr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2371 mov(rscratch1, is_inline_type_mask);
2372 andr(tmp, tmp, rscratch1);
2373 cmp(tmp, rscratch1);
2374 br(Assembler::NE, not_inline_type);
2375 }
2376
2377 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2378 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2379 tbnz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, is_null_free_inline_type);
2380 }
2381
2382 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2383 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2384 tbz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, not_null_free_inline_type);
2385 }
2386
2387 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2388 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2389 tbnz(flags, ResolvedFieldEntry::is_flat_shift, is_flat);
2390 }
2391
2392 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2393 // load mark word
2394 ldr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2395 if (!UseObjectMonitorTable) {
2396 Label test_mark_word;
2397 // check displaced
2398 tst(temp_reg, markWord::unlocked_value);
2399 br(Assembler::NE, test_mark_word);
2400 // slow path use klass prototype
2401 load_prototype_header(temp_reg, oop);
2402
2403 bind(test_mark_word);
2404 }
2405 andr(temp_reg, temp_reg, test_bit);
2406 if (jmp_set) {
2407 cbnz(temp_reg, jmp_label);
2408 } else {
2409 cbz(temp_reg, jmp_label);
2410 }
2411 }
2412
2413 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array) {
2414 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2415 }
2416
2417 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2418 Label&is_non_flat_array) {
2419 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2420 }
2421
2422 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array) {
2423 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2424 }
2425
2426 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2427 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2428 }
2429
2430 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2431 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2432 br(Assembler::NE, is_flat_array);
2433 }
2434
2435 // MacroAssembler protected routines needed to implement
2436 // public methods
2437
2438 void MacroAssembler::mov(Register r, Address dest) {
2439 code_section()->relocate(pc(), dest.rspec());
2440 uint64_t imm64 = (uint64_t)dest.target();
2441 movptr(r, imm64);
2442 }
2443
2444 // Move a constant pointer into r. In AArch64 mode the virtual
2445 // address space is 48 bits in size, so we only need three
2446 // instructions to create a patchable instruction sequence that can
2447 // reach anywhere.
2448 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2449 #ifndef PRODUCT
2450 {
2451 char buffer[64];
2452 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2453 block_comment(buffer);
2454 }
5177 adrp(rscratch1, src2, offset);
5178 ldr(rscratch1, Address(rscratch1, offset));
5179 cmp(src1, rscratch1);
5180 }
5181
5182 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5183 cmp(obj1, obj2);
5184 }
5185
5186 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5187 load_method_holder(rresult, rmethod);
5188 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5189 }
5190
5191 void MacroAssembler::load_method_holder(Register holder, Register method) {
5192 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5193 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5194 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5195 }
5196
5197 void MacroAssembler::load_metadata(Register dst, Register src) {
5198 if (UseCompactObjectHeaders) {
5199 load_narrow_klass_compact(dst, src);
5200 } else {
5201 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5202 }
5203 }
5204
5205 // Loads the obj's narrow Klass from a compact object header (+COH) into dst.
5206 // Preserves all registers (incl src, rscratch1 and rscratch2).
5207 // Input:
5208 // src - the oop we want to load the klass from.
5209 // dst - output narrow klass.
5210 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5211 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5212 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5213 lsr(dst, dst, markWord::klass_shift);
5214 }
5215
5216 // Loads the obj's narrow Klass from any header (compact or not) into dst.
5217 void MacroAssembler::load_narrow_klass(Register dst, Register src) {
5218 if (UseCompactObjectHeaders) {
5219 load_narrow_klass_compact(dst, src);
5220 } else {
5221 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5222 }
5223 }
5224
5281 } else {
5282 ldrw(tmp, Address(obj, oopDesc::klass_offset_in_bytes()));
5283 }
5284 if (CompressedKlassPointers::base() == nullptr) {
5285 cmp(klass, tmp, LSL, CompressedKlassPointers::shift());
5286 return;
5287 } else if (!AOTCodeCache::is_on_for_dump() &&
5288 ((uint64_t)CompressedKlassPointers::base() & 0xffffffff) == 0
5289 && CompressedKlassPointers::shift() == 0) {
5290 // Only the bottom 32 bits matter
5291 cmpw(klass, tmp);
5292 return;
5293 }
5294 decode_klass_not_null(tmp, tmp, tmp2);
5295 cmp(klass, tmp);
5296 }
5297
5298 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5299 if (UseCompactObjectHeaders) {
5300 load_narrow_klass_compact(tmp1, obj1);
5301 load_narrow_klass_compact(tmp2, obj2);
5302 } else {
5303 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5304 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5305 }
5306 cmpw(tmp1, tmp2);
5307 }
5308
5309 void MacroAssembler::load_prototype_header(Register dst, Register src) {
5310 Register tmp = (dst == rscratch1) ? rscratch2 : rscratch1;
5311 load_klass(dst, src, tmp);
5312 ldr(dst, Address(dst, Klass::prototype_header_offset()));
5313 }
5314
5315 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
5316 // FIXME: Should this be a store release? concurrent gcs assumes
5317 // klass length is valid if klass field is not null.
5318 assert(!UseCompactObjectHeaders, "not with compact headers");
5319 encode_klass_not_null(src, src, tmp);
5320 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5321 }
5322
5323 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5324 assert(!UseCompactObjectHeaders, "not with compact headers");
5325 // Store to klass gap in destination
5326 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5327 }
5328
5329 // Algorithm must match CompressedOops::encode.
5330 void MacroAssembler::encode_heap_oop(Register d, Register s) {
5331 #ifdef ASSERT
5332 verify_heapbase("MacroAssembler::encode_heap_oop: heap base corrupted?");
5333 #endif
5334 verify_oop_msg(s, "broken oop in encode_heap_oop");
5666 if (as_raw) {
5667 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5668 } else {
5669 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5670 }
5671 }
5672
5673 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5674 Address dst, Register val,
5675 Register tmp1, Register tmp2, Register tmp3) {
5676 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5677 decorators = AccessInternal::decorator_fixup(decorators, type);
5678 bool as_raw = (decorators & AS_RAW) != 0;
5679 if (as_raw) {
5680 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5681 } else {
5682 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5683 }
5684 }
5685
5686 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5687 Register inline_layout_info) {
5688 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5689 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5690 }
5691
5692 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5693 ldr(offset, Address(inline_klass, InlineKlass::adr_members_offset()));
5694 ldrw(offset, Address(offset, InlineKlass::payload_offset_offset()));
5695 }
5696
5697 void MacroAssembler::payload_address(Register oop, Register data, Register inline_klass) {
5698 // ((address) (void*) o) + vk->payload_offset();
5699 Register offset = (data == oop) ? rscratch1 : data;
5700 payload_offset(inline_klass, offset);
5701 if (data == oop) {
5702 add(data, data, offset);
5703 } else {
5704 lea(data, Address(oop, offset));
5705 }
5706 }
5707
5708 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5709 Register tmp2, DecoratorSet decorators) {
5710 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5711 }
5712
5713 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5714 Register tmp2, DecoratorSet decorators) {
5715 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5716 }
5717
5718 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5719 Register tmp2, Register tmp3, DecoratorSet decorators) {
5720 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5721 }
5722
5723 // Used for storing nulls.
5724 void MacroAssembler::store_heap_oop_null(Address dst) {
5725 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5726 }
5727
5802 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5803 cmp(rscratch2, rscratch1);
5804 br(Assembler::HS, next);
5805 STOP("assert(top >= start)");
5806 should_not_reach_here();
5807
5808 bind(next);
5809 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5810 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5811 cmp(rscratch2, rscratch1);
5812 br(Assembler::HS, ok);
5813 STOP("assert(top <= end)");
5814 should_not_reach_here();
5815
5816 bind(ok);
5817 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5818 }
5819 #endif
5820 }
5821
5822 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
5823 assert_different_registers(holder_klass, index, layout_info);
5824 InlineLayoutInfo array[2];
5825 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
5826 if (is_power_of_2(size)) {
5827 lsl(index, index, log2i_exact(size)); // Scale index by power of 2
5828 } else {
5829 mov(layout_info, size);
5830 mul(index, index, layout_info); // Scale the index to be the entry index * array_element_size
5831 }
5832 ldr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
5833 add(layout_info, layout_info, Array<InlineLayoutInfo>::base_offset_in_bytes());
5834 lea(layout_info, Address(layout_info, index));
5835 }
5836
5837 // Writes to stack successive pages until offset reached to check for
5838 // stack overflow + shadow pages. This clobbers tmp.
5839 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5840 assert_different_registers(tmp, size, rscratch1);
5841 mov(tmp, sp);
5842 // Bang stack for total size given plus shadow page size.
5843 // Bang one page at a time because large size can bang beyond yellow and
5844 // red zones.
5845 Label loop;
5846 mov(rscratch1, (int)os::vm_page_size());
5847 bind(loop);
5848 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5849 subsw(size, size, rscratch1);
5850 str(size, Address(tmp));
5851 br(Assembler::GT, loop);
5852
5853 // Bang down shadow pages too.
5854 // At this point, (tmp-0) is the last address touched, so don't
5855 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5856 // was post-decremented.) Skip this address by starting at i=1, and
5923
5924 // Strictly speaking the card table base isn't an address at all, and it might
5925 // even be negative. It is thus materialised as a constant.
5926 mov(reg, (uint64_t)ctbs->card_table_base_const());
5927 }
5928
5929 void MacroAssembler::load_aotrc_address(Register reg, address a) {
5930 #if INCLUDE_CDS
5931 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
5932 if (AOTCodeCache::is_on_for_dump()) {
5933 // all aotrc field addresses should be registered in the AOTCodeCache address table
5934 lea(reg, ExternalAddress(a));
5935 } else {
5936 mov(reg, (uint64_t)a);
5937 }
5938 #else
5939 ShouldNotReachHere();
5940 #endif
5941 }
5942
5943 #ifdef ASSERT
5944 void MacroAssembler::build_frame(int framesize) {
5945 build_frame(framesize, false);
5946 }
5947 #endif
5948
5949 void MacroAssembler::build_frame(int framesize DEBUG_ONLY(COMMA bool zap_rfp_lr_spills)) {
5950 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5951 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5952 protect_return_address();
5953 if (framesize < ((1 << 9) + 2 * wordSize)) {
5954 sub(sp, sp, framesize);
5955 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
5956 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
5957 stp(rscratch1, rscratch1, Address(sp, framesize - 2 * wordSize));
5958 } else {
5959 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5960 }
5961 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5962 } else {
5963 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
5964 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
5965 stp(rscratch1, rscratch1, Address(pre(sp, -2 * wordSize)));
5966 } else {
5967 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5968 }
5969 if (PreserveFramePointer) mov(rfp, sp);
5970 if (framesize < ((1 << 12) + 2 * wordSize))
5971 sub(sp, sp, framesize - 2 * wordSize);
5972 else {
5973 mov(rscratch1, framesize - 2 * wordSize);
5974 sub(sp, sp, rscratch1);
5975 }
5976 }
5977 verify_cross_modify_fence_not_required();
5978 }
5979
5980 void MacroAssembler::remove_frame(int framesize) {
5981 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5982 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5983 if (framesize < ((1 << 9) + 2 * wordSize)) {
5984 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5985 add(sp, sp, framesize);
5986 } else {
5987 if (framesize < ((1 << 12) + 2 * wordSize))
5988 add(sp, sp, framesize - 2 * wordSize);
5989 else {
5990 mov(rscratch1, framesize - 2 * wordSize);
5991 add(sp, sp, rscratch1);
5992 }
5993 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5994 }
5995 authenticate_return_address();
5996 }
5997
5998 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
5999 if (needs_stack_repair) {
6000 // The method has a scalarized entry point (where fields of value object arguments
6001 // are passed through registers and stack), and a non-scalarized entry point (where
6002 // value object arguments are given as oops). The non-scalarized entry point will
6003 // first load each field of value object arguments and store them in registers and on
6004 // the stack in a way compatible with the scalarized entry point. To do so, some extra
6005 // stack space might be reserved (if argument registers are not enough). On leaving the
6006 // method, this space must be freed.
6007 //
6008 // In case we used the non-scalarized entry point the stack looks like this:
6009 //
6010 // | Arguments from caller |
6011 // |---------------------------| <-- caller's SP
6012 // | Saved LR #1 |
6013 // | Saved FP #1 |
6014 // |---------------------------|
6015 // | Extension space for |
6016 // | inline arg (un)packing |
6017 // |---------------------------| <-- start of this method's frame
6018 // | Saved LR #2 |
6019 // | Saved FP #2 |
6020 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6021 // | sp_inc |
6022 // | method locals |
6023 // |---------------------------| <-- SP
6024 //
6025 // There are two copies of FP and LR on the stack. They will be identical at
6026 // first, but that can change.
6027 // If the caller has been deoptimized, LR #1 will be patched to point at the
6028 // deopt blob, and LR #2 will still point into the old method.
6029 // If the saved FP (x29) was not used as the frame pointer, but to store an
6030 // oop, the GC will be aware only of FP #1 as the spilled location of x29 and
6031 // will fix only this one. Overall, FP/LR #2 are not reliable and are simply
6032 // needed to add space between the extension space and the locals, as there
6033 // would be between the real arguments and the locals if we don't need to
6034 // do unpacking (from the scalarized entry point).
6035 //
6036 // When restoring, one must then load FP #1 into x29, and LR #1 into x30,
6037 // while keeping in mind that from the scalarized entry point, there will be
6038 // only one copy of each. Indeed, in the case we used the scalarized calling
6039 // convention, the stack looks like this:
6040 //
6041 // | Arguments from caller |
6042 // |---------------------------| <-- caller's SP / start of this method's frame
6043 // | Saved LR |
6044 // | Saved FP |
6045 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6046 // | sp_inc |
6047 // | method locals |
6048 // |---------------------------| <-- SP
6049 //
6050 // The sp_inc stack slot holds the total size of the frame including the
6051 // extension space minus two words for the saved FP and LR. That is how to
6052 // find FP/LR #1. This size is expressed in bytes. Be careful when using it
6053 // from C++ in pointer arithmetic; you might need to divide it by wordSize.
6054 //
6055 // One can find sp_inc since the start the method's frame is SP + initial_framesize.
6056
6057 int sp_inc_offset = initial_framesize - 3 * wordSize; // Immediately below saved LR and FP
6058
6059 ldr(rscratch1, Address(sp, sp_inc_offset));
6060 add(sp, sp, rscratch1);
6061 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6062 } else {
6063 remove_frame(initial_framesize);
6064 }
6065 }
6066
6067 void MacroAssembler::save_stack_increment(int sp_inc, int frame_size) {
6068 int real_frame_size = frame_size + sp_inc;
6069 assert(sp_inc == 0 || sp_inc > 2*wordSize, "invalid sp_inc value");
6070 assert(real_frame_size >= 2*wordSize, "frame size must include FP/LR space");
6071 assert((real_frame_size & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6072
6073 int sp_inc_offset = frame_size - 3 * wordSize; // Immediately below saved LR and FP
6074
6075 // Subtract two words for the saved FP and LR as these will be popped
6076 // separately. See remove_frame above.
6077 mov(rscratch1, real_frame_size - 2*wordSize);
6078 str(rscratch1, Address(sp, sp_inc_offset));
6079 }
6080
6081 // This method counts leading positive bytes (highest bit not set) in provided byte array
6082 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
6083 // Simple and most common case of aligned small array which is not at the
6084 // end of memory page is placed here. All other cases are in stub.
6085 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
6086 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
6087 assert_different_registers(ary1, len, result);
6088
6089 mov(result, len);
6090 cmpw(len, 0);
6091 br(LE, DONE);
6092 cmpw(len, 4 * wordSize);
6093 br(GE, STUB_LONG); // size > 32 then go to stub
6094
6095 int shift = 64 - exact_log2(os::vm_page_size());
6096 lsl(rscratch1, ary1, shift);
6097 mov(rscratch2, (size_t)(4 * wordSize) << shift);
6098 adds(rscratch2, rscratch1, rscratch2); // At end of page?
6099 br(CS, STUB); // at the end of page then go to stub
6983 // On other systems, the helper is a usual C function.
6984 //
6985 void MacroAssembler::get_thread(Register dst) {
6986 RegSet saved_regs =
6987 BSD_ONLY(RegSet::range(r0, r17) + lr - dst)
6988 NOT_BSD (RegSet::range(r0, r1) + lr - dst);
6989
6990 protect_return_address();
6991 push(saved_regs, sp);
6992
6993 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6994 blr(lr);
6995 if (dst != c_rarg0) {
6996 mov(dst, c_rarg0);
6997 }
6998
6999 pop(saved_regs, sp);
7000 authenticate_return_address();
7001 }
7002
7003 #ifdef COMPILER2
7004 // C2 compiled method's prolog code
7005 // Moved here from aarch64.ad to support Valhalla code below
7006 void MacroAssembler::verified_entry(Compile* C, int sp_inc) {
7007 if (C->clinit_barrier_on_entry()) {
7008 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
7009
7010 Label L_skip_barrier;
7011
7012 mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
7013 clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
7014 far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
7015 bind(L_skip_barrier);
7016 }
7017
7018 if (C->max_vector_size() > 0) {
7019 reinitialize_ptrue();
7020 }
7021
7022 int bangsize = C->output()->bang_size_in_bytes();
7023 if (C->output()->need_stack_bang(bangsize))
7024 generate_stack_overflow_check(bangsize);
7025
7026 // n.b. frame size includes space for return pc and rfp
7027 const long framesize = C->output()->frame_size_in_bytes();
7028 build_frame(framesize DEBUG_ONLY(COMMA sp_inc != 0));
7029
7030 if (C->needs_stack_repair()) {
7031 save_stack_increment(sp_inc, framesize);
7032 }
7033
7034 if (VerifyStackAtCalls) {
7035 Unimplemented();
7036 }
7037 }
7038 #endif // COMPILER2
7039
7040 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
7041 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
7042 // An inline type might be returned. If fields are in registers we
7043 // need to allocate an inline type instance and initialize it with
7044 // the value of the fields.
7045 Label skip;
7046 // We only need a new buffered inline type if a new one is not returned
7047 tbz(r0, 0, skip);
7048 int call_offset = -1;
7049
7050 // Be careful not to clobber r1-7 which hold returned fields
7051 // Also do not use callee-saved registers as these may be live in the interpreter
7052 Register tmp1 = r13, tmp2 = r14, klass = r15, r0_preserved = r12;
7053
7054 // The following code is similar to the instance allocation code in TemplateTable::_new
7055 // but has some slight differences,
7056 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
7057 // allocating is not necessary if vk != nullptr, etc.
7058 Label slow_case;
7059 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
7060 mov(r0_preserved, r0); // save r0 for slow_case since *_allocate may corrupt it when allocation failed
7061
7062 if (vk != nullptr) {
7063 // Called from C1, where the return type is statically known.
7064 movptr(klass, (intptr_t)vk->get_InlineKlass());
7065 jint lh = vk->layout_helper();
7066 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
7067 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
7068 tlab_allocate(r0, noreg, lh, tmp1, tmp2, slow_case);
7069 } else {
7070 b(slow_case);
7071 }
7072 } else {
7073 // Call from interpreter. R0 contains ((the InlineKlass* of the return type) | 0x01)
7074 andr(klass, r0, -2);
7075 if (UseTLAB) {
7076 ldrw(tmp2, Address(klass, Klass::layout_helper_offset()));
7077 tst(tmp2, Klass::_lh_instance_slow_path_bit);
7078 br(Assembler::NE, slow_case);
7079 tlab_allocate(r0, tmp2, 0, tmp1, tmp2, slow_case);
7080 } else {
7081 b(slow_case);
7082 }
7083 }
7084 if (UseTLAB) {
7085 // 2. Initialize buffered inline instance header
7086 Register buffer_obj = r0;
7087 if (UseCompactObjectHeaders) {
7088 ldr(rscratch1, Address(klass, Klass::prototype_header_offset()));
7089 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7090 } else {
7091 mov(rscratch1, (intptr_t)markWord::inline_type_prototype().value());
7092 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7093 store_klass_gap(buffer_obj, zr);
7094 if (vk == nullptr) {
7095 // store_klass corrupts klass, so save it for later use (interpreter case only).
7096 mov(tmp1, klass);
7097 }
7098 store_klass(buffer_obj, klass, rscratch1);
7099 klass = tmp1;
7100 }
7101 // 3. Initialize its fields with an inline class specific handler
7102 if (vk != nullptr) {
7103 far_call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
7104 } else {
7105 ldr(tmp1, Address(klass, InlineKlass::adr_members_offset()));
7106 ldr(tmp1, Address(tmp1, InlineKlass::pack_handler_offset()));
7107 blr(tmp1);
7108 }
7109
7110 membar(Assembler::StoreStore);
7111 b(skip);
7112 } else {
7113 // Must have already branched to slow_case above.
7114 DEBUG_ONLY(should_not_reach_here());
7115 }
7116 bind(slow_case);
7117 // We failed to allocate a new inline type, fall back to a runtime
7118 // call. Some oop field may be live in some registers but we can't
7119 // tell. That runtime call will take care of preserving them
7120 // across a GC if there's one.
7121 mov(r0, r0_preserved);
7122
7123 if (from_interpreter) {
7124 super_call_VM_leaf(SharedRuntime::store_inline_type_fields_to_buf_entry());
7125 } else {
7126 far_call(RuntimeAddress(SharedRuntime::store_inline_type_fields_to_buf_entry()));
7127 call_offset = offset();
7128 }
7129 membar(Assembler::StoreStore);
7130
7131 bind(skip);
7132 return call_offset;
7133 }
7134
7135 // Move a value between registers/stack slots and update the reg_state
7136 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
7137 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
7138 if (reg_state[to->value()] == reg_written) {
7139 return true; // Already written
7140 }
7141
7142 if (from != to && bt != T_VOID) {
7143 if (reg_state[to->value()] == reg_readonly) {
7144 return false; // Not yet writable
7145 }
7146 if (from->is_reg()) {
7147 if (to->is_reg()) {
7148 if (from->is_Register() && to->is_Register()) {
7149 mov(to->as_Register(), from->as_Register());
7150 } else if (from->is_FloatRegister() && to->is_FloatRegister()) {
7151 fmovd(to->as_FloatRegister(), from->as_FloatRegister());
7152 } else {
7153 ShouldNotReachHere();
7154 }
7155 } else {
7156 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7157 Address to_addr = Address(sp, st_off);
7158 if (from->is_FloatRegister()) {
7159 if (bt == T_DOUBLE) {
7160 strd(from->as_FloatRegister(), to_addr);
7161 } else {
7162 assert(bt == T_FLOAT, "must be float");
7163 strs(from->as_FloatRegister(), to_addr);
7164 }
7165 } else {
7166 str(from->as_Register(), to_addr);
7167 }
7168 }
7169 } else {
7170 Address from_addr = Address(sp, from->reg2stack() * VMRegImpl::stack_slot_size);
7171 if (to->is_reg()) {
7172 if (to->is_FloatRegister()) {
7173 if (bt == T_DOUBLE) {
7174 ldrd(to->as_FloatRegister(), from_addr);
7175 } else {
7176 assert(bt == T_FLOAT, "must be float");
7177 ldrs(to->as_FloatRegister(), from_addr);
7178 }
7179 } else {
7180 ldr(to->as_Register(), from_addr);
7181 }
7182 } else {
7183 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7184 ldr(rscratch1, from_addr);
7185 str(rscratch1, Address(sp, st_off));
7186 }
7187 }
7188 }
7189
7190 // Update register states
7191 reg_state[from->value()] = reg_writable;
7192 reg_state[to->value()] = reg_written;
7193 return true;
7194 }
7195
7196 // Calculate the extra stack space required for packing or unpacking inline
7197 // args and adjust the stack pointer
7198 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
7199 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
7200 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
7201 assert(sp_inc > 0, "sanity");
7202
7203 // Save a copy of the FP and LR here for deoptimization patching and frame walking
7204 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
7205
7206 // Adjust the stack pointer. This will be repaired on return by MacroAssembler::remove_frame
7207 if (sp_inc < (1 << 9)) {
7208 sub(sp, sp, sp_inc); // Fits in an immediate
7209 } else {
7210 mov(rscratch1, sp_inc);
7211 sub(sp, sp, rscratch1);
7212 }
7213
7214 return sp_inc + 2 * wordSize; // Account for the FP/LR space
7215 }
7216
7217 // Read all fields from an inline type oop and store the values in registers/stack slots
7218 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
7219 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
7220 RegState reg_state[]) {
7221 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
7222 assert(from->is_valid(), "source must be valid");
7223 bool progress = false;
7224 #ifdef ASSERT
7225 const int start_offset = offset();
7226 #endif
7227
7228 Label L_null, L_notNull;
7229 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
7230 Register tmp1 = r10;
7231 Register tmp2 = r11;
7232
7233 #ifdef ASSERT
7234 RegSet clobbered_gp_regs = MacroAssembler::call_clobbered_gp_registers();
7235 assert(clobbered_gp_regs.contains(tmp1), "tmp1 must be saved explicitly if it's not a clobber");
7236 assert(clobbered_gp_regs.contains(tmp2), "tmp2 must be saved explicitly if it's not a clobber");
7237 assert(clobbered_gp_regs.contains(r14), "r14 must be saved explicitly if it's not a clobber");
7238 #endif
7239
7240 Register fromReg = noreg;
7241 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
7242 bool done = true;
7243 bool mark_done = true;
7244 VMReg toReg;
7245 BasicType bt;
7246 // Check if argument requires a null check
7247 bool null_check = false;
7248 VMReg nullCheckReg;
7249 while (stream.next(nullCheckReg, bt)) {
7250 if (sig->at(stream.sig_index())._offset == -1) {
7251 null_check = true;
7252 break;
7253 }
7254 }
7255 stream.reset(sig_index, to_index);
7256 while (stream.next(toReg, bt)) {
7257 assert(toReg->is_valid(), "destination must be valid");
7258 int idx = (int)toReg->value();
7259 if (reg_state[idx] == reg_readonly) {
7260 if (idx != from->value()) {
7261 mark_done = false;
7262 }
7263 done = false;
7264 continue;
7265 } else if (reg_state[idx] == reg_written) {
7266 continue;
7267 }
7268 assert(reg_state[idx] == reg_writable, "must be writable");
7269 reg_state[idx] = reg_written;
7270 progress = true;
7271
7272 if (fromReg == noreg) {
7273 if (from->is_reg()) {
7274 fromReg = from->as_Register();
7275 } else {
7276 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size;
7277 ldr(tmp1, Address(sp, st_off));
7278 fromReg = tmp1;
7279 }
7280 if (null_check) {
7281 // Nullable inline type argument, emit null check
7282 cbz(fromReg, L_null);
7283 }
7284 }
7285 int off = sig->at(stream.sig_index())._offset;
7286 if (off == -1) {
7287 assert(null_check, "Missing null check at");
7288 if (toReg->is_stack()) {
7289 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7290 mov(tmp2, 1);
7291 str(tmp2, Address(sp, st_off));
7292 } else {
7293 mov(toReg->as_Register(), 1);
7294 }
7295 continue;
7296 }
7297 if (sig->at(stream.sig_index())._vt_oop) {
7298 if (toReg->is_stack()) {
7299 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7300 str(fromReg, Address(sp, st_off));
7301 } else {
7302 mov(toReg->as_Register(), fromReg);
7303 }
7304 continue;
7305 }
7306 assert(off > 0, "offset in object should be positive");
7307 Address fromAddr = Address(fromReg, off);
7308 if (!toReg->is_FloatRegister()) {
7309 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
7310 if (is_reference_type(bt)) {
7311 load_heap_oop(dst, fromAddr, rscratch1, rscratch2);
7312 } else {
7313 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
7314 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
7315 }
7316 if (toReg->is_stack()) {
7317 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7318 str(dst, Address(sp, st_off));
7319 }
7320 } else if (bt == T_DOUBLE) {
7321 ldrd(toReg->as_FloatRegister(), fromAddr);
7322 } else {
7323 assert(bt == T_FLOAT, "must be float");
7324 ldrs(toReg->as_FloatRegister(), fromAddr);
7325 }
7326 }
7327 if (progress && null_check) {
7328 if (done) {
7329 b(L_notNull);
7330 bind(L_null);
7331 // Set null marker to zero to signal that the argument is null.
7332 // Also set all fields to zero since the runtime requires a canonical
7333 // representation of a flat null.
7334 stream.reset(sig_index, to_index);
7335 while (stream.next(toReg, bt)) {
7336 if (toReg->is_stack()) {
7337 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7338 str(zr, Address(sp, st_off));
7339 } else if (toReg->is_FloatRegister()) {
7340 mov(toReg->as_FloatRegister(), T2S, 0);
7341 } else {
7342 mov(toReg->as_Register(), zr);
7343 }
7344 }
7345 bind(L_notNull);
7346 } else {
7347 bind(L_null);
7348 }
7349 }
7350
7351 sig_index = stream.sig_index();
7352 to_index = stream.regs_index();
7353
7354 if (mark_done && reg_state[from->value()] != reg_written) {
7355 // This is okay because no one else will write to that slot
7356 reg_state[from->value()] = reg_writable;
7357 }
7358 from_index--;
7359 assert(progress || (start_offset == offset()), "should not emit code");
7360 return done;
7361 }
7362
7363 // Pack fields back into an inline type oop
7364 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
7365 VMRegPair* from, int from_count, int& from_index, VMReg to,
7366 RegState reg_state[], Register val_array) {
7367 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
7368 assert(to->is_valid(), "destination must be valid");
7369
7370 if (reg_state[to->value()] == reg_written) {
7371 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7372 return true; // Already written
7373 }
7374
7375 // The GC barrier expanded by store_heap_oop below may call into the
7376 // runtime so use callee-saved registers for any values that need to be
7377 // preserved. The GC barrier assembler should take care of saving the
7378 // Java argument registers.
7379 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
7380 Register val_obj_tmp = r21;
7381 Register from_reg_tmp = r22;
7382 Register tmp1 = r14;
7383 Register tmp2 = r13;
7384 Register tmp3 = r12;
7385 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
7386
7387 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
7388
7389 if (reg_state[to->value()] == reg_readonly) {
7390 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
7391 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7392 return false; // Not yet writable
7393 }
7394 val_obj = val_obj_tmp;
7395 }
7396
7397 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
7398 VMReg fromReg;
7399 BasicType bt;
7400 Label L_null;
7401 while (stream.next(fromReg, bt)) {
7402 assert(fromReg->is_valid(), "source must be valid");
7403 reg_state[fromReg->value()] = reg_writable;
7404
7405 int off = sig->at(stream.sig_index())._offset;
7406 if (off == -1) {
7407 // Nullable inline type argument, emit null check
7408 Label L_notNull;
7409 if (fromReg->is_stack()) {
7410 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7411 ldrb(tmp2, Address(sp, ld_off));
7412 cbnz(tmp2, L_notNull);
7413 } else {
7414 cbnz(fromReg->as_Register(), L_notNull);
7415 }
7416 mov(val_obj, 0);
7417 b(L_null);
7418 bind(L_notNull);
7419 continue;
7420 }
7421 if (sig->at(stream.sig_index())._vt_oop) {
7422 if (fromReg->is_stack()) {
7423 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7424 ldr(val_obj, Address(sp, ld_off));
7425 } else {
7426 mov(val_obj, fromReg->as_Register());
7427 }
7428 cbnz(val_obj, L_null);
7429 // get the buffer from the just allocated pool of buffers
7430 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
7431 load_heap_oop(val_obj, Address(val_array, index), rscratch1, rscratch2);
7432 continue;
7433 }
7434
7435 assert(off > 0, "offset in object should be positive");
7436 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
7437
7438 // Pack the scalarized field into the value object.
7439 Address dst(val_obj, off);
7440 if (!fromReg->is_FloatRegister()) {
7441 Register src;
7442 if (fromReg->is_stack()) {
7443 src = from_reg_tmp;
7444 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7445 load_sized_value(src, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
7446 } else {
7447 src = fromReg->as_Register();
7448 }
7449 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
7450 if (is_reference_type(bt)) {
7451 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep val_obj valid.
7452 mov(tmp3, val_obj);
7453 Address dst_with_tmp3(tmp3, off);
7454 store_heap_oop(dst_with_tmp3, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
7455 } else {
7456 store_sized_value(dst, src, size_in_bytes);
7457 }
7458 } else if (bt == T_DOUBLE) {
7459 strd(fromReg->as_FloatRegister(), dst);
7460 } else {
7461 assert(bt == T_FLOAT, "must be float");
7462 strs(fromReg->as_FloatRegister(), dst);
7463 }
7464 }
7465 bind(L_null);
7466 sig_index = stream.sig_index();
7467 from_index = stream.regs_index();
7468
7469 assert(reg_state[to->value()] == reg_writable, "must have already been read");
7470 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
7471 assert(success, "to register must be writable");
7472 return true;
7473 }
7474
7475 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
7476 return (reg->is_FloatRegister()) ? v8->as_VMReg() : r14->as_VMReg();
7477 }
7478
7479 void MacroAssembler::cache_wb(Address line) {
7480 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
7481 assert(line.index() == noreg, "index should be noreg");
7482 assert(line.offset() == 0, "offset should be 0");
7483 // would like to assert this
7484 // assert(line._ext.shift == 0, "shift should be zero");
7485 if (VM_Version::supports_dcpop()) {
7486 // writeback using clear virtual address to point of persistence
7487 dc(Assembler::CVAP, line.base());
7488 } else {
7489 // no need to generate anything as Unsafe.writebackMemory should
7490 // never invoke this stub
7491 }
7492 }
7493
7494 void MacroAssembler::cache_wbsync(bool is_pre) {
7495 // we only need a barrier post sync
7496 if (!is_pre) {
7497 membar(Assembler::AnyAny);
7498 }
7894 }
7895
7896 // Check if the lock-stack is full.
7897 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7898 cmpw(top, (unsigned)LockStack::end_offset());
7899 br(Assembler::GE, slow);
7900
7901 // Check for recursion.
7902 subw(t, top, oopSize);
7903 ldr(t, Address(rthread, t));
7904 cmp(obj, t);
7905 br(Assembler::EQ, push);
7906
7907 // Check header for monitor (0b10).
7908 tst(mark, markWord::monitor_value);
7909 br(Assembler::NE, slow);
7910
7911 // Try to lock. Transition lock bits 0b01 => 0b00
7912 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7913 orr(mark, mark, markWord::unlocked_value);
7914 // Mask inline_type bit such that we go to the slow path if object is an inline type
7915 andr(mark, mark, ~((int) markWord::inline_type_bit_in_place));
7916
7917 eor(t, mark, markWord::unlocked_value);
7918 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword, memory_order_acquire);
7919 br(Assembler::NE, slow);
7920
7921 bind(push);
7922 // After successful lock, push object on lock-stack.
7923 str(obj, Address(rthread, top));
7924 addw(top, top, oopSize);
7925 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7926 }
7927
7928 // Implements fast-unlocking.
7929 //
7930 // - obj: the object to be unlocked
7931 // - t1, t2, t3: temporary registers
7932 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7933 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7934 // cmpxchg clobbers rscratch1.
7935 assert_different_registers(obj, t1, t2, t3, rscratch1);
7936
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