9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "code/compiledIC.hpp"
30 #include "compiler/compileTask.hpp"
31 #include "compiler/disassembler.hpp"
32 #include "compiler/oopMap.hpp"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/cardTable.hpp"
37 #include "gc/shared/collectedHeap.hpp"
38 #include "gc/shared/tlab_globals.hpp"
39 #include "interpreter/bytecodeHistogram.hpp"
40 #include "interpreter/interpreter.hpp"
41 #include "interpreter/interpreterRuntime.hpp"
42 #include "jvm.h"
43 #include "memory/resourceArea.hpp"
44 #include "memory/universe.hpp"
45 #include "nativeInst_aarch64.hpp"
46 #include "oops/accessDecorators.hpp"
47 #include "oops/compressedKlass.inline.hpp"
48 #include "oops/compressedOops.inline.hpp"
49 #include "oops/klass.inline.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/icache.hpp"
52 #include "runtime/interfaceSupport.inline.hpp"
53 #include "runtime/javaThread.hpp"
54 #include "runtime/jniHandles.inline.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/globalDefinitions.hpp"
58 #include "utilities/powerOfTwo.hpp"
59 #ifdef COMPILER1
60 #include "c1/c1_LIRAssembler.hpp"
61 #endif
62 #ifdef COMPILER2
63 #include "oops/oop.hpp"
64 #include "opto/compile.hpp"
65 #include "opto/node.hpp"
66 #include "opto/output.hpp"
67 #endif
68
69 #include <sys/types.h>
70
71 #ifdef PRODUCT
72 #define BLOCK_COMMENT(str) /* nothing */
73 #else
74 #define BLOCK_COMMENT(str) block_comment(str)
75 #endif
76 #define STOP(str) stop(str);
77 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
78
2011 ldarb(scratch, scratch);
2012 cmp(scratch, InstanceKlass::fully_initialized);
2013 br(Assembler::EQ, *L_fast_path);
2014
2015 // Fast path check: current thread is initializer thread
2016 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2017 cmp(rthread, scratch);
2018
2019 if (L_slow_path == &L_fallthrough) {
2020 br(Assembler::EQ, *L_fast_path);
2021 bind(*L_slow_path);
2022 } else if (L_fast_path == &L_fallthrough) {
2023 br(Assembler::NE, *L_slow_path);
2024 bind(*L_fast_path);
2025 } else {
2026 Unimplemented();
2027 }
2028 }
2029
2030 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2031 if (!VerifyOops) return;
2032
2033 // Pass register number to verify_oop_subroutine
2034 const char* b = nullptr;
2035 {
2036 ResourceMark rm;
2037 stringStream ss;
2038 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2039 b = code_string(ss.as_string());
2040 }
2041 BLOCK_COMMENT("verify_oop {");
2042
2043 strip_return_address(); // This might happen within a stack frame.
2044 protect_return_address();
2045 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2046 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2047
2048 mov(r0, reg);
2049 movptr(rscratch1, (uintptr_t)(address)b);
2050
2051 // call indirectly to solve generation ordering problem
2052 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2053 ldr(rscratch2, Address(rscratch2));
2054 blr(rscratch2);
2055
2056 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2057 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2058 authenticate_return_address();
2059
2060 BLOCK_COMMENT("} verify_oop");
2061 }
2062
2063 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2064 if (!VerifyOops) return;
2065
2066 const char* b = nullptr;
2067 {
2068 ResourceMark rm;
2069 stringStream ss;
2070 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2071 b = code_string(ss.as_string());
2072 }
2073 BLOCK_COMMENT("verify_oop_addr {");
2074
2075 strip_return_address(); // This might happen within a stack frame.
2076 protect_return_address();
2077 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2078 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2079
2080 // addr may contain sp so we will have to adjust it based on the
2081 // pushes that we just did.
2082 if (addr.uses(sp)) {
2083 lea(r0, addr);
2084 ldr(r0, Address(r0, 4 * wordSize));
2142 call_VM_leaf_base(entry_point, 1);
2143 }
2144
2145 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2146 assert_different_registers(arg_1, c_rarg0);
2147 pass_arg0(this, arg_0);
2148 pass_arg1(this, arg_1);
2149 call_VM_leaf_base(entry_point, 2);
2150 }
2151
2152 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2153 Register arg_1, Register arg_2) {
2154 assert_different_registers(arg_1, c_rarg0);
2155 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2156 pass_arg0(this, arg_0);
2157 pass_arg1(this, arg_1);
2158 pass_arg2(this, arg_2);
2159 call_VM_leaf_base(entry_point, 3);
2160 }
2161
2162 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2163 pass_arg0(this, arg_0);
2164 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2165 }
2166
2167 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2168
2169 assert_different_registers(arg_0, c_rarg1);
2170 pass_arg1(this, arg_1);
2171 pass_arg0(this, arg_0);
2172 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2173 }
2174
2175 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2176 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2177 assert_different_registers(arg_1, c_rarg2);
2178 pass_arg2(this, arg_2);
2179 pass_arg1(this, arg_1);
2180 pass_arg0(this, arg_0);
2181 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2187 assert_different_registers(arg_2, c_rarg3);
2188 pass_arg3(this, arg_3);
2189 pass_arg2(this, arg_2);
2190 pass_arg1(this, arg_1);
2191 pass_arg0(this, arg_0);
2192 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2193 }
2194
2195 void MacroAssembler::null_check(Register reg, int offset) {
2196 if (needs_explicit_null_check(offset)) {
2197 // provoke OS null exception if reg is null by
2198 // accessing M[reg] w/o changing any registers
2199 // NOTE: this is plenty to provoke a segv
2200 ldr(zr, Address(reg));
2201 } else {
2202 // nothing to do, (later) access of M[reg + offset]
2203 // will provoke OS null exception if reg is null
2204 }
2205 }
2206
2207 // MacroAssembler protected routines needed to implement
2208 // public methods
2209
2210 void MacroAssembler::mov(Register r, Address dest) {
2211 code_section()->relocate(pc(), dest.rspec());
2212 uint64_t imm64 = (uint64_t)dest.target();
2213 movptr(r, imm64);
2214 }
2215
2216 // Move a constant pointer into r. In AArch64 mode the virtual
2217 // address space is 48 bits in size, so we only need three
2218 // instructions to create a patchable instruction sequence that can
2219 // reach anywhere.
2220 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2221 #ifndef PRODUCT
2222 {
2223 char buffer[64];
2224 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2225 block_comment(buffer);
2226 }
4887 adrp(rscratch1, src2, offset);
4888 ldr(rscratch1, Address(rscratch1, offset));
4889 cmp(src1, rscratch1);
4890 }
4891
4892 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
4893 cmp(obj1, obj2);
4894 }
4895
4896 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
4897 load_method_holder(rresult, rmethod);
4898 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
4899 }
4900
4901 void MacroAssembler::load_method_holder(Register holder, Register method) {
4902 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
4903 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
4904 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
4905 }
4906
4907 // Loads the obj's Klass* into dst.
4908 // Preserves all registers (incl src, rscratch1 and rscratch2).
4909 // Input:
4910 // src - the oop we want to load the klass from.
4911 // dst - output narrow klass.
4912 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
4913 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
4914 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
4915 lsr(dst, dst, markWord::klass_shift);
4916 }
4917
4918 void MacroAssembler::load_klass(Register dst, Register src) {
4919 if (UseCompactObjectHeaders) {
4920 load_narrow_klass_compact(dst, src);
4921 decode_klass_not_null(dst);
4922 } else if (UseCompressedClassPointers) {
4923 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
4924 decode_klass_not_null(dst);
4925 } else {
4926 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
4997 }
4998 cmp(klass, tmp);
4999 }
5000
5001 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5002 if (UseCompactObjectHeaders) {
5003 load_narrow_klass_compact(tmp1, obj1);
5004 load_narrow_klass_compact(tmp2, obj2);
5005 cmpw(tmp1, tmp2);
5006 } else if (UseCompressedClassPointers) {
5007 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5008 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5009 cmpw(tmp1, tmp2);
5010 } else {
5011 ldr(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5012 ldr(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5013 cmp(tmp1, tmp2);
5014 }
5015 }
5016
5017 void MacroAssembler::store_klass(Register dst, Register src) {
5018 // FIXME: Should this be a store release? concurrent gcs assumes
5019 // klass length is valid if klass field is not null.
5020 assert(!UseCompactObjectHeaders, "not with compact headers");
5021 if (UseCompressedClassPointers) {
5022 encode_klass_not_null(src);
5023 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5024 } else {
5025 str(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5026 }
5027 }
5028
5029 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5030 assert(!UseCompactObjectHeaders, "not with compact headers");
5031 if (UseCompressedClassPointers) {
5032 // Store to klass gap in destination
5033 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5034 }
5035 }
5036
5398 if (as_raw) {
5399 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5400 } else {
5401 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5402 }
5403 }
5404
5405 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5406 Address dst, Register val,
5407 Register tmp1, Register tmp2, Register tmp3) {
5408 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5409 decorators = AccessInternal::decorator_fixup(decorators, type);
5410 bool as_raw = (decorators & AS_RAW) != 0;
5411 if (as_raw) {
5412 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5413 } else {
5414 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5415 }
5416 }
5417
5418 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5419 Register tmp2, DecoratorSet decorators) {
5420 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5421 }
5422
5423 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5424 Register tmp2, DecoratorSet decorators) {
5425 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5426 }
5427
5428 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5429 Register tmp2, Register tmp3, DecoratorSet decorators) {
5430 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5431 }
5432
5433 // Used for storing nulls.
5434 void MacroAssembler::store_heap_oop_null(Address dst) {
5435 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5436 }
5437
5473 oop_index = oop_recorder()->allocate_metadata_index(obj);
5474 } else {
5475 oop_index = oop_recorder()->find_index(obj);
5476 }
5477 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5478 mov(dst, Address((address)obj, rspec));
5479 }
5480
5481 Address MacroAssembler::constant_oop_address(jobject obj) {
5482 #ifdef ASSERT
5483 {
5484 ThreadInVMfromUnknown tiv;
5485 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5486 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5487 }
5488 #endif
5489 int oop_index = oop_recorder()->find_index(obj);
5490 return Address((address)obj, oop_Relocation::spec(oop_index));
5491 }
5492
5493 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5494 void MacroAssembler::tlab_allocate(Register obj,
5495 Register var_size_in_bytes,
5496 int con_size_in_bytes,
5497 Register t1,
5498 Register t2,
5499 Label& slow_case) {
5500 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5501 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5502 }
5503
5504 void MacroAssembler::verify_tlab() {
5505 #ifdef ASSERT
5506 if (UseTLAB && VerifyOops) {
5507 Label next, ok;
5508
5509 stp(rscratch2, rscratch1, Address(pre(sp, -16)));
5510
5511 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5512 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5513 cmp(rscratch2, rscratch1);
5514 br(Assembler::HS, next);
5515 STOP("assert(top >= start)");
5516 should_not_reach_here();
5517
5518 bind(next);
5519 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5520 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5521 cmp(rscratch2, rscratch1);
5522 br(Assembler::HS, ok);
5523 STOP("assert(top <= end)");
5524 should_not_reach_here();
5525
5526 bind(ok);
5527 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5528 }
5529 #endif
5530 }
5531
5532 // Writes to stack successive pages until offset reached to check for
5533 // stack overflow + shadow pages. This clobbers tmp.
5534 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5535 assert_different_registers(tmp, size, rscratch1);
5536 mov(tmp, sp);
5537 // Bang stack for total size given plus shadow page size.
5538 // Bang one page at a time because large size can bang beyond yellow and
5539 // red zones.
5540 Label loop;
5541 mov(rscratch1, (int)os::vm_page_size());
5542 bind(loop);
5543 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5544 subsw(size, size, rscratch1);
5545 str(size, Address(tmp));
5546 br(Assembler::GT, loop);
5547
5548 // Bang down shadow pages too.
5549 // At this point, (tmp-0) is the last address touched, so don't
5550 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5551 // was post-decremented.) Skip this address by starting at i=1, and
5598 } else {
5599 uint64_t target = (uint64_t)dest.target();
5600 uint64_t adrp_target
5601 = (target & 0xffffffffULL) | ((uint64_t)pc() & 0xffff00000000ULL);
5602
5603 _adrp(reg1, (address)adrp_target);
5604 movk(reg1, target >> 32, 32);
5605 }
5606 byte_offset = (uint64_t)dest.target() & 0xfff;
5607 }
5608
5609 void MacroAssembler::load_byte_map_base(Register reg) {
5610 CardTable::CardValue* byte_map_base =
5611 ((CardTableBarrierSet*)(BarrierSet::barrier_set()))->card_table()->byte_map_base();
5612
5613 // Strictly speaking the byte_map_base isn't an address at all, and it might
5614 // even be negative. It is thus materialised as a constant.
5615 mov(reg, (uint64_t)byte_map_base);
5616 }
5617
5618 void MacroAssembler::build_frame(int framesize) {
5619 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5620 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5621 protect_return_address();
5622 if (framesize < ((1 << 9) + 2 * wordSize)) {
5623 sub(sp, sp, framesize);
5624 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5625 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5626 } else {
5627 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5628 if (PreserveFramePointer) mov(rfp, sp);
5629 if (framesize < ((1 << 12) + 2 * wordSize))
5630 sub(sp, sp, framesize - 2 * wordSize);
5631 else {
5632 mov(rscratch1, framesize - 2 * wordSize);
5633 sub(sp, sp, rscratch1);
5634 }
5635 }
5636 verify_cross_modify_fence_not_required();
5637 }
5638
5639 void MacroAssembler::remove_frame(int framesize) {
5640 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5641 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5642 if (framesize < ((1 << 9) + 2 * wordSize)) {
5643 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5644 add(sp, sp, framesize);
5645 } else {
5646 if (framesize < ((1 << 12) + 2 * wordSize))
5647 add(sp, sp, framesize - 2 * wordSize);
5648 else {
5649 mov(rscratch1, framesize - 2 * wordSize);
5650 add(sp, sp, rscratch1);
5651 }
5652 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5653 }
5654 authenticate_return_address();
5655 }
5656
5657
5658 // This method counts leading positive bytes (highest bit not set) in provided byte array
5659 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
5660 // Simple and most common case of aligned small array which is not at the
5661 // end of memory page is placed here. All other cases are in stub.
5662 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
5663 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
5664 assert_different_registers(ary1, len, result);
5665
5666 mov(result, len);
5667 cmpw(len, 0);
5668 br(LE, DONE);
5669 cmpw(len, 4 * wordSize);
5670 br(GE, STUB_LONG); // size > 32 then go to stub
5671
5672 int shift = 64 - exact_log2(os::vm_page_size());
5673 lsl(rscratch1, ary1, shift);
5674 mov(rscratch2, (size_t)(4 * wordSize) << shift);
5675 adds(rscratch2, rscratch1, rscratch2); // At end of page?
5676 br(CS, STUB); // at the end of page then go to stub
6554 // On other systems, the helper is a usual C function.
6555 //
6556 void MacroAssembler::get_thread(Register dst) {
6557 RegSet saved_regs =
6558 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
6559 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
6560
6561 protect_return_address();
6562 push(saved_regs, sp);
6563
6564 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6565 blr(lr);
6566 if (dst != c_rarg0) {
6567 mov(dst, c_rarg0);
6568 }
6569
6570 pop(saved_regs, sp);
6571 authenticate_return_address();
6572 }
6573
6574 void MacroAssembler::cache_wb(Address line) {
6575 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
6576 assert(line.index() == noreg, "index should be noreg");
6577 assert(line.offset() == 0, "offset should be 0");
6578 // would like to assert this
6579 // assert(line._ext.shift == 0, "shift should be zero");
6580 if (VM_Version::supports_dcpop()) {
6581 // writeback using clear virtual address to point of persistence
6582 dc(Assembler::CVAP, line.base());
6583 } else {
6584 // no need to generate anything as Unsafe.writebackMemory should
6585 // never invoke this stub
6586 }
6587 }
6588
6589 void MacroAssembler::cache_wbsync(bool is_pre) {
6590 // we only need a barrier post sync
6591 if (!is_pre) {
6592 membar(Assembler::AnyAny);
6593 }
6964 }
6965
6966 // Check if the lock-stack is full.
6967 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
6968 cmpw(top, (unsigned)LockStack::end_offset());
6969 br(Assembler::GE, slow);
6970
6971 // Check for recursion.
6972 subw(t, top, oopSize);
6973 ldr(t, Address(rthread, t));
6974 cmp(obj, t);
6975 br(Assembler::EQ, push);
6976
6977 // Check header for monitor (0b10).
6978 tst(mark, markWord::monitor_value);
6979 br(Assembler::NE, slow);
6980
6981 // Try to lock. Transition lock bits 0b01 => 0b00
6982 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
6983 orr(mark, mark, markWord::unlocked_value);
6984 eor(t, mark, markWord::unlocked_value);
6985 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
6986 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
6987 br(Assembler::NE, slow);
6988
6989 bind(push);
6990 // After successful lock, push object on lock-stack.
6991 str(obj, Address(rthread, top));
6992 addw(top, top, oopSize);
6993 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
6994 }
6995
6996 // Implements fast-unlocking.
6997 //
6998 // - obj: the object to be unlocked
6999 // - t1, t2, t3: temporary registers
7000 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7001 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7002 // cmpxchg clobbers rscratch1.
7003 assert_different_registers(obj, t1, t2, t3, rscratch1);
|
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "ci/ciInlineKlass.hpp"
30 #include "code/compiledIC.hpp"
31 #include "compiler/compileTask.hpp"
32 #include "compiler/disassembler.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "gc/shared/cardTableBarrierSet.hpp"
37 #include "gc/shared/cardTable.hpp"
38 #include "gc/shared/collectedHeap.hpp"
39 #include "gc/shared/tlab_globals.hpp"
40 #include "interpreter/bytecodeHistogram.hpp"
41 #include "interpreter/interpreter.hpp"
42 #include "interpreter/interpreterRuntime.hpp"
43 #include "jvm.h"
44 #include "memory/resourceArea.hpp"
45 #include "memory/universe.hpp"
46 #include "nativeInst_aarch64.hpp"
47 #include "oops/accessDecorators.hpp"
48 #include "oops/compressedKlass.inline.hpp"
49 #include "oops/compressedOops.inline.hpp"
50 #include "oops/klass.inline.hpp"
51 #include "oops/resolvedFieldEntry.hpp"
52 #include "runtime/continuation.hpp"
53 #include "runtime/globals.hpp"
54 #include "runtime/icache.hpp"
55 #include "runtime/interfaceSupport.inline.hpp"
56 #include "runtime/javaThread.hpp"
57 #include "runtime/jniHandles.inline.hpp"
58 #include "runtime/sharedRuntime.hpp"
59 #include "runtime/signature_cc.hpp"
60 #include "runtime/stubRoutines.hpp"
61 #include "utilities/globalDefinitions.hpp"
62 #include "utilities/powerOfTwo.hpp"
63 #include "vmreg_aarch64.inline.hpp"
64 #ifdef COMPILER1
65 #include "c1/c1_LIRAssembler.hpp"
66 #endif
67 #ifdef COMPILER2
68 #include "oops/oop.hpp"
69 #include "opto/compile.hpp"
70 #include "opto/node.hpp"
71 #include "opto/output.hpp"
72 #endif
73
74 #include <sys/types.h>
75
76 #ifdef PRODUCT
77 #define BLOCK_COMMENT(str) /* nothing */
78 #else
79 #define BLOCK_COMMENT(str) block_comment(str)
80 #endif
81 #define STOP(str) stop(str);
82 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
83
2016 ldarb(scratch, scratch);
2017 cmp(scratch, InstanceKlass::fully_initialized);
2018 br(Assembler::EQ, *L_fast_path);
2019
2020 // Fast path check: current thread is initializer thread
2021 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2022 cmp(rthread, scratch);
2023
2024 if (L_slow_path == &L_fallthrough) {
2025 br(Assembler::EQ, *L_fast_path);
2026 bind(*L_slow_path);
2027 } else if (L_fast_path == &L_fallthrough) {
2028 br(Assembler::NE, *L_slow_path);
2029 bind(*L_fast_path);
2030 } else {
2031 Unimplemented();
2032 }
2033 }
2034
2035 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2036 if (!VerifyOops || VerifyAdapterSharing) {
2037 // Below address of the code string confuses VerifyAdapterSharing
2038 // because it may differ between otherwise equivalent adapters.
2039 return;
2040 }
2041
2042 // Pass register number to verify_oop_subroutine
2043 const char* b = nullptr;
2044 {
2045 ResourceMark rm;
2046 stringStream ss;
2047 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2048 b = code_string(ss.as_string());
2049 }
2050 BLOCK_COMMENT("verify_oop {");
2051
2052 strip_return_address(); // This might happen within a stack frame.
2053 protect_return_address();
2054 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2055 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2056
2057 mov(r0, reg);
2058 movptr(rscratch1, (uintptr_t)(address)b);
2059
2060 // call indirectly to solve generation ordering problem
2061 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2062 ldr(rscratch2, Address(rscratch2));
2063 blr(rscratch2);
2064
2065 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2066 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2067 authenticate_return_address();
2068
2069 BLOCK_COMMENT("} verify_oop");
2070 }
2071
2072 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2073 if (!VerifyOops || VerifyAdapterSharing) {
2074 // Below address of the code string confuses VerifyAdapterSharing
2075 // because it may differ between otherwise equivalent adapters.
2076 return;
2077 }
2078
2079 const char* b = nullptr;
2080 {
2081 ResourceMark rm;
2082 stringStream ss;
2083 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2084 b = code_string(ss.as_string());
2085 }
2086 BLOCK_COMMENT("verify_oop_addr {");
2087
2088 strip_return_address(); // This might happen within a stack frame.
2089 protect_return_address();
2090 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2091 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2092
2093 // addr may contain sp so we will have to adjust it based on the
2094 // pushes that we just did.
2095 if (addr.uses(sp)) {
2096 lea(r0, addr);
2097 ldr(r0, Address(r0, 4 * wordSize));
2155 call_VM_leaf_base(entry_point, 1);
2156 }
2157
2158 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2159 assert_different_registers(arg_1, c_rarg0);
2160 pass_arg0(this, arg_0);
2161 pass_arg1(this, arg_1);
2162 call_VM_leaf_base(entry_point, 2);
2163 }
2164
2165 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2166 Register arg_1, Register arg_2) {
2167 assert_different_registers(arg_1, c_rarg0);
2168 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2169 pass_arg0(this, arg_0);
2170 pass_arg1(this, arg_1);
2171 pass_arg2(this, arg_2);
2172 call_VM_leaf_base(entry_point, 3);
2173 }
2174
2175 void MacroAssembler::super_call_VM_leaf(address entry_point) {
2176 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2177 }
2178
2179 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2180 pass_arg0(this, arg_0);
2181 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2182 }
2183
2184 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2185
2186 assert_different_registers(arg_0, c_rarg1);
2187 pass_arg1(this, arg_1);
2188 pass_arg0(this, arg_0);
2189 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2190 }
2191
2192 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2193 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2194 assert_different_registers(arg_1, c_rarg2);
2195 pass_arg2(this, arg_2);
2196 pass_arg1(this, arg_1);
2197 pass_arg0(this, arg_0);
2198 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2204 assert_different_registers(arg_2, c_rarg3);
2205 pass_arg3(this, arg_3);
2206 pass_arg2(this, arg_2);
2207 pass_arg1(this, arg_1);
2208 pass_arg0(this, arg_0);
2209 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2210 }
2211
2212 void MacroAssembler::null_check(Register reg, int offset) {
2213 if (needs_explicit_null_check(offset)) {
2214 // provoke OS null exception if reg is null by
2215 // accessing M[reg] w/o changing any registers
2216 // NOTE: this is plenty to provoke a segv
2217 ldr(zr, Address(reg));
2218 } else {
2219 // nothing to do, (later) access of M[reg + offset]
2220 // will provoke OS null exception if reg is null
2221 }
2222 }
2223
2224 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2225 assert_different_registers(markword, rscratch2);
2226 mov(rscratch2, markWord::inline_type_mask_in_place);
2227 andr(markword, markword, rscratch2);
2228 mov(rscratch2, markWord::inline_type_pattern);
2229 cmp(markword, rscratch2);
2230 br(Assembler::EQ, is_inline_type);
2231 }
2232
2233 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2234 assert_different_registers(tmp, rscratch1);
2235 if (can_be_null) {
2236 cbz(object, not_inline_type);
2237 }
2238 const int is_inline_type_mask = markWord::inline_type_pattern;
2239 ldr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2240 mov(rscratch1, is_inline_type_mask);
2241 andr(tmp, tmp, rscratch1);
2242 cmp(tmp, rscratch1);
2243 br(Assembler::NE, not_inline_type);
2244 }
2245
2246 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2247 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2248 tbnz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, is_null_free_inline_type);
2249 }
2250
2251 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2252 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2253 tbz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, not_null_free_inline_type);
2254 }
2255
2256 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2257 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2258 tbnz(flags, ResolvedFieldEntry::is_flat_shift, is_flat);
2259 }
2260
2261 void MacroAssembler::test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker) {
2262 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2263 tbnz(flags, ResolvedFieldEntry::has_null_marker_shift, has_null_marker);
2264 }
2265
2266 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2267 Label test_mark_word;
2268 // load mark word
2269 ldr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2270 // check displaced
2271 tst(temp_reg, markWord::unlocked_value);
2272 br(Assembler::NE, test_mark_word);
2273 // slow path use klass prototype
2274 load_prototype_header(temp_reg, oop);
2275
2276 bind(test_mark_word);
2277 andr(temp_reg, temp_reg, test_bit);
2278 if (jmp_set) {
2279 cbnz(temp_reg, jmp_label);
2280 } else {
2281 cbz(temp_reg, jmp_label);
2282 }
2283 }
2284
2285 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array) {
2286 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2287 }
2288
2289 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2290 Label&is_non_flat_array) {
2291 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2292 }
2293
2294 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array) {
2295 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2296 }
2297
2298 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2299 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2300 }
2301
2302 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2303 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2304 br(Assembler::NE, is_flat_array);
2305 }
2306
2307 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
2308 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2309 br(Assembler::EQ, is_non_flat_array);
2310 }
2311
2312 // MacroAssembler protected routines needed to implement
2313 // public methods
2314
2315 void MacroAssembler::mov(Register r, Address dest) {
2316 code_section()->relocate(pc(), dest.rspec());
2317 uint64_t imm64 = (uint64_t)dest.target();
2318 movptr(r, imm64);
2319 }
2320
2321 // Move a constant pointer into r. In AArch64 mode the virtual
2322 // address space is 48 bits in size, so we only need three
2323 // instructions to create a patchable instruction sequence that can
2324 // reach anywhere.
2325 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2326 #ifndef PRODUCT
2327 {
2328 char buffer[64];
2329 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2330 block_comment(buffer);
2331 }
4992 adrp(rscratch1, src2, offset);
4993 ldr(rscratch1, Address(rscratch1, offset));
4994 cmp(src1, rscratch1);
4995 }
4996
4997 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
4998 cmp(obj1, obj2);
4999 }
5000
5001 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5002 load_method_holder(rresult, rmethod);
5003 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5004 }
5005
5006 void MacroAssembler::load_method_holder(Register holder, Register method) {
5007 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5008 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5009 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5010 }
5011
5012 void MacroAssembler::load_metadata(Register dst, Register src) {
5013 if (UseCompactObjectHeaders) {
5014 load_narrow_klass_compact(dst, src);
5015 } else if (UseCompressedClassPointers) {
5016 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5017 } else {
5018 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5019 }
5020 }
5021
5022 // Loads the obj's Klass* into dst.
5023 // Preserves all registers (incl src, rscratch1 and rscratch2).
5024 // Input:
5025 // src - the oop we want to load the klass from.
5026 // dst - output narrow klass.
5027 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5028 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5029 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5030 lsr(dst, dst, markWord::klass_shift);
5031 }
5032
5033 void MacroAssembler::load_klass(Register dst, Register src) {
5034 if (UseCompactObjectHeaders) {
5035 load_narrow_klass_compact(dst, src);
5036 decode_klass_not_null(dst);
5037 } else if (UseCompressedClassPointers) {
5038 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5039 decode_klass_not_null(dst);
5040 } else {
5041 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5112 }
5113 cmp(klass, tmp);
5114 }
5115
5116 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5117 if (UseCompactObjectHeaders) {
5118 load_narrow_klass_compact(tmp1, obj1);
5119 load_narrow_klass_compact(tmp2, obj2);
5120 cmpw(tmp1, tmp2);
5121 } else if (UseCompressedClassPointers) {
5122 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5123 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5124 cmpw(tmp1, tmp2);
5125 } else {
5126 ldr(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5127 ldr(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5128 cmp(tmp1, tmp2);
5129 }
5130 }
5131
5132 void MacroAssembler::load_prototype_header(Register dst, Register src) {
5133 load_klass(dst, src);
5134 ldr(dst, Address(dst, Klass::prototype_header_offset()));
5135 }
5136
5137 void MacroAssembler::store_klass(Register dst, Register src) {
5138 // FIXME: Should this be a store release? concurrent gcs assumes
5139 // klass length is valid if klass field is not null.
5140 assert(!UseCompactObjectHeaders, "not with compact headers");
5141 if (UseCompressedClassPointers) {
5142 encode_klass_not_null(src);
5143 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5144 } else {
5145 str(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5146 }
5147 }
5148
5149 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5150 assert(!UseCompactObjectHeaders, "not with compact headers");
5151 if (UseCompressedClassPointers) {
5152 // Store to klass gap in destination
5153 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5154 }
5155 }
5156
5518 if (as_raw) {
5519 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5520 } else {
5521 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5522 }
5523 }
5524
5525 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5526 Address dst, Register val,
5527 Register tmp1, Register tmp2, Register tmp3) {
5528 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5529 decorators = AccessInternal::decorator_fixup(decorators, type);
5530 bool as_raw = (decorators & AS_RAW) != 0;
5531 if (as_raw) {
5532 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5533 } else {
5534 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5535 }
5536 }
5537
5538 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5539 Register inline_layout_info) {
5540 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5541 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5542 }
5543
5544 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5545 ldr(offset, Address(inline_klass, InstanceKlass::adr_inlineklass_fixed_block_offset()));
5546 ldrw(offset, Address(offset, InlineKlass::payload_offset_offset()));
5547 }
5548
5549 void MacroAssembler::payload_address(Register oop, Register data, Register inline_klass) {
5550 // ((address) (void*) o) + vk->payload_offset();
5551 Register offset = (data == oop) ? rscratch1 : data;
5552 payload_offset(inline_klass, offset);
5553 if (data == oop) {
5554 add(data, data, offset);
5555 } else {
5556 lea(data, Address(oop, offset));
5557 }
5558 }
5559
5560 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
5561 Register index, Register data) {
5562 assert_different_registers(array, array_klass, index);
5563 assert_different_registers(rscratch1, array, index);
5564
5565 // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
5566 ldrw(rscratch1, Address(array_klass, Klass::layout_helper_offset()));
5567
5568 // Klass::layout_helper_log2_element_size(lh)
5569 // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
5570 lsr(rscratch1, rscratch1, Klass::_lh_log2_element_size_shift);
5571 andr(rscratch1, rscratch1, Klass::_lh_log2_element_size_mask);
5572 lslv(index, index, rscratch1);
5573
5574 add(data, array, index);
5575 add(data, data, arrayOopDesc::base_offset_in_bytes(T_FLAT_ELEMENT));
5576 }
5577
5578 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5579 Register tmp2, DecoratorSet decorators) {
5580 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5581 }
5582
5583 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5584 Register tmp2, DecoratorSet decorators) {
5585 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5586 }
5587
5588 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5589 Register tmp2, Register tmp3, DecoratorSet decorators) {
5590 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5591 }
5592
5593 // Used for storing nulls.
5594 void MacroAssembler::store_heap_oop_null(Address dst) {
5595 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5596 }
5597
5633 oop_index = oop_recorder()->allocate_metadata_index(obj);
5634 } else {
5635 oop_index = oop_recorder()->find_index(obj);
5636 }
5637 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5638 mov(dst, Address((address)obj, rspec));
5639 }
5640
5641 Address MacroAssembler::constant_oop_address(jobject obj) {
5642 #ifdef ASSERT
5643 {
5644 ThreadInVMfromUnknown tiv;
5645 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5646 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5647 }
5648 #endif
5649 int oop_index = oop_recorder()->find_index(obj);
5650 return Address((address)obj, oop_Relocation::spec(oop_index));
5651 }
5652
5653 // Object / value buffer allocation...
5654 void MacroAssembler::allocate_instance(Register klass, Register new_obj,
5655 Register t1, Register t2,
5656 bool clear_fields, Label& alloc_failed)
5657 {
5658 Label done, initialize_header, initialize_object, slow_case, slow_case_no_pop;
5659 Register layout_size = t1;
5660 assert(new_obj == r0, "needs to be r0");
5661 assert_different_registers(klass, new_obj, t1, t2);
5662
5663 // get instance_size in InstanceKlass (scaled to a count of bytes)
5664 ldrw(layout_size, Address(klass, Klass::layout_helper_offset()));
5665 // test to see if it is malformed in some way
5666 tst(layout_size, Klass::_lh_instance_slow_path_bit);
5667 br(Assembler::NE, slow_case_no_pop);
5668
5669 // Allocate the instance:
5670 // If TLAB is enabled:
5671 // Try to allocate in the TLAB.
5672 // If fails, go to the slow path.
5673 // Initialize the allocation.
5674 // Exit.
5675 //
5676 // Go to slow path.
5677
5678 if (UseTLAB) {
5679 push(klass);
5680 tlab_allocate(new_obj, layout_size, 0, klass, t2, slow_case);
5681 if (ZeroTLAB || (!clear_fields)) {
5682 // the fields have been already cleared
5683 b(initialize_header);
5684 } else {
5685 // initialize both the header and fields
5686 b(initialize_object);
5687 }
5688
5689 if (clear_fields) {
5690 // The object is initialized before the header. If the object size is
5691 // zero, go directly to the header initialization.
5692 bind(initialize_object);
5693 int header_size = oopDesc::header_size() * HeapWordSize;
5694 assert(is_aligned(header_size, BytesPerLong), "oop header size must be 8-byte-aligned");
5695 subs(layout_size, layout_size, header_size);
5696 br(Assembler::EQ, initialize_header);
5697
5698 // Initialize topmost object field, divide size by 8, check if odd and
5699 // test if zero.
5700
5701 #ifdef ASSERT
5702 // make sure instance_size was multiple of 8
5703 Label L;
5704 tst(layout_size, 7);
5705 br(Assembler::EQ, L);
5706 stop("object size is not multiple of 8 - adjust this code");
5707 bind(L);
5708 // must be > 0, no extra check needed here
5709 #endif
5710
5711 lsr(layout_size, layout_size, LogBytesPerLong);
5712
5713 // initialize remaining object fields: instance_size was a multiple of 8
5714 {
5715 Label loop;
5716 Register base = t2;
5717
5718 bind(loop);
5719 add(rscratch1, new_obj, layout_size, Assembler::LSL, LogBytesPerLong);
5720 str(zr, Address(rscratch1, header_size - 1*oopSize));
5721 subs(layout_size, layout_size, 1);
5722 br(Assembler::NE, loop);
5723 }
5724 } // clear_fields
5725
5726 // initialize object header only.
5727 bind(initialize_header);
5728 pop(klass);
5729 Register mark_word = t2;
5730 if (UseCompactObjectHeaders || EnableValhalla) {
5731 ldr(mark_word, Address(klass, Klass::prototype_header_offset()));
5732 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5733 } else {
5734 mov(mark_word, (intptr_t)markWord::prototype().value());
5735 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5736 }
5737 if (!UseCompactObjectHeaders) {
5738 store_klass_gap(new_obj, zr); // zero klass gap for compressed oops
5739 mov(t2, klass); // preserve klass
5740 store_klass(new_obj, t2); // src klass reg is potentially compressed
5741 }
5742 b(done);
5743 }
5744
5745 if (UseTLAB) {
5746 bind(slow_case);
5747 pop(klass);
5748 }
5749 bind(slow_case_no_pop);
5750 b(alloc_failed);
5751
5752 bind(done);
5753 }
5754
5755 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5756 void MacroAssembler::tlab_allocate(Register obj,
5757 Register var_size_in_bytes,
5758 int con_size_in_bytes,
5759 Register t1,
5760 Register t2,
5761 Label& slow_case) {
5762 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5763 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5764 }
5765
5766 void MacroAssembler::verify_tlab() {
5767 #ifdef ASSERT
5768 if (UseTLAB && VerifyOops) {
5769 Label next, ok;
5770
5771 stp(rscratch2, rscratch1, Address(pre(sp, -16)));
5772
5773 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5774 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5775 cmp(rscratch2, rscratch1);
5776 br(Assembler::HS, next);
5777 STOP("assert(top >= start)");
5778 should_not_reach_here();
5779
5780 bind(next);
5781 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5782 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5783 cmp(rscratch2, rscratch1);
5784 br(Assembler::HS, ok);
5785 STOP("assert(top <= end)");
5786 should_not_reach_here();
5787
5788 bind(ok);
5789 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5790 }
5791 #endif
5792 }
5793
5794 void MacroAssembler::get_inline_type_field_klass(Register holder_klass, Register index, Register inline_klass) {
5795 inline_layout_info(holder_klass, index, inline_klass);
5796 ldr(inline_klass, Address(inline_klass, InlineLayoutInfo::klass_offset()));
5797 }
5798
5799 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
5800 assert_different_registers(holder_klass, index, layout_info);
5801 InlineLayoutInfo array[2];
5802 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
5803 if (is_power_of_2(size)) {
5804 lsl(index, index, log2i_exact(size)); // Scale index by power of 2
5805 } else {
5806 mov(layout_info, size);
5807 mul(index, index, layout_info); // Scale the index to be the entry index * array_element_size
5808 }
5809 ldr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
5810 add(layout_info, layout_info, Array<InlineLayoutInfo>::base_offset_in_bytes());
5811 lea(layout_info, Address(layout_info, index));
5812 }
5813
5814 // Writes to stack successive pages until offset reached to check for
5815 // stack overflow + shadow pages. This clobbers tmp.
5816 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5817 assert_different_registers(tmp, size, rscratch1);
5818 mov(tmp, sp);
5819 // Bang stack for total size given plus shadow page size.
5820 // Bang one page at a time because large size can bang beyond yellow and
5821 // red zones.
5822 Label loop;
5823 mov(rscratch1, (int)os::vm_page_size());
5824 bind(loop);
5825 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5826 subsw(size, size, rscratch1);
5827 str(size, Address(tmp));
5828 br(Assembler::GT, loop);
5829
5830 // Bang down shadow pages too.
5831 // At this point, (tmp-0) is the last address touched, so don't
5832 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5833 // was post-decremented.) Skip this address by starting at i=1, and
5880 } else {
5881 uint64_t target = (uint64_t)dest.target();
5882 uint64_t adrp_target
5883 = (target & 0xffffffffULL) | ((uint64_t)pc() & 0xffff00000000ULL);
5884
5885 _adrp(reg1, (address)adrp_target);
5886 movk(reg1, target >> 32, 32);
5887 }
5888 byte_offset = (uint64_t)dest.target() & 0xfff;
5889 }
5890
5891 void MacroAssembler::load_byte_map_base(Register reg) {
5892 CardTable::CardValue* byte_map_base =
5893 ((CardTableBarrierSet*)(BarrierSet::barrier_set()))->card_table()->byte_map_base();
5894
5895 // Strictly speaking the byte_map_base isn't an address at all, and it might
5896 // even be negative. It is thus materialised as a constant.
5897 mov(reg, (uint64_t)byte_map_base);
5898 }
5899
5900 #ifdef ASSERT
5901 void MacroAssembler::build_frame(int framesize) {
5902 build_frame(framesize, false);
5903 }
5904 #endif
5905
5906 void MacroAssembler::build_frame(int framesize DEBUG_ONLY(COMMA bool zap_rfp_lr_spills)) {
5907 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5908 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5909 protect_return_address();
5910 if (framesize < ((1 << 9) + 2 * wordSize)) {
5911 sub(sp, sp, framesize);
5912 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
5913 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
5914 stp(rscratch1, rscratch1, Address(sp, framesize - 2 * wordSize));
5915 } else {
5916 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5917 }
5918 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5919 } else {
5920 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
5921 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
5922 stp(rscratch1, rscratch1, Address(pre(sp, -2 * wordSize)));
5923 } else {
5924 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5925 }
5926 if (PreserveFramePointer) mov(rfp, sp);
5927 if (framesize < ((1 << 12) + 2 * wordSize))
5928 sub(sp, sp, framesize - 2 * wordSize);
5929 else {
5930 mov(rscratch1, framesize - 2 * wordSize);
5931 sub(sp, sp, rscratch1);
5932 }
5933 }
5934 verify_cross_modify_fence_not_required();
5935 }
5936
5937 void MacroAssembler::remove_frame(int framesize) {
5938 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5939 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5940 if (framesize < ((1 << 9) + 2 * wordSize)) {
5941 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5942 add(sp, sp, framesize);
5943 } else {
5944 if (framesize < ((1 << 12) + 2 * wordSize))
5945 add(sp, sp, framesize - 2 * wordSize);
5946 else {
5947 mov(rscratch1, framesize - 2 * wordSize);
5948 add(sp, sp, rscratch1);
5949 }
5950 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5951 }
5952 authenticate_return_address();
5953 }
5954
5955 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
5956 if (needs_stack_repair) {
5957 // Remove the extension of the caller's frame used for inline type unpacking
5958 //
5959 // Right now the stack looks like this:
5960 //
5961 // | Arguments from caller |
5962 // |---------------------------| <-- caller's SP
5963 // | Saved LR #1 |
5964 // | Saved FP #1 |
5965 // |---------------------------|
5966 // | Extension space for |
5967 // | inline arg (un)packing |
5968 // |---------------------------| <-- start of this method's frame
5969 // | Saved LR #2 |
5970 // | Saved FP #2 |
5971 // |---------------------------| <-- FP
5972 // | sp_inc |
5973 // | method locals |
5974 // |---------------------------| <-- SP
5975 //
5976 // There are two copies of FP and LR on the stack. They will be identical at
5977 // first, but that can change.
5978 // If the caller has been deoptimized, LR #1 will be patched to point at the
5979 // deopt blob, and LR #2 will still point into the old method.
5980 // If the saved FP (x29) was not used as the frame pointer, but to store an
5981 // oop, the GC will be aware only of FP #1 as the spilled location of x29 and
5982 // will fix only this one. Overall, FP/LR #2 are not reliable and are simply
5983 // needed to add space between the extension space and the locals, as there
5984 // would be between the real arguments and the locals if we don't need to
5985 // do unpacking.
5986 //
5987 // When restoring, one must then load FP #1 into x29, and LR #1 into x30,
5988 // while keeping in mind that from the scalarized entry point, there will be
5989 // only one copy of each.
5990 //
5991 // The sp_inc stack slot holds the total size of the frame including the
5992 // extension space minus two words for the saved FP and LR. That is how to
5993 // find FP/LR #1. This size is expressed in bytes. Be careful when using it
5994 // from C++ in pointer arithmetic; you might need to divide it by wordSize.
5995 //
5996 // TODO 8371993 store fake values instead of LR/FP#2
5997
5998 int sp_inc_offset = initial_framesize - 3 * wordSize; // Immediately below saved LR and FP
5999
6000 ldr(rscratch1, Address(sp, sp_inc_offset));
6001 add(sp, sp, rscratch1);
6002 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6003 } else {
6004 remove_frame(initial_framesize);
6005 }
6006 }
6007
6008 void MacroAssembler::save_stack_increment(int sp_inc, int frame_size) {
6009 int real_frame_size = frame_size + sp_inc;
6010 assert(sp_inc == 0 || sp_inc > 2*wordSize, "invalid sp_inc value");
6011 assert(real_frame_size >= 2*wordSize, "frame size must include FP/LR space");
6012 assert((real_frame_size & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6013
6014 int sp_inc_offset = frame_size - 3 * wordSize; // Immediately below saved LR and FP
6015
6016 // Subtract two words for the saved FP and LR as these will be popped
6017 // separately. See remove_frame above.
6018 mov(rscratch1, real_frame_size - 2*wordSize);
6019 str(rscratch1, Address(sp, sp_inc_offset));
6020 }
6021
6022 // This method counts leading positive bytes (highest bit not set) in provided byte array
6023 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
6024 // Simple and most common case of aligned small array which is not at the
6025 // end of memory page is placed here. All other cases are in stub.
6026 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
6027 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
6028 assert_different_registers(ary1, len, result);
6029
6030 mov(result, len);
6031 cmpw(len, 0);
6032 br(LE, DONE);
6033 cmpw(len, 4 * wordSize);
6034 br(GE, STUB_LONG); // size > 32 then go to stub
6035
6036 int shift = 64 - exact_log2(os::vm_page_size());
6037 lsl(rscratch1, ary1, shift);
6038 mov(rscratch2, (size_t)(4 * wordSize) << shift);
6039 adds(rscratch2, rscratch1, rscratch2); // At end of page?
6040 br(CS, STUB); // at the end of page then go to stub
6918 // On other systems, the helper is a usual C function.
6919 //
6920 void MacroAssembler::get_thread(Register dst) {
6921 RegSet saved_regs =
6922 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
6923 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
6924
6925 protect_return_address();
6926 push(saved_regs, sp);
6927
6928 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6929 blr(lr);
6930 if (dst != c_rarg0) {
6931 mov(dst, c_rarg0);
6932 }
6933
6934 pop(saved_regs, sp);
6935 authenticate_return_address();
6936 }
6937
6938 #ifdef COMPILER2
6939 // C2 compiled method's prolog code
6940 // Moved here from aarch64.ad to support Valhalla code belows
6941 void MacroAssembler::verified_entry(Compile* C, int sp_inc) {
6942 if (C->clinit_barrier_on_entry()) {
6943 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
6944
6945 Label L_skip_barrier;
6946
6947 mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
6948 clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
6949 far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
6950 bind(L_skip_barrier);
6951 }
6952
6953 if (C->max_vector_size() > 0) {
6954 reinitialize_ptrue();
6955 }
6956
6957 int bangsize = C->output()->bang_size_in_bytes();
6958 if (C->output()->need_stack_bang(bangsize))
6959 generate_stack_overflow_check(bangsize);
6960
6961 // n.b. frame size includes space for return pc and rfp
6962 const long framesize = C->output()->frame_size_in_bytes();
6963 build_frame(framesize DEBUG_ONLY(COMMA sp_inc != 0));
6964
6965 if (C->needs_stack_repair()) {
6966 save_stack_increment(sp_inc, framesize);
6967 }
6968
6969 if (VerifyStackAtCalls) {
6970 Unimplemented();
6971 }
6972 }
6973 #endif // COMPILER2
6974
6975 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
6976 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
6977 // An inline type might be returned. If fields are in registers we
6978 // need to allocate an inline type instance and initialize it with
6979 // the value of the fields.
6980 Label skip;
6981 // We only need a new buffered inline type if a new one is not returned
6982 tbz(r0, 0, skip);
6983 int call_offset = -1;
6984
6985 // Be careful not to clobber r1-7 which hold returned fields
6986 // Also do not use callee-saved registers as these may be live in the interpreter
6987 Register tmp1 = r13, tmp2 = r14, klass = r15, r0_preserved = r12;
6988
6989 // The following code is similar to allocate_instance but has some slight differences,
6990 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
6991 // allocating is not necessary if vk != nullptr, etc. allocate_instance is not aware of these.
6992 Label slow_case;
6993 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
6994 mov(r0_preserved, r0); // save r0 for slow_case since *_allocate may corrupt it when allocation failed
6995
6996 if (vk != nullptr) {
6997 // Called from C1, where the return type is statically known.
6998 movptr(klass, (intptr_t)vk->get_InlineKlass());
6999 jint lh = vk->layout_helper();
7000 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
7001 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
7002 tlab_allocate(r0, noreg, lh, tmp1, tmp2, slow_case);
7003 } else {
7004 b(slow_case);
7005 }
7006 } else {
7007 // Call from interpreter. R0 contains ((the InlineKlass* of the return type) | 0x01)
7008 andr(klass, r0, -2);
7009 if (UseTLAB) {
7010 ldrw(tmp2, Address(klass, Klass::layout_helper_offset()));
7011 tst(tmp2, Klass::_lh_instance_slow_path_bit);
7012 br(Assembler::NE, slow_case);
7013 tlab_allocate(r0, tmp2, 0, tmp1, tmp2, slow_case);
7014 } else {
7015 b(slow_case);
7016 }
7017 }
7018 if (UseTLAB) {
7019 // 2. Initialize buffered inline instance header
7020 Register buffer_obj = r0;
7021 if (UseCompactObjectHeaders) {
7022 ldr(rscratch1, Address(klass, Klass::prototype_header_offset()));
7023 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7024 } else {
7025 mov(rscratch1, (intptr_t)markWord::inline_type_prototype().value());
7026 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7027 store_klass_gap(buffer_obj, zr);
7028 if (vk == nullptr) {
7029 // store_klass corrupts klass, so save it for later use (interpreter case only).
7030 mov(tmp1, klass);
7031 }
7032 store_klass(buffer_obj, klass);
7033 klass = tmp1;
7034 }
7035 // 3. Initialize its fields with an inline class specific handler
7036 if (vk != nullptr) {
7037 far_call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
7038 } else {
7039 ldr(tmp1, Address(klass, InstanceKlass::adr_inlineklass_fixed_block_offset()));
7040 ldr(tmp1, Address(tmp1, InlineKlass::pack_handler_offset()));
7041 blr(tmp1);
7042 }
7043
7044 membar(Assembler::StoreStore);
7045 b(skip);
7046 } else {
7047 // Must have already branched to slow_case above.
7048 DEBUG_ONLY(should_not_reach_here());
7049 }
7050 bind(slow_case);
7051 // We failed to allocate a new inline type, fall back to a runtime
7052 // call. Some oop field may be live in some registers but we can't
7053 // tell. That runtime call will take care of preserving them
7054 // across a GC if there's one.
7055 mov(r0, r0_preserved);
7056
7057 if (from_interpreter) {
7058 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
7059 } else {
7060 far_call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
7061 call_offset = offset();
7062 }
7063 membar(Assembler::StoreStore);
7064
7065 bind(skip);
7066 return call_offset;
7067 }
7068
7069 // Move a value between registers/stack slots and update the reg_state
7070 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
7071 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
7072 if (reg_state[to->value()] == reg_written) {
7073 return true; // Already written
7074 }
7075
7076 if (from != to && bt != T_VOID) {
7077 if (reg_state[to->value()] == reg_readonly) {
7078 return false; // Not yet writable
7079 }
7080 if (from->is_reg()) {
7081 if (to->is_reg()) {
7082 if (from->is_Register() && to->is_Register()) {
7083 mov(to->as_Register(), from->as_Register());
7084 } else if (from->is_FloatRegister() && to->is_FloatRegister()) {
7085 fmovd(to->as_FloatRegister(), from->as_FloatRegister());
7086 } else {
7087 ShouldNotReachHere();
7088 }
7089 } else {
7090 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7091 Address to_addr = Address(sp, st_off);
7092 if (from->is_FloatRegister()) {
7093 if (bt == T_DOUBLE) {
7094 strd(from->as_FloatRegister(), to_addr);
7095 } else {
7096 assert(bt == T_FLOAT, "must be float");
7097 strs(from->as_FloatRegister(), to_addr);
7098 }
7099 } else {
7100 str(from->as_Register(), to_addr);
7101 }
7102 }
7103 } else {
7104 Address from_addr = Address(sp, from->reg2stack() * VMRegImpl::stack_slot_size);
7105 if (to->is_reg()) {
7106 if (to->is_FloatRegister()) {
7107 if (bt == T_DOUBLE) {
7108 ldrd(to->as_FloatRegister(), from_addr);
7109 } else {
7110 assert(bt == T_FLOAT, "must be float");
7111 ldrs(to->as_FloatRegister(), from_addr);
7112 }
7113 } else {
7114 ldr(to->as_Register(), from_addr);
7115 }
7116 } else {
7117 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7118 ldr(rscratch1, from_addr);
7119 str(rscratch1, Address(sp, st_off));
7120 }
7121 }
7122 }
7123
7124 // Update register states
7125 reg_state[from->value()] = reg_writable;
7126 reg_state[to->value()] = reg_written;
7127 return true;
7128 }
7129
7130 // Calculate the extra stack space required for packing or unpacking inline
7131 // args and adjust the stack pointer
7132 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
7133 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
7134 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
7135 assert(sp_inc > 0, "sanity");
7136
7137 // Save a copy of the FP and LR here for deoptimization patching and frame walking
7138 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
7139
7140 // Adjust the stack pointer. This will be repaired on return by MacroAssembler::remove_frame
7141 if (sp_inc < (1 << 9)) {
7142 sub(sp, sp, sp_inc); // Fits in an immediate
7143 } else {
7144 mov(rscratch1, sp_inc);
7145 sub(sp, sp, rscratch1);
7146 }
7147
7148 return sp_inc + 2 * wordSize; // Account for the FP/LR space
7149 }
7150
7151 // Read all fields from an inline type oop and store the values in registers/stack slots
7152 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
7153 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
7154 RegState reg_state[]) {
7155 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
7156 assert(from->is_valid(), "source must be valid");
7157 bool progress = false;
7158 #ifdef ASSERT
7159 const int start_offset = offset();
7160 #endif
7161
7162 Label L_null, L_notNull;
7163 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
7164 // TODO 8366717 We need to make sure that r14 (and potentially other long-life regs) are kept live in slowpath runtime calls in GC barriers
7165 Register tmp1 = r10;
7166 Register tmp2 = r11;
7167 Register fromReg = noreg;
7168 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, -1);
7169 bool done = true;
7170 bool mark_done = true;
7171 VMReg toReg;
7172 BasicType bt;
7173 // Check if argument requires a null check
7174 bool null_check = false;
7175 VMReg nullCheckReg;
7176 while (stream.next(nullCheckReg, bt)) {
7177 if (sig->at(stream.sig_index())._offset == -1) {
7178 null_check = true;
7179 break;
7180 }
7181 }
7182 stream.reset(sig_index, to_index);
7183 while (stream.next(toReg, bt)) {
7184 assert(toReg->is_valid(), "destination must be valid");
7185 int idx = (int)toReg->value();
7186 if (reg_state[idx] == reg_readonly) {
7187 if (idx != from->value()) {
7188 mark_done = false;
7189 }
7190 done = false;
7191 continue;
7192 } else if (reg_state[idx] == reg_written) {
7193 continue;
7194 }
7195 assert(reg_state[idx] == reg_writable, "must be writable");
7196 reg_state[idx] = reg_written;
7197 progress = true;
7198
7199 if (fromReg == noreg) {
7200 if (from->is_reg()) {
7201 fromReg = from->as_Register();
7202 } else {
7203 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size;
7204 ldr(tmp1, Address(sp, st_off));
7205 fromReg = tmp1;
7206 }
7207 if (null_check) {
7208 // Nullable inline type argument, emit null check
7209 cbz(fromReg, L_null);
7210 }
7211 }
7212 int off = sig->at(stream.sig_index())._offset;
7213 if (off == -1) {
7214 assert(null_check, "Missing null check at");
7215 if (toReg->is_stack()) {
7216 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7217 mov(tmp2, 1);
7218 str(tmp2, Address(sp, st_off));
7219 } else {
7220 mov(toReg->as_Register(), 1);
7221 }
7222 continue;
7223 }
7224 assert(off > 0, "offset in object should be positive");
7225 Address fromAddr = Address(fromReg, off);
7226 if (!toReg->is_FloatRegister()) {
7227 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
7228 if (is_reference_type(bt)) {
7229 load_heap_oop(dst, fromAddr, rscratch1, rscratch2);
7230 } else {
7231 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
7232 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
7233 }
7234 if (toReg->is_stack()) {
7235 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7236 str(dst, Address(sp, st_off));
7237 }
7238 } else if (bt == T_DOUBLE) {
7239 ldrd(toReg->as_FloatRegister(), fromAddr);
7240 } else {
7241 assert(bt == T_FLOAT, "must be float");
7242 ldrs(toReg->as_FloatRegister(), fromAddr);
7243 }
7244 }
7245 if (progress && null_check) {
7246 if (done) {
7247 b(L_notNull);
7248 bind(L_null);
7249 // Set null marker to zero to signal that the argument is null.
7250 // Also set all oop fields to zero to make the GC happy.
7251 stream.reset(sig_index, to_index);
7252 while (stream.next(toReg, bt)) {
7253 if (sig->at(stream.sig_index())._offset == -1 ||
7254 bt == T_OBJECT || bt == T_ARRAY) {
7255 if (toReg->is_stack()) {
7256 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7257 str(zr, Address(sp, st_off));
7258 } else {
7259 mov(toReg->as_Register(), zr);
7260 }
7261 }
7262 }
7263 bind(L_notNull);
7264 } else {
7265 bind(L_null);
7266 }
7267 }
7268
7269 // TODO 8366717 This is probably okay but looks fishy because stream is reset in the "Set null marker to zero" case just above. Same on x64.
7270 sig_index = stream.sig_index();
7271 to_index = stream.regs_index();
7272
7273 if (mark_done && reg_state[from->value()] != reg_written) {
7274 // This is okay because no one else will write to that slot
7275 reg_state[from->value()] = reg_writable;
7276 }
7277 from_index--;
7278 assert(progress || (start_offset == offset()), "should not emit code");
7279 return done;
7280 }
7281
7282 // Pack fields back into an inline type oop
7283 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
7284 VMRegPair* from, int from_count, int& from_index, VMReg to,
7285 RegState reg_state[], Register val_array) {
7286 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
7287 assert(to->is_valid(), "destination must be valid");
7288
7289 if (reg_state[to->value()] == reg_written) {
7290 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7291 return true; // Already written
7292 }
7293
7294 // The GC barrier expanded by store_heap_oop below may call into the
7295 // runtime so use callee-saved registers for any values that need to be
7296 // preserved. The GC barrier assembler should take care of saving the
7297 // Java argument registers.
7298 // TODO 8284443 Isn't it an issue if below code uses r14 as tmp when it contains a spilled value?
7299 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
7300 Register val_obj_tmp = r21;
7301 Register from_reg_tmp = r22;
7302 Register tmp1 = r14;
7303 Register tmp2 = r13;
7304 Register tmp3 = r12;
7305 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
7306
7307 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
7308
7309 if (reg_state[to->value()] == reg_readonly) {
7310 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
7311 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7312 return false; // Not yet writable
7313 }
7314 val_obj = val_obj_tmp;
7315 }
7316
7317 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
7318 load_heap_oop(val_obj, Address(val_array, index), tmp1, tmp2);
7319
7320 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
7321 VMReg fromReg;
7322 BasicType bt;
7323 Label L_null;
7324 while (stream.next(fromReg, bt)) {
7325 assert(fromReg->is_valid(), "source must be valid");
7326 reg_state[fromReg->value()] = reg_writable;
7327
7328 int off = sig->at(stream.sig_index())._offset;
7329 if (off == -1) {
7330 // Nullable inline type argument, emit null check
7331 Label L_notNull;
7332 if (fromReg->is_stack()) {
7333 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7334 ldrb(tmp2, Address(sp, ld_off));
7335 cbnz(tmp2, L_notNull);
7336 } else {
7337 cbnz(fromReg->as_Register(), L_notNull);
7338 }
7339 mov(val_obj, 0);
7340 b(L_null);
7341 bind(L_notNull);
7342 continue;
7343 }
7344
7345 assert(off > 0, "offset in object should be positive");
7346 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
7347
7348 // Pack the scalarized field into the value object.
7349 Address dst(val_obj, off);
7350 if (!fromReg->is_FloatRegister()) {
7351 Register src;
7352 if (fromReg->is_stack()) {
7353 src = from_reg_tmp;
7354 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7355 load_sized_value(src, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
7356 } else {
7357 src = fromReg->as_Register();
7358 }
7359 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
7360 if (is_reference_type(bt)) {
7361 store_heap_oop(dst, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
7362 } else {
7363 store_sized_value(dst, src, size_in_bytes);
7364 }
7365 } else if (bt == T_DOUBLE) {
7366 strd(fromReg->as_FloatRegister(), dst);
7367 } else {
7368 assert(bt == T_FLOAT, "must be float");
7369 strs(fromReg->as_FloatRegister(), dst);
7370 }
7371 }
7372 bind(L_null);
7373 sig_index = stream.sig_index();
7374 from_index = stream.regs_index();
7375
7376 assert(reg_state[to->value()] == reg_writable, "must have already been read");
7377 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
7378 assert(success, "to register must be writeable");
7379 return true;
7380 }
7381
7382 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
7383 return (reg->is_FloatRegister()) ? v8->as_VMReg() : r14->as_VMReg();
7384 }
7385
7386 void MacroAssembler::cache_wb(Address line) {
7387 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
7388 assert(line.index() == noreg, "index should be noreg");
7389 assert(line.offset() == 0, "offset should be 0");
7390 // would like to assert this
7391 // assert(line._ext.shift == 0, "shift should be zero");
7392 if (VM_Version::supports_dcpop()) {
7393 // writeback using clear virtual address to point of persistence
7394 dc(Assembler::CVAP, line.base());
7395 } else {
7396 // no need to generate anything as Unsafe.writebackMemory should
7397 // never invoke this stub
7398 }
7399 }
7400
7401 void MacroAssembler::cache_wbsync(bool is_pre) {
7402 // we only need a barrier post sync
7403 if (!is_pre) {
7404 membar(Assembler::AnyAny);
7405 }
7776 }
7777
7778 // Check if the lock-stack is full.
7779 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7780 cmpw(top, (unsigned)LockStack::end_offset());
7781 br(Assembler::GE, slow);
7782
7783 // Check for recursion.
7784 subw(t, top, oopSize);
7785 ldr(t, Address(rthread, t));
7786 cmp(obj, t);
7787 br(Assembler::EQ, push);
7788
7789 // Check header for monitor (0b10).
7790 tst(mark, markWord::monitor_value);
7791 br(Assembler::NE, slow);
7792
7793 // Try to lock. Transition lock bits 0b01 => 0b00
7794 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7795 orr(mark, mark, markWord::unlocked_value);
7796 // Mask inline_type bit such that we go to the slow path if object is an inline type
7797 andr(mark, mark, ~((int) markWord::inline_type_bit_in_place));
7798
7799 eor(t, mark, markWord::unlocked_value);
7800 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7801 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7802 br(Assembler::NE, slow);
7803
7804 bind(push);
7805 // After successful lock, push object on lock-stack.
7806 str(obj, Address(rthread, top));
7807 addw(top, top, oopSize);
7808 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7809 }
7810
7811 // Implements fast-unlocking.
7812 //
7813 // - obj: the object to be unlocked
7814 // - t1, t2, t3: temporary registers
7815 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7816 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7817 // cmpxchg clobbers rscratch1.
7818 assert_different_registers(obj, t1, t2, t3, rscratch1);
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