9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "code/compiledIC.hpp"
30 #include "compiler/compileTask.hpp"
31 #include "compiler/disassembler.hpp"
32 #include "compiler/oopMap.hpp"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/cardTable.hpp"
37 #include "gc/shared/collectedHeap.hpp"
38 #include "gc/shared/tlab_globals.hpp"
39 #include "interpreter/bytecodeHistogram.hpp"
40 #include "interpreter/interpreter.hpp"
41 #include "interpreter/interpreterRuntime.hpp"
42 #include "jvm.h"
43 #include "memory/resourceArea.hpp"
44 #include "memory/universe.hpp"
45 #include "nativeInst_aarch64.hpp"
46 #include "oops/accessDecorators.hpp"
47 #include "oops/compressedKlass.inline.hpp"
48 #include "oops/compressedOops.inline.hpp"
49 #include "oops/klass.inline.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/icache.hpp"
52 #include "runtime/interfaceSupport.inline.hpp"
53 #include "runtime/javaThread.hpp"
54 #include "runtime/jniHandles.inline.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/globalDefinitions.hpp"
58 #include "utilities/powerOfTwo.hpp"
59 #ifdef COMPILER1
60 #include "c1/c1_LIRAssembler.hpp"
61 #endif
62 #ifdef COMPILER2
63 #include "oops/oop.hpp"
64 #include "opto/compile.hpp"
65 #include "opto/node.hpp"
66 #include "opto/output.hpp"
67 #endif
68
69 #include <sys/types.h>
70
71 #ifdef PRODUCT
72 #define BLOCK_COMMENT(str) /* nothing */
73 #else
74 #define BLOCK_COMMENT(str) block_comment(str)
75 #endif
76 #define STOP(str) stop(str);
77 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
78
2040 ldarb(scratch, scratch);
2041 cmp(scratch, InstanceKlass::fully_initialized);
2042 br(Assembler::EQ, *L_fast_path);
2043
2044 // Fast path check: current thread is initializer thread
2045 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2046 cmp(rthread, scratch);
2047
2048 if (L_slow_path == &L_fallthrough) {
2049 br(Assembler::EQ, *L_fast_path);
2050 bind(*L_slow_path);
2051 } else if (L_fast_path == &L_fallthrough) {
2052 br(Assembler::NE, *L_slow_path);
2053 bind(*L_fast_path);
2054 } else {
2055 Unimplemented();
2056 }
2057 }
2058
2059 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2060 if (!VerifyOops) return;
2061
2062 // Pass register number to verify_oop_subroutine
2063 const char* b = nullptr;
2064 {
2065 ResourceMark rm;
2066 stringStream ss;
2067 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2068 b = code_string(ss.as_string());
2069 }
2070 BLOCK_COMMENT("verify_oop {");
2071
2072 strip_return_address(); // This might happen within a stack frame.
2073 protect_return_address();
2074 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2075 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2076
2077 mov(r0, reg);
2078 movptr(rscratch1, (uintptr_t)(address)b);
2079
2080 // call indirectly to solve generation ordering problem
2081 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2082 ldr(rscratch2, Address(rscratch2));
2083 blr(rscratch2);
2084
2085 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2086 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2087 authenticate_return_address();
2088
2089 BLOCK_COMMENT("} verify_oop");
2090 }
2091
2092 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2093 if (!VerifyOops) return;
2094
2095 const char* b = nullptr;
2096 {
2097 ResourceMark rm;
2098 stringStream ss;
2099 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2100 b = code_string(ss.as_string());
2101 }
2102 BLOCK_COMMENT("verify_oop_addr {");
2103
2104 strip_return_address(); // This might happen within a stack frame.
2105 protect_return_address();
2106 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2107 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2108
2109 // addr may contain sp so we will have to adjust it based on the
2110 // pushes that we just did.
2111 if (addr.uses(sp)) {
2112 lea(r0, addr);
2113 ldr(r0, Address(r0, 4 * wordSize));
2171 call_VM_leaf_base(entry_point, 1);
2172 }
2173
2174 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2175 assert_different_registers(arg_1, c_rarg0);
2176 pass_arg0(this, arg_0);
2177 pass_arg1(this, arg_1);
2178 call_VM_leaf_base(entry_point, 2);
2179 }
2180
2181 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2182 Register arg_1, Register arg_2) {
2183 assert_different_registers(arg_1, c_rarg0);
2184 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2185 pass_arg0(this, arg_0);
2186 pass_arg1(this, arg_1);
2187 pass_arg2(this, arg_2);
2188 call_VM_leaf_base(entry_point, 3);
2189 }
2190
2191 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2192 pass_arg0(this, arg_0);
2193 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2194 }
2195
2196 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2197
2198 assert_different_registers(arg_0, c_rarg1);
2199 pass_arg1(this, arg_1);
2200 pass_arg0(this, arg_0);
2201 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2202 }
2203
2204 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2205 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2206 assert_different_registers(arg_1, c_rarg2);
2207 pass_arg2(this, arg_2);
2208 pass_arg1(this, arg_1);
2209 pass_arg0(this, arg_0);
2210 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2216 assert_different_registers(arg_2, c_rarg3);
2217 pass_arg3(this, arg_3);
2218 pass_arg2(this, arg_2);
2219 pass_arg1(this, arg_1);
2220 pass_arg0(this, arg_0);
2221 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2222 }
2223
2224 void MacroAssembler::null_check(Register reg, int offset) {
2225 if (needs_explicit_null_check(offset)) {
2226 // provoke OS null exception if reg is null by
2227 // accessing M[reg] w/o changing any registers
2228 // NOTE: this is plenty to provoke a segv
2229 ldr(zr, Address(reg));
2230 } else {
2231 // nothing to do, (later) access of M[reg + offset]
2232 // will provoke OS null exception if reg is null
2233 }
2234 }
2235
2236 // MacroAssembler protected routines needed to implement
2237 // public methods
2238
2239 void MacroAssembler::mov(Register r, Address dest) {
2240 code_section()->relocate(pc(), dest.rspec());
2241 uint64_t imm64 = (uint64_t)dest.target();
2242 movptr(r, imm64);
2243 }
2244
2245 // Move a constant pointer into r. In AArch64 mode the virtual
2246 // address space is 48 bits in size, so we only need three
2247 // instructions to create a patchable instruction sequence that can
2248 // reach anywhere.
2249 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2250 #ifndef PRODUCT
2251 {
2252 char buffer[64];
2253 snprintf(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2254 block_comment(buffer);
2255 }
5003 adrp(rscratch1, src2, offset);
5004 ldr(rscratch1, Address(rscratch1, offset));
5005 cmp(src1, rscratch1);
5006 }
5007
5008 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5009 cmp(obj1, obj2);
5010 }
5011
5012 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5013 load_method_holder(rresult, rmethod);
5014 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5015 }
5016
5017 void MacroAssembler::load_method_holder(Register holder, Register method) {
5018 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5019 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5020 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5021 }
5022
5023 // Loads the obj's Klass* into dst.
5024 // Preserves all registers (incl src, rscratch1 and rscratch2).
5025 // Input:
5026 // src - the oop we want to load the klass from.
5027 // dst - output narrow klass.
5028 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5029 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5030 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5031 lsr(dst, dst, markWord::klass_shift);
5032 }
5033
5034 void MacroAssembler::load_klass(Register dst, Register src) {
5035 if (UseCompactObjectHeaders) {
5036 load_narrow_klass_compact(dst, src);
5037 decode_klass_not_null(dst);
5038 } else if (UseCompressedClassPointers) {
5039 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5040 decode_klass_not_null(dst);
5041 } else {
5042 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5113 }
5114 cmp(klass, tmp);
5115 }
5116
5117 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5118 if (UseCompactObjectHeaders) {
5119 load_narrow_klass_compact(tmp1, obj1);
5120 load_narrow_klass_compact(tmp2, obj2);
5121 cmpw(tmp1, tmp2);
5122 } else if (UseCompressedClassPointers) {
5123 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5124 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5125 cmpw(tmp1, tmp2);
5126 } else {
5127 ldr(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5128 ldr(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5129 cmp(tmp1, tmp2);
5130 }
5131 }
5132
5133 void MacroAssembler::store_klass(Register dst, Register src) {
5134 // FIXME: Should this be a store release? concurrent gcs assumes
5135 // klass length is valid if klass field is not null.
5136 assert(!UseCompactObjectHeaders, "not with compact headers");
5137 if (UseCompressedClassPointers) {
5138 encode_klass_not_null(src);
5139 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5140 } else {
5141 str(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5142 }
5143 }
5144
5145 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5146 assert(!UseCompactObjectHeaders, "not with compact headers");
5147 if (UseCompressedClassPointers) {
5148 // Store to klass gap in destination
5149 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5150 }
5151 }
5152
5453 if (as_raw) {
5454 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5455 } else {
5456 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5457 }
5458 }
5459
5460 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5461 Address dst, Register val,
5462 Register tmp1, Register tmp2, Register tmp3) {
5463 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5464 decorators = AccessInternal::decorator_fixup(decorators, type);
5465 bool as_raw = (decorators & AS_RAW) != 0;
5466 if (as_raw) {
5467 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5468 } else {
5469 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5470 }
5471 }
5472
5473 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5474 Register tmp2, DecoratorSet decorators) {
5475 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5476 }
5477
5478 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5479 Register tmp2, DecoratorSet decorators) {
5480 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5481 }
5482
5483 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5484 Register tmp2, Register tmp3, DecoratorSet decorators) {
5485 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5486 }
5487
5488 // Used for storing nulls.
5489 void MacroAssembler::store_heap_oop_null(Address dst) {
5490 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5491 }
5492
5528 oop_index = oop_recorder()->allocate_metadata_index(obj);
5529 } else {
5530 oop_index = oop_recorder()->find_index(obj);
5531 }
5532 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5533 mov(dst, Address((address)obj, rspec));
5534 }
5535
5536 Address MacroAssembler::constant_oop_address(jobject obj) {
5537 #ifdef ASSERT
5538 {
5539 ThreadInVMfromUnknown tiv;
5540 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5541 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5542 }
5543 #endif
5544 int oop_index = oop_recorder()->find_index(obj);
5545 return Address((address)obj, oop_Relocation::spec(oop_index));
5546 }
5547
5548 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5549 void MacroAssembler::tlab_allocate(Register obj,
5550 Register var_size_in_bytes,
5551 int con_size_in_bytes,
5552 Register t1,
5553 Register t2,
5554 Label& slow_case) {
5555 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5556 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5557 }
5558
5559 void MacroAssembler::inc_held_monitor_count(Register tmp) {
5560 Address dst(rthread, JavaThread::held_monitor_count_offset());
5561 #ifdef ASSERT
5562 ldr(tmp, dst);
5563 increment(tmp);
5564 str(tmp, dst);
5565 Label ok;
5566 tbz(tmp, 63, ok);
5567 STOP("assert(held monitor count underflow)");
5599 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5600 cmp(rscratch2, rscratch1);
5601 br(Assembler::HS, next);
5602 STOP("assert(top >= start)");
5603 should_not_reach_here();
5604
5605 bind(next);
5606 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5607 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5608 cmp(rscratch2, rscratch1);
5609 br(Assembler::HS, ok);
5610 STOP("assert(top <= end)");
5611 should_not_reach_here();
5612
5613 bind(ok);
5614 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5615 }
5616 #endif
5617 }
5618
5619 // Writes to stack successive pages until offset reached to check for
5620 // stack overflow + shadow pages. This clobbers tmp.
5621 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5622 assert_different_registers(tmp, size, rscratch1);
5623 mov(tmp, sp);
5624 // Bang stack for total size given plus shadow page size.
5625 // Bang one page at a time because large size can bang beyond yellow and
5626 // red zones.
5627 Label loop;
5628 mov(rscratch1, (int)os::vm_page_size());
5629 bind(loop);
5630 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5631 subsw(size, size, rscratch1);
5632 str(size, Address(tmp));
5633 br(Assembler::GT, loop);
5634
5635 // Bang down shadow pages too.
5636 // At this point, (tmp-0) is the last address touched, so don't
5637 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5638 // was post-decremented.) Skip this address by starting at i=1, and
5724 }
5725
5726 void MacroAssembler::remove_frame(int framesize) {
5727 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5728 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5729 if (framesize < ((1 << 9) + 2 * wordSize)) {
5730 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5731 add(sp, sp, framesize);
5732 } else {
5733 if (framesize < ((1 << 12) + 2 * wordSize))
5734 add(sp, sp, framesize - 2 * wordSize);
5735 else {
5736 mov(rscratch1, framesize - 2 * wordSize);
5737 add(sp, sp, rscratch1);
5738 }
5739 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5740 }
5741 authenticate_return_address();
5742 }
5743
5744
5745 // This method counts leading positive bytes (highest bit not set) in provided byte array
5746 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
5747 // Simple and most common case of aligned small array which is not at the
5748 // end of memory page is placed here. All other cases are in stub.
5749 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
5750 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
5751 assert_different_registers(ary1, len, result);
5752
5753 mov(result, len);
5754 cmpw(len, 0);
5755 br(LE, DONE);
5756 cmpw(len, 4 * wordSize);
5757 br(GE, STUB_LONG); // size > 32 then go to stub
5758
5759 int shift = 64 - exact_log2(os::vm_page_size());
5760 lsl(rscratch1, ary1, shift);
5761 mov(rscratch2, (size_t)(4 * wordSize) << shift);
5762 adds(rscratch2, rscratch1, rscratch2); // At end of page?
5763 br(CS, STUB); // at the end of page then go to stub
6637 // On other systems, the helper is a usual C function.
6638 //
6639 void MacroAssembler::get_thread(Register dst) {
6640 RegSet saved_regs =
6641 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
6642 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
6643
6644 protect_return_address();
6645 push(saved_regs, sp);
6646
6647 mov(lr, CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper));
6648 blr(lr);
6649 if (dst != c_rarg0) {
6650 mov(dst, c_rarg0);
6651 }
6652
6653 pop(saved_regs, sp);
6654 authenticate_return_address();
6655 }
6656
6657 void MacroAssembler::cache_wb(Address line) {
6658 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
6659 assert(line.index() == noreg, "index should be noreg");
6660 assert(line.offset() == 0, "offset should be 0");
6661 // would like to assert this
6662 // assert(line._ext.shift == 0, "shift should be zero");
6663 if (VM_Version::supports_dcpop()) {
6664 // writeback using clear virtual address to point of persistence
6665 dc(Assembler::CVAP, line.base());
6666 } else {
6667 // no need to generate anything as Unsafe.writebackMemory should
6668 // never invoke this stub
6669 }
6670 }
6671
6672 void MacroAssembler::cache_wbsync(bool is_pre) {
6673 // we only need a barrier post sync
6674 if (!is_pre) {
6675 membar(Assembler::AnyAny);
6676 }
7042 }
7043
7044 // Check if the lock-stack is full.
7045 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7046 cmpw(top, (unsigned)LockStack::end_offset());
7047 br(Assembler::GE, slow);
7048
7049 // Check for recursion.
7050 subw(t, top, oopSize);
7051 ldr(t, Address(rthread, t));
7052 cmp(obj, t);
7053 br(Assembler::EQ, push);
7054
7055 // Check header for monitor (0b10).
7056 tst(mark, markWord::monitor_value);
7057 br(Assembler::NE, slow);
7058
7059 // Try to lock. Transition lock bits 0b01 => 0b00
7060 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7061 orr(mark, mark, markWord::unlocked_value);
7062 eor(t, mark, markWord::unlocked_value);
7063 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7064 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7065 br(Assembler::NE, slow);
7066
7067 bind(push);
7068 // After successful lock, push object on lock-stack.
7069 str(obj, Address(rthread, top));
7070 addw(top, top, oopSize);
7071 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7072 }
7073
7074 // Implements lightweight-unlocking.
7075 //
7076 // - obj: the object to be unlocked
7077 // - t1, t2, t3: temporary registers
7078 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7079 void MacroAssembler::lightweight_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7080 assert(LockingMode == LM_LIGHTWEIGHT, "only used with new lightweight locking");
7081 // cmpxchg clobbers rscratch1.
|
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "ci/ciInlineKlass.hpp"
30 #include "code/compiledIC.hpp"
31 #include "compiler/compileTask.hpp"
32 #include "compiler/disassembler.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "gc/shared/cardTableBarrierSet.hpp"
37 #include "gc/shared/cardTable.hpp"
38 #include "gc/shared/collectedHeap.hpp"
39 #include "gc/shared/tlab_globals.hpp"
40 #include "interpreter/bytecodeHistogram.hpp"
41 #include "interpreter/interpreter.hpp"
42 #include "interpreter/interpreterRuntime.hpp"
43 #include "jvm.h"
44 #include "memory/resourceArea.hpp"
45 #include "memory/universe.hpp"
46 #include "nativeInst_aarch64.hpp"
47 #include "oops/accessDecorators.hpp"
48 #include "oops/compressedKlass.inline.hpp"
49 #include "oops/compressedOops.inline.hpp"
50 #include "oops/klass.inline.hpp"
51 #include "oops/resolvedFieldEntry.hpp"
52 #include "runtime/continuation.hpp"
53 #include "runtime/globals.hpp"
54 #include "runtime/icache.hpp"
55 #include "runtime/interfaceSupport.inline.hpp"
56 #include "runtime/javaThread.hpp"
57 #include "runtime/jniHandles.inline.hpp"
58 #include "runtime/sharedRuntime.hpp"
59 #include "runtime/signature_cc.hpp"
60 #include "runtime/stubRoutines.hpp"
61 #include "utilities/globalDefinitions.hpp"
62 #include "utilities/powerOfTwo.hpp"
63 #include "vmreg_aarch64.inline.hpp"
64 #ifdef COMPILER1
65 #include "c1/c1_LIRAssembler.hpp"
66 #endif
67 #ifdef COMPILER2
68 #include "oops/oop.hpp"
69 #include "opto/compile.hpp"
70 #include "opto/node.hpp"
71 #include "opto/output.hpp"
72 #endif
73
74 #include <sys/types.h>
75
76 #ifdef PRODUCT
77 #define BLOCK_COMMENT(str) /* nothing */
78 #else
79 #define BLOCK_COMMENT(str) block_comment(str)
80 #endif
81 #define STOP(str) stop(str);
82 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
83
2045 ldarb(scratch, scratch);
2046 cmp(scratch, InstanceKlass::fully_initialized);
2047 br(Assembler::EQ, *L_fast_path);
2048
2049 // Fast path check: current thread is initializer thread
2050 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2051 cmp(rthread, scratch);
2052
2053 if (L_slow_path == &L_fallthrough) {
2054 br(Assembler::EQ, *L_fast_path);
2055 bind(*L_slow_path);
2056 } else if (L_fast_path == &L_fallthrough) {
2057 br(Assembler::NE, *L_slow_path);
2058 bind(*L_fast_path);
2059 } else {
2060 Unimplemented();
2061 }
2062 }
2063
2064 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2065 if (!VerifyOops || VerifyAdapterSharing) {
2066 // Below address of the code string confuses VerifyAdapterSharing
2067 // because it may differ between otherwise equivalent adapters.
2068 return;
2069 }
2070
2071 // Pass register number to verify_oop_subroutine
2072 const char* b = nullptr;
2073 {
2074 ResourceMark rm;
2075 stringStream ss;
2076 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2077 b = code_string(ss.as_string());
2078 }
2079 BLOCK_COMMENT("verify_oop {");
2080
2081 strip_return_address(); // This might happen within a stack frame.
2082 protect_return_address();
2083 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2084 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2085
2086 mov(r0, reg);
2087 movptr(rscratch1, (uintptr_t)(address)b);
2088
2089 // call indirectly to solve generation ordering problem
2090 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2091 ldr(rscratch2, Address(rscratch2));
2092 blr(rscratch2);
2093
2094 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2095 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2096 authenticate_return_address();
2097
2098 BLOCK_COMMENT("} verify_oop");
2099 }
2100
2101 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2102 if (!VerifyOops || VerifyAdapterSharing) {
2103 // Below address of the code string confuses VerifyAdapterSharing
2104 // because it may differ between otherwise equivalent adapters.
2105 return;
2106 }
2107
2108 const char* b = nullptr;
2109 {
2110 ResourceMark rm;
2111 stringStream ss;
2112 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2113 b = code_string(ss.as_string());
2114 }
2115 BLOCK_COMMENT("verify_oop_addr {");
2116
2117 strip_return_address(); // This might happen within a stack frame.
2118 protect_return_address();
2119 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2120 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2121
2122 // addr may contain sp so we will have to adjust it based on the
2123 // pushes that we just did.
2124 if (addr.uses(sp)) {
2125 lea(r0, addr);
2126 ldr(r0, Address(r0, 4 * wordSize));
2184 call_VM_leaf_base(entry_point, 1);
2185 }
2186
2187 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2188 assert_different_registers(arg_1, c_rarg0);
2189 pass_arg0(this, arg_0);
2190 pass_arg1(this, arg_1);
2191 call_VM_leaf_base(entry_point, 2);
2192 }
2193
2194 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2195 Register arg_1, Register arg_2) {
2196 assert_different_registers(arg_1, c_rarg0);
2197 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2198 pass_arg0(this, arg_0);
2199 pass_arg1(this, arg_1);
2200 pass_arg2(this, arg_2);
2201 call_VM_leaf_base(entry_point, 3);
2202 }
2203
2204 void MacroAssembler::super_call_VM_leaf(address entry_point) {
2205 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2206 }
2207
2208 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2209 pass_arg0(this, arg_0);
2210 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2211 }
2212
2213 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2214
2215 assert_different_registers(arg_0, c_rarg1);
2216 pass_arg1(this, arg_1);
2217 pass_arg0(this, arg_0);
2218 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2219 }
2220
2221 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2222 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2223 assert_different_registers(arg_1, c_rarg2);
2224 pass_arg2(this, arg_2);
2225 pass_arg1(this, arg_1);
2226 pass_arg0(this, arg_0);
2227 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2233 assert_different_registers(arg_2, c_rarg3);
2234 pass_arg3(this, arg_3);
2235 pass_arg2(this, arg_2);
2236 pass_arg1(this, arg_1);
2237 pass_arg0(this, arg_0);
2238 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2239 }
2240
2241 void MacroAssembler::null_check(Register reg, int offset) {
2242 if (needs_explicit_null_check(offset)) {
2243 // provoke OS null exception if reg is null by
2244 // accessing M[reg] w/o changing any registers
2245 // NOTE: this is plenty to provoke a segv
2246 ldr(zr, Address(reg));
2247 } else {
2248 // nothing to do, (later) access of M[reg + offset]
2249 // will provoke OS null exception if reg is null
2250 }
2251 }
2252
2253 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2254 assert_different_registers(markword, rscratch2);
2255 mov(rscratch2, markWord::inline_type_mask_in_place);
2256 andr(markword, markword, rscratch2);
2257 mov(rscratch2, markWord::inline_type_pattern);
2258 cmp(markword, rscratch2);
2259 br(Assembler::EQ, is_inline_type);
2260 }
2261
2262 void MacroAssembler::test_klass_is_inline_type(Register klass, Register temp_reg, Label& is_inline_type) {
2263 ldrh(temp_reg, Address(klass, Klass::access_flags_offset()));
2264 andr(temp_reg, temp_reg, JVM_ACC_IDENTITY);
2265 cbz(temp_reg, is_inline_type);
2266 }
2267
2268 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type) {
2269 assert_different_registers(tmp, rscratch1);
2270 cbz(object, not_inline_type);
2271 const int is_inline_type_mask = markWord::inline_type_pattern;
2272 ldr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2273 mov(rscratch1, is_inline_type_mask);
2274 andr(tmp, tmp, rscratch1);
2275 cmp(tmp, rscratch1);
2276 br(Assembler::NE, not_inline_type);
2277 }
2278
2279 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2280 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2281 tbnz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, is_null_free_inline_type);
2282 }
2283
2284 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2285 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2286 tbz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, not_null_free_inline_type);
2287 }
2288
2289 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2290 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2291 tbnz(flags, ResolvedFieldEntry::is_flat_shift, is_flat);
2292 }
2293
2294 void MacroAssembler::test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker) {
2295 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2296 tbnz(flags, ResolvedFieldEntry::has_null_marker_shift, has_null_marker);
2297 }
2298
2299 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2300 Label test_mark_word;
2301 // load mark word
2302 ldr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2303 // check displaced
2304 tst(temp_reg, markWord::unlocked_value);
2305 br(Assembler::NE, test_mark_word);
2306 // slow path use klass prototype
2307 load_prototype_header(temp_reg, oop);
2308
2309 bind(test_mark_word);
2310 andr(temp_reg, temp_reg, test_bit);
2311 if (jmp_set) {
2312 cbnz(temp_reg, jmp_label);
2313 } else {
2314 cbz(temp_reg, jmp_label);
2315 }
2316 }
2317
2318 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array) {
2319 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2320 }
2321
2322 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2323 Label&is_non_flat_array) {
2324 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2325 }
2326
2327 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array) {
2328 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2329 }
2330
2331 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2332 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2333 }
2334
2335 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2336 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2337 br(Assembler::NE, is_flat_array);
2338 }
2339
2340 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
2341 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2342 br(Assembler::EQ, is_non_flat_array);
2343 }
2344
2345 // MacroAssembler protected routines needed to implement
2346 // public methods
2347
2348 void MacroAssembler::mov(Register r, Address dest) {
2349 code_section()->relocate(pc(), dest.rspec());
2350 uint64_t imm64 = (uint64_t)dest.target();
2351 movptr(r, imm64);
2352 }
2353
2354 // Move a constant pointer into r. In AArch64 mode the virtual
2355 // address space is 48 bits in size, so we only need three
2356 // instructions to create a patchable instruction sequence that can
2357 // reach anywhere.
2358 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2359 #ifndef PRODUCT
2360 {
2361 char buffer[64];
2362 snprintf(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2363 block_comment(buffer);
2364 }
5112 adrp(rscratch1, src2, offset);
5113 ldr(rscratch1, Address(rscratch1, offset));
5114 cmp(src1, rscratch1);
5115 }
5116
5117 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5118 cmp(obj1, obj2);
5119 }
5120
5121 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5122 load_method_holder(rresult, rmethod);
5123 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5124 }
5125
5126 void MacroAssembler::load_method_holder(Register holder, Register method) {
5127 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5128 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5129 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5130 }
5131
5132 void MacroAssembler::load_metadata(Register dst, Register src) {
5133 if (UseCompactObjectHeaders) {
5134 load_narrow_klass_compact(dst, src);
5135 } else if (UseCompressedClassPointers) {
5136 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5137 } else {
5138 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5139 }
5140 }
5141
5142 // Loads the obj's Klass* into dst.
5143 // Preserves all registers (incl src, rscratch1 and rscratch2).
5144 // Input:
5145 // src - the oop we want to load the klass from.
5146 // dst - output narrow klass.
5147 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5148 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5149 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5150 lsr(dst, dst, markWord::klass_shift);
5151 }
5152
5153 void MacroAssembler::load_klass(Register dst, Register src) {
5154 if (UseCompactObjectHeaders) {
5155 load_narrow_klass_compact(dst, src);
5156 decode_klass_not_null(dst);
5157 } else if (UseCompressedClassPointers) {
5158 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5159 decode_klass_not_null(dst);
5160 } else {
5161 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5232 }
5233 cmp(klass, tmp);
5234 }
5235
5236 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5237 if (UseCompactObjectHeaders) {
5238 load_narrow_klass_compact(tmp1, obj1);
5239 load_narrow_klass_compact(tmp2, obj2);
5240 cmpw(tmp1, tmp2);
5241 } else if (UseCompressedClassPointers) {
5242 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5243 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5244 cmpw(tmp1, tmp2);
5245 } else {
5246 ldr(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5247 ldr(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5248 cmp(tmp1, tmp2);
5249 }
5250 }
5251
5252 void MacroAssembler::load_prototype_header(Register dst, Register src) {
5253 load_klass(dst, src);
5254 ldr(dst, Address(dst, Klass::prototype_header_offset()));
5255 }
5256
5257 void MacroAssembler::store_klass(Register dst, Register src) {
5258 // FIXME: Should this be a store release? concurrent gcs assumes
5259 // klass length is valid if klass field is not null.
5260 assert(!UseCompactObjectHeaders, "not with compact headers");
5261 if (UseCompressedClassPointers) {
5262 encode_klass_not_null(src);
5263 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5264 } else {
5265 str(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5266 }
5267 }
5268
5269 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5270 assert(!UseCompactObjectHeaders, "not with compact headers");
5271 if (UseCompressedClassPointers) {
5272 // Store to klass gap in destination
5273 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5274 }
5275 }
5276
5577 if (as_raw) {
5578 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5579 } else {
5580 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5581 }
5582 }
5583
5584 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5585 Address dst, Register val,
5586 Register tmp1, Register tmp2, Register tmp3) {
5587 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5588 decorators = AccessInternal::decorator_fixup(decorators, type);
5589 bool as_raw = (decorators & AS_RAW) != 0;
5590 if (as_raw) {
5591 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5592 } else {
5593 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5594 }
5595 }
5596
5597 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5598 Register inline_layout_info) {
5599 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5600 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5601 }
5602
5603 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5604 ldr(offset, Address(inline_klass, InstanceKlass::adr_inlineklass_fixed_block_offset()));
5605 ldrw(offset, Address(offset, InlineKlass::payload_offset_offset()));
5606 }
5607
5608 void MacroAssembler::payload_address(Register oop, Register data, Register inline_klass) {
5609 // ((address) (void*) o) + vk->payload_offset();
5610 Register offset = (data == oop) ? rscratch1 : data;
5611 payload_offset(inline_klass, offset);
5612 if (data == oop) {
5613 add(data, data, offset);
5614 } else {
5615 lea(data, Address(oop, offset));
5616 }
5617 }
5618
5619 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
5620 Register index, Register data) {
5621 assert_different_registers(array, array_klass, index);
5622 assert_different_registers(rscratch1, array, index);
5623
5624 // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
5625 ldrw(rscratch1, Address(array_klass, Klass::layout_helper_offset()));
5626
5627 // Klass::layout_helper_log2_element_size(lh)
5628 // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
5629 lsr(rscratch1, rscratch1, Klass::_lh_log2_element_size_shift);
5630 andr(rscratch1, rscratch1, Klass::_lh_log2_element_size_mask);
5631 lslv(index, index, rscratch1);
5632
5633 add(data, array, index);
5634 add(data, data, arrayOopDesc::base_offset_in_bytes(T_FLAT_ELEMENT));
5635 }
5636
5637 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5638 Register tmp2, DecoratorSet decorators) {
5639 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5640 }
5641
5642 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5643 Register tmp2, DecoratorSet decorators) {
5644 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5645 }
5646
5647 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5648 Register tmp2, Register tmp3, DecoratorSet decorators) {
5649 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5650 }
5651
5652 // Used for storing nulls.
5653 void MacroAssembler::store_heap_oop_null(Address dst) {
5654 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5655 }
5656
5692 oop_index = oop_recorder()->allocate_metadata_index(obj);
5693 } else {
5694 oop_index = oop_recorder()->find_index(obj);
5695 }
5696 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5697 mov(dst, Address((address)obj, rspec));
5698 }
5699
5700 Address MacroAssembler::constant_oop_address(jobject obj) {
5701 #ifdef ASSERT
5702 {
5703 ThreadInVMfromUnknown tiv;
5704 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5705 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5706 }
5707 #endif
5708 int oop_index = oop_recorder()->find_index(obj);
5709 return Address((address)obj, oop_Relocation::spec(oop_index));
5710 }
5711
5712 // Object / value buffer allocation...
5713 void MacroAssembler::allocate_instance(Register klass, Register new_obj,
5714 Register t1, Register t2,
5715 bool clear_fields, Label& alloc_failed)
5716 {
5717 Label done, initialize_header, initialize_object, slow_case, slow_case_no_pop;
5718 Register layout_size = t1;
5719 assert(new_obj == r0, "needs to be r0");
5720 assert_different_registers(klass, new_obj, t1, t2);
5721
5722 // get instance_size in InstanceKlass (scaled to a count of bytes)
5723 ldrw(layout_size, Address(klass, Klass::layout_helper_offset()));
5724 // test to see if it is malformed in some way
5725 tst(layout_size, Klass::_lh_instance_slow_path_bit);
5726 br(Assembler::NE, slow_case_no_pop);
5727
5728 // Allocate the instance:
5729 // If TLAB is enabled:
5730 // Try to allocate in the TLAB.
5731 // If fails, go to the slow path.
5732 // Initialize the allocation.
5733 // Exit.
5734 //
5735 // Go to slow path.
5736
5737 if (UseTLAB) {
5738 push(klass);
5739 tlab_allocate(new_obj, layout_size, 0, klass, t2, slow_case);
5740 if (ZeroTLAB || (!clear_fields)) {
5741 // the fields have been already cleared
5742 b(initialize_header);
5743 } else {
5744 // initialize both the header and fields
5745 b(initialize_object);
5746 }
5747
5748 if (clear_fields) {
5749 // The object is initialized before the header. If the object size is
5750 // zero, go directly to the header initialization.
5751 bind(initialize_object);
5752 int header_size = oopDesc::header_size() * HeapWordSize;
5753 assert(is_aligned(header_size, BytesPerLong), "oop header size must be 8-byte-aligned");
5754 subs(layout_size, layout_size, header_size);
5755 br(Assembler::EQ, initialize_header);
5756
5757 // Initialize topmost object field, divide size by 8, check if odd and
5758 // test if zero.
5759
5760 #ifdef ASSERT
5761 // make sure instance_size was multiple of 8
5762 Label L;
5763 tst(layout_size, 7);
5764 br(Assembler::EQ, L);
5765 stop("object size is not multiple of 8 - adjust this code");
5766 bind(L);
5767 // must be > 0, no extra check needed here
5768 #endif
5769
5770 lsr(layout_size, layout_size, LogBytesPerLong);
5771
5772 // initialize remaining object fields: instance_size was a multiple of 8
5773 {
5774 Label loop;
5775 Register base = t2;
5776
5777 bind(loop);
5778 add(rscratch1, new_obj, layout_size, Assembler::LSL, LogBytesPerLong);
5779 str(zr, Address(rscratch1, header_size - 1*oopSize));
5780 subs(layout_size, layout_size, 1);
5781 br(Assembler::NE, loop);
5782 }
5783 } // clear_fields
5784
5785 // initialize object header only.
5786 bind(initialize_header);
5787 pop(klass);
5788 Register mark_word = t2;
5789 if (UseCompactObjectHeaders || EnableValhalla) {
5790 ldr(mark_word, Address(klass, Klass::prototype_header_offset()));
5791 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5792 } else {
5793 mov(mark_word, (intptr_t)markWord::prototype().value());
5794 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5795 }
5796 if (!UseCompactObjectHeaders) {
5797 store_klass_gap(new_obj, zr); // zero klass gap for compressed oops
5798 mov(t2, klass); // preserve klass
5799 store_klass(new_obj, t2); // src klass reg is potentially compressed
5800 }
5801 b(done);
5802 }
5803
5804 if (UseTLAB) {
5805 bind(slow_case);
5806 pop(klass);
5807 }
5808 bind(slow_case_no_pop);
5809 b(alloc_failed);
5810
5811 bind(done);
5812 }
5813
5814 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5815 void MacroAssembler::tlab_allocate(Register obj,
5816 Register var_size_in_bytes,
5817 int con_size_in_bytes,
5818 Register t1,
5819 Register t2,
5820 Label& slow_case) {
5821 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5822 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5823 }
5824
5825 void MacroAssembler::inc_held_monitor_count(Register tmp) {
5826 Address dst(rthread, JavaThread::held_monitor_count_offset());
5827 #ifdef ASSERT
5828 ldr(tmp, dst);
5829 increment(tmp);
5830 str(tmp, dst);
5831 Label ok;
5832 tbz(tmp, 63, ok);
5833 STOP("assert(held monitor count underflow)");
5865 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5866 cmp(rscratch2, rscratch1);
5867 br(Assembler::HS, next);
5868 STOP("assert(top >= start)");
5869 should_not_reach_here();
5870
5871 bind(next);
5872 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5873 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5874 cmp(rscratch2, rscratch1);
5875 br(Assembler::HS, ok);
5876 STOP("assert(top <= end)");
5877 should_not_reach_here();
5878
5879 bind(ok);
5880 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5881 }
5882 #endif
5883 }
5884
5885 void MacroAssembler::get_inline_type_field_klass(Register holder_klass, Register index, Register inline_klass) {
5886 inline_layout_info(holder_klass, index, inline_klass);
5887 ldr(inline_klass, Address(inline_klass, InlineLayoutInfo::klass_offset()));
5888 }
5889
5890 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
5891 assert_different_registers(holder_klass, index, layout_info);
5892 InlineLayoutInfo array[2];
5893 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
5894 if (is_power_of_2(size)) {
5895 lsl(index, index, log2i_exact(size)); // Scale index by power of 2
5896 } else {
5897 mov(layout_info, size);
5898 mul(index, index, layout_info); // Scale the index to be the entry index * array_element_size
5899 }
5900 ldr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
5901 add(layout_info, layout_info, Array<InlineLayoutInfo>::base_offset_in_bytes());
5902 lea(layout_info, Address(layout_info, index));
5903 }
5904
5905 // Writes to stack successive pages until offset reached to check for
5906 // stack overflow + shadow pages. This clobbers tmp.
5907 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5908 assert_different_registers(tmp, size, rscratch1);
5909 mov(tmp, sp);
5910 // Bang stack for total size given plus shadow page size.
5911 // Bang one page at a time because large size can bang beyond yellow and
5912 // red zones.
5913 Label loop;
5914 mov(rscratch1, (int)os::vm_page_size());
5915 bind(loop);
5916 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5917 subsw(size, size, rscratch1);
5918 str(size, Address(tmp));
5919 br(Assembler::GT, loop);
5920
5921 // Bang down shadow pages too.
5922 // At this point, (tmp-0) is the last address touched, so don't
5923 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5924 // was post-decremented.) Skip this address by starting at i=1, and
6010 }
6011
6012 void MacroAssembler::remove_frame(int framesize) {
6013 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
6014 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
6015 if (framesize < ((1 << 9) + 2 * wordSize)) {
6016 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
6017 add(sp, sp, framesize);
6018 } else {
6019 if (framesize < ((1 << 12) + 2 * wordSize))
6020 add(sp, sp, framesize - 2 * wordSize);
6021 else {
6022 mov(rscratch1, framesize - 2 * wordSize);
6023 add(sp, sp, rscratch1);
6024 }
6025 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6026 }
6027 authenticate_return_address();
6028 }
6029
6030 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6031 if (needs_stack_repair) {
6032 // Remove the extension of the caller's frame used for inline type unpacking
6033 //
6034 // Right now the stack looks like this:
6035 //
6036 // | Arguments from caller |
6037 // |---------------------------| <-- caller's SP
6038 // | Saved LR #1 |
6039 // | Saved FP #1 |
6040 // |---------------------------|
6041 // | Extension space for |
6042 // | inline arg (un)packing |
6043 // |---------------------------| <-- start of this method's frame
6044 // | Saved LR #2 |
6045 // | Saved FP #2 |
6046 // |---------------------------| <-- FP
6047 // | sp_inc |
6048 // | method locals |
6049 // |---------------------------| <-- SP
6050 //
6051 // There are two copies of FP and LR on the stack. They will be identical
6052 // unless the caller has been deoptimized, in which case LR #1 will be patched
6053 // to point at the deopt blob, and LR #2 will still point into the old method.
6054 //
6055 // The sp_inc stack slot holds the total size of the frame including the
6056 // extension space minus two words for the saved FP and LR.
6057
6058 int sp_inc_offset = initial_framesize - 3 * wordSize; // Immediately below saved LR and FP
6059
6060 ldr(rscratch1, Address(sp, sp_inc_offset));
6061 add(sp, sp, rscratch1);
6062 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6063 } else {
6064 remove_frame(initial_framesize);
6065 }
6066 }
6067
6068 void MacroAssembler::save_stack_increment(int sp_inc, int frame_size) {
6069 int real_frame_size = frame_size + sp_inc;
6070 assert(sp_inc == 0 || sp_inc > 2*wordSize, "invalid sp_inc value");
6071 assert(real_frame_size >= 2*wordSize, "frame size must include FP/LR space");
6072 assert((real_frame_size & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6073
6074 int sp_inc_offset = frame_size - 3 * wordSize; // Immediately below saved LR and FP
6075
6076 // Subtract two words for the saved FP and LR as these will be popped
6077 // separately. See remove_frame above.
6078 mov(rscratch1, real_frame_size - 2*wordSize);
6079 str(rscratch1, Address(sp, sp_inc_offset));
6080 }
6081
6082 // This method counts leading positive bytes (highest bit not set) in provided byte array
6083 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
6084 // Simple and most common case of aligned small array which is not at the
6085 // end of memory page is placed here. All other cases are in stub.
6086 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
6087 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
6088 assert_different_registers(ary1, len, result);
6089
6090 mov(result, len);
6091 cmpw(len, 0);
6092 br(LE, DONE);
6093 cmpw(len, 4 * wordSize);
6094 br(GE, STUB_LONG); // size > 32 then go to stub
6095
6096 int shift = 64 - exact_log2(os::vm_page_size());
6097 lsl(rscratch1, ary1, shift);
6098 mov(rscratch2, (size_t)(4 * wordSize) << shift);
6099 adds(rscratch2, rscratch1, rscratch2); // At end of page?
6100 br(CS, STUB); // at the end of page then go to stub
6974 // On other systems, the helper is a usual C function.
6975 //
6976 void MacroAssembler::get_thread(Register dst) {
6977 RegSet saved_regs =
6978 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
6979 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
6980
6981 protect_return_address();
6982 push(saved_regs, sp);
6983
6984 mov(lr, CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper));
6985 blr(lr);
6986 if (dst != c_rarg0) {
6987 mov(dst, c_rarg0);
6988 }
6989
6990 pop(saved_regs, sp);
6991 authenticate_return_address();
6992 }
6993
6994 #ifdef COMPILER2
6995 // C2 compiled method's prolog code
6996 // Moved here from aarch64.ad to support Valhalla code belows
6997 void MacroAssembler::verified_entry(Compile* C, int sp_inc) {
6998 if (C->clinit_barrier_on_entry()) {
6999 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
7000
7001 Label L_skip_barrier;
7002
7003 mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
7004 clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
7005 far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
7006 bind(L_skip_barrier);
7007 }
7008
7009 if (C->max_vector_size() > 0) {
7010 reinitialize_ptrue();
7011 }
7012
7013 int bangsize = C->output()->bang_size_in_bytes();
7014 if (C->output()->need_stack_bang(bangsize))
7015 generate_stack_overflow_check(bangsize);
7016
7017 // n.b. frame size includes space for return pc and rfp
7018 const long framesize = C->output()->frame_size_in_bytes();
7019 build_frame(framesize);
7020
7021 if (C->needs_stack_repair()) {
7022 save_stack_increment(sp_inc, framesize);
7023 }
7024
7025 if (VerifyStackAtCalls) {
7026 Unimplemented();
7027 }
7028 }
7029 #endif // COMPILER2
7030
7031 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
7032 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
7033 // An inline type might be returned. If fields are in registers we
7034 // need to allocate an inline type instance and initialize it with
7035 // the value of the fields.
7036 Label skip;
7037 // We only need a new buffered inline type if a new one is not returned
7038 tbz(r0, 0, skip);
7039 int call_offset = -1;
7040
7041 // Be careful not to clobber r1-7 which hold returned fields
7042 // Also do not use callee-saved registers as these may be live in the interpreter
7043 Register tmp1 = r13, tmp2 = r14, klass = r15, r0_preserved = r12;
7044
7045 // The following code is similar to allocate_instance but has some slight differences,
7046 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
7047 // allocating is not necessary if vk != nullptr, etc. allocate_instance is not aware of these.
7048 Label slow_case;
7049 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
7050 mov(r0_preserved, r0); // save r0 for slow_case since *_allocate may corrupt it when allocation failed
7051
7052 if (vk != nullptr) {
7053 // Called from C1, where the return type is statically known.
7054 movptr(klass, (intptr_t)vk->get_InlineKlass());
7055 jint lh = vk->layout_helper();
7056 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
7057 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
7058 tlab_allocate(r0, noreg, lh, tmp1, tmp2, slow_case);
7059 } else {
7060 b(slow_case);
7061 }
7062 } else {
7063 // Call from interpreter. R0 contains ((the InlineKlass* of the return type) | 0x01)
7064 andr(klass, r0, -2);
7065 if (UseTLAB) {
7066 ldrw(tmp2, Address(klass, Klass::layout_helper_offset()));
7067 tst(tmp2, Klass::_lh_instance_slow_path_bit);
7068 br(Assembler::NE, slow_case);
7069 tlab_allocate(r0, tmp2, 0, tmp1, tmp2, slow_case);
7070 } else {
7071 b(slow_case);
7072 }
7073 }
7074 if (UseTLAB) {
7075 // 2. Initialize buffered inline instance header
7076 Register buffer_obj = r0;
7077 if (UseCompactObjectHeaders) {
7078 ldr(rscratch1, Address(klass, Klass::prototype_header_offset()));
7079 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7080 } else {
7081 mov(rscratch1, (intptr_t)markWord::inline_type_prototype().value());
7082 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7083 store_klass_gap(buffer_obj, zr);
7084 if (vk == nullptr) {
7085 // store_klass corrupts klass, so save it for later use (interpreter case only).
7086 mov(tmp1, klass);
7087 }
7088 store_klass(buffer_obj, klass);
7089 }
7090 // 3. Initialize its fields with an inline class specific handler
7091 if (vk != nullptr) {
7092 far_call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
7093 } else {
7094 // tmp1 holds klass preserved above
7095 ldr(tmp1, Address(tmp1, InstanceKlass::adr_inlineklass_fixed_block_offset()));
7096 ldr(tmp1, Address(tmp1, InlineKlass::pack_handler_offset()));
7097 blr(tmp1);
7098 }
7099
7100 membar(Assembler::StoreStore);
7101 b(skip);
7102 } else {
7103 // Must have already branched to slow_case above.
7104 DEBUG_ONLY(should_not_reach_here());
7105 }
7106 bind(slow_case);
7107 // We failed to allocate a new inline type, fall back to a runtime
7108 // call. Some oop field may be live in some registers but we can't
7109 // tell. That runtime call will take care of preserving them
7110 // across a GC if there's one.
7111 mov(r0, r0_preserved);
7112
7113 if (from_interpreter) {
7114 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
7115 } else {
7116 far_call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
7117 call_offset = offset();
7118 }
7119 membar(Assembler::StoreStore);
7120
7121 bind(skip);
7122 return call_offset;
7123 }
7124
7125 // Move a value between registers/stack slots and update the reg_state
7126 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
7127 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
7128 if (reg_state[to->value()] == reg_written) {
7129 return true; // Already written
7130 }
7131
7132 if (from != to && bt != T_VOID) {
7133 if (reg_state[to->value()] == reg_readonly) {
7134 return false; // Not yet writable
7135 }
7136 if (from->is_reg()) {
7137 if (to->is_reg()) {
7138 if (from->is_Register() && to->is_Register()) {
7139 mov(to->as_Register(), from->as_Register());
7140 } else if (from->is_FloatRegister() && to->is_FloatRegister()) {
7141 fmovd(to->as_FloatRegister(), from->as_FloatRegister());
7142 } else {
7143 ShouldNotReachHere();
7144 }
7145 } else {
7146 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7147 Address to_addr = Address(sp, st_off);
7148 if (from->is_FloatRegister()) {
7149 if (bt == T_DOUBLE) {
7150 strd(from->as_FloatRegister(), to_addr);
7151 } else {
7152 assert(bt == T_FLOAT, "must be float");
7153 strs(from->as_FloatRegister(), to_addr);
7154 }
7155 } else {
7156 str(from->as_Register(), to_addr);
7157 }
7158 }
7159 } else {
7160 Address from_addr = Address(sp, from->reg2stack() * VMRegImpl::stack_slot_size);
7161 if (to->is_reg()) {
7162 if (to->is_FloatRegister()) {
7163 if (bt == T_DOUBLE) {
7164 ldrd(to->as_FloatRegister(), from_addr);
7165 } else {
7166 assert(bt == T_FLOAT, "must be float");
7167 ldrs(to->as_FloatRegister(), from_addr);
7168 }
7169 } else {
7170 ldr(to->as_Register(), from_addr);
7171 }
7172 } else {
7173 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7174 ldr(rscratch1, from_addr);
7175 str(rscratch1, Address(sp, st_off));
7176 }
7177 }
7178 }
7179
7180 // Update register states
7181 reg_state[from->value()] = reg_writable;
7182 reg_state[to->value()] = reg_written;
7183 return true;
7184 }
7185
7186 // Calculate the extra stack space required for packing or unpacking inline
7187 // args and adjust the stack pointer
7188 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
7189 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
7190 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
7191 assert(sp_inc > 0, "sanity");
7192
7193 // Save a copy of the FP and LR here for deoptimization patching and frame walking
7194 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
7195
7196 // Adjust the stack pointer. This will be repaired on return by MacroAssembler::remove_frame
7197 if (sp_inc < (1 << 9)) {
7198 sub(sp, sp, sp_inc); // Fits in an immediate
7199 } else {
7200 mov(rscratch1, sp_inc);
7201 sub(sp, sp, rscratch1);
7202 }
7203
7204 return sp_inc + 2 * wordSize; // Account for the FP/LR space
7205 }
7206
7207 // Read all fields from an inline type oop and store the values in registers/stack slots
7208 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
7209 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
7210 RegState reg_state[]) {
7211 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
7212 assert(from->is_valid(), "source must be valid");
7213 bool progress = false;
7214 #ifdef ASSERT
7215 const int start_offset = offset();
7216 #endif
7217
7218 Label L_null, L_notNull;
7219 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
7220 Register tmp1 = r10;
7221 Register tmp2 = r11;
7222 Register fromReg = noreg;
7223 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, -1);
7224 bool done = true;
7225 bool mark_done = true;
7226 VMReg toReg;
7227 BasicType bt;
7228 // Check if argument requires a null check
7229 bool null_check = false;
7230 VMReg nullCheckReg;
7231 while (stream.next(nullCheckReg, bt)) {
7232 if (sig->at(stream.sig_index())._offset == -1) {
7233 null_check = true;
7234 break;
7235 }
7236 }
7237 stream.reset(sig_index, to_index);
7238 while (stream.next(toReg, bt)) {
7239 assert(toReg->is_valid(), "destination must be valid");
7240 int idx = (int)toReg->value();
7241 if (reg_state[idx] == reg_readonly) {
7242 if (idx != from->value()) {
7243 mark_done = false;
7244 }
7245 done = false;
7246 continue;
7247 } else if (reg_state[idx] == reg_written) {
7248 continue;
7249 }
7250 assert(reg_state[idx] == reg_writable, "must be writable");
7251 reg_state[idx] = reg_written;
7252 progress = true;
7253
7254 if (fromReg == noreg) {
7255 if (from->is_reg()) {
7256 fromReg = from->as_Register();
7257 } else {
7258 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size;
7259 ldr(tmp1, Address(sp, st_off));
7260 fromReg = tmp1;
7261 }
7262 if (null_check) {
7263 // Nullable inline type argument, emit null check
7264 cbz(fromReg, L_null);
7265 }
7266 }
7267 int off = sig->at(stream.sig_index())._offset;
7268 if (off == -1) {
7269 assert(null_check, "Missing null check at");
7270 if (toReg->is_stack()) {
7271 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7272 mov(tmp2, 1);
7273 str(tmp2, Address(sp, st_off));
7274 } else {
7275 mov(toReg->as_Register(), 1);
7276 }
7277 continue;
7278 }
7279 assert(off > 0, "offset in object should be positive");
7280 Address fromAddr = Address(fromReg, off);
7281 if (!toReg->is_FloatRegister()) {
7282 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
7283 if (is_reference_type(bt)) {
7284 load_heap_oop(dst, fromAddr, rscratch1, rscratch2);
7285 } else {
7286 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
7287 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
7288 }
7289 if (toReg->is_stack()) {
7290 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7291 str(dst, Address(sp, st_off));
7292 }
7293 } else if (bt == T_DOUBLE) {
7294 ldrd(toReg->as_FloatRegister(), fromAddr);
7295 } else {
7296 assert(bt == T_FLOAT, "must be float");
7297 ldrs(toReg->as_FloatRegister(), fromAddr);
7298 }
7299 }
7300 if (progress && null_check) {
7301 if (done) {
7302 b(L_notNull);
7303 bind(L_null);
7304 // Set null marker to zero to signal that the argument is null.
7305 // Also set all oop fields to zero to make the GC happy.
7306 stream.reset(sig_index, to_index);
7307 while (stream.next(toReg, bt)) {
7308 if (sig->at(stream.sig_index())._offset == -1 ||
7309 bt == T_OBJECT || bt == T_ARRAY) {
7310 if (toReg->is_stack()) {
7311 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7312 str(zr, Address(sp, st_off));
7313 } else {
7314 mov(toReg->as_Register(), zr);
7315 }
7316 }
7317 }
7318 bind(L_notNull);
7319 } else {
7320 bind(L_null);
7321 }
7322 }
7323
7324 sig_index = stream.sig_index();
7325 to_index = stream.regs_index();
7326
7327 if (mark_done && reg_state[from->value()] != reg_written) {
7328 // This is okay because no one else will write to that slot
7329 reg_state[from->value()] = reg_writable;
7330 }
7331 from_index--;
7332 assert(progress || (start_offset == offset()), "should not emit code");
7333 return done;
7334 }
7335
7336 // Pack fields back into an inline type oop
7337 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
7338 VMRegPair* from, int from_count, int& from_index, VMReg to,
7339 RegState reg_state[], Register val_array) {
7340 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
7341 assert(to->is_valid(), "destination must be valid");
7342
7343 if (reg_state[to->value()] == reg_written) {
7344 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7345 return true; // Already written
7346 }
7347
7348 // The GC barrier expanded by store_heap_oop below may call into the
7349 // runtime so use callee-saved registers for any values that need to be
7350 // preserved. The GC barrier assembler should take care of saving the
7351 // Java argument registers.
7352 // TODO 8284443 Isn't it an issue if below code uses r14 as tmp when it contains a spilled value?
7353 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
7354 Register val_obj_tmp = r21;
7355 Register from_reg_tmp = r22;
7356 Register tmp1 = r14;
7357 Register tmp2 = r13;
7358 Register tmp3 = r12;
7359 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
7360
7361 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
7362
7363 if (reg_state[to->value()] == reg_readonly) {
7364 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
7365 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7366 return false; // Not yet writable
7367 }
7368 val_obj = val_obj_tmp;
7369 }
7370
7371 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
7372 load_heap_oop(val_obj, Address(val_array, index), tmp1, tmp2);
7373
7374 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
7375 VMReg fromReg;
7376 BasicType bt;
7377 Label L_null;
7378 while (stream.next(fromReg, bt)) {
7379 assert(fromReg->is_valid(), "source must be valid");
7380 reg_state[fromReg->value()] = reg_writable;
7381
7382 int off = sig->at(stream.sig_index())._offset;
7383 if (off == -1) {
7384 // Nullable inline type argument, emit null check
7385 Label L_notNull;
7386 if (fromReg->is_stack()) {
7387 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7388 ldrb(tmp2, Address(sp, ld_off));
7389 cbnz(tmp2, L_notNull);
7390 } else {
7391 cbnz(fromReg->as_Register(), L_notNull);
7392 }
7393 mov(val_obj, 0);
7394 b(L_null);
7395 bind(L_notNull);
7396 continue;
7397 }
7398
7399 assert(off > 0, "offset in object should be positive");
7400 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
7401
7402 // Pack the scalarized field into the value object.
7403 Address dst(val_obj, off);
7404
7405 if (!fromReg->is_FloatRegister()) {
7406 Register src;
7407 if (fromReg->is_stack()) {
7408 src = from_reg_tmp;
7409 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7410 load_sized_value(src, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
7411 } else {
7412 src = fromReg->as_Register();
7413 }
7414 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
7415 if (is_reference_type(bt)) {
7416 store_heap_oop(dst, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
7417 } else {
7418 store_sized_value(dst, src, size_in_bytes);
7419 }
7420 } else if (bt == T_DOUBLE) {
7421 strd(fromReg->as_FloatRegister(), dst);
7422 } else {
7423 assert(bt == T_FLOAT, "must be float");
7424 strs(fromReg->as_FloatRegister(), dst);
7425 }
7426 }
7427 bind(L_null);
7428 sig_index = stream.sig_index();
7429 from_index = stream.regs_index();
7430
7431 assert(reg_state[to->value()] == reg_writable, "must have already been read");
7432 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
7433 assert(success, "to register must be writeable");
7434
7435 return true;
7436 }
7437
7438 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
7439 return (reg->is_FloatRegister()) ? v8->as_VMReg() : r14->as_VMReg();
7440 }
7441
7442 void MacroAssembler::cache_wb(Address line) {
7443 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
7444 assert(line.index() == noreg, "index should be noreg");
7445 assert(line.offset() == 0, "offset should be 0");
7446 // would like to assert this
7447 // assert(line._ext.shift == 0, "shift should be zero");
7448 if (VM_Version::supports_dcpop()) {
7449 // writeback using clear virtual address to point of persistence
7450 dc(Assembler::CVAP, line.base());
7451 } else {
7452 // no need to generate anything as Unsafe.writebackMemory should
7453 // never invoke this stub
7454 }
7455 }
7456
7457 void MacroAssembler::cache_wbsync(bool is_pre) {
7458 // we only need a barrier post sync
7459 if (!is_pre) {
7460 membar(Assembler::AnyAny);
7461 }
7827 }
7828
7829 // Check if the lock-stack is full.
7830 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7831 cmpw(top, (unsigned)LockStack::end_offset());
7832 br(Assembler::GE, slow);
7833
7834 // Check for recursion.
7835 subw(t, top, oopSize);
7836 ldr(t, Address(rthread, t));
7837 cmp(obj, t);
7838 br(Assembler::EQ, push);
7839
7840 // Check header for monitor (0b10).
7841 tst(mark, markWord::monitor_value);
7842 br(Assembler::NE, slow);
7843
7844 // Try to lock. Transition lock bits 0b01 => 0b00
7845 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7846 orr(mark, mark, markWord::unlocked_value);
7847 if (EnableValhalla) {
7848 // Mask inline_type bit such that we go to the slow path if object is an inline type
7849 andr(mark, mark, ~((int) markWord::inline_type_bit_in_place));
7850 }
7851 eor(t, mark, markWord::unlocked_value);
7852 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7853 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7854 br(Assembler::NE, slow);
7855
7856 bind(push);
7857 // After successful lock, push object on lock-stack.
7858 str(obj, Address(rthread, top));
7859 addw(top, top, oopSize);
7860 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7861 }
7862
7863 // Implements lightweight-unlocking.
7864 //
7865 // - obj: the object to be unlocked
7866 // - t1, t2, t3: temporary registers
7867 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7868 void MacroAssembler::lightweight_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7869 assert(LockingMode == LM_LIGHTWEIGHT, "only used with new lightweight locking");
7870 // cmpxchg clobbers rscratch1.
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