9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "code/compiledIC.hpp"
30 #include "compiler/compileTask.hpp"
31 #include "compiler/disassembler.hpp"
32 #include "compiler/oopMap.hpp"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/cardTable.hpp"
37 #include "gc/shared/collectedHeap.hpp"
38 #include "gc/shared/tlab_globals.hpp"
39 #include "interpreter/bytecodeHistogram.hpp"
40 #include "interpreter/interpreter.hpp"
41 #include "interpreter/interpreterRuntime.hpp"
42 #include "jvm.h"
43 #include "memory/resourceArea.hpp"
44 #include "memory/universe.hpp"
45 #include "nativeInst_aarch64.hpp"
46 #include "oops/accessDecorators.hpp"
47 #include "oops/compressedKlass.inline.hpp"
48 #include "oops/compressedOops.inline.hpp"
49 #include "oops/klass.inline.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/icache.hpp"
52 #include "runtime/interfaceSupport.inline.hpp"
53 #include "runtime/javaThread.hpp"
54 #include "runtime/jniHandles.inline.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/globalDefinitions.hpp"
58 #include "utilities/powerOfTwo.hpp"
59 #ifdef COMPILER1
60 #include "c1/c1_LIRAssembler.hpp"
61 #endif
62 #ifdef COMPILER2
63 #include "oops/oop.hpp"
64 #include "opto/compile.hpp"
65 #include "opto/node.hpp"
66 #include "opto/output.hpp"
67 #endif
68
69 #include <sys/types.h>
70
71 #ifdef PRODUCT
72 #define BLOCK_COMMENT(str) /* nothing */
73 #else
74 #define BLOCK_COMMENT(str) block_comment(str)
75 #endif
76 #define STOP(str) stop(str);
77 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
78
2002 ldarb(scratch, scratch);
2003 cmp(scratch, InstanceKlass::fully_initialized);
2004 br(Assembler::EQ, *L_fast_path);
2005
2006 // Fast path check: current thread is initializer thread
2007 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2008 cmp(rthread, scratch);
2009
2010 if (L_slow_path == &L_fallthrough) {
2011 br(Assembler::EQ, *L_fast_path);
2012 bind(*L_slow_path);
2013 } else if (L_fast_path == &L_fallthrough) {
2014 br(Assembler::NE, *L_slow_path);
2015 bind(*L_fast_path);
2016 } else {
2017 Unimplemented();
2018 }
2019 }
2020
2021 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2022 if (!VerifyOops) return;
2023
2024 // Pass register number to verify_oop_subroutine
2025 const char* b = nullptr;
2026 {
2027 ResourceMark rm;
2028 stringStream ss;
2029 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2030 b = code_string(ss.as_string());
2031 }
2032 BLOCK_COMMENT("verify_oop {");
2033
2034 strip_return_address(); // This might happen within a stack frame.
2035 protect_return_address();
2036 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2037 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2038
2039 mov(r0, reg);
2040 movptr(rscratch1, (uintptr_t)(address)b);
2041
2042 // call indirectly to solve generation ordering problem
2043 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2044 ldr(rscratch2, Address(rscratch2));
2045 blr(rscratch2);
2046
2047 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2048 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2049 authenticate_return_address();
2050
2051 BLOCK_COMMENT("} verify_oop");
2052 }
2053
2054 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2055 if (!VerifyOops) return;
2056
2057 const char* b = nullptr;
2058 {
2059 ResourceMark rm;
2060 stringStream ss;
2061 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2062 b = code_string(ss.as_string());
2063 }
2064 BLOCK_COMMENT("verify_oop_addr {");
2065
2066 strip_return_address(); // This might happen within a stack frame.
2067 protect_return_address();
2068 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2069 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2070
2071 // addr may contain sp so we will have to adjust it based on the
2072 // pushes that we just did.
2073 if (addr.uses(sp)) {
2074 lea(r0, addr);
2075 ldr(r0, Address(r0, 4 * wordSize));
2288 call_VM_leaf_base(entry_point, 1);
2289 }
2290
2291 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2292 assert_different_registers(arg_1, c_rarg0);
2293 pass_arg0(this, arg_0);
2294 pass_arg1(this, arg_1);
2295 call_VM_leaf_base(entry_point, 2);
2296 }
2297
2298 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2299 Register arg_1, Register arg_2) {
2300 assert_different_registers(arg_1, c_rarg0);
2301 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2302 pass_arg0(this, arg_0);
2303 pass_arg1(this, arg_1);
2304 pass_arg2(this, arg_2);
2305 call_VM_leaf_base(entry_point, 3);
2306 }
2307
2308 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2309 pass_arg0(this, arg_0);
2310 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2311 }
2312
2313 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2314
2315 assert_different_registers(arg_0, c_rarg1);
2316 pass_arg1(this, arg_1);
2317 pass_arg0(this, arg_0);
2318 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2319 }
2320
2321 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2322 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2323 assert_different_registers(arg_1, c_rarg2);
2324 pass_arg2(this, arg_2);
2325 pass_arg1(this, arg_1);
2326 pass_arg0(this, arg_0);
2327 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2333 assert_different_registers(arg_2, c_rarg3);
2334 pass_arg3(this, arg_3);
2335 pass_arg2(this, arg_2);
2336 pass_arg1(this, arg_1);
2337 pass_arg0(this, arg_0);
2338 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2339 }
2340
2341 void MacroAssembler::null_check(Register reg, int offset) {
2342 if (needs_explicit_null_check(offset)) {
2343 // provoke OS null exception if reg is null by
2344 // accessing M[reg] w/o changing any registers
2345 // NOTE: this is plenty to provoke a segv
2346 ldr(zr, Address(reg));
2347 } else {
2348 // nothing to do, (later) access of M[reg + offset]
2349 // will provoke OS null exception if reg is null
2350 }
2351 }
2352
2353 // MacroAssembler protected routines needed to implement
2354 // public methods
2355
2356 void MacroAssembler::mov(Register r, Address dest) {
2357 code_section()->relocate(pc(), dest.rspec());
2358 uint64_t imm64 = (uint64_t)dest.target();
2359 movptr(r, imm64);
2360 }
2361
2362 // Move a constant pointer into r. In AArch64 mode the virtual
2363 // address space is 48 bits in size, so we only need three
2364 // instructions to create a patchable instruction sequence that can
2365 // reach anywhere.
2366 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2367 #ifndef PRODUCT
2368 {
2369 char buffer[64];
2370 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2371 block_comment(buffer);
2372 }
5031 adrp(rscratch1, src2, offset);
5032 ldr(rscratch1, Address(rscratch1, offset));
5033 cmp(src1, rscratch1);
5034 }
5035
5036 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5037 cmp(obj1, obj2);
5038 }
5039
5040 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5041 load_method_holder(rresult, rmethod);
5042 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5043 }
5044
5045 void MacroAssembler::load_method_holder(Register holder, Register method) {
5046 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5047 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5048 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5049 }
5050
5051 // Loads the obj's Klass* into dst.
5052 // Preserves all registers (incl src, rscratch1 and rscratch2).
5053 // Input:
5054 // src - the oop we want to load the klass from.
5055 // dst - output narrow klass.
5056 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5057 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5058 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5059 lsr(dst, dst, markWord::klass_shift);
5060 }
5061
5062 void MacroAssembler::load_klass(Register dst, Register src) {
5063 if (UseCompactObjectHeaders) {
5064 load_narrow_klass_compact(dst, src);
5065 } else {
5066 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5067 }
5068 decode_klass_not_null(dst);
5069 }
5070
5121 load_narrow_klass_compact(tmp, obj);
5122 } else {
5123 ldrw(tmp, Address(obj, oopDesc::klass_offset_in_bytes()));
5124 }
5125 if (CompressedKlassPointers::base() == nullptr) {
5126 cmp(klass, tmp, LSL, CompressedKlassPointers::shift());
5127 return;
5128 } else if (((uint64_t)CompressedKlassPointers::base() & 0xffffffff) == 0
5129 && CompressedKlassPointers::shift() == 0) {
5130 // Only the bottom 32 bits matter
5131 cmpw(klass, tmp);
5132 return;
5133 }
5134 decode_klass_not_null(tmp);
5135 cmp(klass, tmp);
5136 }
5137
5138 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5139 if (UseCompactObjectHeaders) {
5140 load_narrow_klass_compact(tmp1, obj1);
5141 load_narrow_klass_compact(tmp2, obj2);
5142 } else {
5143 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5144 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5145 }
5146 cmpw(tmp1, tmp2);
5147 }
5148
5149 void MacroAssembler::store_klass(Register dst, Register src) {
5150 // FIXME: Should this be a store release? concurrent gcs assumes
5151 // klass length is valid if klass field is not null.
5152 assert(!UseCompactObjectHeaders, "not with compact headers");
5153 encode_klass_not_null(src);
5154 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5155 }
5156
5157 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5158 assert(!UseCompactObjectHeaders, "not with compact headers");
5159 // Store to klass gap in destination
5160 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5161 }
5162
5163 // Algorithm must match CompressedOops::encode.
5164 void MacroAssembler::encode_heap_oop(Register d, Register s) {
5165 #ifdef ASSERT
5166 verify_heapbase("MacroAssembler::encode_heap_oop: heap base corrupted?");
5167 #endif
5168 verify_oop_msg(s, "broken oop in encode_heap_oop");
5518 if (as_raw) {
5519 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5520 } else {
5521 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5522 }
5523 }
5524
5525 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5526 Address dst, Register val,
5527 Register tmp1, Register tmp2, Register tmp3) {
5528 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5529 decorators = AccessInternal::decorator_fixup(decorators, type);
5530 bool as_raw = (decorators & AS_RAW) != 0;
5531 if (as_raw) {
5532 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5533 } else {
5534 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5535 }
5536 }
5537
5538 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5539 Register tmp2, DecoratorSet decorators) {
5540 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5541 }
5542
5543 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5544 Register tmp2, DecoratorSet decorators) {
5545 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5546 }
5547
5548 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5549 Register tmp2, Register tmp3, DecoratorSet decorators) {
5550 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5551 }
5552
5553 // Used for storing nulls.
5554 void MacroAssembler::store_heap_oop_null(Address dst) {
5555 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5556 }
5557
5593 oop_index = oop_recorder()->allocate_metadata_index(obj);
5594 } else {
5595 oop_index = oop_recorder()->find_index(obj);
5596 }
5597 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5598 mov(dst, Address((address)obj, rspec));
5599 }
5600
5601 Address MacroAssembler::constant_oop_address(jobject obj) {
5602 #ifdef ASSERT
5603 {
5604 ThreadInVMfromUnknown tiv;
5605 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5606 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5607 }
5608 #endif
5609 int oop_index = oop_recorder()->find_index(obj);
5610 return Address((address)obj, oop_Relocation::spec(oop_index));
5611 }
5612
5613 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5614 void MacroAssembler::tlab_allocate(Register obj,
5615 Register var_size_in_bytes,
5616 int con_size_in_bytes,
5617 Register t1,
5618 Register t2,
5619 Label& slow_case) {
5620 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5621 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5622 }
5623
5624 void MacroAssembler::verify_tlab() {
5625 #ifdef ASSERT
5626 if (UseTLAB && VerifyOops) {
5627 Label next, ok;
5628
5629 stp(rscratch2, rscratch1, Address(pre(sp, -16)));
5630
5631 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5632 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5633 cmp(rscratch2, rscratch1);
5634 br(Assembler::HS, next);
5635 STOP("assert(top >= start)");
5636 should_not_reach_here();
5637
5638 bind(next);
5639 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5640 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5641 cmp(rscratch2, rscratch1);
5642 br(Assembler::HS, ok);
5643 STOP("assert(top <= end)");
5644 should_not_reach_here();
5645
5646 bind(ok);
5647 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5648 }
5649 #endif
5650 }
5651
5652 // Writes to stack successive pages until offset reached to check for
5653 // stack overflow + shadow pages. This clobbers tmp.
5654 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5655 assert_different_registers(tmp, size, rscratch1);
5656 mov(tmp, sp);
5657 // Bang stack for total size given plus shadow page size.
5658 // Bang one page at a time because large size can bang beyond yellow and
5659 // red zones.
5660 Label loop;
5661 mov(rscratch1, (int)os::vm_page_size());
5662 bind(loop);
5663 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5664 subsw(size, size, rscratch1);
5665 str(size, Address(tmp));
5666 br(Assembler::GT, loop);
5667
5668 // Bang down shadow pages too.
5669 // At this point, (tmp-0) is the last address touched, so don't
5670 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5671 // was post-decremented.) Skip this address by starting at i=1, and
5738
5739 // Strictly speaking the card table base isn't an address at all, and it might
5740 // even be negative. It is thus materialised as a constant.
5741 mov(reg, (uint64_t)ctbs->card_table_base_const());
5742 }
5743
5744 void MacroAssembler::load_aotrc_address(Register reg, address a) {
5745 #if INCLUDE_CDS
5746 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
5747 if (AOTCodeCache::is_on_for_dump()) {
5748 // all aotrc field addresses should be registered in the AOTCodeCache address table
5749 lea(reg, ExternalAddress(a));
5750 } else {
5751 mov(reg, (uint64_t)a);
5752 }
5753 #else
5754 ShouldNotReachHere();
5755 #endif
5756 }
5757
5758 void MacroAssembler::build_frame(int framesize) {
5759 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5760 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5761 protect_return_address();
5762 if (framesize < ((1 << 9) + 2 * wordSize)) {
5763 sub(sp, sp, framesize);
5764 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5765 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5766 } else {
5767 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5768 if (PreserveFramePointer) mov(rfp, sp);
5769 if (framesize < ((1 << 12) + 2 * wordSize))
5770 sub(sp, sp, framesize - 2 * wordSize);
5771 else {
5772 mov(rscratch1, framesize - 2 * wordSize);
5773 sub(sp, sp, rscratch1);
5774 }
5775 }
5776 verify_cross_modify_fence_not_required();
5777 }
5778
5779 void MacroAssembler::remove_frame(int framesize) {
5780 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5781 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5782 if (framesize < ((1 << 9) + 2 * wordSize)) {
5783 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5784 add(sp, sp, framesize);
5785 } else {
5786 if (framesize < ((1 << 12) + 2 * wordSize))
5787 add(sp, sp, framesize - 2 * wordSize);
5788 else {
5789 mov(rscratch1, framesize - 2 * wordSize);
5790 add(sp, sp, rscratch1);
5791 }
5792 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5793 }
5794 authenticate_return_address();
5795 }
5796
5797
5798 // This method counts leading positive bytes (highest bit not set) in provided byte array
5799 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
5800 // Simple and most common case of aligned small array which is not at the
5801 // end of memory page is placed here. All other cases are in stub.
5802 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
5803 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
5804 assert_different_registers(ary1, len, result);
5805
5806 mov(result, len);
5807 cmpw(len, 0);
5808 br(LE, DONE);
5809 cmpw(len, 4 * wordSize);
5810 br(GE, STUB_LONG); // size > 32 then go to stub
5811
5812 int shift = 64 - exact_log2(os::vm_page_size());
5813 lsl(rscratch1, ary1, shift);
5814 mov(rscratch2, (size_t)(4 * wordSize) << shift);
5815 adds(rscratch2, rscratch1, rscratch2); // At end of page?
5816 br(CS, STUB); // at the end of page then go to stub
6699 // On other systems, the helper is a usual C function.
6700 //
6701 void MacroAssembler::get_thread(Register dst) {
6702 RegSet saved_regs =
6703 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
6704 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
6705
6706 protect_return_address();
6707 push(saved_regs, sp);
6708
6709 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6710 blr(lr);
6711 if (dst != c_rarg0) {
6712 mov(dst, c_rarg0);
6713 }
6714
6715 pop(saved_regs, sp);
6716 authenticate_return_address();
6717 }
6718
6719 void MacroAssembler::cache_wb(Address line) {
6720 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
6721 assert(line.index() == noreg, "index should be noreg");
6722 assert(line.offset() == 0, "offset should be 0");
6723 // would like to assert this
6724 // assert(line._ext.shift == 0, "shift should be zero");
6725 if (VM_Version::supports_dcpop()) {
6726 // writeback using clear virtual address to point of persistence
6727 dc(Assembler::CVAP, line.base());
6728 } else {
6729 // no need to generate anything as Unsafe.writebackMemory should
6730 // never invoke this stub
6731 }
6732 }
6733
6734 void MacroAssembler::cache_wbsync(bool is_pre) {
6735 // we only need a barrier post sync
6736 if (!is_pre) {
6737 membar(Assembler::AnyAny);
6738 }
7134 }
7135
7136 // Check if the lock-stack is full.
7137 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7138 cmpw(top, (unsigned)LockStack::end_offset());
7139 br(Assembler::GE, slow);
7140
7141 // Check for recursion.
7142 subw(t, top, oopSize);
7143 ldr(t, Address(rthread, t));
7144 cmp(obj, t);
7145 br(Assembler::EQ, push);
7146
7147 // Check header for monitor (0b10).
7148 tst(mark, markWord::monitor_value);
7149 br(Assembler::NE, slow);
7150
7151 // Try to lock. Transition lock bits 0b01 => 0b00
7152 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7153 orr(mark, mark, markWord::unlocked_value);
7154 eor(t, mark, markWord::unlocked_value);
7155 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7156 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7157 br(Assembler::NE, slow);
7158
7159 bind(push);
7160 // After successful lock, push object on lock-stack.
7161 str(obj, Address(rthread, top));
7162 addw(top, top, oopSize);
7163 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7164 }
7165
7166 // Implements fast-unlocking.
7167 //
7168 // - obj: the object to be unlocked
7169 // - t1, t2, t3: temporary registers
7170 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7171 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7172 // cmpxchg clobbers rscratch1.
7173 assert_different_registers(obj, t1, t2, t3, rscratch1);
|
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "ci/ciInlineKlass.hpp"
30 #include "code/compiledIC.hpp"
31 #include "compiler/compileTask.hpp"
32 #include "compiler/disassembler.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "gc/shared/cardTableBarrierSet.hpp"
37 #include "gc/shared/cardTable.hpp"
38 #include "gc/shared/collectedHeap.hpp"
39 #include "gc/shared/tlab_globals.hpp"
40 #include "interpreter/bytecodeHistogram.hpp"
41 #include "interpreter/interpreter.hpp"
42 #include "interpreter/interpreterRuntime.hpp"
43 #include "jvm.h"
44 #include "memory/resourceArea.hpp"
45 #include "memory/universe.hpp"
46 #include "nativeInst_aarch64.hpp"
47 #include "oops/accessDecorators.hpp"
48 #include "oops/compressedKlass.inline.hpp"
49 #include "oops/compressedOops.inline.hpp"
50 #include "oops/klass.inline.hpp"
51 #include "oops/resolvedFieldEntry.hpp"
52 #include "runtime/arguments.hpp"
53 #include "runtime/continuation.hpp"
54 #include "runtime/globals.hpp"
55 #include "runtime/icache.hpp"
56 #include "runtime/interfaceSupport.inline.hpp"
57 #include "runtime/javaThread.hpp"
58 #include "runtime/jniHandles.inline.hpp"
59 #include "runtime/sharedRuntime.hpp"
60 #include "runtime/signature_cc.hpp"
61 #include "runtime/stubRoutines.hpp"
62 #include "utilities/globalDefinitions.hpp"
63 #include "utilities/powerOfTwo.hpp"
64 #include "vmreg_aarch64.inline.hpp"
65 #ifdef COMPILER1
66 #include "c1/c1_LIRAssembler.hpp"
67 #endif
68 #ifdef COMPILER2
69 #include "oops/oop.hpp"
70 #include "opto/compile.hpp"
71 #include "opto/node.hpp"
72 #include "opto/output.hpp"
73 #endif
74
75 #include <sys/types.h>
76
77 #ifdef PRODUCT
78 #define BLOCK_COMMENT(str) /* nothing */
79 #else
80 #define BLOCK_COMMENT(str) block_comment(str)
81 #endif
82 #define STOP(str) stop(str);
83 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
84
2008 ldarb(scratch, scratch);
2009 cmp(scratch, InstanceKlass::fully_initialized);
2010 br(Assembler::EQ, *L_fast_path);
2011
2012 // Fast path check: current thread is initializer thread
2013 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2014 cmp(rthread, scratch);
2015
2016 if (L_slow_path == &L_fallthrough) {
2017 br(Assembler::EQ, *L_fast_path);
2018 bind(*L_slow_path);
2019 } else if (L_fast_path == &L_fallthrough) {
2020 br(Assembler::NE, *L_slow_path);
2021 bind(*L_fast_path);
2022 } else {
2023 Unimplemented();
2024 }
2025 }
2026
2027 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2028 if (!VerifyOops || VerifyAdapterSharing) {
2029 // Below address of the code string confuses VerifyAdapterSharing
2030 // because it may differ between otherwise equivalent adapters.
2031 return;
2032 }
2033
2034 // Pass register number to verify_oop_subroutine
2035 const char* b = nullptr;
2036 {
2037 ResourceMark rm;
2038 stringStream ss;
2039 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2040 b = code_string(ss.as_string());
2041 }
2042 BLOCK_COMMENT("verify_oop {");
2043
2044 strip_return_address(); // This might happen within a stack frame.
2045 protect_return_address();
2046 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2047 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2048
2049 mov(r0, reg);
2050 movptr(rscratch1, (uintptr_t)(address)b);
2051
2052 // call indirectly to solve generation ordering problem
2053 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2054 ldr(rscratch2, Address(rscratch2));
2055 blr(rscratch2);
2056
2057 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2058 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2059 authenticate_return_address();
2060
2061 BLOCK_COMMENT("} verify_oop");
2062 }
2063
2064 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2065 if (!VerifyOops || VerifyAdapterSharing) {
2066 // Below address of the code string confuses VerifyAdapterSharing
2067 // because it may differ between otherwise equivalent adapters.
2068 return;
2069 }
2070
2071 const char* b = nullptr;
2072 {
2073 ResourceMark rm;
2074 stringStream ss;
2075 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2076 b = code_string(ss.as_string());
2077 }
2078 BLOCK_COMMENT("verify_oop_addr {");
2079
2080 strip_return_address(); // This might happen within a stack frame.
2081 protect_return_address();
2082 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2083 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2084
2085 // addr may contain sp so we will have to adjust it based on the
2086 // pushes that we just did.
2087 if (addr.uses(sp)) {
2088 lea(r0, addr);
2089 ldr(r0, Address(r0, 4 * wordSize));
2302 call_VM_leaf_base(entry_point, 1);
2303 }
2304
2305 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2306 assert_different_registers(arg_1, c_rarg0);
2307 pass_arg0(this, arg_0);
2308 pass_arg1(this, arg_1);
2309 call_VM_leaf_base(entry_point, 2);
2310 }
2311
2312 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2313 Register arg_1, Register arg_2) {
2314 assert_different_registers(arg_1, c_rarg0);
2315 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2316 pass_arg0(this, arg_0);
2317 pass_arg1(this, arg_1);
2318 pass_arg2(this, arg_2);
2319 call_VM_leaf_base(entry_point, 3);
2320 }
2321
2322 void MacroAssembler::super_call_VM_leaf(address entry_point) {
2323 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2324 }
2325
2326 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2327 pass_arg0(this, arg_0);
2328 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2329 }
2330
2331 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2332
2333 assert_different_registers(arg_0, c_rarg1);
2334 pass_arg1(this, arg_1);
2335 pass_arg0(this, arg_0);
2336 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2337 }
2338
2339 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2340 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2341 assert_different_registers(arg_1, c_rarg2);
2342 pass_arg2(this, arg_2);
2343 pass_arg1(this, arg_1);
2344 pass_arg0(this, arg_0);
2345 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2351 assert_different_registers(arg_2, c_rarg3);
2352 pass_arg3(this, arg_3);
2353 pass_arg2(this, arg_2);
2354 pass_arg1(this, arg_1);
2355 pass_arg0(this, arg_0);
2356 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2357 }
2358
2359 void MacroAssembler::null_check(Register reg, int offset) {
2360 if (needs_explicit_null_check(offset)) {
2361 // provoke OS null exception if reg is null by
2362 // accessing M[reg] w/o changing any registers
2363 // NOTE: this is plenty to provoke a segv
2364 ldr(zr, Address(reg));
2365 } else {
2366 // nothing to do, (later) access of M[reg + offset]
2367 // will provoke OS null exception if reg is null
2368 }
2369 }
2370
2371 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2372 assert_different_registers(markword, rscratch2);
2373 mov(rscratch2, markWord::inline_type_mask_in_place);
2374 andr(markword, markword, rscratch2);
2375 mov(rscratch2, markWord::inline_type_pattern);
2376 cmp(markword, rscratch2);
2377 br(Assembler::EQ, is_inline_type);
2378 }
2379
2380 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2381 assert_different_registers(tmp, rscratch1);
2382 if (can_be_null) {
2383 cbz(object, not_inline_type);
2384 }
2385 const int is_inline_type_mask = markWord::inline_type_pattern;
2386 ldr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2387 mov(rscratch1, is_inline_type_mask);
2388 andr(tmp, tmp, rscratch1);
2389 cmp(tmp, rscratch1);
2390 br(Assembler::NE, not_inline_type);
2391 }
2392
2393 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2394 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2395 tbnz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, is_null_free_inline_type);
2396 }
2397
2398 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2399 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2400 tbz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, not_null_free_inline_type);
2401 }
2402
2403 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2404 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2405 tbnz(flags, ResolvedFieldEntry::is_flat_shift, is_flat);
2406 }
2407
2408 void MacroAssembler::test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker) {
2409 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2410 tbnz(flags, ResolvedFieldEntry::has_null_marker_shift, has_null_marker);
2411 }
2412
2413 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2414 Label test_mark_word;
2415 // load mark word
2416 ldr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2417 // check displaced
2418 tst(temp_reg, markWord::unlocked_value);
2419 br(Assembler::NE, test_mark_word);
2420 // slow path use klass prototype
2421 load_prototype_header(temp_reg, oop);
2422
2423 bind(test_mark_word);
2424 andr(temp_reg, temp_reg, test_bit);
2425 if (jmp_set) {
2426 cbnz(temp_reg, jmp_label);
2427 } else {
2428 cbz(temp_reg, jmp_label);
2429 }
2430 }
2431
2432 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array) {
2433 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2434 }
2435
2436 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2437 Label&is_non_flat_array) {
2438 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2439 }
2440
2441 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array) {
2442 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2443 }
2444
2445 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2446 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2447 }
2448
2449 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2450 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2451 br(Assembler::NE, is_flat_array);
2452 }
2453
2454 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
2455 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2456 br(Assembler::EQ, is_non_flat_array);
2457 }
2458
2459 // MacroAssembler protected routines needed to implement
2460 // public methods
2461
2462 void MacroAssembler::mov(Register r, Address dest) {
2463 code_section()->relocate(pc(), dest.rspec());
2464 uint64_t imm64 = (uint64_t)dest.target();
2465 movptr(r, imm64);
2466 }
2467
2468 // Move a constant pointer into r. In AArch64 mode the virtual
2469 // address space is 48 bits in size, so we only need three
2470 // instructions to create a patchable instruction sequence that can
2471 // reach anywhere.
2472 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2473 #ifndef PRODUCT
2474 {
2475 char buffer[64];
2476 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2477 block_comment(buffer);
2478 }
5137 adrp(rscratch1, src2, offset);
5138 ldr(rscratch1, Address(rscratch1, offset));
5139 cmp(src1, rscratch1);
5140 }
5141
5142 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5143 cmp(obj1, obj2);
5144 }
5145
5146 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5147 load_method_holder(rresult, rmethod);
5148 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5149 }
5150
5151 void MacroAssembler::load_method_holder(Register holder, Register method) {
5152 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5153 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5154 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5155 }
5156
5157 void MacroAssembler::load_metadata(Register dst, Register src) {
5158 if (UseCompactObjectHeaders) {
5159 load_narrow_klass_compact(dst, src);
5160 } else {
5161 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5162 }
5163 }
5164
5165 // Loads the obj's Klass* into dst.
5166 // Preserves all registers (incl src, rscratch1 and rscratch2).
5167 // Input:
5168 // src - the oop we want to load the klass from.
5169 // dst - output narrow klass.
5170 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5171 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5172 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5173 lsr(dst, dst, markWord::klass_shift);
5174 }
5175
5176 void MacroAssembler::load_klass(Register dst, Register src) {
5177 if (UseCompactObjectHeaders) {
5178 load_narrow_klass_compact(dst, src);
5179 } else {
5180 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5181 }
5182 decode_klass_not_null(dst);
5183 }
5184
5235 load_narrow_klass_compact(tmp, obj);
5236 } else {
5237 ldrw(tmp, Address(obj, oopDesc::klass_offset_in_bytes()));
5238 }
5239 if (CompressedKlassPointers::base() == nullptr) {
5240 cmp(klass, tmp, LSL, CompressedKlassPointers::shift());
5241 return;
5242 } else if (((uint64_t)CompressedKlassPointers::base() & 0xffffffff) == 0
5243 && CompressedKlassPointers::shift() == 0) {
5244 // Only the bottom 32 bits matter
5245 cmpw(klass, tmp);
5246 return;
5247 }
5248 decode_klass_not_null(tmp);
5249 cmp(klass, tmp);
5250 }
5251
5252 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5253 if (UseCompactObjectHeaders) {
5254 load_narrow_klass_compact(tmp1, obj1);
5255 load_narrow_klass_compact(tmp2, obj2);
5256 } else {
5257 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5258 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5259 }
5260 cmpw(tmp1, tmp2);
5261 }
5262
5263 void MacroAssembler::load_prototype_header(Register dst, Register src) {
5264 load_klass(dst, src);
5265 ldr(dst, Address(dst, Klass::prototype_header_offset()));
5266 }
5267
5268 void MacroAssembler::store_klass(Register dst, Register src) {
5269 // FIXME: Should this be a store release? concurrent gcs assumes
5270 // klass length is valid if klass field is not null.
5271 assert(!UseCompactObjectHeaders, "not with compact headers");
5272 encode_klass_not_null(src);
5273 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5274 }
5275
5276 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5277 assert(!UseCompactObjectHeaders, "not with compact headers");
5278 // Store to klass gap in destination
5279 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5280 }
5281
5282 // Algorithm must match CompressedOops::encode.
5283 void MacroAssembler::encode_heap_oop(Register d, Register s) {
5284 #ifdef ASSERT
5285 verify_heapbase("MacroAssembler::encode_heap_oop: heap base corrupted?");
5286 #endif
5287 verify_oop_msg(s, "broken oop in encode_heap_oop");
5637 if (as_raw) {
5638 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5639 } else {
5640 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5641 }
5642 }
5643
5644 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5645 Address dst, Register val,
5646 Register tmp1, Register tmp2, Register tmp3) {
5647 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5648 decorators = AccessInternal::decorator_fixup(decorators, type);
5649 bool as_raw = (decorators & AS_RAW) != 0;
5650 if (as_raw) {
5651 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5652 } else {
5653 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5654 }
5655 }
5656
5657 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5658 Register inline_layout_info) {
5659 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5660 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5661 }
5662
5663 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5664 ldr(offset, Address(inline_klass, InlineKlass::adr_members_offset()));
5665 ldrw(offset, Address(offset, InlineKlass::payload_offset_offset()));
5666 }
5667
5668 void MacroAssembler::payload_address(Register oop, Register data, Register inline_klass) {
5669 // ((address) (void*) o) + vk->payload_offset();
5670 Register offset = (data == oop) ? rscratch1 : data;
5671 payload_offset(inline_klass, offset);
5672 if (data == oop) {
5673 add(data, data, offset);
5674 } else {
5675 lea(data, Address(oop, offset));
5676 }
5677 }
5678
5679 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
5680 Register index, Register data) {
5681 assert_different_registers(array, array_klass, index);
5682 assert_different_registers(rscratch1, array, index);
5683
5684 // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
5685 ldrw(rscratch1, Address(array_klass, Klass::layout_helper_offset()));
5686
5687 // Klass::layout_helper_log2_element_size(lh)
5688 // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
5689 lsr(rscratch1, rscratch1, Klass::_lh_log2_element_size_shift);
5690 andr(rscratch1, rscratch1, Klass::_lh_log2_element_size_mask);
5691 lslv(index, index, rscratch1);
5692
5693 add(data, array, index);
5694 add(data, data, arrayOopDesc::base_offset_in_bytes(T_FLAT_ELEMENT));
5695 }
5696
5697 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5698 Register tmp2, DecoratorSet decorators) {
5699 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5700 }
5701
5702 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5703 Register tmp2, DecoratorSet decorators) {
5704 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5705 }
5706
5707 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5708 Register tmp2, Register tmp3, DecoratorSet decorators) {
5709 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5710 }
5711
5712 // Used for storing nulls.
5713 void MacroAssembler::store_heap_oop_null(Address dst) {
5714 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5715 }
5716
5752 oop_index = oop_recorder()->allocate_metadata_index(obj);
5753 } else {
5754 oop_index = oop_recorder()->find_index(obj);
5755 }
5756 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5757 mov(dst, Address((address)obj, rspec));
5758 }
5759
5760 Address MacroAssembler::constant_oop_address(jobject obj) {
5761 #ifdef ASSERT
5762 {
5763 ThreadInVMfromUnknown tiv;
5764 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5765 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5766 }
5767 #endif
5768 int oop_index = oop_recorder()->find_index(obj);
5769 return Address((address)obj, oop_Relocation::spec(oop_index));
5770 }
5771
5772 // Object / value buffer allocation...
5773 void MacroAssembler::allocate_instance(Register klass, Register new_obj,
5774 Register t1, Register t2,
5775 bool clear_fields, Label& alloc_failed)
5776 {
5777 Label done, initialize_header, initialize_object, slow_case, slow_case_no_pop;
5778 Register layout_size = t1;
5779 assert(new_obj == r0, "needs to be r0");
5780 assert_different_registers(klass, new_obj, t1, t2);
5781
5782 // get instance_size in InstanceKlass (scaled to a count of bytes)
5783 ldrw(layout_size, Address(klass, Klass::layout_helper_offset()));
5784 // test to see if it is malformed in some way
5785 tst(layout_size, Klass::_lh_instance_slow_path_bit);
5786 br(Assembler::NE, slow_case_no_pop);
5787
5788 // Allocate the instance:
5789 // If TLAB is enabled:
5790 // Try to allocate in the TLAB.
5791 // If fails, go to the slow path.
5792 // Initialize the allocation.
5793 // Exit.
5794 //
5795 // Go to slow path.
5796
5797 if (UseTLAB) {
5798 push(klass);
5799 tlab_allocate(new_obj, layout_size, 0, klass, t2, slow_case);
5800 if (ZeroTLAB || (!clear_fields)) {
5801 // the fields have been already cleared
5802 b(initialize_header);
5803 } else {
5804 // initialize both the header and fields
5805 b(initialize_object);
5806 }
5807
5808 if (clear_fields) {
5809 // The object is initialized before the header. If the object size is
5810 // zero, go directly to the header initialization.
5811 bind(initialize_object);
5812 int header_size = oopDesc::header_size() * HeapWordSize;
5813 assert(is_aligned(header_size, BytesPerLong), "oop header size must be 8-byte-aligned");
5814 subs(layout_size, layout_size, header_size);
5815 br(Assembler::EQ, initialize_header);
5816
5817 // Initialize topmost object field, divide size by 8, check if odd and
5818 // test if zero.
5819
5820 #ifdef ASSERT
5821 // make sure instance_size was multiple of 8
5822 Label L;
5823 tst(layout_size, 7);
5824 br(Assembler::EQ, L);
5825 stop("object size is not multiple of 8 - adjust this code");
5826 bind(L);
5827 // must be > 0, no extra check needed here
5828 #endif
5829
5830 lsr(layout_size, layout_size, LogBytesPerLong);
5831
5832 // initialize remaining object fields: instance_size was a multiple of 8
5833 {
5834 Label loop;
5835 Register base = t2;
5836
5837 bind(loop);
5838 add(rscratch1, new_obj, layout_size, Assembler::LSL, LogBytesPerLong);
5839 str(zr, Address(rscratch1, header_size - 1*oopSize));
5840 subs(layout_size, layout_size, 1);
5841 br(Assembler::NE, loop);
5842 }
5843 } // clear_fields
5844
5845 // initialize object header only.
5846 bind(initialize_header);
5847 pop(klass);
5848 Register mark_word = t2;
5849 if (UseCompactObjectHeaders || Arguments::is_valhalla_enabled()) {
5850 ldr(mark_word, Address(klass, Klass::prototype_header_offset()));
5851 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5852 } else {
5853 mov(mark_word, (intptr_t)markWord::prototype().value());
5854 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5855 }
5856 if (!UseCompactObjectHeaders) {
5857 store_klass_gap(new_obj, zr); // zero klass gap for compressed oops
5858 mov(t2, klass); // preserve klass
5859 store_klass(new_obj, t2); // src klass reg is potentially compressed
5860 }
5861 b(done);
5862 }
5863
5864 if (UseTLAB) {
5865 bind(slow_case);
5866 pop(klass);
5867 }
5868 bind(slow_case_no_pop);
5869 b(alloc_failed);
5870
5871 bind(done);
5872 }
5873
5874 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5875 void MacroAssembler::tlab_allocate(Register obj,
5876 Register var_size_in_bytes,
5877 int con_size_in_bytes,
5878 Register t1,
5879 Register t2,
5880 Label& slow_case) {
5881 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5882 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5883 }
5884
5885 void MacroAssembler::verify_tlab() {
5886 #ifdef ASSERT
5887 if (UseTLAB && VerifyOops) {
5888 Label next, ok;
5889
5890 stp(rscratch2, rscratch1, Address(pre(sp, -16)));
5891
5892 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5893 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5894 cmp(rscratch2, rscratch1);
5895 br(Assembler::HS, next);
5896 STOP("assert(top >= start)");
5897 should_not_reach_here();
5898
5899 bind(next);
5900 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5901 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5902 cmp(rscratch2, rscratch1);
5903 br(Assembler::HS, ok);
5904 STOP("assert(top <= end)");
5905 should_not_reach_here();
5906
5907 bind(ok);
5908 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5909 }
5910 #endif
5911 }
5912
5913 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
5914 assert_different_registers(holder_klass, index, layout_info);
5915 InlineLayoutInfo array[2];
5916 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
5917 if (is_power_of_2(size)) {
5918 lsl(index, index, log2i_exact(size)); // Scale index by power of 2
5919 } else {
5920 mov(layout_info, size);
5921 mul(index, index, layout_info); // Scale the index to be the entry index * array_element_size
5922 }
5923 ldr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
5924 add(layout_info, layout_info, Array<InlineLayoutInfo>::base_offset_in_bytes());
5925 lea(layout_info, Address(layout_info, index));
5926 }
5927
5928 // Writes to stack successive pages until offset reached to check for
5929 // stack overflow + shadow pages. This clobbers tmp.
5930 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5931 assert_different_registers(tmp, size, rscratch1);
5932 mov(tmp, sp);
5933 // Bang stack for total size given plus shadow page size.
5934 // Bang one page at a time because large size can bang beyond yellow and
5935 // red zones.
5936 Label loop;
5937 mov(rscratch1, (int)os::vm_page_size());
5938 bind(loop);
5939 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5940 subsw(size, size, rscratch1);
5941 str(size, Address(tmp));
5942 br(Assembler::GT, loop);
5943
5944 // Bang down shadow pages too.
5945 // At this point, (tmp-0) is the last address touched, so don't
5946 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5947 // was post-decremented.) Skip this address by starting at i=1, and
6014
6015 // Strictly speaking the card table base isn't an address at all, and it might
6016 // even be negative. It is thus materialised as a constant.
6017 mov(reg, (uint64_t)ctbs->card_table_base_const());
6018 }
6019
6020 void MacroAssembler::load_aotrc_address(Register reg, address a) {
6021 #if INCLUDE_CDS
6022 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
6023 if (AOTCodeCache::is_on_for_dump()) {
6024 // all aotrc field addresses should be registered in the AOTCodeCache address table
6025 lea(reg, ExternalAddress(a));
6026 } else {
6027 mov(reg, (uint64_t)a);
6028 }
6029 #else
6030 ShouldNotReachHere();
6031 #endif
6032 }
6033
6034 #ifdef ASSERT
6035 void MacroAssembler::build_frame(int framesize) {
6036 build_frame(framesize, false);
6037 }
6038 #endif
6039
6040 void MacroAssembler::build_frame(int framesize DEBUG_ONLY(COMMA bool zap_rfp_lr_spills)) {
6041 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
6042 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
6043 protect_return_address();
6044 if (framesize < ((1 << 9) + 2 * wordSize)) {
6045 sub(sp, sp, framesize);
6046 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
6047 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
6048 stp(rscratch1, rscratch1, Address(sp, framesize - 2 * wordSize));
6049 } else {
6050 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
6051 }
6052 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
6053 } else {
6054 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
6055 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
6056 stp(rscratch1, rscratch1, Address(pre(sp, -2 * wordSize)));
6057 } else {
6058 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
6059 }
6060 if (PreserveFramePointer) mov(rfp, sp);
6061 if (framesize < ((1 << 12) + 2 * wordSize))
6062 sub(sp, sp, framesize - 2 * wordSize);
6063 else {
6064 mov(rscratch1, framesize - 2 * wordSize);
6065 sub(sp, sp, rscratch1);
6066 }
6067 }
6068 verify_cross_modify_fence_not_required();
6069 }
6070
6071 void MacroAssembler::remove_frame(int framesize) {
6072 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
6073 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
6074 if (framesize < ((1 << 9) + 2 * wordSize)) {
6075 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
6076 add(sp, sp, framesize);
6077 } else {
6078 if (framesize < ((1 << 12) + 2 * wordSize))
6079 add(sp, sp, framesize - 2 * wordSize);
6080 else {
6081 mov(rscratch1, framesize - 2 * wordSize);
6082 add(sp, sp, rscratch1);
6083 }
6084 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6085 }
6086 authenticate_return_address();
6087 }
6088
6089 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6090 if (needs_stack_repair) {
6091 // The method has a scalarized entry point (where fields of value object arguments
6092 // are passed through registers and stack), and a non-scalarized entry point (where
6093 // value object arguments are given as oops). The non-scalarized entry point will
6094 // first load each field of value object arguments and store them in registers and on
6095 // the stack in a way compatible with the scalarized entry point. To do so, some extra
6096 // stack space might be reserved (if argument registers are not enough). On leaving the
6097 // method, this space must be freed.
6098 //
6099 // In case we used the non-scalarized entry point the stack looks like this:
6100 //
6101 // | Arguments from caller |
6102 // |---------------------------| <-- caller's SP
6103 // | Saved LR #1 |
6104 // | Saved FP #1 |
6105 // |---------------------------|
6106 // | Extension space for |
6107 // | inline arg (un)packing |
6108 // |---------------------------| <-- start of this method's frame
6109 // | Saved LR #2 |
6110 // | Saved FP #2 |
6111 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6112 // | sp_inc |
6113 // | method locals |
6114 // |---------------------------| <-- SP
6115 //
6116 // There are two copies of FP and LR on the stack. They will be identical at
6117 // first, but that can change.
6118 // If the caller has been deoptimized, LR #1 will be patched to point at the
6119 // deopt blob, and LR #2 will still point into the old method.
6120 // If the saved FP (x29) was not used as the frame pointer, but to store an
6121 // oop, the GC will be aware only of FP #1 as the spilled location of x29 and
6122 // will fix only this one. Overall, FP/LR #2 are not reliable and are simply
6123 // needed to add space between the extension space and the locals, as there
6124 // would be between the real arguments and the locals if we don't need to
6125 // do unpacking (from the scalarized entry point).
6126 //
6127 // When restoring, one must then load FP #1 into x29, and LR #1 into x30,
6128 // while keeping in mind that from the scalarized entry point, there will be
6129 // only one copy of each. Indeed, in the case we used the scalarized calling
6130 // convention, the stack looks like this:
6131 //
6132 // | Arguments from caller |
6133 // |---------------------------| <-- caller's SP / start of this method's frame
6134 // | Saved LR |
6135 // | Saved FP |
6136 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6137 // | sp_inc |
6138 // | method locals |
6139 // |---------------------------| <-- SP
6140 //
6141 // The sp_inc stack slot holds the total size of the frame including the
6142 // extension space minus two words for the saved FP and LR. That is how to
6143 // find FP/LR #1. This size is expressed in bytes. Be careful when using it
6144 // from C++ in pointer arithmetic; you might need to divide it by wordSize.
6145 //
6146 // One can find sp_inc since the start the method's frame is SP + initial_framesize.
6147
6148 int sp_inc_offset = initial_framesize - 3 * wordSize; // Immediately below saved LR and FP
6149
6150 ldr(rscratch1, Address(sp, sp_inc_offset));
6151 add(sp, sp, rscratch1);
6152 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6153 } else {
6154 remove_frame(initial_framesize);
6155 }
6156 }
6157
6158 void MacroAssembler::save_stack_increment(int sp_inc, int frame_size) {
6159 int real_frame_size = frame_size + sp_inc;
6160 assert(sp_inc == 0 || sp_inc > 2*wordSize, "invalid sp_inc value");
6161 assert(real_frame_size >= 2*wordSize, "frame size must include FP/LR space");
6162 assert((real_frame_size & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6163
6164 int sp_inc_offset = frame_size - 3 * wordSize; // Immediately below saved LR and FP
6165
6166 // Subtract two words for the saved FP and LR as these will be popped
6167 // separately. See remove_frame above.
6168 mov(rscratch1, real_frame_size - 2*wordSize);
6169 str(rscratch1, Address(sp, sp_inc_offset));
6170 }
6171
6172 // This method counts leading positive bytes (highest bit not set) in provided byte array
6173 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
6174 // Simple and most common case of aligned small array which is not at the
6175 // end of memory page is placed here. All other cases are in stub.
6176 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
6177 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
6178 assert_different_registers(ary1, len, result);
6179
6180 mov(result, len);
6181 cmpw(len, 0);
6182 br(LE, DONE);
6183 cmpw(len, 4 * wordSize);
6184 br(GE, STUB_LONG); // size > 32 then go to stub
6185
6186 int shift = 64 - exact_log2(os::vm_page_size());
6187 lsl(rscratch1, ary1, shift);
6188 mov(rscratch2, (size_t)(4 * wordSize) << shift);
6189 adds(rscratch2, rscratch1, rscratch2); // At end of page?
6190 br(CS, STUB); // at the end of page then go to stub
7073 // On other systems, the helper is a usual C function.
7074 //
7075 void MacroAssembler::get_thread(Register dst) {
7076 RegSet saved_regs =
7077 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
7078 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
7079
7080 protect_return_address();
7081 push(saved_regs, sp);
7082
7083 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
7084 blr(lr);
7085 if (dst != c_rarg0) {
7086 mov(dst, c_rarg0);
7087 }
7088
7089 pop(saved_regs, sp);
7090 authenticate_return_address();
7091 }
7092
7093 #ifdef COMPILER2
7094 // C2 compiled method's prolog code
7095 // Moved here from aarch64.ad to support Valhalla code below
7096 void MacroAssembler::verified_entry(Compile* C, int sp_inc) {
7097 if (C->clinit_barrier_on_entry()) {
7098 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
7099
7100 Label L_skip_barrier;
7101
7102 mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
7103 clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
7104 far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
7105 bind(L_skip_barrier);
7106 }
7107
7108 if (C->max_vector_size() > 0) {
7109 reinitialize_ptrue();
7110 }
7111
7112 int bangsize = C->output()->bang_size_in_bytes();
7113 if (C->output()->need_stack_bang(bangsize))
7114 generate_stack_overflow_check(bangsize);
7115
7116 // n.b. frame size includes space for return pc and rfp
7117 const long framesize = C->output()->frame_size_in_bytes();
7118 build_frame(framesize DEBUG_ONLY(COMMA sp_inc != 0));
7119
7120 if (C->needs_stack_repair()) {
7121 save_stack_increment(sp_inc, framesize);
7122 }
7123
7124 if (VerifyStackAtCalls) {
7125 Unimplemented();
7126 }
7127 }
7128 #endif // COMPILER2
7129
7130 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
7131 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
7132 // An inline type might be returned. If fields are in registers we
7133 // need to allocate an inline type instance and initialize it with
7134 // the value of the fields.
7135 Label skip;
7136 // We only need a new buffered inline type if a new one is not returned
7137 tbz(r0, 0, skip);
7138 int call_offset = -1;
7139
7140 // Be careful not to clobber r1-7 which hold returned fields
7141 // Also do not use callee-saved registers as these may be live in the interpreter
7142 Register tmp1 = r13, tmp2 = r14, klass = r15, r0_preserved = r12;
7143
7144 // The following code is similar to allocate_instance but has some slight differences,
7145 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
7146 // allocating is not necessary if vk != nullptr, etc. allocate_instance is not aware of these.
7147 Label slow_case;
7148 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
7149 mov(r0_preserved, r0); // save r0 for slow_case since *_allocate may corrupt it when allocation failed
7150
7151 if (vk != nullptr) {
7152 // Called from C1, where the return type is statically known.
7153 movptr(klass, (intptr_t)vk->get_InlineKlass());
7154 jint lh = vk->layout_helper();
7155 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
7156 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
7157 tlab_allocate(r0, noreg, lh, tmp1, tmp2, slow_case);
7158 } else {
7159 b(slow_case);
7160 }
7161 } else {
7162 // Call from interpreter. R0 contains ((the InlineKlass* of the return type) | 0x01)
7163 andr(klass, r0, -2);
7164 if (UseTLAB) {
7165 ldrw(tmp2, Address(klass, Klass::layout_helper_offset()));
7166 tst(tmp2, Klass::_lh_instance_slow_path_bit);
7167 br(Assembler::NE, slow_case);
7168 tlab_allocate(r0, tmp2, 0, tmp1, tmp2, slow_case);
7169 } else {
7170 b(slow_case);
7171 }
7172 }
7173 if (UseTLAB) {
7174 // 2. Initialize buffered inline instance header
7175 Register buffer_obj = r0;
7176 if (UseCompactObjectHeaders) {
7177 ldr(rscratch1, Address(klass, Klass::prototype_header_offset()));
7178 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7179 } else {
7180 mov(rscratch1, (intptr_t)markWord::inline_type_prototype().value());
7181 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7182 store_klass_gap(buffer_obj, zr);
7183 if (vk == nullptr) {
7184 // store_klass corrupts klass, so save it for later use (interpreter case only).
7185 mov(tmp1, klass);
7186 }
7187 store_klass(buffer_obj, klass);
7188 klass = tmp1;
7189 }
7190 // 3. Initialize its fields with an inline class specific handler
7191 if (vk != nullptr) {
7192 far_call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
7193 } else {
7194 ldr(tmp1, Address(klass, InlineKlass::adr_members_offset()));
7195 ldr(tmp1, Address(tmp1, InlineKlass::pack_handler_offset()));
7196 blr(tmp1);
7197 }
7198
7199 membar(Assembler::StoreStore);
7200 b(skip);
7201 } else {
7202 // Must have already branched to slow_case above.
7203 DEBUG_ONLY(should_not_reach_here());
7204 }
7205 bind(slow_case);
7206 // We failed to allocate a new inline type, fall back to a runtime
7207 // call. Some oop field may be live in some registers but we can't
7208 // tell. That runtime call will take care of preserving them
7209 // across a GC if there's one.
7210 mov(r0, r0_preserved);
7211
7212 if (from_interpreter) {
7213 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
7214 } else {
7215 far_call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
7216 call_offset = offset();
7217 }
7218 membar(Assembler::StoreStore);
7219
7220 bind(skip);
7221 return call_offset;
7222 }
7223
7224 // Move a value between registers/stack slots and update the reg_state
7225 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
7226 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
7227 if (reg_state[to->value()] == reg_written) {
7228 return true; // Already written
7229 }
7230
7231 if (from != to && bt != T_VOID) {
7232 if (reg_state[to->value()] == reg_readonly) {
7233 return false; // Not yet writable
7234 }
7235 if (from->is_reg()) {
7236 if (to->is_reg()) {
7237 if (from->is_Register() && to->is_Register()) {
7238 mov(to->as_Register(), from->as_Register());
7239 } else if (from->is_FloatRegister() && to->is_FloatRegister()) {
7240 fmovd(to->as_FloatRegister(), from->as_FloatRegister());
7241 } else {
7242 ShouldNotReachHere();
7243 }
7244 } else {
7245 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7246 Address to_addr = Address(sp, st_off);
7247 if (from->is_FloatRegister()) {
7248 if (bt == T_DOUBLE) {
7249 strd(from->as_FloatRegister(), to_addr);
7250 } else {
7251 assert(bt == T_FLOAT, "must be float");
7252 strs(from->as_FloatRegister(), to_addr);
7253 }
7254 } else {
7255 str(from->as_Register(), to_addr);
7256 }
7257 }
7258 } else {
7259 Address from_addr = Address(sp, from->reg2stack() * VMRegImpl::stack_slot_size);
7260 if (to->is_reg()) {
7261 if (to->is_FloatRegister()) {
7262 if (bt == T_DOUBLE) {
7263 ldrd(to->as_FloatRegister(), from_addr);
7264 } else {
7265 assert(bt == T_FLOAT, "must be float");
7266 ldrs(to->as_FloatRegister(), from_addr);
7267 }
7268 } else {
7269 ldr(to->as_Register(), from_addr);
7270 }
7271 } else {
7272 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7273 ldr(rscratch1, from_addr);
7274 str(rscratch1, Address(sp, st_off));
7275 }
7276 }
7277 }
7278
7279 // Update register states
7280 reg_state[from->value()] = reg_writable;
7281 reg_state[to->value()] = reg_written;
7282 return true;
7283 }
7284
7285 // Calculate the extra stack space required for packing or unpacking inline
7286 // args and adjust the stack pointer
7287 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
7288 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
7289 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
7290 assert(sp_inc > 0, "sanity");
7291
7292 // Save a copy of the FP and LR here for deoptimization patching and frame walking
7293 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
7294
7295 // Adjust the stack pointer. This will be repaired on return by MacroAssembler::remove_frame
7296 if (sp_inc < (1 << 9)) {
7297 sub(sp, sp, sp_inc); // Fits in an immediate
7298 } else {
7299 mov(rscratch1, sp_inc);
7300 sub(sp, sp, rscratch1);
7301 }
7302
7303 return sp_inc + 2 * wordSize; // Account for the FP/LR space
7304 }
7305
7306 // Read all fields from an inline type oop and store the values in registers/stack slots
7307 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
7308 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
7309 RegState reg_state[]) {
7310 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
7311 assert(from->is_valid(), "source must be valid");
7312 bool progress = false;
7313 #ifdef ASSERT
7314 const int start_offset = offset();
7315 #endif
7316
7317 Label L_null, L_notNull;
7318 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
7319 Register tmp1 = r10;
7320 Register tmp2 = r11;
7321
7322 #ifndef ASSERT
7323 RegSet clobbered_gp_regs = MacroAssembler::call_clobbered_gp_registers();
7324 assert(clobbered_gp_regs.contains(tmp1), "tmp1 must be saved explicitly if it's not a clobber");
7325 assert(clobbered_gp_regs.contains(tmp2), "tmp2 must be saved explicitly if it's not a clobber");
7326 assert(clobbered_gp_regs.contains(r14), "r14 must be saved explicitly if it's not a clobber");
7327 #endif
7328
7329 Register fromReg = noreg;
7330 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
7331 bool done = true;
7332 bool mark_done = true;
7333 VMReg toReg;
7334 BasicType bt;
7335 // Check if argument requires a null check
7336 bool null_check = false;
7337 VMReg nullCheckReg;
7338 while (stream.next(nullCheckReg, bt)) {
7339 if (sig->at(stream.sig_index())._offset == -1) {
7340 null_check = true;
7341 break;
7342 }
7343 }
7344 stream.reset(sig_index, to_index);
7345 while (stream.next(toReg, bt)) {
7346 assert(toReg->is_valid(), "destination must be valid");
7347 int idx = (int)toReg->value();
7348 if (reg_state[idx] == reg_readonly) {
7349 if (idx != from->value()) {
7350 mark_done = false;
7351 }
7352 done = false;
7353 continue;
7354 } else if (reg_state[idx] == reg_written) {
7355 continue;
7356 }
7357 assert(reg_state[idx] == reg_writable, "must be writable");
7358 reg_state[idx] = reg_written;
7359 progress = true;
7360
7361 if (fromReg == noreg) {
7362 if (from->is_reg()) {
7363 fromReg = from->as_Register();
7364 } else {
7365 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size;
7366 ldr(tmp1, Address(sp, st_off));
7367 fromReg = tmp1;
7368 }
7369 if (null_check) {
7370 // Nullable inline type argument, emit null check
7371 cbz(fromReg, L_null);
7372 }
7373 }
7374 int off = sig->at(stream.sig_index())._offset;
7375 if (off == -1) {
7376 assert(null_check, "Missing null check at");
7377 if (toReg->is_stack()) {
7378 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7379 mov(tmp2, 1);
7380 str(tmp2, Address(sp, st_off));
7381 } else {
7382 mov(toReg->as_Register(), 1);
7383 }
7384 continue;
7385 }
7386 if (sig->at(stream.sig_index())._vt_oop) {
7387 if (toReg->is_stack()) {
7388 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7389 str(fromReg, Address(sp, st_off));
7390 } else {
7391 mov(toReg->as_Register(), fromReg);
7392 }
7393 continue;
7394 }
7395 assert(off > 0, "offset in object should be positive");
7396 Address fromAddr = Address(fromReg, off);
7397 if (!toReg->is_FloatRegister()) {
7398 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
7399 if (is_reference_type(bt)) {
7400 load_heap_oop(dst, fromAddr, rscratch1, rscratch2);
7401 } else {
7402 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
7403 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
7404 }
7405 if (toReg->is_stack()) {
7406 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7407 str(dst, Address(sp, st_off));
7408 }
7409 } else if (bt == T_DOUBLE) {
7410 ldrd(toReg->as_FloatRegister(), fromAddr);
7411 } else {
7412 assert(bt == T_FLOAT, "must be float");
7413 ldrs(toReg->as_FloatRegister(), fromAddr);
7414 }
7415 }
7416 if (progress && null_check) {
7417 if (done) {
7418 b(L_notNull);
7419 bind(L_null);
7420 // Set null marker to zero to signal that the argument is null.
7421 // Also set all fields to zero since the runtime requires a canonical
7422 // representation of a flat null.
7423 stream.reset(sig_index, to_index);
7424 while (stream.next(toReg, bt)) {
7425 if (toReg->is_stack()) {
7426 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7427 str(zr, Address(sp, st_off));
7428 } else if (toReg->is_FloatRegister()) {
7429 mov(toReg->as_FloatRegister(), T2S, 0);
7430 } else {
7431 mov(toReg->as_Register(), zr);
7432 }
7433 }
7434 bind(L_notNull);
7435 } else {
7436 bind(L_null);
7437 }
7438 }
7439
7440 sig_index = stream.sig_index();
7441 to_index = stream.regs_index();
7442
7443 if (mark_done && reg_state[from->value()] != reg_written) {
7444 // This is okay because no one else will write to that slot
7445 reg_state[from->value()] = reg_writable;
7446 }
7447 from_index--;
7448 assert(progress || (start_offset == offset()), "should not emit code");
7449 return done;
7450 }
7451
7452 // Pack fields back into an inline type oop
7453 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
7454 VMRegPair* from, int from_count, int& from_index, VMReg to,
7455 RegState reg_state[], Register val_array) {
7456 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
7457 assert(to->is_valid(), "destination must be valid");
7458
7459 if (reg_state[to->value()] == reg_written) {
7460 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7461 return true; // Already written
7462 }
7463
7464 // The GC barrier expanded by store_heap_oop below may call into the
7465 // runtime so use callee-saved registers for any values that need to be
7466 // preserved. The GC barrier assembler should take care of saving the
7467 // Java argument registers.
7468 // TODO 8284443 Isn't it an issue if below code uses r14 as tmp when it contains a spilled value?
7469 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
7470 Register val_obj_tmp = r21;
7471 Register from_reg_tmp = r22;
7472 Register tmp1 = r14;
7473 Register tmp2 = r13;
7474 Register tmp3 = r12;
7475 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
7476
7477 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
7478
7479 if (reg_state[to->value()] == reg_readonly) {
7480 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
7481 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7482 return false; // Not yet writable
7483 }
7484 val_obj = val_obj_tmp;
7485 }
7486
7487 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
7488 VMReg fromReg;
7489 BasicType bt;
7490 Label L_null;
7491 while (stream.next(fromReg, bt)) {
7492 assert(fromReg->is_valid(), "source must be valid");
7493 reg_state[fromReg->value()] = reg_writable;
7494
7495 int off = sig->at(stream.sig_index())._offset;
7496 if (off == -1) {
7497 // Nullable inline type argument, emit null check
7498 Label L_notNull;
7499 if (fromReg->is_stack()) {
7500 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7501 ldrb(tmp2, Address(sp, ld_off));
7502 cbnz(tmp2, L_notNull);
7503 } else {
7504 cbnz(fromReg->as_Register(), L_notNull);
7505 }
7506 mov(val_obj, 0);
7507 b(L_null);
7508 bind(L_notNull);
7509 continue;
7510 }
7511 if (sig->at(stream.sig_index())._vt_oop) {
7512 if (fromReg->is_stack()) {
7513 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7514 ldr(val_obj, Address(sp, ld_off));
7515 } else {
7516 mov(val_obj, fromReg->as_Register());
7517 }
7518 cbnz(val_obj, L_null);
7519 // get the buffer from the just allocated pool of buffers
7520 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
7521 load_heap_oop(val_obj, Address(val_array, index), rscratch1, rscratch2);
7522 continue;
7523 }
7524
7525 assert(off > 0, "offset in object should be positive");
7526 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
7527
7528 // Pack the scalarized field into the value object.
7529 Address dst(val_obj, off);
7530 if (!fromReg->is_FloatRegister()) {
7531 Register src;
7532 if (fromReg->is_stack()) {
7533 src = from_reg_tmp;
7534 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7535 load_sized_value(src, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
7536 } else {
7537 src = fromReg->as_Register();
7538 }
7539 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
7540 if (is_reference_type(bt)) {
7541 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep val_obj valid.
7542 mov(tmp3, val_obj);
7543 Address dst_with_tmp3(tmp3, off);
7544 store_heap_oop(dst_with_tmp3, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
7545 } else {
7546 store_sized_value(dst, src, size_in_bytes);
7547 }
7548 } else if (bt == T_DOUBLE) {
7549 strd(fromReg->as_FloatRegister(), dst);
7550 } else {
7551 assert(bt == T_FLOAT, "must be float");
7552 strs(fromReg->as_FloatRegister(), dst);
7553 }
7554 }
7555 bind(L_null);
7556 sig_index = stream.sig_index();
7557 from_index = stream.regs_index();
7558
7559 assert(reg_state[to->value()] == reg_writable, "must have already been read");
7560 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
7561 assert(success, "to register must be writeable");
7562 return true;
7563 }
7564
7565 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
7566 return (reg->is_FloatRegister()) ? v8->as_VMReg() : r14->as_VMReg();
7567 }
7568
7569 void MacroAssembler::cache_wb(Address line) {
7570 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
7571 assert(line.index() == noreg, "index should be noreg");
7572 assert(line.offset() == 0, "offset should be 0");
7573 // would like to assert this
7574 // assert(line._ext.shift == 0, "shift should be zero");
7575 if (VM_Version::supports_dcpop()) {
7576 // writeback using clear virtual address to point of persistence
7577 dc(Assembler::CVAP, line.base());
7578 } else {
7579 // no need to generate anything as Unsafe.writebackMemory should
7580 // never invoke this stub
7581 }
7582 }
7583
7584 void MacroAssembler::cache_wbsync(bool is_pre) {
7585 // we only need a barrier post sync
7586 if (!is_pre) {
7587 membar(Assembler::AnyAny);
7588 }
7984 }
7985
7986 // Check if the lock-stack is full.
7987 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7988 cmpw(top, (unsigned)LockStack::end_offset());
7989 br(Assembler::GE, slow);
7990
7991 // Check for recursion.
7992 subw(t, top, oopSize);
7993 ldr(t, Address(rthread, t));
7994 cmp(obj, t);
7995 br(Assembler::EQ, push);
7996
7997 // Check header for monitor (0b10).
7998 tst(mark, markWord::monitor_value);
7999 br(Assembler::NE, slow);
8000
8001 // Try to lock. Transition lock bits 0b01 => 0b00
8002 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
8003 orr(mark, mark, markWord::unlocked_value);
8004 // Mask inline_type bit such that we go to the slow path if object is an inline type
8005 andr(mark, mark, ~((int) markWord::inline_type_bit_in_place));
8006
8007 eor(t, mark, markWord::unlocked_value);
8008 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
8009 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
8010 br(Assembler::NE, slow);
8011
8012 bind(push);
8013 // After successful lock, push object on lock-stack.
8014 str(obj, Address(rthread, top));
8015 addw(top, top, oopSize);
8016 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
8017 }
8018
8019 // Implements fast-unlocking.
8020 //
8021 // - obj: the object to be unlocked
8022 // - t1, t2, t3: temporary registers
8023 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
8024 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
8025 // cmpxchg clobbers rscratch1.
8026 assert_different_registers(obj, t1, t2, t3, rscratch1);
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