9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "code/compiledIC.hpp"
30 #include "compiler/compileTask.hpp"
31 #include "compiler/disassembler.hpp"
32 #include "compiler/oopMap.hpp"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/cardTable.hpp"
37 #include "gc/shared/collectedHeap.hpp"
38 #include "gc/shared/tlab_globals.hpp"
39 #include "interpreter/bytecodeHistogram.hpp"
40 #include "interpreter/interpreter.hpp"
41 #include "interpreter/interpreterRuntime.hpp"
42 #include "jvm.h"
43 #include "memory/resourceArea.hpp"
44 #include "memory/universe.hpp"
45 #include "nativeInst_aarch64.hpp"
46 #include "oops/accessDecorators.hpp"
47 #include "oops/compressedKlass.inline.hpp"
48 #include "oops/compressedOops.inline.hpp"
49 #include "oops/klass.inline.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/icache.hpp"
52 #include "runtime/interfaceSupport.inline.hpp"
53 #include "runtime/javaThread.hpp"
54 #include "runtime/jniHandles.inline.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/globalDefinitions.hpp"
58 #include "utilities/integerCast.hpp"
59 #include "utilities/powerOfTwo.hpp"
60 #ifdef COMPILER1
61 #include "c1/c1_LIRAssembler.hpp"
62 #endif
63 #ifdef COMPILER2
64 #include "oops/oop.hpp"
65 #include "opto/compile.hpp"
66 #include "opto/node.hpp"
67 #include "opto/output.hpp"
68 #endif
69
70 #include <sys/types.h>
71
72 #ifdef PRODUCT
73 #define BLOCK_COMMENT(str) /* nothing */
74 #else
75 #define BLOCK_COMMENT(str) block_comment(str)
76 #endif
77 #define STOP(str) stop(str);
78 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
79
1991 ldarb(scratch, scratch);
1992 cmp(scratch, InstanceKlass::fully_initialized);
1993 br(Assembler::EQ, *L_fast_path);
1994
1995 // Fast path check: current thread is initializer thread
1996 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
1997 cmp(rthread, scratch);
1998
1999 if (L_slow_path == &L_fallthrough) {
2000 br(Assembler::EQ, *L_fast_path);
2001 bind(*L_slow_path);
2002 } else if (L_fast_path == &L_fallthrough) {
2003 br(Assembler::NE, *L_slow_path);
2004 bind(*L_fast_path);
2005 } else {
2006 Unimplemented();
2007 }
2008 }
2009
2010 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2011 if (!VerifyOops) return;
2012
2013 // Pass register number to verify_oop_subroutine
2014 const char* b = nullptr;
2015 {
2016 ResourceMark rm;
2017 stringStream ss;
2018 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2019 b = code_string(ss.as_string());
2020 }
2021 BLOCK_COMMENT("verify_oop {");
2022
2023 strip_return_address(); // This might happen within a stack frame.
2024 protect_return_address();
2025 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2026 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2027
2028 mov(r0, reg);
2029 movptr(rscratch1, (uintptr_t)(address)b);
2030
2031 // call indirectly to solve generation ordering problem
2032 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2033 ldr(rscratch2, Address(rscratch2));
2034 blr(rscratch2);
2035
2036 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2037 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2038 authenticate_return_address();
2039
2040 BLOCK_COMMENT("} verify_oop");
2041 }
2042
2043 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2044 if (!VerifyOops) return;
2045
2046 const char* b = nullptr;
2047 {
2048 ResourceMark rm;
2049 stringStream ss;
2050 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2051 b = code_string(ss.as_string());
2052 }
2053 BLOCK_COMMENT("verify_oop_addr {");
2054
2055 strip_return_address(); // This might happen within a stack frame.
2056 protect_return_address();
2057 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2058 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2059
2060 // addr may contain sp so we will have to adjust it based on the
2061 // pushes that we just did.
2062 if (addr.uses(sp)) {
2063 lea(r0, addr);
2064 ldr(r0, Address(r0, 4 * wordSize));
2274 call_VM_leaf_base(entry_point, 1);
2275 }
2276
2277 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2278 assert_different_registers(arg_1, c_rarg0);
2279 pass_arg0(this, arg_0);
2280 pass_arg1(this, arg_1);
2281 call_VM_leaf_base(entry_point, 2);
2282 }
2283
2284 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2285 Register arg_1, Register arg_2) {
2286 assert_different_registers(arg_1, c_rarg0);
2287 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2288 pass_arg0(this, arg_0);
2289 pass_arg1(this, arg_1);
2290 pass_arg2(this, arg_2);
2291 call_VM_leaf_base(entry_point, 3);
2292 }
2293
2294 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2295 pass_arg0(this, arg_0);
2296 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2297 }
2298
2299 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2300
2301 assert_different_registers(arg_0, c_rarg1);
2302 pass_arg1(this, arg_1);
2303 pass_arg0(this, arg_0);
2304 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2305 }
2306
2307 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2308 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2309 assert_different_registers(arg_1, c_rarg2);
2310 pass_arg2(this, arg_2);
2311 pass_arg1(this, arg_1);
2312 pass_arg0(this, arg_0);
2313 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2319 assert_different_registers(arg_2, c_rarg3);
2320 pass_arg3(this, arg_3);
2321 pass_arg2(this, arg_2);
2322 pass_arg1(this, arg_1);
2323 pass_arg0(this, arg_0);
2324 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2325 }
2326
2327 void MacroAssembler::null_check(Register reg, int offset) {
2328 if (needs_explicit_null_check(offset)) {
2329 // provoke OS null exception if reg is null by
2330 // accessing M[reg] w/o changing any registers
2331 // NOTE: this is plenty to provoke a segv
2332 ldr(zr, Address(reg));
2333 } else {
2334 // nothing to do, (later) access of M[reg + offset]
2335 // will provoke OS null exception if reg is null
2336 }
2337 }
2338
2339 // MacroAssembler protected routines needed to implement
2340 // public methods
2341
2342 void MacroAssembler::mov(Register r, Address dest) {
2343 code_section()->relocate(pc(), dest.rspec());
2344 uint64_t imm64 = (uint64_t)dest.target();
2345 movptr(r, imm64);
2346 }
2347
2348 // Move a constant pointer into r. In AArch64 mode the virtual
2349 // address space is 48 bits in size, so we only need three
2350 // instructions to create a patchable instruction sequence that can
2351 // reach anywhere.
2352 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2353 #ifndef PRODUCT
2354 {
2355 char buffer[64];
2356 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2357 block_comment(buffer);
2358 }
5053 adrp(rscratch1, src2, offset);
5054 ldr(rscratch1, Address(rscratch1, offset));
5055 cmp(src1, rscratch1);
5056 }
5057
5058 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5059 cmp(obj1, obj2);
5060 }
5061
5062 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5063 load_method_holder(rresult, rmethod);
5064 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5065 }
5066
5067 void MacroAssembler::load_method_holder(Register holder, Register method) {
5068 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5069 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5070 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5071 }
5072
5073 // Loads the obj's Klass* into dst.
5074 // Preserves all registers (incl src, rscratch1 and rscratch2).
5075 // Input:
5076 // src - the oop we want to load the klass from.
5077 // dst - output narrow klass.
5078 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5079 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5080 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5081 lsr(dst, dst, markWord::klass_shift);
5082 }
5083
5084 void MacroAssembler::load_klass(Register dst, Register src) {
5085 if (UseCompactObjectHeaders) {
5086 load_narrow_klass_compact(dst, src);
5087 } else {
5088 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5089 }
5090 decode_klass_not_null(dst);
5091 }
5092
5144 } else {
5145 ldrw(tmp, Address(obj, oopDesc::klass_offset_in_bytes()));
5146 }
5147 if (CompressedKlassPointers::base() == nullptr) {
5148 cmp(klass, tmp, LSL, CompressedKlassPointers::shift());
5149 return;
5150 } else if (!AOTCodeCache::is_on_for_dump() &&
5151 ((uint64_t)CompressedKlassPointers::base() & 0xffffffff) == 0
5152 && CompressedKlassPointers::shift() == 0) {
5153 // Only the bottom 32 bits matter
5154 cmpw(klass, tmp);
5155 return;
5156 }
5157 decode_klass_not_null(tmp);
5158 cmp(klass, tmp);
5159 }
5160
5161 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5162 if (UseCompactObjectHeaders) {
5163 load_narrow_klass_compact(tmp1, obj1);
5164 load_narrow_klass_compact(tmp2, obj2);
5165 } else {
5166 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5167 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5168 }
5169 cmpw(tmp1, tmp2);
5170 }
5171
5172 void MacroAssembler::store_klass(Register dst, Register src) {
5173 // FIXME: Should this be a store release? concurrent gcs assumes
5174 // klass length is valid if klass field is not null.
5175 assert(!UseCompactObjectHeaders, "not with compact headers");
5176 encode_klass_not_null(src);
5177 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5178 }
5179
5180 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5181 assert(!UseCompactObjectHeaders, "not with compact headers");
5182 // Store to klass gap in destination
5183 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5184 }
5185
5186 // Algorithm must match CompressedOops::encode.
5187 void MacroAssembler::encode_heap_oop(Register d, Register s) {
5188 #ifdef ASSERT
5189 verify_heapbase("MacroAssembler::encode_heap_oop: heap base corrupted?");
5190 #endif
5191 verify_oop_msg(s, "broken oop in encode_heap_oop");
5541 if (as_raw) {
5542 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5543 } else {
5544 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5545 }
5546 }
5547
5548 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5549 Address dst, Register val,
5550 Register tmp1, Register tmp2, Register tmp3) {
5551 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5552 decorators = AccessInternal::decorator_fixup(decorators, type);
5553 bool as_raw = (decorators & AS_RAW) != 0;
5554 if (as_raw) {
5555 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5556 } else {
5557 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5558 }
5559 }
5560
5561 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5562 Register tmp2, DecoratorSet decorators) {
5563 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5564 }
5565
5566 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5567 Register tmp2, DecoratorSet decorators) {
5568 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5569 }
5570
5571 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5572 Register tmp2, Register tmp3, DecoratorSet decorators) {
5573 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5574 }
5575
5576 // Used for storing nulls.
5577 void MacroAssembler::store_heap_oop_null(Address dst) {
5578 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5579 }
5580
5655 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5656 cmp(rscratch2, rscratch1);
5657 br(Assembler::HS, next);
5658 STOP("assert(top >= start)");
5659 should_not_reach_here();
5660
5661 bind(next);
5662 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5663 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5664 cmp(rscratch2, rscratch1);
5665 br(Assembler::HS, ok);
5666 STOP("assert(top <= end)");
5667 should_not_reach_here();
5668
5669 bind(ok);
5670 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5671 }
5672 #endif
5673 }
5674
5675 // Writes to stack successive pages until offset reached to check for
5676 // stack overflow + shadow pages. This clobbers tmp.
5677 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5678 assert_different_registers(tmp, size, rscratch1);
5679 mov(tmp, sp);
5680 // Bang stack for total size given plus shadow page size.
5681 // Bang one page at a time because large size can bang beyond yellow and
5682 // red zones.
5683 Label loop;
5684 mov(rscratch1, (int)os::vm_page_size());
5685 bind(loop);
5686 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5687 subsw(size, size, rscratch1);
5688 str(size, Address(tmp));
5689 br(Assembler::GT, loop);
5690
5691 // Bang down shadow pages too.
5692 // At this point, (tmp-0) is the last address touched, so don't
5693 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5694 // was post-decremented.) Skip this address by starting at i=1, and
5761
5762 // Strictly speaking the card table base isn't an address at all, and it might
5763 // even be negative. It is thus materialised as a constant.
5764 mov(reg, (uint64_t)ctbs->card_table_base_const());
5765 }
5766
5767 void MacroAssembler::load_aotrc_address(Register reg, address a) {
5768 #if INCLUDE_CDS
5769 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
5770 if (AOTCodeCache::is_on_for_dump()) {
5771 // all aotrc field addresses should be registered in the AOTCodeCache address table
5772 lea(reg, ExternalAddress(a));
5773 } else {
5774 mov(reg, (uint64_t)a);
5775 }
5776 #else
5777 ShouldNotReachHere();
5778 #endif
5779 }
5780
5781 void MacroAssembler::build_frame(int framesize) {
5782 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5783 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5784 protect_return_address();
5785 if (framesize < ((1 << 9) + 2 * wordSize)) {
5786 sub(sp, sp, framesize);
5787 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5788 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5789 } else {
5790 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5791 if (PreserveFramePointer) mov(rfp, sp);
5792 if (framesize < ((1 << 12) + 2 * wordSize))
5793 sub(sp, sp, framesize - 2 * wordSize);
5794 else {
5795 mov(rscratch1, framesize - 2 * wordSize);
5796 sub(sp, sp, rscratch1);
5797 }
5798 }
5799 verify_cross_modify_fence_not_required();
5800 }
5801
5802 void MacroAssembler::remove_frame(int framesize) {
5803 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5804 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5805 if (framesize < ((1 << 9) + 2 * wordSize)) {
5806 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5807 add(sp, sp, framesize);
5808 } else {
5809 if (framesize < ((1 << 12) + 2 * wordSize))
5810 add(sp, sp, framesize - 2 * wordSize);
5811 else {
5812 mov(rscratch1, framesize - 2 * wordSize);
5813 add(sp, sp, rscratch1);
5814 }
5815 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5816 }
5817 authenticate_return_address();
5818 }
5819
5820
5821 // This method counts leading positive bytes (highest bit not set) in provided byte array
5822 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
5823 // Simple and most common case of aligned small array which is not at the
5824 // end of memory page is placed here. All other cases are in stub.
5825 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
5826 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
5827 assert_different_registers(ary1, len, result);
5828
5829 mov(result, len);
5830 cmpw(len, 0);
5831 br(LE, DONE);
5832 cmpw(len, 4 * wordSize);
5833 br(GE, STUB_LONG); // size > 32 then go to stub
5834
5835 int shift = 64 - exact_log2(os::vm_page_size());
5836 lsl(rscratch1, ary1, shift);
5837 mov(rscratch2, (size_t)(4 * wordSize) << shift);
5838 adds(rscratch2, rscratch1, rscratch2); // At end of page?
5839 br(CS, STUB); // at the end of page then go to stub
6723 // On other systems, the helper is a usual C function.
6724 //
6725 void MacroAssembler::get_thread(Register dst) {
6726 RegSet saved_regs =
6727 BSD_ONLY(RegSet::range(r0, r17) + lr - dst)
6728 NOT_BSD (RegSet::range(r0, r1) + lr - dst);
6729
6730 protect_return_address();
6731 push(saved_regs, sp);
6732
6733 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6734 blr(lr);
6735 if (dst != c_rarg0) {
6736 mov(dst, c_rarg0);
6737 }
6738
6739 pop(saved_regs, sp);
6740 authenticate_return_address();
6741 }
6742
6743 void MacroAssembler::cache_wb(Address line) {
6744 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
6745 assert(line.index() == noreg, "index should be noreg");
6746 assert(line.offset() == 0, "offset should be 0");
6747 // would like to assert this
6748 // assert(line._ext.shift == 0, "shift should be zero");
6749 if (VM_Version::supports_dcpop()) {
6750 // writeback using clear virtual address to point of persistence
6751 dc(Assembler::CVAP, line.base());
6752 } else {
6753 // no need to generate anything as Unsafe.writebackMemory should
6754 // never invoke this stub
6755 }
6756 }
6757
6758 void MacroAssembler::cache_wbsync(bool is_pre) {
6759 // we only need a barrier post sync
6760 if (!is_pre) {
6761 membar(Assembler::AnyAny);
6762 }
7158 }
7159
7160 // Check if the lock-stack is full.
7161 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7162 cmpw(top, (unsigned)LockStack::end_offset());
7163 br(Assembler::GE, slow);
7164
7165 // Check for recursion.
7166 subw(t, top, oopSize);
7167 ldr(t, Address(rthread, t));
7168 cmp(obj, t);
7169 br(Assembler::EQ, push);
7170
7171 // Check header for monitor (0b10).
7172 tst(mark, markWord::monitor_value);
7173 br(Assembler::NE, slow);
7174
7175 // Try to lock. Transition lock bits 0b01 => 0b00
7176 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7177 orr(mark, mark, markWord::unlocked_value);
7178 eor(t, mark, markWord::unlocked_value);
7179 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7180 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7181 br(Assembler::NE, slow);
7182
7183 bind(push);
7184 // After successful lock, push object on lock-stack.
7185 str(obj, Address(rthread, top));
7186 addw(top, top, oopSize);
7187 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7188 }
7189
7190 // Implements fast-unlocking.
7191 //
7192 // - obj: the object to be unlocked
7193 // - t1, t2, t3: temporary registers
7194 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7195 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7196 // cmpxchg clobbers rscratch1.
7197 assert_different_registers(obj, t1, t2, t3, rscratch1);
|
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "ci/ciInlineKlass.hpp"
30 #include "code/compiledIC.hpp"
31 #include "compiler/compileTask.hpp"
32 #include "compiler/disassembler.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "gc/shared/cardTableBarrierSet.hpp"
37 #include "gc/shared/cardTable.hpp"
38 #include "gc/shared/collectedHeap.hpp"
39 #include "gc/shared/tlab_globals.hpp"
40 #include "interpreter/bytecodeHistogram.hpp"
41 #include "interpreter/interpreter.hpp"
42 #include "interpreter/interpreterRuntime.hpp"
43 #include "jvm.h"
44 #include "memory/resourceArea.hpp"
45 #include "memory/universe.hpp"
46 #include "nativeInst_aarch64.hpp"
47 #include "oops/accessDecorators.hpp"
48 #include "oops/compressedKlass.inline.hpp"
49 #include "oops/compressedOops.inline.hpp"
50 #include "oops/klass.inline.hpp"
51 #include "oops/resolvedFieldEntry.hpp"
52 #include "runtime/arguments.hpp"
53 #include "runtime/continuation.hpp"
54 #include "runtime/globals.hpp"
55 #include "runtime/icache.hpp"
56 #include "runtime/interfaceSupport.inline.hpp"
57 #include "runtime/javaThread.hpp"
58 #include "runtime/jniHandles.inline.hpp"
59 #include "runtime/sharedRuntime.hpp"
60 #include "runtime/signature_cc.hpp"
61 #include "runtime/stubRoutines.hpp"
62 #include "utilities/globalDefinitions.hpp"
63 #include "utilities/integerCast.hpp"
64 #include "utilities/powerOfTwo.hpp"
65 #include "vmreg_aarch64.inline.hpp"
66 #ifdef COMPILER1
67 #include "c1/c1_LIRAssembler.hpp"
68 #endif
69 #ifdef COMPILER2
70 #include "oops/oop.hpp"
71 #include "opto/compile.hpp"
72 #include "opto/node.hpp"
73 #include "opto/output.hpp"
74 #endif
75
76 #include <sys/types.h>
77
78 #ifdef PRODUCT
79 #define BLOCK_COMMENT(str) /* nothing */
80 #else
81 #define BLOCK_COMMENT(str) block_comment(str)
82 #endif
83 #define STOP(str) stop(str);
84 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
85
1997 ldarb(scratch, scratch);
1998 cmp(scratch, InstanceKlass::fully_initialized);
1999 br(Assembler::EQ, *L_fast_path);
2000
2001 // Fast path check: current thread is initializer thread
2002 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2003 cmp(rthread, scratch);
2004
2005 if (L_slow_path == &L_fallthrough) {
2006 br(Assembler::EQ, *L_fast_path);
2007 bind(*L_slow_path);
2008 } else if (L_fast_path == &L_fallthrough) {
2009 br(Assembler::NE, *L_slow_path);
2010 bind(*L_fast_path);
2011 } else {
2012 Unimplemented();
2013 }
2014 }
2015
2016 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2017 if (!VerifyOops || VerifyAdapterSharing) {
2018 // Below address of the code string confuses VerifyAdapterSharing
2019 // because it may differ between otherwise equivalent adapters.
2020 return;
2021 }
2022
2023 // Pass register number to verify_oop_subroutine
2024 const char* b = nullptr;
2025 {
2026 ResourceMark rm;
2027 stringStream ss;
2028 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2029 b = code_string(ss.as_string());
2030 }
2031 BLOCK_COMMENT("verify_oop {");
2032
2033 strip_return_address(); // This might happen within a stack frame.
2034 protect_return_address();
2035 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2036 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2037
2038 mov(r0, reg);
2039 movptr(rscratch1, (uintptr_t)(address)b);
2040
2041 // call indirectly to solve generation ordering problem
2042 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2043 ldr(rscratch2, Address(rscratch2));
2044 blr(rscratch2);
2045
2046 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2047 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2048 authenticate_return_address();
2049
2050 BLOCK_COMMENT("} verify_oop");
2051 }
2052
2053 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2054 if (!VerifyOops || VerifyAdapterSharing) {
2055 // Below address of the code string confuses VerifyAdapterSharing
2056 // because it may differ between otherwise equivalent adapters.
2057 return;
2058 }
2059
2060 const char* b = nullptr;
2061 {
2062 ResourceMark rm;
2063 stringStream ss;
2064 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2065 b = code_string(ss.as_string());
2066 }
2067 BLOCK_COMMENT("verify_oop_addr {");
2068
2069 strip_return_address(); // This might happen within a stack frame.
2070 protect_return_address();
2071 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2072 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2073
2074 // addr may contain sp so we will have to adjust it based on the
2075 // pushes that we just did.
2076 if (addr.uses(sp)) {
2077 lea(r0, addr);
2078 ldr(r0, Address(r0, 4 * wordSize));
2288 call_VM_leaf_base(entry_point, 1);
2289 }
2290
2291 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2292 assert_different_registers(arg_1, c_rarg0);
2293 pass_arg0(this, arg_0);
2294 pass_arg1(this, arg_1);
2295 call_VM_leaf_base(entry_point, 2);
2296 }
2297
2298 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2299 Register arg_1, Register arg_2) {
2300 assert_different_registers(arg_1, c_rarg0);
2301 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2302 pass_arg0(this, arg_0);
2303 pass_arg1(this, arg_1);
2304 pass_arg2(this, arg_2);
2305 call_VM_leaf_base(entry_point, 3);
2306 }
2307
2308 void MacroAssembler::super_call_VM_leaf(address entry_point) {
2309 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2310 }
2311
2312 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2313 pass_arg0(this, arg_0);
2314 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2315 }
2316
2317 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2318
2319 assert_different_registers(arg_0, c_rarg1);
2320 pass_arg1(this, arg_1);
2321 pass_arg0(this, arg_0);
2322 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2323 }
2324
2325 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2326 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2327 assert_different_registers(arg_1, c_rarg2);
2328 pass_arg2(this, arg_2);
2329 pass_arg1(this, arg_1);
2330 pass_arg0(this, arg_0);
2331 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2337 assert_different_registers(arg_2, c_rarg3);
2338 pass_arg3(this, arg_3);
2339 pass_arg2(this, arg_2);
2340 pass_arg1(this, arg_1);
2341 pass_arg0(this, arg_0);
2342 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2343 }
2344
2345 void MacroAssembler::null_check(Register reg, int offset) {
2346 if (needs_explicit_null_check(offset)) {
2347 // provoke OS null exception if reg is null by
2348 // accessing M[reg] w/o changing any registers
2349 // NOTE: this is plenty to provoke a segv
2350 ldr(zr, Address(reg));
2351 } else {
2352 // nothing to do, (later) access of M[reg + offset]
2353 // will provoke OS null exception if reg is null
2354 }
2355 }
2356
2357 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2358 assert_different_registers(markword, rscratch2);
2359 mov(rscratch2, markWord::inline_type_pattern_mask);
2360 andr(markword, markword, rscratch2);
2361 mov(rscratch2, markWord::inline_type_pattern);
2362 cmp(markword, rscratch2);
2363 br(Assembler::EQ, is_inline_type);
2364 }
2365
2366 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2367 assert_different_registers(tmp, rscratch1);
2368 if (can_be_null) {
2369 cbz(object, not_inline_type);
2370 }
2371 const int is_inline_type_mask = markWord::inline_type_pattern;
2372 ldr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2373 mov(rscratch1, is_inline_type_mask);
2374 andr(tmp, tmp, rscratch1);
2375 cmp(tmp, rscratch1);
2376 br(Assembler::NE, not_inline_type);
2377 }
2378
2379 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2380 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2381 tbnz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, is_null_free_inline_type);
2382 }
2383
2384 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2385 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2386 tbz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, not_null_free_inline_type);
2387 }
2388
2389 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2390 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2391 tbnz(flags, ResolvedFieldEntry::is_flat_shift, is_flat);
2392 }
2393
2394 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2395 Label test_mark_word;
2396 // load mark word
2397 ldr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2398 // check displaced
2399 tst(temp_reg, markWord::unlocked_value);
2400 br(Assembler::NE, test_mark_word);
2401 // slow path use klass prototype
2402 load_prototype_header(temp_reg, oop);
2403
2404 bind(test_mark_word);
2405 andr(temp_reg, temp_reg, test_bit);
2406 if (jmp_set) {
2407 cbnz(temp_reg, jmp_label);
2408 } else {
2409 cbz(temp_reg, jmp_label);
2410 }
2411 }
2412
2413 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array) {
2414 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2415 }
2416
2417 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2418 Label&is_non_flat_array) {
2419 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2420 }
2421
2422 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array) {
2423 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2424 }
2425
2426 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2427 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2428 }
2429
2430 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2431 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2432 br(Assembler::NE, is_flat_array);
2433 }
2434
2435 // MacroAssembler protected routines needed to implement
2436 // public methods
2437
2438 void MacroAssembler::mov(Register r, Address dest) {
2439 code_section()->relocate(pc(), dest.rspec());
2440 uint64_t imm64 = (uint64_t)dest.target();
2441 movptr(r, imm64);
2442 }
2443
2444 // Move a constant pointer into r. In AArch64 mode the virtual
2445 // address space is 48 bits in size, so we only need three
2446 // instructions to create a patchable instruction sequence that can
2447 // reach anywhere.
2448 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2449 #ifndef PRODUCT
2450 {
2451 char buffer[64];
2452 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2453 block_comment(buffer);
2454 }
5149 adrp(rscratch1, src2, offset);
5150 ldr(rscratch1, Address(rscratch1, offset));
5151 cmp(src1, rscratch1);
5152 }
5153
5154 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5155 cmp(obj1, obj2);
5156 }
5157
5158 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5159 load_method_holder(rresult, rmethod);
5160 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5161 }
5162
5163 void MacroAssembler::load_method_holder(Register holder, Register method) {
5164 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5165 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5166 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5167 }
5168
5169 void MacroAssembler::load_metadata(Register dst, Register src) {
5170 if (UseCompactObjectHeaders) {
5171 load_narrow_klass_compact(dst, src);
5172 } else {
5173 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5174 }
5175 }
5176
5177 // Loads the obj's Klass* into dst.
5178 // Preserves all registers (incl src, rscratch1 and rscratch2).
5179 // Input:
5180 // src - the oop we want to load the klass from.
5181 // dst - output narrow klass.
5182 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5183 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5184 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5185 lsr(dst, dst, markWord::klass_shift);
5186 }
5187
5188 void MacroAssembler::load_klass(Register dst, Register src) {
5189 if (UseCompactObjectHeaders) {
5190 load_narrow_klass_compact(dst, src);
5191 } else {
5192 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5193 }
5194 decode_klass_not_null(dst);
5195 }
5196
5248 } else {
5249 ldrw(tmp, Address(obj, oopDesc::klass_offset_in_bytes()));
5250 }
5251 if (CompressedKlassPointers::base() == nullptr) {
5252 cmp(klass, tmp, LSL, CompressedKlassPointers::shift());
5253 return;
5254 } else if (!AOTCodeCache::is_on_for_dump() &&
5255 ((uint64_t)CompressedKlassPointers::base() & 0xffffffff) == 0
5256 && CompressedKlassPointers::shift() == 0) {
5257 // Only the bottom 32 bits matter
5258 cmpw(klass, tmp);
5259 return;
5260 }
5261 decode_klass_not_null(tmp);
5262 cmp(klass, tmp);
5263 }
5264
5265 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5266 if (UseCompactObjectHeaders) {
5267 load_narrow_klass_compact(tmp1, obj1);
5268 load_narrow_klass_compact(tmp2, obj2);
5269 } else {
5270 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5271 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5272 }
5273 cmpw(tmp1, tmp2);
5274 }
5275
5276 void MacroAssembler::load_prototype_header(Register dst, Register src) {
5277 load_klass(dst, src);
5278 ldr(dst, Address(dst, Klass::prototype_header_offset()));
5279 }
5280
5281 void MacroAssembler::store_klass(Register dst, Register src) {
5282 // FIXME: Should this be a store release? concurrent gcs assumes
5283 // klass length is valid if klass field is not null.
5284 assert(!UseCompactObjectHeaders, "not with compact headers");
5285 encode_klass_not_null(src);
5286 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5287 }
5288
5289 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5290 assert(!UseCompactObjectHeaders, "not with compact headers");
5291 // Store to klass gap in destination
5292 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5293 }
5294
5295 // Algorithm must match CompressedOops::encode.
5296 void MacroAssembler::encode_heap_oop(Register d, Register s) {
5297 #ifdef ASSERT
5298 verify_heapbase("MacroAssembler::encode_heap_oop: heap base corrupted?");
5299 #endif
5300 verify_oop_msg(s, "broken oop in encode_heap_oop");
5650 if (as_raw) {
5651 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5652 } else {
5653 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5654 }
5655 }
5656
5657 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5658 Address dst, Register val,
5659 Register tmp1, Register tmp2, Register tmp3) {
5660 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5661 decorators = AccessInternal::decorator_fixup(decorators, type);
5662 bool as_raw = (decorators & AS_RAW) != 0;
5663 if (as_raw) {
5664 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5665 } else {
5666 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5667 }
5668 }
5669
5670 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5671 Register inline_layout_info) {
5672 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5673 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5674 }
5675
5676 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5677 ldr(offset, Address(inline_klass, InlineKlass::adr_members_offset()));
5678 ldrw(offset, Address(offset, InlineKlass::payload_offset_offset()));
5679 }
5680
5681 void MacroAssembler::payload_address(Register oop, Register data, Register inline_klass) {
5682 // ((address) (void*) o) + vk->payload_offset();
5683 Register offset = (data == oop) ? rscratch1 : data;
5684 payload_offset(inline_klass, offset);
5685 if (data == oop) {
5686 add(data, data, offset);
5687 } else {
5688 lea(data, Address(oop, offset));
5689 }
5690 }
5691
5692 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5693 Register tmp2, DecoratorSet decorators) {
5694 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5695 }
5696
5697 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5698 Register tmp2, DecoratorSet decorators) {
5699 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5700 }
5701
5702 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5703 Register tmp2, Register tmp3, DecoratorSet decorators) {
5704 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5705 }
5706
5707 // Used for storing nulls.
5708 void MacroAssembler::store_heap_oop_null(Address dst) {
5709 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5710 }
5711
5786 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5787 cmp(rscratch2, rscratch1);
5788 br(Assembler::HS, next);
5789 STOP("assert(top >= start)");
5790 should_not_reach_here();
5791
5792 bind(next);
5793 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5794 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5795 cmp(rscratch2, rscratch1);
5796 br(Assembler::HS, ok);
5797 STOP("assert(top <= end)");
5798 should_not_reach_here();
5799
5800 bind(ok);
5801 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5802 }
5803 #endif
5804 }
5805
5806 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
5807 assert_different_registers(holder_klass, index, layout_info);
5808 InlineLayoutInfo array[2];
5809 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
5810 if (is_power_of_2(size)) {
5811 lsl(index, index, log2i_exact(size)); // Scale index by power of 2
5812 } else {
5813 mov(layout_info, size);
5814 mul(index, index, layout_info); // Scale the index to be the entry index * array_element_size
5815 }
5816 ldr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
5817 add(layout_info, layout_info, Array<InlineLayoutInfo>::base_offset_in_bytes());
5818 lea(layout_info, Address(layout_info, index));
5819 }
5820
5821 // Writes to stack successive pages until offset reached to check for
5822 // stack overflow + shadow pages. This clobbers tmp.
5823 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5824 assert_different_registers(tmp, size, rscratch1);
5825 mov(tmp, sp);
5826 // Bang stack for total size given plus shadow page size.
5827 // Bang one page at a time because large size can bang beyond yellow and
5828 // red zones.
5829 Label loop;
5830 mov(rscratch1, (int)os::vm_page_size());
5831 bind(loop);
5832 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5833 subsw(size, size, rscratch1);
5834 str(size, Address(tmp));
5835 br(Assembler::GT, loop);
5836
5837 // Bang down shadow pages too.
5838 // At this point, (tmp-0) is the last address touched, so don't
5839 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5840 // was post-decremented.) Skip this address by starting at i=1, and
5907
5908 // Strictly speaking the card table base isn't an address at all, and it might
5909 // even be negative. It is thus materialised as a constant.
5910 mov(reg, (uint64_t)ctbs->card_table_base_const());
5911 }
5912
5913 void MacroAssembler::load_aotrc_address(Register reg, address a) {
5914 #if INCLUDE_CDS
5915 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
5916 if (AOTCodeCache::is_on_for_dump()) {
5917 // all aotrc field addresses should be registered in the AOTCodeCache address table
5918 lea(reg, ExternalAddress(a));
5919 } else {
5920 mov(reg, (uint64_t)a);
5921 }
5922 #else
5923 ShouldNotReachHere();
5924 #endif
5925 }
5926
5927 #ifdef ASSERT
5928 void MacroAssembler::build_frame(int framesize) {
5929 build_frame(framesize, false);
5930 }
5931 #endif
5932
5933 void MacroAssembler::build_frame(int framesize DEBUG_ONLY(COMMA bool zap_rfp_lr_spills)) {
5934 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5935 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5936 protect_return_address();
5937 if (framesize < ((1 << 9) + 2 * wordSize)) {
5938 sub(sp, sp, framesize);
5939 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
5940 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
5941 stp(rscratch1, rscratch1, Address(sp, framesize - 2 * wordSize));
5942 } else {
5943 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5944 }
5945 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5946 } else {
5947 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
5948 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
5949 stp(rscratch1, rscratch1, Address(pre(sp, -2 * wordSize)));
5950 } else {
5951 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5952 }
5953 if (PreserveFramePointer) mov(rfp, sp);
5954 if (framesize < ((1 << 12) + 2 * wordSize))
5955 sub(sp, sp, framesize - 2 * wordSize);
5956 else {
5957 mov(rscratch1, framesize - 2 * wordSize);
5958 sub(sp, sp, rscratch1);
5959 }
5960 }
5961 verify_cross_modify_fence_not_required();
5962 }
5963
5964 void MacroAssembler::remove_frame(int framesize) {
5965 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5966 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5967 if (framesize < ((1 << 9) + 2 * wordSize)) {
5968 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5969 add(sp, sp, framesize);
5970 } else {
5971 if (framesize < ((1 << 12) + 2 * wordSize))
5972 add(sp, sp, framesize - 2 * wordSize);
5973 else {
5974 mov(rscratch1, framesize - 2 * wordSize);
5975 add(sp, sp, rscratch1);
5976 }
5977 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5978 }
5979 authenticate_return_address();
5980 }
5981
5982 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
5983 if (needs_stack_repair) {
5984 // The method has a scalarized entry point (where fields of value object arguments
5985 // are passed through registers and stack), and a non-scalarized entry point (where
5986 // value object arguments are given as oops). The non-scalarized entry point will
5987 // first load each field of value object arguments and store them in registers and on
5988 // the stack in a way compatible with the scalarized entry point. To do so, some extra
5989 // stack space might be reserved (if argument registers are not enough). On leaving the
5990 // method, this space must be freed.
5991 //
5992 // In case we used the non-scalarized entry point the stack looks like this:
5993 //
5994 // | Arguments from caller |
5995 // |---------------------------| <-- caller's SP
5996 // | Saved LR #1 |
5997 // | Saved FP #1 |
5998 // |---------------------------|
5999 // | Extension space for |
6000 // | inline arg (un)packing |
6001 // |---------------------------| <-- start of this method's frame
6002 // | Saved LR #2 |
6003 // | Saved FP #2 |
6004 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6005 // | sp_inc |
6006 // | method locals |
6007 // |---------------------------| <-- SP
6008 //
6009 // There are two copies of FP and LR on the stack. They will be identical at
6010 // first, but that can change.
6011 // If the caller has been deoptimized, LR #1 will be patched to point at the
6012 // deopt blob, and LR #2 will still point into the old method.
6013 // If the saved FP (x29) was not used as the frame pointer, but to store an
6014 // oop, the GC will be aware only of FP #1 as the spilled location of x29 and
6015 // will fix only this one. Overall, FP/LR #2 are not reliable and are simply
6016 // needed to add space between the extension space and the locals, as there
6017 // would be between the real arguments and the locals if we don't need to
6018 // do unpacking (from the scalarized entry point).
6019 //
6020 // When restoring, one must then load FP #1 into x29, and LR #1 into x30,
6021 // while keeping in mind that from the scalarized entry point, there will be
6022 // only one copy of each. Indeed, in the case we used the scalarized calling
6023 // convention, the stack looks like this:
6024 //
6025 // | Arguments from caller |
6026 // |---------------------------| <-- caller's SP / start of this method's frame
6027 // | Saved LR |
6028 // | Saved FP |
6029 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6030 // | sp_inc |
6031 // | method locals |
6032 // |---------------------------| <-- SP
6033 //
6034 // The sp_inc stack slot holds the total size of the frame including the
6035 // extension space minus two words for the saved FP and LR. That is how to
6036 // find FP/LR #1. This size is expressed in bytes. Be careful when using it
6037 // from C++ in pointer arithmetic; you might need to divide it by wordSize.
6038 //
6039 // One can find sp_inc since the start the method's frame is SP + initial_framesize.
6040
6041 int sp_inc_offset = initial_framesize - 3 * wordSize; // Immediately below saved LR and FP
6042
6043 ldr(rscratch1, Address(sp, sp_inc_offset));
6044 add(sp, sp, rscratch1);
6045 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6046 } else {
6047 remove_frame(initial_framesize);
6048 }
6049 }
6050
6051 void MacroAssembler::save_stack_increment(int sp_inc, int frame_size) {
6052 int real_frame_size = frame_size + sp_inc;
6053 assert(sp_inc == 0 || sp_inc > 2*wordSize, "invalid sp_inc value");
6054 assert(real_frame_size >= 2*wordSize, "frame size must include FP/LR space");
6055 assert((real_frame_size & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6056
6057 int sp_inc_offset = frame_size - 3 * wordSize; // Immediately below saved LR and FP
6058
6059 // Subtract two words for the saved FP and LR as these will be popped
6060 // separately. See remove_frame above.
6061 mov(rscratch1, real_frame_size - 2*wordSize);
6062 str(rscratch1, Address(sp, sp_inc_offset));
6063 }
6064
6065 // This method counts leading positive bytes (highest bit not set) in provided byte array
6066 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
6067 // Simple and most common case of aligned small array which is not at the
6068 // end of memory page is placed here. All other cases are in stub.
6069 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
6070 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
6071 assert_different_registers(ary1, len, result);
6072
6073 mov(result, len);
6074 cmpw(len, 0);
6075 br(LE, DONE);
6076 cmpw(len, 4 * wordSize);
6077 br(GE, STUB_LONG); // size > 32 then go to stub
6078
6079 int shift = 64 - exact_log2(os::vm_page_size());
6080 lsl(rscratch1, ary1, shift);
6081 mov(rscratch2, (size_t)(4 * wordSize) << shift);
6082 adds(rscratch2, rscratch1, rscratch2); // At end of page?
6083 br(CS, STUB); // at the end of page then go to stub
6967 // On other systems, the helper is a usual C function.
6968 //
6969 void MacroAssembler::get_thread(Register dst) {
6970 RegSet saved_regs =
6971 BSD_ONLY(RegSet::range(r0, r17) + lr - dst)
6972 NOT_BSD (RegSet::range(r0, r1) + lr - dst);
6973
6974 protect_return_address();
6975 push(saved_regs, sp);
6976
6977 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6978 blr(lr);
6979 if (dst != c_rarg0) {
6980 mov(dst, c_rarg0);
6981 }
6982
6983 pop(saved_regs, sp);
6984 authenticate_return_address();
6985 }
6986
6987 #ifdef COMPILER2
6988 // C2 compiled method's prolog code
6989 // Moved here from aarch64.ad to support Valhalla code below
6990 void MacroAssembler::verified_entry(Compile* C, int sp_inc) {
6991 if (C->clinit_barrier_on_entry()) {
6992 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
6993
6994 Label L_skip_barrier;
6995
6996 mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
6997 clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
6998 far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
6999 bind(L_skip_barrier);
7000 }
7001
7002 if (C->max_vector_size() > 0) {
7003 reinitialize_ptrue();
7004 }
7005
7006 int bangsize = C->output()->bang_size_in_bytes();
7007 if (C->output()->need_stack_bang(bangsize))
7008 generate_stack_overflow_check(bangsize);
7009
7010 // n.b. frame size includes space for return pc and rfp
7011 const long framesize = C->output()->frame_size_in_bytes();
7012 build_frame(framesize DEBUG_ONLY(COMMA sp_inc != 0));
7013
7014 if (C->needs_stack_repair()) {
7015 save_stack_increment(sp_inc, framesize);
7016 }
7017
7018 if (VerifyStackAtCalls) {
7019 Unimplemented();
7020 }
7021 }
7022 #endif // COMPILER2
7023
7024 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
7025 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
7026 // An inline type might be returned. If fields are in registers we
7027 // need to allocate an inline type instance and initialize it with
7028 // the value of the fields.
7029 Label skip;
7030 // We only need a new buffered inline type if a new one is not returned
7031 tbz(r0, 0, skip);
7032 int call_offset = -1;
7033
7034 // Be careful not to clobber r1-7 which hold returned fields
7035 // Also do not use callee-saved registers as these may be live in the interpreter
7036 Register tmp1 = r13, tmp2 = r14, klass = r15, r0_preserved = r12;
7037
7038 // The following code is similar to the instance allocation code in TemplateTable::_new
7039 // but has some slight differences,
7040 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
7041 // allocating is not necessary if vk != nullptr, etc.
7042 Label slow_case;
7043 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
7044 mov(r0_preserved, r0); // save r0 for slow_case since *_allocate may corrupt it when allocation failed
7045
7046 if (vk != nullptr) {
7047 // Called from C1, where the return type is statically known.
7048 movptr(klass, (intptr_t)vk->get_InlineKlass());
7049 jint lh = vk->layout_helper();
7050 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
7051 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
7052 tlab_allocate(r0, noreg, lh, tmp1, tmp2, slow_case);
7053 } else {
7054 b(slow_case);
7055 }
7056 } else {
7057 // Call from interpreter. R0 contains ((the InlineKlass* of the return type) | 0x01)
7058 andr(klass, r0, -2);
7059 if (UseTLAB) {
7060 ldrw(tmp2, Address(klass, Klass::layout_helper_offset()));
7061 tst(tmp2, Klass::_lh_instance_slow_path_bit);
7062 br(Assembler::NE, slow_case);
7063 tlab_allocate(r0, tmp2, 0, tmp1, tmp2, slow_case);
7064 } else {
7065 b(slow_case);
7066 }
7067 }
7068 if (UseTLAB) {
7069 // 2. Initialize buffered inline instance header
7070 Register buffer_obj = r0;
7071 if (UseCompactObjectHeaders) {
7072 ldr(rscratch1, Address(klass, Klass::prototype_header_offset()));
7073 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7074 } else {
7075 mov(rscratch1, (intptr_t)markWord::inline_type_prototype().value());
7076 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7077 store_klass_gap(buffer_obj, zr);
7078 if (vk == nullptr) {
7079 // store_klass corrupts klass, so save it for later use (interpreter case only).
7080 mov(tmp1, klass);
7081 }
7082 store_klass(buffer_obj, klass);
7083 klass = tmp1;
7084 }
7085 // 3. Initialize its fields with an inline class specific handler
7086 if (vk != nullptr) {
7087 far_call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
7088 } else {
7089 ldr(tmp1, Address(klass, InlineKlass::adr_members_offset()));
7090 ldr(tmp1, Address(tmp1, InlineKlass::pack_handler_offset()));
7091 blr(tmp1);
7092 }
7093
7094 membar(Assembler::StoreStore);
7095 b(skip);
7096 } else {
7097 // Must have already branched to slow_case above.
7098 DEBUG_ONLY(should_not_reach_here());
7099 }
7100 bind(slow_case);
7101 // We failed to allocate a new inline type, fall back to a runtime
7102 // call. Some oop field may be live in some registers but we can't
7103 // tell. That runtime call will take care of preserving them
7104 // across a GC if there's one.
7105 mov(r0, r0_preserved);
7106
7107 if (from_interpreter) {
7108 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
7109 } else {
7110 far_call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
7111 call_offset = offset();
7112 }
7113 membar(Assembler::StoreStore);
7114
7115 bind(skip);
7116 return call_offset;
7117 }
7118
7119 // Move a value between registers/stack slots and update the reg_state
7120 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
7121 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
7122 if (reg_state[to->value()] == reg_written) {
7123 return true; // Already written
7124 }
7125
7126 if (from != to && bt != T_VOID) {
7127 if (reg_state[to->value()] == reg_readonly) {
7128 return false; // Not yet writable
7129 }
7130 if (from->is_reg()) {
7131 if (to->is_reg()) {
7132 if (from->is_Register() && to->is_Register()) {
7133 mov(to->as_Register(), from->as_Register());
7134 } else if (from->is_FloatRegister() && to->is_FloatRegister()) {
7135 fmovd(to->as_FloatRegister(), from->as_FloatRegister());
7136 } else {
7137 ShouldNotReachHere();
7138 }
7139 } else {
7140 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7141 Address to_addr = Address(sp, st_off);
7142 if (from->is_FloatRegister()) {
7143 if (bt == T_DOUBLE) {
7144 strd(from->as_FloatRegister(), to_addr);
7145 } else {
7146 assert(bt == T_FLOAT, "must be float");
7147 strs(from->as_FloatRegister(), to_addr);
7148 }
7149 } else {
7150 str(from->as_Register(), to_addr);
7151 }
7152 }
7153 } else {
7154 Address from_addr = Address(sp, from->reg2stack() * VMRegImpl::stack_slot_size);
7155 if (to->is_reg()) {
7156 if (to->is_FloatRegister()) {
7157 if (bt == T_DOUBLE) {
7158 ldrd(to->as_FloatRegister(), from_addr);
7159 } else {
7160 assert(bt == T_FLOAT, "must be float");
7161 ldrs(to->as_FloatRegister(), from_addr);
7162 }
7163 } else {
7164 ldr(to->as_Register(), from_addr);
7165 }
7166 } else {
7167 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7168 ldr(rscratch1, from_addr);
7169 str(rscratch1, Address(sp, st_off));
7170 }
7171 }
7172 }
7173
7174 // Update register states
7175 reg_state[from->value()] = reg_writable;
7176 reg_state[to->value()] = reg_written;
7177 return true;
7178 }
7179
7180 // Calculate the extra stack space required for packing or unpacking inline
7181 // args and adjust the stack pointer
7182 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
7183 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
7184 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
7185 assert(sp_inc > 0, "sanity");
7186
7187 // Save a copy of the FP and LR here for deoptimization patching and frame walking
7188 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
7189
7190 // Adjust the stack pointer. This will be repaired on return by MacroAssembler::remove_frame
7191 if (sp_inc < (1 << 9)) {
7192 sub(sp, sp, sp_inc); // Fits in an immediate
7193 } else {
7194 mov(rscratch1, sp_inc);
7195 sub(sp, sp, rscratch1);
7196 }
7197
7198 return sp_inc + 2 * wordSize; // Account for the FP/LR space
7199 }
7200
7201 // Read all fields from an inline type oop and store the values in registers/stack slots
7202 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
7203 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
7204 RegState reg_state[]) {
7205 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
7206 assert(from->is_valid(), "source must be valid");
7207 bool progress = false;
7208 #ifdef ASSERT
7209 const int start_offset = offset();
7210 #endif
7211
7212 Label L_null, L_notNull;
7213 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
7214 Register tmp1 = r10;
7215 Register tmp2 = r11;
7216
7217 #ifdef ASSERT
7218 RegSet clobbered_gp_regs = MacroAssembler::call_clobbered_gp_registers();
7219 assert(clobbered_gp_regs.contains(tmp1), "tmp1 must be saved explicitly if it's not a clobber");
7220 assert(clobbered_gp_regs.contains(tmp2), "tmp2 must be saved explicitly if it's not a clobber");
7221 assert(clobbered_gp_regs.contains(r14), "r14 must be saved explicitly if it's not a clobber");
7222 #endif
7223
7224 Register fromReg = noreg;
7225 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
7226 bool done = true;
7227 bool mark_done = true;
7228 VMReg toReg;
7229 BasicType bt;
7230 // Check if argument requires a null check
7231 bool null_check = false;
7232 VMReg nullCheckReg;
7233 while (stream.next(nullCheckReg, bt)) {
7234 if (sig->at(stream.sig_index())._offset == -1) {
7235 null_check = true;
7236 break;
7237 }
7238 }
7239 stream.reset(sig_index, to_index);
7240 while (stream.next(toReg, bt)) {
7241 assert(toReg->is_valid(), "destination must be valid");
7242 int idx = (int)toReg->value();
7243 if (reg_state[idx] == reg_readonly) {
7244 if (idx != from->value()) {
7245 mark_done = false;
7246 }
7247 done = false;
7248 continue;
7249 } else if (reg_state[idx] == reg_written) {
7250 continue;
7251 }
7252 assert(reg_state[idx] == reg_writable, "must be writable");
7253 reg_state[idx] = reg_written;
7254 progress = true;
7255
7256 if (fromReg == noreg) {
7257 if (from->is_reg()) {
7258 fromReg = from->as_Register();
7259 } else {
7260 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size;
7261 ldr(tmp1, Address(sp, st_off));
7262 fromReg = tmp1;
7263 }
7264 if (null_check) {
7265 // Nullable inline type argument, emit null check
7266 cbz(fromReg, L_null);
7267 }
7268 }
7269 int off = sig->at(stream.sig_index())._offset;
7270 if (off == -1) {
7271 assert(null_check, "Missing null check at");
7272 if (toReg->is_stack()) {
7273 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7274 mov(tmp2, 1);
7275 str(tmp2, Address(sp, st_off));
7276 } else {
7277 mov(toReg->as_Register(), 1);
7278 }
7279 continue;
7280 }
7281 if (sig->at(stream.sig_index())._vt_oop) {
7282 if (toReg->is_stack()) {
7283 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7284 str(fromReg, Address(sp, st_off));
7285 } else {
7286 mov(toReg->as_Register(), fromReg);
7287 }
7288 continue;
7289 }
7290 assert(off > 0, "offset in object should be positive");
7291 Address fromAddr = Address(fromReg, off);
7292 if (!toReg->is_FloatRegister()) {
7293 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
7294 if (is_reference_type(bt)) {
7295 load_heap_oop(dst, fromAddr, rscratch1, rscratch2);
7296 } else {
7297 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
7298 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
7299 }
7300 if (toReg->is_stack()) {
7301 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7302 str(dst, Address(sp, st_off));
7303 }
7304 } else if (bt == T_DOUBLE) {
7305 ldrd(toReg->as_FloatRegister(), fromAddr);
7306 } else {
7307 assert(bt == T_FLOAT, "must be float");
7308 ldrs(toReg->as_FloatRegister(), fromAddr);
7309 }
7310 }
7311 if (progress && null_check) {
7312 if (done) {
7313 b(L_notNull);
7314 bind(L_null);
7315 // Set null marker to zero to signal that the argument is null.
7316 // Also set all fields to zero since the runtime requires a canonical
7317 // representation of a flat null.
7318 stream.reset(sig_index, to_index);
7319 while (stream.next(toReg, bt)) {
7320 if (toReg->is_stack()) {
7321 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7322 str(zr, Address(sp, st_off));
7323 } else if (toReg->is_FloatRegister()) {
7324 mov(toReg->as_FloatRegister(), T2S, 0);
7325 } else {
7326 mov(toReg->as_Register(), zr);
7327 }
7328 }
7329 bind(L_notNull);
7330 } else {
7331 bind(L_null);
7332 }
7333 }
7334
7335 sig_index = stream.sig_index();
7336 to_index = stream.regs_index();
7337
7338 if (mark_done && reg_state[from->value()] != reg_written) {
7339 // This is okay because no one else will write to that slot
7340 reg_state[from->value()] = reg_writable;
7341 }
7342 from_index--;
7343 assert(progress || (start_offset == offset()), "should not emit code");
7344 return done;
7345 }
7346
7347 // Pack fields back into an inline type oop
7348 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
7349 VMRegPair* from, int from_count, int& from_index, VMReg to,
7350 RegState reg_state[], Register val_array) {
7351 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
7352 assert(to->is_valid(), "destination must be valid");
7353
7354 if (reg_state[to->value()] == reg_written) {
7355 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7356 return true; // Already written
7357 }
7358
7359 // The GC barrier expanded by store_heap_oop below may call into the
7360 // runtime so use callee-saved registers for any values that need to be
7361 // preserved. The GC barrier assembler should take care of saving the
7362 // Java argument registers.
7363 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
7364 Register val_obj_tmp = r21;
7365 Register from_reg_tmp = r22;
7366 Register tmp1 = r14;
7367 Register tmp2 = r13;
7368 Register tmp3 = r12;
7369 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
7370
7371 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
7372
7373 if (reg_state[to->value()] == reg_readonly) {
7374 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
7375 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7376 return false; // Not yet writable
7377 }
7378 val_obj = val_obj_tmp;
7379 }
7380
7381 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
7382 VMReg fromReg;
7383 BasicType bt;
7384 Label L_null;
7385 while (stream.next(fromReg, bt)) {
7386 assert(fromReg->is_valid(), "source must be valid");
7387 reg_state[fromReg->value()] = reg_writable;
7388
7389 int off = sig->at(stream.sig_index())._offset;
7390 if (off == -1) {
7391 // Nullable inline type argument, emit null check
7392 Label L_notNull;
7393 if (fromReg->is_stack()) {
7394 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7395 ldrb(tmp2, Address(sp, ld_off));
7396 cbnz(tmp2, L_notNull);
7397 } else {
7398 cbnz(fromReg->as_Register(), L_notNull);
7399 }
7400 mov(val_obj, 0);
7401 b(L_null);
7402 bind(L_notNull);
7403 continue;
7404 }
7405 if (sig->at(stream.sig_index())._vt_oop) {
7406 if (fromReg->is_stack()) {
7407 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7408 ldr(val_obj, Address(sp, ld_off));
7409 } else {
7410 mov(val_obj, fromReg->as_Register());
7411 }
7412 cbnz(val_obj, L_null);
7413 // get the buffer from the just allocated pool of buffers
7414 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
7415 load_heap_oop(val_obj, Address(val_array, index), rscratch1, rscratch2);
7416 continue;
7417 }
7418
7419 assert(off > 0, "offset in object should be positive");
7420 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
7421
7422 // Pack the scalarized field into the value object.
7423 Address dst(val_obj, off);
7424 if (!fromReg->is_FloatRegister()) {
7425 Register src;
7426 if (fromReg->is_stack()) {
7427 src = from_reg_tmp;
7428 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7429 load_sized_value(src, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
7430 } else {
7431 src = fromReg->as_Register();
7432 }
7433 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
7434 if (is_reference_type(bt)) {
7435 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep val_obj valid.
7436 mov(tmp3, val_obj);
7437 Address dst_with_tmp3(tmp3, off);
7438 store_heap_oop(dst_with_tmp3, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
7439 } else {
7440 store_sized_value(dst, src, size_in_bytes);
7441 }
7442 } else if (bt == T_DOUBLE) {
7443 strd(fromReg->as_FloatRegister(), dst);
7444 } else {
7445 assert(bt == T_FLOAT, "must be float");
7446 strs(fromReg->as_FloatRegister(), dst);
7447 }
7448 }
7449 bind(L_null);
7450 sig_index = stream.sig_index();
7451 from_index = stream.regs_index();
7452
7453 assert(reg_state[to->value()] == reg_writable, "must have already been read");
7454 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
7455 assert(success, "to register must be writable");
7456 return true;
7457 }
7458
7459 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
7460 return (reg->is_FloatRegister()) ? v8->as_VMReg() : r14->as_VMReg();
7461 }
7462
7463 void MacroAssembler::cache_wb(Address line) {
7464 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
7465 assert(line.index() == noreg, "index should be noreg");
7466 assert(line.offset() == 0, "offset should be 0");
7467 // would like to assert this
7468 // assert(line._ext.shift == 0, "shift should be zero");
7469 if (VM_Version::supports_dcpop()) {
7470 // writeback using clear virtual address to point of persistence
7471 dc(Assembler::CVAP, line.base());
7472 } else {
7473 // no need to generate anything as Unsafe.writebackMemory should
7474 // never invoke this stub
7475 }
7476 }
7477
7478 void MacroAssembler::cache_wbsync(bool is_pre) {
7479 // we only need a barrier post sync
7480 if (!is_pre) {
7481 membar(Assembler::AnyAny);
7482 }
7878 }
7879
7880 // Check if the lock-stack is full.
7881 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7882 cmpw(top, (unsigned)LockStack::end_offset());
7883 br(Assembler::GE, slow);
7884
7885 // Check for recursion.
7886 subw(t, top, oopSize);
7887 ldr(t, Address(rthread, t));
7888 cmp(obj, t);
7889 br(Assembler::EQ, push);
7890
7891 // Check header for monitor (0b10).
7892 tst(mark, markWord::monitor_value);
7893 br(Assembler::NE, slow);
7894
7895 // Try to lock. Transition lock bits 0b01 => 0b00
7896 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7897 orr(mark, mark, markWord::unlocked_value);
7898 // Mask inline_type bit such that we go to the slow path if object is an inline type
7899 andr(mark, mark, ~((int) markWord::inline_type_bit_in_place));
7900
7901 eor(t, mark, markWord::unlocked_value);
7902 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7903 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7904 br(Assembler::NE, slow);
7905
7906 bind(push);
7907 // After successful lock, push object on lock-stack.
7908 str(obj, Address(rthread, top));
7909 addw(top, top, oopSize);
7910 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7911 }
7912
7913 // Implements fast-unlocking.
7914 //
7915 // - obj: the object to be unlocked
7916 // - t1, t2, t3: temporary registers
7917 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7918 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7919 // cmpxchg clobbers rscratch1.
7920 assert_different_registers(obj, t1, t2, t3, rscratch1);
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