9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "code/compiledIC.hpp"
30 #include "compiler/compileTask.hpp"
31 #include "compiler/disassembler.hpp"
32 #include "compiler/oopMap.hpp"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/cardTable.hpp"
37 #include "gc/shared/collectedHeap.hpp"
38 #include "gc/shared/tlab_globals.hpp"
39 #include "interpreter/bytecodeHistogram.hpp"
40 #include "interpreter/interpreter.hpp"
41 #include "interpreter/interpreterRuntime.hpp"
42 #include "jvm.h"
43 #include "memory/resourceArea.hpp"
44 #include "memory/universe.hpp"
45 #include "nativeInst_aarch64.hpp"
46 #include "oops/accessDecorators.hpp"
47 #include "oops/compressedKlass.inline.hpp"
48 #include "oops/compressedOops.inline.hpp"
49 #include "oops/klass.inline.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/icache.hpp"
52 #include "runtime/interfaceSupport.inline.hpp"
53 #include "runtime/javaThread.hpp"
54 #include "runtime/jniHandles.inline.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/globalDefinitions.hpp"
58 #include "utilities/powerOfTwo.hpp"
59 #ifdef COMPILER1
60 #include "c1/c1_LIRAssembler.hpp"
61 #endif
62 #ifdef COMPILER2
63 #include "oops/oop.hpp"
64 #include "opto/compile.hpp"
65 #include "opto/node.hpp"
66 #include "opto/output.hpp"
67 #endif
68
69 #include <sys/types.h>
70
71 #ifdef PRODUCT
72 #define BLOCK_COMMENT(str) /* nothing */
73 #else
74 #define BLOCK_COMMENT(str) block_comment(str)
75 #endif
76 #define STOP(str) stop(str);
77 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
78
2006 ldarb(scratch, scratch);
2007 cmp(scratch, InstanceKlass::fully_initialized);
2008 br(Assembler::EQ, *L_fast_path);
2009
2010 // Fast path check: current thread is initializer thread
2011 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2012 cmp(rthread, scratch);
2013
2014 if (L_slow_path == &L_fallthrough) {
2015 br(Assembler::EQ, *L_fast_path);
2016 bind(*L_slow_path);
2017 } else if (L_fast_path == &L_fallthrough) {
2018 br(Assembler::NE, *L_slow_path);
2019 bind(*L_fast_path);
2020 } else {
2021 Unimplemented();
2022 }
2023 }
2024
2025 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2026 if (!VerifyOops) return;
2027
2028 // Pass register number to verify_oop_subroutine
2029 const char* b = nullptr;
2030 {
2031 ResourceMark rm;
2032 stringStream ss;
2033 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2034 b = code_string(ss.as_string());
2035 }
2036 BLOCK_COMMENT("verify_oop {");
2037
2038 strip_return_address(); // This might happen within a stack frame.
2039 protect_return_address();
2040 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2041 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2042
2043 mov(r0, reg);
2044 movptr(rscratch1, (uintptr_t)(address)b);
2045
2046 // call indirectly to solve generation ordering problem
2047 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2048 ldr(rscratch2, Address(rscratch2));
2049 blr(rscratch2);
2050
2051 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2052 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2053 authenticate_return_address();
2054
2055 BLOCK_COMMENT("} verify_oop");
2056 }
2057
2058 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2059 if (!VerifyOops) return;
2060
2061 const char* b = nullptr;
2062 {
2063 ResourceMark rm;
2064 stringStream ss;
2065 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2066 b = code_string(ss.as_string());
2067 }
2068 BLOCK_COMMENT("verify_oop_addr {");
2069
2070 strip_return_address(); // This might happen within a stack frame.
2071 protect_return_address();
2072 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2073 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2074
2075 // addr may contain sp so we will have to adjust it based on the
2076 // pushes that we just did.
2077 if (addr.uses(sp)) {
2078 lea(r0, addr);
2079 ldr(r0, Address(r0, 4 * wordSize));
2292 call_VM_leaf_base(entry_point, 1);
2293 }
2294
2295 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2296 assert_different_registers(arg_1, c_rarg0);
2297 pass_arg0(this, arg_0);
2298 pass_arg1(this, arg_1);
2299 call_VM_leaf_base(entry_point, 2);
2300 }
2301
2302 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2303 Register arg_1, Register arg_2) {
2304 assert_different_registers(arg_1, c_rarg0);
2305 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2306 pass_arg0(this, arg_0);
2307 pass_arg1(this, arg_1);
2308 pass_arg2(this, arg_2);
2309 call_VM_leaf_base(entry_point, 3);
2310 }
2311
2312 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2313 pass_arg0(this, arg_0);
2314 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2315 }
2316
2317 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2318
2319 assert_different_registers(arg_0, c_rarg1);
2320 pass_arg1(this, arg_1);
2321 pass_arg0(this, arg_0);
2322 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2323 }
2324
2325 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2326 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2327 assert_different_registers(arg_1, c_rarg2);
2328 pass_arg2(this, arg_2);
2329 pass_arg1(this, arg_1);
2330 pass_arg0(this, arg_0);
2331 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2337 assert_different_registers(arg_2, c_rarg3);
2338 pass_arg3(this, arg_3);
2339 pass_arg2(this, arg_2);
2340 pass_arg1(this, arg_1);
2341 pass_arg0(this, arg_0);
2342 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2343 }
2344
2345 void MacroAssembler::null_check(Register reg, int offset) {
2346 if (needs_explicit_null_check(offset)) {
2347 // provoke OS null exception if reg is null by
2348 // accessing M[reg] w/o changing any registers
2349 // NOTE: this is plenty to provoke a segv
2350 ldr(zr, Address(reg));
2351 } else {
2352 // nothing to do, (later) access of M[reg + offset]
2353 // will provoke OS null exception if reg is null
2354 }
2355 }
2356
2357 // MacroAssembler protected routines needed to implement
2358 // public methods
2359
2360 void MacroAssembler::mov(Register r, Address dest) {
2361 code_section()->relocate(pc(), dest.rspec());
2362 uint64_t imm64 = (uint64_t)dest.target();
2363 movptr(r, imm64);
2364 }
2365
2366 // Move a constant pointer into r. In AArch64 mode the virtual
2367 // address space is 48 bits in size, so we only need three
2368 // instructions to create a patchable instruction sequence that can
2369 // reach anywhere.
2370 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2371 #ifndef PRODUCT
2372 {
2373 char buffer[64];
2374 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2375 block_comment(buffer);
2376 }
5036 adrp(rscratch1, src2, offset);
5037 ldr(rscratch1, Address(rscratch1, offset));
5038 cmp(src1, rscratch1);
5039 }
5040
5041 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5042 cmp(obj1, obj2);
5043 }
5044
5045 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5046 load_method_holder(rresult, rmethod);
5047 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5048 }
5049
5050 void MacroAssembler::load_method_holder(Register holder, Register method) {
5051 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5052 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5053 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5054 }
5055
5056 // Loads the obj's Klass* into dst.
5057 // Preserves all registers (incl src, rscratch1 and rscratch2).
5058 // Input:
5059 // src - the oop we want to load the klass from.
5060 // dst - output narrow klass.
5061 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5062 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5063 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5064 lsr(dst, dst, markWord::klass_shift);
5065 }
5066
5067 void MacroAssembler::load_klass(Register dst, Register src) {
5068 if (UseCompactObjectHeaders) {
5069 load_narrow_klass_compact(dst, src);
5070 decode_klass_not_null(dst);
5071 } else if (UseCompressedClassPointers) {
5072 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5073 decode_klass_not_null(dst);
5074 } else {
5075 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5146 }
5147 cmp(klass, tmp);
5148 }
5149
5150 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5151 if (UseCompactObjectHeaders) {
5152 load_narrow_klass_compact(tmp1, obj1);
5153 load_narrow_klass_compact(tmp2, obj2);
5154 cmpw(tmp1, tmp2);
5155 } else if (UseCompressedClassPointers) {
5156 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5157 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5158 cmpw(tmp1, tmp2);
5159 } else {
5160 ldr(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5161 ldr(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5162 cmp(tmp1, tmp2);
5163 }
5164 }
5165
5166 void MacroAssembler::store_klass(Register dst, Register src) {
5167 // FIXME: Should this be a store release? concurrent gcs assumes
5168 // klass length is valid if klass field is not null.
5169 assert(!UseCompactObjectHeaders, "not with compact headers");
5170 if (UseCompressedClassPointers) {
5171 encode_klass_not_null(src);
5172 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5173 } else {
5174 str(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5175 }
5176 }
5177
5178 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5179 assert(!UseCompactObjectHeaders, "not with compact headers");
5180 if (UseCompressedClassPointers) {
5181 // Store to klass gap in destination
5182 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5183 }
5184 }
5185
5546 if (as_raw) {
5547 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5548 } else {
5549 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5550 }
5551 }
5552
5553 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5554 Address dst, Register val,
5555 Register tmp1, Register tmp2, Register tmp3) {
5556 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5557 decorators = AccessInternal::decorator_fixup(decorators, type);
5558 bool as_raw = (decorators & AS_RAW) != 0;
5559 if (as_raw) {
5560 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5561 } else {
5562 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5563 }
5564 }
5565
5566 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5567 Register tmp2, DecoratorSet decorators) {
5568 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5569 }
5570
5571 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5572 Register tmp2, DecoratorSet decorators) {
5573 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5574 }
5575
5576 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5577 Register tmp2, Register tmp3, DecoratorSet decorators) {
5578 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5579 }
5580
5581 // Used for storing nulls.
5582 void MacroAssembler::store_heap_oop_null(Address dst) {
5583 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5584 }
5585
5621 oop_index = oop_recorder()->allocate_metadata_index(obj);
5622 } else {
5623 oop_index = oop_recorder()->find_index(obj);
5624 }
5625 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5626 mov(dst, Address((address)obj, rspec));
5627 }
5628
5629 Address MacroAssembler::constant_oop_address(jobject obj) {
5630 #ifdef ASSERT
5631 {
5632 ThreadInVMfromUnknown tiv;
5633 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5634 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5635 }
5636 #endif
5637 int oop_index = oop_recorder()->find_index(obj);
5638 return Address((address)obj, oop_Relocation::spec(oop_index));
5639 }
5640
5641 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5642 void MacroAssembler::tlab_allocate(Register obj,
5643 Register var_size_in_bytes,
5644 int con_size_in_bytes,
5645 Register t1,
5646 Register t2,
5647 Label& slow_case) {
5648 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5649 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5650 }
5651
5652 void MacroAssembler::verify_tlab() {
5653 #ifdef ASSERT
5654 if (UseTLAB && VerifyOops) {
5655 Label next, ok;
5656
5657 stp(rscratch2, rscratch1, Address(pre(sp, -16)));
5658
5659 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5660 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5661 cmp(rscratch2, rscratch1);
5662 br(Assembler::HS, next);
5663 STOP("assert(top >= start)");
5664 should_not_reach_here();
5665
5666 bind(next);
5667 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5668 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5669 cmp(rscratch2, rscratch1);
5670 br(Assembler::HS, ok);
5671 STOP("assert(top <= end)");
5672 should_not_reach_here();
5673
5674 bind(ok);
5675 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5676 }
5677 #endif
5678 }
5679
5680 // Writes to stack successive pages until offset reached to check for
5681 // stack overflow + shadow pages. This clobbers tmp.
5682 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5683 assert_different_registers(tmp, size, rscratch1);
5684 mov(tmp, sp);
5685 // Bang stack for total size given plus shadow page size.
5686 // Bang one page at a time because large size can bang beyond yellow and
5687 // red zones.
5688 Label loop;
5689 mov(rscratch1, (int)os::vm_page_size());
5690 bind(loop);
5691 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5692 subsw(size, size, rscratch1);
5693 str(size, Address(tmp));
5694 br(Assembler::GT, loop);
5695
5696 // Bang down shadow pages too.
5697 // At this point, (tmp-0) is the last address touched, so don't
5698 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5699 // was post-decremented.) Skip this address by starting at i=1, and
5766
5767 // Strictly speaking the card table base isn't an address at all, and it might
5768 // even be negative. It is thus materialised as a constant.
5769 mov(reg, (uint64_t)ctbs->card_table_base_const());
5770 }
5771
5772 void MacroAssembler::load_aotrc_address(Register reg, address a) {
5773 #if INCLUDE_CDS
5774 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
5775 if (AOTCodeCache::is_on_for_dump()) {
5776 // all aotrc field addresses should be registered in the AOTCodeCache address table
5777 lea(reg, ExternalAddress(a));
5778 } else {
5779 mov(reg, (uint64_t)a);
5780 }
5781 #else
5782 ShouldNotReachHere();
5783 #endif
5784 }
5785
5786 void MacroAssembler::build_frame(int framesize) {
5787 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5788 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5789 protect_return_address();
5790 if (framesize < ((1 << 9) + 2 * wordSize)) {
5791 sub(sp, sp, framesize);
5792 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5793 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5794 } else {
5795 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5796 if (PreserveFramePointer) mov(rfp, sp);
5797 if (framesize < ((1 << 12) + 2 * wordSize))
5798 sub(sp, sp, framesize - 2 * wordSize);
5799 else {
5800 mov(rscratch1, framesize - 2 * wordSize);
5801 sub(sp, sp, rscratch1);
5802 }
5803 }
5804 verify_cross_modify_fence_not_required();
5805 }
5806
5807 void MacroAssembler::remove_frame(int framesize) {
5808 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5809 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5810 if (framesize < ((1 << 9) + 2 * wordSize)) {
5811 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5812 add(sp, sp, framesize);
5813 } else {
5814 if (framesize < ((1 << 12) + 2 * wordSize))
5815 add(sp, sp, framesize - 2 * wordSize);
5816 else {
5817 mov(rscratch1, framesize - 2 * wordSize);
5818 add(sp, sp, rscratch1);
5819 }
5820 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5821 }
5822 authenticate_return_address();
5823 }
5824
5825
5826 // This method counts leading positive bytes (highest bit not set) in provided byte array
5827 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
5828 // Simple and most common case of aligned small array which is not at the
5829 // end of memory page is placed here. All other cases are in stub.
5830 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
5831 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
5832 assert_different_registers(ary1, len, result);
5833
5834 mov(result, len);
5835 cmpw(len, 0);
5836 br(LE, DONE);
5837 cmpw(len, 4 * wordSize);
5838 br(GE, STUB_LONG); // size > 32 then go to stub
5839
5840 int shift = 64 - exact_log2(os::vm_page_size());
5841 lsl(rscratch1, ary1, shift);
5842 mov(rscratch2, (size_t)(4 * wordSize) << shift);
5843 adds(rscratch2, rscratch1, rscratch2); // At end of page?
5844 br(CS, STUB); // at the end of page then go to stub
6727 // On other systems, the helper is a usual C function.
6728 //
6729 void MacroAssembler::get_thread(Register dst) {
6730 RegSet saved_regs =
6731 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
6732 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
6733
6734 protect_return_address();
6735 push(saved_regs, sp);
6736
6737 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6738 blr(lr);
6739 if (dst != c_rarg0) {
6740 mov(dst, c_rarg0);
6741 }
6742
6743 pop(saved_regs, sp);
6744 authenticate_return_address();
6745 }
6746
6747 void MacroAssembler::cache_wb(Address line) {
6748 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
6749 assert(line.index() == noreg, "index should be noreg");
6750 assert(line.offset() == 0, "offset should be 0");
6751 // would like to assert this
6752 // assert(line._ext.shift == 0, "shift should be zero");
6753 if (VM_Version::supports_dcpop()) {
6754 // writeback using clear virtual address to point of persistence
6755 dc(Assembler::CVAP, line.base());
6756 } else {
6757 // no need to generate anything as Unsafe.writebackMemory should
6758 // never invoke this stub
6759 }
6760 }
6761
6762 void MacroAssembler::cache_wbsync(bool is_pre) {
6763 // we only need a barrier post sync
6764 if (!is_pre) {
6765 membar(Assembler::AnyAny);
6766 }
7137 }
7138
7139 // Check if the lock-stack is full.
7140 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7141 cmpw(top, (unsigned)LockStack::end_offset());
7142 br(Assembler::GE, slow);
7143
7144 // Check for recursion.
7145 subw(t, top, oopSize);
7146 ldr(t, Address(rthread, t));
7147 cmp(obj, t);
7148 br(Assembler::EQ, push);
7149
7150 // Check header for monitor (0b10).
7151 tst(mark, markWord::monitor_value);
7152 br(Assembler::NE, slow);
7153
7154 // Try to lock. Transition lock bits 0b01 => 0b00
7155 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7156 orr(mark, mark, markWord::unlocked_value);
7157 eor(t, mark, markWord::unlocked_value);
7158 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7159 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7160 br(Assembler::NE, slow);
7161
7162 bind(push);
7163 // After successful lock, push object on lock-stack.
7164 str(obj, Address(rthread, top));
7165 addw(top, top, oopSize);
7166 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7167 }
7168
7169 // Implements fast-unlocking.
7170 //
7171 // - obj: the object to be unlocked
7172 // - t1, t2, t3: temporary registers
7173 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7174 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7175 // cmpxchg clobbers rscratch1.
7176 assert_different_registers(obj, t1, t2, t3, rscratch1);
|
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "ci/ciInlineKlass.hpp"
30 #include "code/compiledIC.hpp"
31 #include "compiler/compileTask.hpp"
32 #include "compiler/disassembler.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "gc/shared/cardTableBarrierSet.hpp"
37 #include "gc/shared/cardTable.hpp"
38 #include "gc/shared/collectedHeap.hpp"
39 #include "gc/shared/tlab_globals.hpp"
40 #include "interpreter/bytecodeHistogram.hpp"
41 #include "interpreter/interpreter.hpp"
42 #include "interpreter/interpreterRuntime.hpp"
43 #include "jvm.h"
44 #include "memory/resourceArea.hpp"
45 #include "memory/universe.hpp"
46 #include "nativeInst_aarch64.hpp"
47 #include "oops/accessDecorators.hpp"
48 #include "oops/compressedKlass.inline.hpp"
49 #include "oops/compressedOops.inline.hpp"
50 #include "oops/klass.inline.hpp"
51 #include "oops/resolvedFieldEntry.hpp"
52 #include "runtime/arguments.hpp"
53 #include "runtime/continuation.hpp"
54 #include "runtime/globals.hpp"
55 #include "runtime/icache.hpp"
56 #include "runtime/interfaceSupport.inline.hpp"
57 #include "runtime/javaThread.hpp"
58 #include "runtime/jniHandles.inline.hpp"
59 #include "runtime/sharedRuntime.hpp"
60 #include "runtime/signature_cc.hpp"
61 #include "runtime/stubRoutines.hpp"
62 #include "utilities/globalDefinitions.hpp"
63 #include "utilities/powerOfTwo.hpp"
64 #include "vmreg_aarch64.inline.hpp"
65 #ifdef COMPILER1
66 #include "c1/c1_LIRAssembler.hpp"
67 #endif
68 #ifdef COMPILER2
69 #include "oops/oop.hpp"
70 #include "opto/compile.hpp"
71 #include "opto/node.hpp"
72 #include "opto/output.hpp"
73 #endif
74
75 #include <sys/types.h>
76
77 #ifdef PRODUCT
78 #define BLOCK_COMMENT(str) /* nothing */
79 #else
80 #define BLOCK_COMMENT(str) block_comment(str)
81 #endif
82 #define STOP(str) stop(str);
83 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
84
2012 ldarb(scratch, scratch);
2013 cmp(scratch, InstanceKlass::fully_initialized);
2014 br(Assembler::EQ, *L_fast_path);
2015
2016 // Fast path check: current thread is initializer thread
2017 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2018 cmp(rthread, scratch);
2019
2020 if (L_slow_path == &L_fallthrough) {
2021 br(Assembler::EQ, *L_fast_path);
2022 bind(*L_slow_path);
2023 } else if (L_fast_path == &L_fallthrough) {
2024 br(Assembler::NE, *L_slow_path);
2025 bind(*L_fast_path);
2026 } else {
2027 Unimplemented();
2028 }
2029 }
2030
2031 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2032 if (!VerifyOops || VerifyAdapterSharing) {
2033 // Below address of the code string confuses VerifyAdapterSharing
2034 // because it may differ between otherwise equivalent adapters.
2035 return;
2036 }
2037
2038 // Pass register number to verify_oop_subroutine
2039 const char* b = nullptr;
2040 {
2041 ResourceMark rm;
2042 stringStream ss;
2043 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2044 b = code_string(ss.as_string());
2045 }
2046 BLOCK_COMMENT("verify_oop {");
2047
2048 strip_return_address(); // This might happen within a stack frame.
2049 protect_return_address();
2050 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2051 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2052
2053 mov(r0, reg);
2054 movptr(rscratch1, (uintptr_t)(address)b);
2055
2056 // call indirectly to solve generation ordering problem
2057 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2058 ldr(rscratch2, Address(rscratch2));
2059 blr(rscratch2);
2060
2061 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2062 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2063 authenticate_return_address();
2064
2065 BLOCK_COMMENT("} verify_oop");
2066 }
2067
2068 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2069 if (!VerifyOops || VerifyAdapterSharing) {
2070 // Below address of the code string confuses VerifyAdapterSharing
2071 // because it may differ between otherwise equivalent adapters.
2072 return;
2073 }
2074
2075 const char* b = nullptr;
2076 {
2077 ResourceMark rm;
2078 stringStream ss;
2079 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2080 b = code_string(ss.as_string());
2081 }
2082 BLOCK_COMMENT("verify_oop_addr {");
2083
2084 strip_return_address(); // This might happen within a stack frame.
2085 protect_return_address();
2086 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2087 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2088
2089 // addr may contain sp so we will have to adjust it based on the
2090 // pushes that we just did.
2091 if (addr.uses(sp)) {
2092 lea(r0, addr);
2093 ldr(r0, Address(r0, 4 * wordSize));
2306 call_VM_leaf_base(entry_point, 1);
2307 }
2308
2309 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2310 assert_different_registers(arg_1, c_rarg0);
2311 pass_arg0(this, arg_0);
2312 pass_arg1(this, arg_1);
2313 call_VM_leaf_base(entry_point, 2);
2314 }
2315
2316 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2317 Register arg_1, Register arg_2) {
2318 assert_different_registers(arg_1, c_rarg0);
2319 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2320 pass_arg0(this, arg_0);
2321 pass_arg1(this, arg_1);
2322 pass_arg2(this, arg_2);
2323 call_VM_leaf_base(entry_point, 3);
2324 }
2325
2326 void MacroAssembler::super_call_VM_leaf(address entry_point) {
2327 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2328 }
2329
2330 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2331 pass_arg0(this, arg_0);
2332 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2333 }
2334
2335 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2336
2337 assert_different_registers(arg_0, c_rarg1);
2338 pass_arg1(this, arg_1);
2339 pass_arg0(this, arg_0);
2340 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2341 }
2342
2343 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2344 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2345 assert_different_registers(arg_1, c_rarg2);
2346 pass_arg2(this, arg_2);
2347 pass_arg1(this, arg_1);
2348 pass_arg0(this, arg_0);
2349 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2355 assert_different_registers(arg_2, c_rarg3);
2356 pass_arg3(this, arg_3);
2357 pass_arg2(this, arg_2);
2358 pass_arg1(this, arg_1);
2359 pass_arg0(this, arg_0);
2360 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2361 }
2362
2363 void MacroAssembler::null_check(Register reg, int offset) {
2364 if (needs_explicit_null_check(offset)) {
2365 // provoke OS null exception if reg is null by
2366 // accessing M[reg] w/o changing any registers
2367 // NOTE: this is plenty to provoke a segv
2368 ldr(zr, Address(reg));
2369 } else {
2370 // nothing to do, (later) access of M[reg + offset]
2371 // will provoke OS null exception if reg is null
2372 }
2373 }
2374
2375 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2376 assert_different_registers(markword, rscratch2);
2377 mov(rscratch2, markWord::inline_type_mask_in_place);
2378 andr(markword, markword, rscratch2);
2379 mov(rscratch2, markWord::inline_type_pattern);
2380 cmp(markword, rscratch2);
2381 br(Assembler::EQ, is_inline_type);
2382 }
2383
2384 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2385 assert_different_registers(tmp, rscratch1);
2386 if (can_be_null) {
2387 cbz(object, not_inline_type);
2388 }
2389 const int is_inline_type_mask = markWord::inline_type_pattern;
2390 ldr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2391 mov(rscratch1, is_inline_type_mask);
2392 andr(tmp, tmp, rscratch1);
2393 cmp(tmp, rscratch1);
2394 br(Assembler::NE, not_inline_type);
2395 }
2396
2397 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2398 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2399 tbnz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, is_null_free_inline_type);
2400 }
2401
2402 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2403 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2404 tbz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, not_null_free_inline_type);
2405 }
2406
2407 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2408 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2409 tbnz(flags, ResolvedFieldEntry::is_flat_shift, is_flat);
2410 }
2411
2412 void MacroAssembler::test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker) {
2413 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2414 tbnz(flags, ResolvedFieldEntry::has_null_marker_shift, has_null_marker);
2415 }
2416
2417 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2418 Label test_mark_word;
2419 // load mark word
2420 ldr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2421 // check displaced
2422 tst(temp_reg, markWord::unlocked_value);
2423 br(Assembler::NE, test_mark_word);
2424 // slow path use klass prototype
2425 load_prototype_header(temp_reg, oop);
2426
2427 bind(test_mark_word);
2428 andr(temp_reg, temp_reg, test_bit);
2429 if (jmp_set) {
2430 cbnz(temp_reg, jmp_label);
2431 } else {
2432 cbz(temp_reg, jmp_label);
2433 }
2434 }
2435
2436 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array) {
2437 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2438 }
2439
2440 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2441 Label&is_non_flat_array) {
2442 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2443 }
2444
2445 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array) {
2446 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2447 }
2448
2449 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2450 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2451 }
2452
2453 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2454 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2455 br(Assembler::NE, is_flat_array);
2456 }
2457
2458 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
2459 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2460 br(Assembler::EQ, is_non_flat_array);
2461 }
2462
2463 // MacroAssembler protected routines needed to implement
2464 // public methods
2465
2466 void MacroAssembler::mov(Register r, Address dest) {
2467 code_section()->relocate(pc(), dest.rspec());
2468 uint64_t imm64 = (uint64_t)dest.target();
2469 movptr(r, imm64);
2470 }
2471
2472 // Move a constant pointer into r. In AArch64 mode the virtual
2473 // address space is 48 bits in size, so we only need three
2474 // instructions to create a patchable instruction sequence that can
2475 // reach anywhere.
2476 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2477 #ifndef PRODUCT
2478 {
2479 char buffer[64];
2480 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2481 block_comment(buffer);
2482 }
5142 adrp(rscratch1, src2, offset);
5143 ldr(rscratch1, Address(rscratch1, offset));
5144 cmp(src1, rscratch1);
5145 }
5146
5147 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5148 cmp(obj1, obj2);
5149 }
5150
5151 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5152 load_method_holder(rresult, rmethod);
5153 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5154 }
5155
5156 void MacroAssembler::load_method_holder(Register holder, Register method) {
5157 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5158 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5159 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5160 }
5161
5162 void MacroAssembler::load_metadata(Register dst, Register src) {
5163 if (UseCompactObjectHeaders) {
5164 load_narrow_klass_compact(dst, src);
5165 } else if (UseCompressedClassPointers) {
5166 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5167 } else {
5168 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5169 }
5170 }
5171
5172 // Loads the obj's Klass* into dst.
5173 // Preserves all registers (incl src, rscratch1 and rscratch2).
5174 // Input:
5175 // src - the oop we want to load the klass from.
5176 // dst - output narrow klass.
5177 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5178 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5179 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5180 lsr(dst, dst, markWord::klass_shift);
5181 }
5182
5183 void MacroAssembler::load_klass(Register dst, Register src) {
5184 if (UseCompactObjectHeaders) {
5185 load_narrow_klass_compact(dst, src);
5186 decode_klass_not_null(dst);
5187 } else if (UseCompressedClassPointers) {
5188 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5189 decode_klass_not_null(dst);
5190 } else {
5191 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5262 }
5263 cmp(klass, tmp);
5264 }
5265
5266 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5267 if (UseCompactObjectHeaders) {
5268 load_narrow_klass_compact(tmp1, obj1);
5269 load_narrow_klass_compact(tmp2, obj2);
5270 cmpw(tmp1, tmp2);
5271 } else if (UseCompressedClassPointers) {
5272 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5273 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5274 cmpw(tmp1, tmp2);
5275 } else {
5276 ldr(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5277 ldr(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5278 cmp(tmp1, tmp2);
5279 }
5280 }
5281
5282 void MacroAssembler::load_prototype_header(Register dst, Register src) {
5283 load_klass(dst, src);
5284 ldr(dst, Address(dst, Klass::prototype_header_offset()));
5285 }
5286
5287 void MacroAssembler::store_klass(Register dst, Register src) {
5288 // FIXME: Should this be a store release? concurrent gcs assumes
5289 // klass length is valid if klass field is not null.
5290 assert(!UseCompactObjectHeaders, "not with compact headers");
5291 if (UseCompressedClassPointers) {
5292 encode_klass_not_null(src);
5293 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5294 } else {
5295 str(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5296 }
5297 }
5298
5299 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5300 assert(!UseCompactObjectHeaders, "not with compact headers");
5301 if (UseCompressedClassPointers) {
5302 // Store to klass gap in destination
5303 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5304 }
5305 }
5306
5667 if (as_raw) {
5668 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5669 } else {
5670 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5671 }
5672 }
5673
5674 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5675 Address dst, Register val,
5676 Register tmp1, Register tmp2, Register tmp3) {
5677 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5678 decorators = AccessInternal::decorator_fixup(decorators, type);
5679 bool as_raw = (decorators & AS_RAW) != 0;
5680 if (as_raw) {
5681 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5682 } else {
5683 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5684 }
5685 }
5686
5687 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5688 Register inline_layout_info) {
5689 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5690 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5691 }
5692
5693 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5694 ldr(offset, Address(inline_klass, InlineKlass::adr_members_offset()));
5695 ldrw(offset, Address(offset, InlineKlass::payload_offset_offset()));
5696 }
5697
5698 void MacroAssembler::payload_address(Register oop, Register data, Register inline_klass) {
5699 // ((address) (void*) o) + vk->payload_offset();
5700 Register offset = (data == oop) ? rscratch1 : data;
5701 payload_offset(inline_klass, offset);
5702 if (data == oop) {
5703 add(data, data, offset);
5704 } else {
5705 lea(data, Address(oop, offset));
5706 }
5707 }
5708
5709 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
5710 Register index, Register data) {
5711 assert_different_registers(array, array_klass, index);
5712 assert_different_registers(rscratch1, array, index);
5713
5714 // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
5715 ldrw(rscratch1, Address(array_klass, Klass::layout_helper_offset()));
5716
5717 // Klass::layout_helper_log2_element_size(lh)
5718 // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
5719 lsr(rscratch1, rscratch1, Klass::_lh_log2_element_size_shift);
5720 andr(rscratch1, rscratch1, Klass::_lh_log2_element_size_mask);
5721 lslv(index, index, rscratch1);
5722
5723 add(data, array, index);
5724 add(data, data, arrayOopDesc::base_offset_in_bytes(T_FLAT_ELEMENT));
5725 }
5726
5727 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5728 Register tmp2, DecoratorSet decorators) {
5729 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5730 }
5731
5732 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5733 Register tmp2, DecoratorSet decorators) {
5734 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5735 }
5736
5737 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5738 Register tmp2, Register tmp3, DecoratorSet decorators) {
5739 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5740 }
5741
5742 // Used for storing nulls.
5743 void MacroAssembler::store_heap_oop_null(Address dst) {
5744 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5745 }
5746
5782 oop_index = oop_recorder()->allocate_metadata_index(obj);
5783 } else {
5784 oop_index = oop_recorder()->find_index(obj);
5785 }
5786 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5787 mov(dst, Address((address)obj, rspec));
5788 }
5789
5790 Address MacroAssembler::constant_oop_address(jobject obj) {
5791 #ifdef ASSERT
5792 {
5793 ThreadInVMfromUnknown tiv;
5794 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5795 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5796 }
5797 #endif
5798 int oop_index = oop_recorder()->find_index(obj);
5799 return Address((address)obj, oop_Relocation::spec(oop_index));
5800 }
5801
5802 // Object / value buffer allocation...
5803 void MacroAssembler::allocate_instance(Register klass, Register new_obj,
5804 Register t1, Register t2,
5805 bool clear_fields, Label& alloc_failed)
5806 {
5807 Label done, initialize_header, initialize_object, slow_case, slow_case_no_pop;
5808 Register layout_size = t1;
5809 assert(new_obj == r0, "needs to be r0");
5810 assert_different_registers(klass, new_obj, t1, t2);
5811
5812 // get instance_size in InstanceKlass (scaled to a count of bytes)
5813 ldrw(layout_size, Address(klass, Klass::layout_helper_offset()));
5814 // test to see if it is malformed in some way
5815 tst(layout_size, Klass::_lh_instance_slow_path_bit);
5816 br(Assembler::NE, slow_case_no_pop);
5817
5818 // Allocate the instance:
5819 // If TLAB is enabled:
5820 // Try to allocate in the TLAB.
5821 // If fails, go to the slow path.
5822 // Initialize the allocation.
5823 // Exit.
5824 //
5825 // Go to slow path.
5826
5827 if (UseTLAB) {
5828 push(klass);
5829 tlab_allocate(new_obj, layout_size, 0, klass, t2, slow_case);
5830 if (ZeroTLAB || (!clear_fields)) {
5831 // the fields have been already cleared
5832 b(initialize_header);
5833 } else {
5834 // initialize both the header and fields
5835 b(initialize_object);
5836 }
5837
5838 if (clear_fields) {
5839 // The object is initialized before the header. If the object size is
5840 // zero, go directly to the header initialization.
5841 bind(initialize_object);
5842 int header_size = oopDesc::header_size() * HeapWordSize;
5843 assert(is_aligned(header_size, BytesPerLong), "oop header size must be 8-byte-aligned");
5844 subs(layout_size, layout_size, header_size);
5845 br(Assembler::EQ, initialize_header);
5846
5847 // Initialize topmost object field, divide size by 8, check if odd and
5848 // test if zero.
5849
5850 #ifdef ASSERT
5851 // make sure instance_size was multiple of 8
5852 Label L;
5853 tst(layout_size, 7);
5854 br(Assembler::EQ, L);
5855 stop("object size is not multiple of 8 - adjust this code");
5856 bind(L);
5857 // must be > 0, no extra check needed here
5858 #endif
5859
5860 lsr(layout_size, layout_size, LogBytesPerLong);
5861
5862 // initialize remaining object fields: instance_size was a multiple of 8
5863 {
5864 Label loop;
5865 Register base = t2;
5866
5867 bind(loop);
5868 add(rscratch1, new_obj, layout_size, Assembler::LSL, LogBytesPerLong);
5869 str(zr, Address(rscratch1, header_size - 1*oopSize));
5870 subs(layout_size, layout_size, 1);
5871 br(Assembler::NE, loop);
5872 }
5873 } // clear_fields
5874
5875 // initialize object header only.
5876 bind(initialize_header);
5877 pop(klass);
5878 Register mark_word = t2;
5879 if (UseCompactObjectHeaders || Arguments::is_valhalla_enabled()) {
5880 ldr(mark_word, Address(klass, Klass::prototype_header_offset()));
5881 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5882 } else {
5883 mov(mark_word, (intptr_t)markWord::prototype().value());
5884 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5885 }
5886 if (!UseCompactObjectHeaders) {
5887 store_klass_gap(new_obj, zr); // zero klass gap for compressed oops
5888 mov(t2, klass); // preserve klass
5889 store_klass(new_obj, t2); // src klass reg is potentially compressed
5890 }
5891 b(done);
5892 }
5893
5894 if (UseTLAB) {
5895 bind(slow_case);
5896 pop(klass);
5897 }
5898 bind(slow_case_no_pop);
5899 b(alloc_failed);
5900
5901 bind(done);
5902 }
5903
5904 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5905 void MacroAssembler::tlab_allocate(Register obj,
5906 Register var_size_in_bytes,
5907 int con_size_in_bytes,
5908 Register t1,
5909 Register t2,
5910 Label& slow_case) {
5911 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5912 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5913 }
5914
5915 void MacroAssembler::verify_tlab() {
5916 #ifdef ASSERT
5917 if (UseTLAB && VerifyOops) {
5918 Label next, ok;
5919
5920 stp(rscratch2, rscratch1, Address(pre(sp, -16)));
5921
5922 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5923 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5924 cmp(rscratch2, rscratch1);
5925 br(Assembler::HS, next);
5926 STOP("assert(top >= start)");
5927 should_not_reach_here();
5928
5929 bind(next);
5930 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5931 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5932 cmp(rscratch2, rscratch1);
5933 br(Assembler::HS, ok);
5934 STOP("assert(top <= end)");
5935 should_not_reach_here();
5936
5937 bind(ok);
5938 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5939 }
5940 #endif
5941 }
5942
5943 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
5944 assert_different_registers(holder_klass, index, layout_info);
5945 InlineLayoutInfo array[2];
5946 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
5947 if (is_power_of_2(size)) {
5948 lsl(index, index, log2i_exact(size)); // Scale index by power of 2
5949 } else {
5950 mov(layout_info, size);
5951 mul(index, index, layout_info); // Scale the index to be the entry index * array_element_size
5952 }
5953 ldr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
5954 add(layout_info, layout_info, Array<InlineLayoutInfo>::base_offset_in_bytes());
5955 lea(layout_info, Address(layout_info, index));
5956 }
5957
5958 // Writes to stack successive pages until offset reached to check for
5959 // stack overflow + shadow pages. This clobbers tmp.
5960 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5961 assert_different_registers(tmp, size, rscratch1);
5962 mov(tmp, sp);
5963 // Bang stack for total size given plus shadow page size.
5964 // Bang one page at a time because large size can bang beyond yellow and
5965 // red zones.
5966 Label loop;
5967 mov(rscratch1, (int)os::vm_page_size());
5968 bind(loop);
5969 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5970 subsw(size, size, rscratch1);
5971 str(size, Address(tmp));
5972 br(Assembler::GT, loop);
5973
5974 // Bang down shadow pages too.
5975 // At this point, (tmp-0) is the last address touched, so don't
5976 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5977 // was post-decremented.) Skip this address by starting at i=1, and
6044
6045 // Strictly speaking the card table base isn't an address at all, and it might
6046 // even be negative. It is thus materialised as a constant.
6047 mov(reg, (uint64_t)ctbs->card_table_base_const());
6048 }
6049
6050 void MacroAssembler::load_aotrc_address(Register reg, address a) {
6051 #if INCLUDE_CDS
6052 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
6053 if (AOTCodeCache::is_on_for_dump()) {
6054 // all aotrc field addresses should be registered in the AOTCodeCache address table
6055 lea(reg, ExternalAddress(a));
6056 } else {
6057 mov(reg, (uint64_t)a);
6058 }
6059 #else
6060 ShouldNotReachHere();
6061 #endif
6062 }
6063
6064 #ifdef ASSERT
6065 void MacroAssembler::build_frame(int framesize) {
6066 build_frame(framesize, false);
6067 }
6068 #endif
6069
6070 void MacroAssembler::build_frame(int framesize DEBUG_ONLY(COMMA bool zap_rfp_lr_spills)) {
6071 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
6072 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
6073 protect_return_address();
6074 if (framesize < ((1 << 9) + 2 * wordSize)) {
6075 sub(sp, sp, framesize);
6076 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
6077 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
6078 stp(rscratch1, rscratch1, Address(sp, framesize - 2 * wordSize));
6079 } else {
6080 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
6081 }
6082 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
6083 } else {
6084 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
6085 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
6086 stp(rscratch1, rscratch1, Address(pre(sp, -2 * wordSize)));
6087 } else {
6088 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
6089 }
6090 if (PreserveFramePointer) mov(rfp, sp);
6091 if (framesize < ((1 << 12) + 2 * wordSize))
6092 sub(sp, sp, framesize - 2 * wordSize);
6093 else {
6094 mov(rscratch1, framesize - 2 * wordSize);
6095 sub(sp, sp, rscratch1);
6096 }
6097 }
6098 verify_cross_modify_fence_not_required();
6099 }
6100
6101 void MacroAssembler::remove_frame(int framesize) {
6102 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
6103 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
6104 if (framesize < ((1 << 9) + 2 * wordSize)) {
6105 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
6106 add(sp, sp, framesize);
6107 } else {
6108 if (framesize < ((1 << 12) + 2 * wordSize))
6109 add(sp, sp, framesize - 2 * wordSize);
6110 else {
6111 mov(rscratch1, framesize - 2 * wordSize);
6112 add(sp, sp, rscratch1);
6113 }
6114 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6115 }
6116 authenticate_return_address();
6117 }
6118
6119 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6120 if (needs_stack_repair) {
6121 // The method has a scalarized entry point (where fields of value object arguments
6122 // are passed through registers and stack), and a non-scalarized entry point (where
6123 // value object arguments are given as oops). The non-scalarized entry point will
6124 // first load each field of value object arguments and store them in registers and on
6125 // the stack in a way compatible with the scalarized entry point. To do so, some extra
6126 // stack space might be reserved (if argument registers are not enough). On leaving the
6127 // method, this space must be freed.
6128 //
6129 // In case we used the non-scalarized entry point the stack looks like this:
6130 //
6131 // | Arguments from caller |
6132 // |---------------------------| <-- caller's SP
6133 // | Saved LR #1 |
6134 // | Saved FP #1 |
6135 // |---------------------------|
6136 // | Extension space for |
6137 // | inline arg (un)packing |
6138 // |---------------------------| <-- start of this method's frame
6139 // | Saved LR #2 |
6140 // | Saved FP #2 |
6141 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6142 // | sp_inc |
6143 // | method locals |
6144 // |---------------------------| <-- SP
6145 //
6146 // There are two copies of FP and LR on the stack. They will be identical at
6147 // first, but that can change.
6148 // If the caller has been deoptimized, LR #1 will be patched to point at the
6149 // deopt blob, and LR #2 will still point into the old method.
6150 // If the saved FP (x29) was not used as the frame pointer, but to store an
6151 // oop, the GC will be aware only of FP #1 as the spilled location of x29 and
6152 // will fix only this one. Overall, FP/LR #2 are not reliable and are simply
6153 // needed to add space between the extension space and the locals, as there
6154 // would be between the real arguments and the locals if we don't need to
6155 // do unpacking (from the scalarized entry point).
6156 //
6157 // When restoring, one must then load FP #1 into x29, and LR #1 into x30,
6158 // while keeping in mind that from the scalarized entry point, there will be
6159 // only one copy of each. Indeed, in the case we used the scalarized calling
6160 // convention, the stack looks like this:
6161 //
6162 // | Arguments from caller |
6163 // |---------------------------| <-- caller's SP / start of this method's frame
6164 // | Saved LR |
6165 // | Saved FP |
6166 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6167 // | sp_inc |
6168 // | method locals |
6169 // |---------------------------| <-- SP
6170 //
6171 // The sp_inc stack slot holds the total size of the frame including the
6172 // extension space minus two words for the saved FP and LR. That is how to
6173 // find FP/LR #1. This size is expressed in bytes. Be careful when using it
6174 // from C++ in pointer arithmetic; you might need to divide it by wordSize.
6175 //
6176 // One can find sp_inc since the start the method's frame is SP + initial_framesize.
6177
6178 int sp_inc_offset = initial_framesize - 3 * wordSize; // Immediately below saved LR and FP
6179
6180 ldr(rscratch1, Address(sp, sp_inc_offset));
6181 add(sp, sp, rscratch1);
6182 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6183 } else {
6184 remove_frame(initial_framesize);
6185 }
6186 }
6187
6188 void MacroAssembler::save_stack_increment(int sp_inc, int frame_size) {
6189 int real_frame_size = frame_size + sp_inc;
6190 assert(sp_inc == 0 || sp_inc > 2*wordSize, "invalid sp_inc value");
6191 assert(real_frame_size >= 2*wordSize, "frame size must include FP/LR space");
6192 assert((real_frame_size & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6193
6194 int sp_inc_offset = frame_size - 3 * wordSize; // Immediately below saved LR and FP
6195
6196 // Subtract two words for the saved FP and LR as these will be popped
6197 // separately. See remove_frame above.
6198 mov(rscratch1, real_frame_size - 2*wordSize);
6199 str(rscratch1, Address(sp, sp_inc_offset));
6200 }
6201
6202 // This method counts leading positive bytes (highest bit not set) in provided byte array
6203 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
6204 // Simple and most common case of aligned small array which is not at the
6205 // end of memory page is placed here. All other cases are in stub.
6206 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
6207 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
6208 assert_different_registers(ary1, len, result);
6209
6210 mov(result, len);
6211 cmpw(len, 0);
6212 br(LE, DONE);
6213 cmpw(len, 4 * wordSize);
6214 br(GE, STUB_LONG); // size > 32 then go to stub
6215
6216 int shift = 64 - exact_log2(os::vm_page_size());
6217 lsl(rscratch1, ary1, shift);
6218 mov(rscratch2, (size_t)(4 * wordSize) << shift);
6219 adds(rscratch2, rscratch1, rscratch2); // At end of page?
6220 br(CS, STUB); // at the end of page then go to stub
7103 // On other systems, the helper is a usual C function.
7104 //
7105 void MacroAssembler::get_thread(Register dst) {
7106 RegSet saved_regs =
7107 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
7108 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
7109
7110 protect_return_address();
7111 push(saved_regs, sp);
7112
7113 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
7114 blr(lr);
7115 if (dst != c_rarg0) {
7116 mov(dst, c_rarg0);
7117 }
7118
7119 pop(saved_regs, sp);
7120 authenticate_return_address();
7121 }
7122
7123 #ifdef COMPILER2
7124 // C2 compiled method's prolog code
7125 // Moved here from aarch64.ad to support Valhalla code below
7126 void MacroAssembler::verified_entry(Compile* C, int sp_inc) {
7127 if (C->clinit_barrier_on_entry()) {
7128 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
7129
7130 Label L_skip_barrier;
7131
7132 mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
7133 clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
7134 far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
7135 bind(L_skip_barrier);
7136 }
7137
7138 if (C->max_vector_size() > 0) {
7139 reinitialize_ptrue();
7140 }
7141
7142 int bangsize = C->output()->bang_size_in_bytes();
7143 if (C->output()->need_stack_bang(bangsize))
7144 generate_stack_overflow_check(bangsize);
7145
7146 // n.b. frame size includes space for return pc and rfp
7147 const long framesize = C->output()->frame_size_in_bytes();
7148 build_frame(framesize DEBUG_ONLY(COMMA sp_inc != 0));
7149
7150 if (C->needs_stack_repair()) {
7151 save_stack_increment(sp_inc, framesize);
7152 }
7153
7154 if (VerifyStackAtCalls) {
7155 Unimplemented();
7156 }
7157 }
7158 #endif // COMPILER2
7159
7160 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
7161 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
7162 // An inline type might be returned. If fields are in registers we
7163 // need to allocate an inline type instance and initialize it with
7164 // the value of the fields.
7165 Label skip;
7166 // We only need a new buffered inline type if a new one is not returned
7167 tbz(r0, 0, skip);
7168 int call_offset = -1;
7169
7170 // Be careful not to clobber r1-7 which hold returned fields
7171 // Also do not use callee-saved registers as these may be live in the interpreter
7172 Register tmp1 = r13, tmp2 = r14, klass = r15, r0_preserved = r12;
7173
7174 // The following code is similar to allocate_instance but has some slight differences,
7175 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
7176 // allocating is not necessary if vk != nullptr, etc. allocate_instance is not aware of these.
7177 Label slow_case;
7178 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
7179 mov(r0_preserved, r0); // save r0 for slow_case since *_allocate may corrupt it when allocation failed
7180
7181 if (vk != nullptr) {
7182 // Called from C1, where the return type is statically known.
7183 movptr(klass, (intptr_t)vk->get_InlineKlass());
7184 jint lh = vk->layout_helper();
7185 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
7186 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
7187 tlab_allocate(r0, noreg, lh, tmp1, tmp2, slow_case);
7188 } else {
7189 b(slow_case);
7190 }
7191 } else {
7192 // Call from interpreter. R0 contains ((the InlineKlass* of the return type) | 0x01)
7193 andr(klass, r0, -2);
7194 if (UseTLAB) {
7195 ldrw(tmp2, Address(klass, Klass::layout_helper_offset()));
7196 tst(tmp2, Klass::_lh_instance_slow_path_bit);
7197 br(Assembler::NE, slow_case);
7198 tlab_allocate(r0, tmp2, 0, tmp1, tmp2, slow_case);
7199 } else {
7200 b(slow_case);
7201 }
7202 }
7203 if (UseTLAB) {
7204 // 2. Initialize buffered inline instance header
7205 Register buffer_obj = r0;
7206 if (UseCompactObjectHeaders) {
7207 ldr(rscratch1, Address(klass, Klass::prototype_header_offset()));
7208 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7209 } else {
7210 mov(rscratch1, (intptr_t)markWord::inline_type_prototype().value());
7211 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7212 store_klass_gap(buffer_obj, zr);
7213 if (vk == nullptr) {
7214 // store_klass corrupts klass, so save it for later use (interpreter case only).
7215 mov(tmp1, klass);
7216 }
7217 store_klass(buffer_obj, klass);
7218 klass = tmp1;
7219 }
7220 // 3. Initialize its fields with an inline class specific handler
7221 if (vk != nullptr) {
7222 far_call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
7223 } else {
7224 ldr(tmp1, Address(klass, InlineKlass::adr_members_offset()));
7225 ldr(tmp1, Address(tmp1, InlineKlass::pack_handler_offset()));
7226 blr(tmp1);
7227 }
7228
7229 membar(Assembler::StoreStore);
7230 b(skip);
7231 } else {
7232 // Must have already branched to slow_case above.
7233 DEBUG_ONLY(should_not_reach_here());
7234 }
7235 bind(slow_case);
7236 // We failed to allocate a new inline type, fall back to a runtime
7237 // call. Some oop field may be live in some registers but we can't
7238 // tell. That runtime call will take care of preserving them
7239 // across a GC if there's one.
7240 mov(r0, r0_preserved);
7241
7242 if (from_interpreter) {
7243 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
7244 } else {
7245 far_call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
7246 call_offset = offset();
7247 }
7248 membar(Assembler::StoreStore);
7249
7250 bind(skip);
7251 return call_offset;
7252 }
7253
7254 // Move a value between registers/stack slots and update the reg_state
7255 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
7256 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
7257 if (reg_state[to->value()] == reg_written) {
7258 return true; // Already written
7259 }
7260
7261 if (from != to && bt != T_VOID) {
7262 if (reg_state[to->value()] == reg_readonly) {
7263 return false; // Not yet writable
7264 }
7265 if (from->is_reg()) {
7266 if (to->is_reg()) {
7267 if (from->is_Register() && to->is_Register()) {
7268 mov(to->as_Register(), from->as_Register());
7269 } else if (from->is_FloatRegister() && to->is_FloatRegister()) {
7270 fmovd(to->as_FloatRegister(), from->as_FloatRegister());
7271 } else {
7272 ShouldNotReachHere();
7273 }
7274 } else {
7275 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7276 Address to_addr = Address(sp, st_off);
7277 if (from->is_FloatRegister()) {
7278 if (bt == T_DOUBLE) {
7279 strd(from->as_FloatRegister(), to_addr);
7280 } else {
7281 assert(bt == T_FLOAT, "must be float");
7282 strs(from->as_FloatRegister(), to_addr);
7283 }
7284 } else {
7285 str(from->as_Register(), to_addr);
7286 }
7287 }
7288 } else {
7289 Address from_addr = Address(sp, from->reg2stack() * VMRegImpl::stack_slot_size);
7290 if (to->is_reg()) {
7291 if (to->is_FloatRegister()) {
7292 if (bt == T_DOUBLE) {
7293 ldrd(to->as_FloatRegister(), from_addr);
7294 } else {
7295 assert(bt == T_FLOAT, "must be float");
7296 ldrs(to->as_FloatRegister(), from_addr);
7297 }
7298 } else {
7299 ldr(to->as_Register(), from_addr);
7300 }
7301 } else {
7302 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7303 ldr(rscratch1, from_addr);
7304 str(rscratch1, Address(sp, st_off));
7305 }
7306 }
7307 }
7308
7309 // Update register states
7310 reg_state[from->value()] = reg_writable;
7311 reg_state[to->value()] = reg_written;
7312 return true;
7313 }
7314
7315 // Calculate the extra stack space required for packing or unpacking inline
7316 // args and adjust the stack pointer
7317 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
7318 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
7319 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
7320 assert(sp_inc > 0, "sanity");
7321
7322 // Save a copy of the FP and LR here for deoptimization patching and frame walking
7323 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
7324
7325 // Adjust the stack pointer. This will be repaired on return by MacroAssembler::remove_frame
7326 if (sp_inc < (1 << 9)) {
7327 sub(sp, sp, sp_inc); // Fits in an immediate
7328 } else {
7329 mov(rscratch1, sp_inc);
7330 sub(sp, sp, rscratch1);
7331 }
7332
7333 return sp_inc + 2 * wordSize; // Account for the FP/LR space
7334 }
7335
7336 // Read all fields from an inline type oop and store the values in registers/stack slots
7337 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
7338 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
7339 RegState reg_state[]) {
7340 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
7341 assert(from->is_valid(), "source must be valid");
7342 bool progress = false;
7343 #ifdef ASSERT
7344 const int start_offset = offset();
7345 #endif
7346
7347 Label L_null, L_notNull;
7348 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
7349 Register tmp1 = r10;
7350 Register tmp2 = r11;
7351
7352 #ifndef ASSERT
7353 RegSet clobbered_gp_regs = MacroAssembler::call_clobbered_gp_registers();
7354 assert(clobbered_gp_regs.contains(tmp1), "tmp1 must be saved explicitly if it's not a clobber");
7355 assert(clobbered_gp_regs.contains(tmp2), "tmp2 must be saved explicitly if it's not a clobber");
7356 assert(clobbered_gp_regs.contains(r14), "r14 must be saved explicitly if it's not a clobber");
7357 #endif
7358
7359 Register fromReg = noreg;
7360 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
7361 bool done = true;
7362 bool mark_done = true;
7363 VMReg toReg;
7364 BasicType bt;
7365 // Check if argument requires a null check
7366 bool null_check = false;
7367 VMReg nullCheckReg;
7368 while (stream.next(nullCheckReg, bt)) {
7369 if (sig->at(stream.sig_index())._offset == -1) {
7370 null_check = true;
7371 break;
7372 }
7373 }
7374 stream.reset(sig_index, to_index);
7375 while (stream.next(toReg, bt)) {
7376 assert(toReg->is_valid(), "destination must be valid");
7377 int idx = (int)toReg->value();
7378 if (reg_state[idx] == reg_readonly) {
7379 if (idx != from->value()) {
7380 mark_done = false;
7381 }
7382 done = false;
7383 continue;
7384 } else if (reg_state[idx] == reg_written) {
7385 continue;
7386 }
7387 assert(reg_state[idx] == reg_writable, "must be writable");
7388 reg_state[idx] = reg_written;
7389 progress = true;
7390
7391 if (fromReg == noreg) {
7392 if (from->is_reg()) {
7393 fromReg = from->as_Register();
7394 } else {
7395 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size;
7396 ldr(tmp1, Address(sp, st_off));
7397 fromReg = tmp1;
7398 }
7399 if (null_check) {
7400 // Nullable inline type argument, emit null check
7401 cbz(fromReg, L_null);
7402 }
7403 }
7404 int off = sig->at(stream.sig_index())._offset;
7405 if (off == -1) {
7406 assert(null_check, "Missing null check at");
7407 if (toReg->is_stack()) {
7408 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7409 mov(tmp2, 1);
7410 str(tmp2, Address(sp, st_off));
7411 } else {
7412 mov(toReg->as_Register(), 1);
7413 }
7414 continue;
7415 }
7416 assert(off > 0, "offset in object should be positive");
7417 Address fromAddr = Address(fromReg, off);
7418 if (!toReg->is_FloatRegister()) {
7419 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
7420 if (is_reference_type(bt)) {
7421 load_heap_oop(dst, fromAddr, rscratch1, rscratch2);
7422 } else {
7423 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
7424 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
7425 }
7426 if (toReg->is_stack()) {
7427 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7428 str(dst, Address(sp, st_off));
7429 }
7430 } else if (bt == T_DOUBLE) {
7431 ldrd(toReg->as_FloatRegister(), fromAddr);
7432 } else {
7433 assert(bt == T_FLOAT, "must be float");
7434 ldrs(toReg->as_FloatRegister(), fromAddr);
7435 }
7436 }
7437 if (progress && null_check) {
7438 if (done) {
7439 b(L_notNull);
7440 bind(L_null);
7441 // Set null marker to zero to signal that the argument is null.
7442 // Also set all fields to zero since the runtime requires a canonical
7443 // representation of a flat null.
7444 stream.reset(sig_index, to_index);
7445 while (stream.next(toReg, bt)) {
7446 if (toReg->is_stack()) {
7447 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7448 str(zr, Address(sp, st_off));
7449 } else if (toReg->is_FloatRegister()) {
7450 mov(toReg->as_FloatRegister(), T2S, 0);
7451 } else {
7452 mov(toReg->as_Register(), zr);
7453 }
7454 }
7455 bind(L_notNull);
7456 } else {
7457 bind(L_null);
7458 }
7459 }
7460
7461 sig_index = stream.sig_index();
7462 to_index = stream.regs_index();
7463
7464 if (mark_done && reg_state[from->value()] != reg_written) {
7465 // This is okay because no one else will write to that slot
7466 reg_state[from->value()] = reg_writable;
7467 }
7468 from_index--;
7469 assert(progress || (start_offset == offset()), "should not emit code");
7470 return done;
7471 }
7472
7473 // Pack fields back into an inline type oop
7474 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
7475 VMRegPair* from, int from_count, int& from_index, VMReg to,
7476 RegState reg_state[], Register val_array) {
7477 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
7478 assert(to->is_valid(), "destination must be valid");
7479
7480 if (reg_state[to->value()] == reg_written) {
7481 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7482 return true; // Already written
7483 }
7484
7485 // The GC barrier expanded by store_heap_oop below may call into the
7486 // runtime so use callee-saved registers for any values that need to be
7487 // preserved. The GC barrier assembler should take care of saving the
7488 // Java argument registers.
7489 // TODO 8284443 Isn't it an issue if below code uses r14 as tmp when it contains a spilled value?
7490 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
7491 Register val_obj_tmp = r21;
7492 Register from_reg_tmp = r22;
7493 Register tmp1 = r14;
7494 Register tmp2 = r13;
7495 Register tmp3 = r12;
7496 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
7497
7498 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
7499
7500 if (reg_state[to->value()] == reg_readonly) {
7501 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
7502 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7503 return false; // Not yet writable
7504 }
7505 val_obj = val_obj_tmp;
7506 }
7507
7508 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
7509 load_heap_oop(val_obj, Address(val_array, index), tmp1, tmp2);
7510
7511 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
7512 VMReg fromReg;
7513 BasicType bt;
7514 Label L_null;
7515 while (stream.next(fromReg, bt)) {
7516 assert(fromReg->is_valid(), "source must be valid");
7517 reg_state[fromReg->value()] = reg_writable;
7518
7519 int off = sig->at(stream.sig_index())._offset;
7520 if (off == -1) {
7521 // Nullable inline type argument, emit null check
7522 Label L_notNull;
7523 if (fromReg->is_stack()) {
7524 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7525 ldrb(tmp2, Address(sp, ld_off));
7526 cbnz(tmp2, L_notNull);
7527 } else {
7528 cbnz(fromReg->as_Register(), L_notNull);
7529 }
7530 mov(val_obj, 0);
7531 b(L_null);
7532 bind(L_notNull);
7533 continue;
7534 }
7535
7536 assert(off > 0, "offset in object should be positive");
7537 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
7538
7539 // Pack the scalarized field into the value object.
7540 Address dst(val_obj, off);
7541 if (!fromReg->is_FloatRegister()) {
7542 Register src;
7543 if (fromReg->is_stack()) {
7544 src = from_reg_tmp;
7545 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7546 load_sized_value(src, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
7547 } else {
7548 src = fromReg->as_Register();
7549 }
7550 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
7551 if (is_reference_type(bt)) {
7552 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep val_obj valid.
7553 mov(tmp3, val_obj);
7554 Address dst_with_tmp3(tmp3, off);
7555 store_heap_oop(dst_with_tmp3, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
7556 } else {
7557 store_sized_value(dst, src, size_in_bytes);
7558 }
7559 } else if (bt == T_DOUBLE) {
7560 strd(fromReg->as_FloatRegister(), dst);
7561 } else {
7562 assert(bt == T_FLOAT, "must be float");
7563 strs(fromReg->as_FloatRegister(), dst);
7564 }
7565 }
7566 bind(L_null);
7567 sig_index = stream.sig_index();
7568 from_index = stream.regs_index();
7569
7570 assert(reg_state[to->value()] == reg_writable, "must have already been read");
7571 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
7572 assert(success, "to register must be writeable");
7573 return true;
7574 }
7575
7576 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
7577 return (reg->is_FloatRegister()) ? v8->as_VMReg() : r14->as_VMReg();
7578 }
7579
7580 void MacroAssembler::cache_wb(Address line) {
7581 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
7582 assert(line.index() == noreg, "index should be noreg");
7583 assert(line.offset() == 0, "offset should be 0");
7584 // would like to assert this
7585 // assert(line._ext.shift == 0, "shift should be zero");
7586 if (VM_Version::supports_dcpop()) {
7587 // writeback using clear virtual address to point of persistence
7588 dc(Assembler::CVAP, line.base());
7589 } else {
7590 // no need to generate anything as Unsafe.writebackMemory should
7591 // never invoke this stub
7592 }
7593 }
7594
7595 void MacroAssembler::cache_wbsync(bool is_pre) {
7596 // we only need a barrier post sync
7597 if (!is_pre) {
7598 membar(Assembler::AnyAny);
7599 }
7970 }
7971
7972 // Check if the lock-stack is full.
7973 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7974 cmpw(top, (unsigned)LockStack::end_offset());
7975 br(Assembler::GE, slow);
7976
7977 // Check for recursion.
7978 subw(t, top, oopSize);
7979 ldr(t, Address(rthread, t));
7980 cmp(obj, t);
7981 br(Assembler::EQ, push);
7982
7983 // Check header for monitor (0b10).
7984 tst(mark, markWord::monitor_value);
7985 br(Assembler::NE, slow);
7986
7987 // Try to lock. Transition lock bits 0b01 => 0b00
7988 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7989 orr(mark, mark, markWord::unlocked_value);
7990 // Mask inline_type bit such that we go to the slow path if object is an inline type
7991 andr(mark, mark, ~((int) markWord::inline_type_bit_in_place));
7992
7993 eor(t, mark, markWord::unlocked_value);
7994 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7995 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7996 br(Assembler::NE, slow);
7997
7998 bind(push);
7999 // After successful lock, push object on lock-stack.
8000 str(obj, Address(rthread, top));
8001 addw(top, top, oopSize);
8002 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
8003 }
8004
8005 // Implements fast-unlocking.
8006 //
8007 // - obj: the object to be unlocked
8008 // - t1, t2, t3: temporary registers
8009 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
8010 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
8011 // cmpxchg clobbers rscratch1.
8012 assert_different_registers(obj, t1, t2, t3, rscratch1);
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