9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "code/compiledIC.hpp"
30 #include "compiler/compileTask.hpp"
31 #include "compiler/disassembler.hpp"
32 #include "compiler/oopMap.hpp"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/cardTable.hpp"
37 #include "gc/shared/collectedHeap.hpp"
38 #include "gc/shared/tlab_globals.hpp"
39 #include "interpreter/bytecodeHistogram.hpp"
40 #include "interpreter/interpreter.hpp"
41 #include "interpreter/interpreterRuntime.hpp"
42 #include "jvm.h"
43 #include "memory/resourceArea.hpp"
44 #include "memory/universe.hpp"
45 #include "nativeInst_aarch64.hpp"
46 #include "oops/accessDecorators.hpp"
47 #include "oops/compressedKlass.inline.hpp"
48 #include "oops/compressedOops.inline.hpp"
49 #include "oops/klass.inline.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/icache.hpp"
52 #include "runtime/interfaceSupport.inline.hpp"
53 #include "runtime/javaThread.hpp"
54 #include "runtime/jniHandles.inline.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/globalDefinitions.hpp"
58 #include "utilities/integerCast.hpp"
59 #include "utilities/powerOfTwo.hpp"
60 #ifdef COMPILER1
61 #include "c1/c1_LIRAssembler.hpp"
62 #endif
63 #ifdef COMPILER2
64 #include "oops/oop.hpp"
65 #include "opto/compile.hpp"
66 #include "opto/node.hpp"
67 #include "opto/output.hpp"
68 #endif
69
70 #include <sys/types.h>
71
72 #ifdef PRODUCT
73 #define BLOCK_COMMENT(str) /* nothing */
74 #else
75 #define BLOCK_COMMENT(str) block_comment(str)
76 #endif
77 #define STOP(str) stop(str);
78 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
79
1991 ldarb(scratch, scratch);
1992 cmp(scratch, InstanceKlass::fully_initialized);
1993 br(Assembler::EQ, *L_fast_path);
1994
1995 // Fast path check: current thread is initializer thread
1996 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
1997 cmp(rthread, scratch);
1998
1999 if (L_slow_path == &L_fallthrough) {
2000 br(Assembler::EQ, *L_fast_path);
2001 bind(*L_slow_path);
2002 } else if (L_fast_path == &L_fallthrough) {
2003 br(Assembler::NE, *L_slow_path);
2004 bind(*L_fast_path);
2005 } else {
2006 Unimplemented();
2007 }
2008 }
2009
2010 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2011 if (!VerifyOops) return;
2012
2013 // Pass register number to verify_oop_subroutine
2014 const char* b = nullptr;
2015 {
2016 ResourceMark rm;
2017 stringStream ss;
2018 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2019 b = code_string(ss.as_string());
2020 }
2021 BLOCK_COMMENT("verify_oop {");
2022
2023 strip_return_address(); // This might happen within a stack frame.
2024 protect_return_address();
2025 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2026 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2027
2028 mov(r0, reg);
2029 movptr(rscratch1, (uintptr_t)(address)b);
2030
2031 // call indirectly to solve generation ordering problem
2032 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2033 ldr(rscratch2, Address(rscratch2));
2034 blr(rscratch2);
2035
2036 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2037 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2038 authenticate_return_address();
2039
2040 BLOCK_COMMENT("} verify_oop");
2041 }
2042
2043 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2044 if (!VerifyOops) return;
2045
2046 const char* b = nullptr;
2047 {
2048 ResourceMark rm;
2049 stringStream ss;
2050 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2051 b = code_string(ss.as_string());
2052 }
2053 BLOCK_COMMENT("verify_oop_addr {");
2054
2055 strip_return_address(); // This might happen within a stack frame.
2056 protect_return_address();
2057 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2058 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2059
2060 // addr may contain sp so we will have to adjust it based on the
2061 // pushes that we just did.
2062 if (addr.uses(sp)) {
2063 lea(r0, addr);
2064 ldr(r0, Address(r0, 4 * wordSize));
2274 call_VM_leaf_base(entry_point, 1);
2275 }
2276
2277 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2278 assert_different_registers(arg_1, c_rarg0);
2279 pass_arg0(this, arg_0);
2280 pass_arg1(this, arg_1);
2281 call_VM_leaf_base(entry_point, 2);
2282 }
2283
2284 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2285 Register arg_1, Register arg_2) {
2286 assert_different_registers(arg_1, c_rarg0);
2287 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2288 pass_arg0(this, arg_0);
2289 pass_arg1(this, arg_1);
2290 pass_arg2(this, arg_2);
2291 call_VM_leaf_base(entry_point, 3);
2292 }
2293
2294 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2295 pass_arg0(this, arg_0);
2296 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2297 }
2298
2299 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2300
2301 assert_different_registers(arg_0, c_rarg1);
2302 pass_arg1(this, arg_1);
2303 pass_arg0(this, arg_0);
2304 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2305 }
2306
2307 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2308 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2309 assert_different_registers(arg_1, c_rarg2);
2310 pass_arg2(this, arg_2);
2311 pass_arg1(this, arg_1);
2312 pass_arg0(this, arg_0);
2313 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2319 assert_different_registers(arg_2, c_rarg3);
2320 pass_arg3(this, arg_3);
2321 pass_arg2(this, arg_2);
2322 pass_arg1(this, arg_1);
2323 pass_arg0(this, arg_0);
2324 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2325 }
2326
2327 void MacroAssembler::null_check(Register reg, int offset) {
2328 if (needs_explicit_null_check(offset)) {
2329 // provoke OS null exception if reg is null by
2330 // accessing M[reg] w/o changing any registers
2331 // NOTE: this is plenty to provoke a segv
2332 ldr(zr, Address(reg));
2333 } else {
2334 // nothing to do, (later) access of M[reg + offset]
2335 // will provoke OS null exception if reg is null
2336 }
2337 }
2338
2339 // MacroAssembler protected routines needed to implement
2340 // public methods
2341
2342 void MacroAssembler::mov(Register r, Address dest) {
2343 code_section()->relocate(pc(), dest.rspec());
2344 uint64_t imm64 = (uint64_t)dest.target();
2345 movptr(r, imm64);
2346 }
2347
2348 // Move a constant pointer into r. In AArch64 mode the virtual
2349 // address space is 48 bits in size, so we only need three
2350 // instructions to create a patchable instruction sequence that can
2351 // reach anywhere.
2352 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2353 #ifndef PRODUCT
2354 {
2355 char buffer[64];
2356 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2357 block_comment(buffer);
2358 }
5057 adrp(rscratch1, src2, offset);
5058 ldr(rscratch1, Address(rscratch1, offset));
5059 cmp(src1, rscratch1);
5060 }
5061
5062 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5063 cmp(obj1, obj2);
5064 }
5065
5066 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5067 load_method_holder(rresult, rmethod);
5068 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5069 }
5070
5071 void MacroAssembler::load_method_holder(Register holder, Register method) {
5072 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5073 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5074 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5075 }
5076
5077 // Loads the obj's Klass* into dst.
5078 // Preserves all registers (incl src, rscratch1 and rscratch2).
5079 // Input:
5080 // src - the oop we want to load the klass from.
5081 // dst - output narrow klass.
5082 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5083 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5084 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5085 lsr(dst, dst, markWord::klass_shift);
5086 }
5087
5088 void MacroAssembler::load_klass(Register dst, Register src) {
5089 if (UseCompactObjectHeaders) {
5090 load_narrow_klass_compact(dst, src);
5091 } else {
5092 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5093 }
5094 decode_klass_not_null(dst);
5095 }
5096
5148 } else {
5149 ldrw(tmp, Address(obj, oopDesc::klass_offset_in_bytes()));
5150 }
5151 if (CompressedKlassPointers::base() == nullptr) {
5152 cmp(klass, tmp, LSL, CompressedKlassPointers::shift());
5153 return;
5154 } else if (!AOTCodeCache::is_on_for_dump() &&
5155 ((uint64_t)CompressedKlassPointers::base() & 0xffffffff) == 0
5156 && CompressedKlassPointers::shift() == 0) {
5157 // Only the bottom 32 bits matter
5158 cmpw(klass, tmp);
5159 return;
5160 }
5161 decode_klass_not_null(tmp);
5162 cmp(klass, tmp);
5163 }
5164
5165 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5166 if (UseCompactObjectHeaders) {
5167 load_narrow_klass_compact(tmp1, obj1);
5168 load_narrow_klass_compact(tmp2, obj2);
5169 } else {
5170 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5171 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5172 }
5173 cmpw(tmp1, tmp2);
5174 }
5175
5176 void MacroAssembler::store_klass(Register dst, Register src) {
5177 // FIXME: Should this be a store release? concurrent gcs assumes
5178 // klass length is valid if klass field is not null.
5179 assert(!UseCompactObjectHeaders, "not with compact headers");
5180 encode_klass_not_null(src);
5181 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5182 }
5183
5184 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5185 assert(!UseCompactObjectHeaders, "not with compact headers");
5186 // Store to klass gap in destination
5187 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5188 }
5189
5190 // Algorithm must match CompressedOops::encode.
5191 void MacroAssembler::encode_heap_oop(Register d, Register s) {
5192 #ifdef ASSERT
5193 verify_heapbase("MacroAssembler::encode_heap_oop: heap base corrupted?");
5194 #endif
5195 verify_oop_msg(s, "broken oop in encode_heap_oop");
5545 if (as_raw) {
5546 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5547 } else {
5548 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5549 }
5550 }
5551
5552 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5553 Address dst, Register val,
5554 Register tmp1, Register tmp2, Register tmp3) {
5555 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5556 decorators = AccessInternal::decorator_fixup(decorators, type);
5557 bool as_raw = (decorators & AS_RAW) != 0;
5558 if (as_raw) {
5559 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5560 } else {
5561 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5562 }
5563 }
5564
5565 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5566 Register tmp2, DecoratorSet decorators) {
5567 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5568 }
5569
5570 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5571 Register tmp2, DecoratorSet decorators) {
5572 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5573 }
5574
5575 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5576 Register tmp2, Register tmp3, DecoratorSet decorators) {
5577 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5578 }
5579
5580 // Used for storing nulls.
5581 void MacroAssembler::store_heap_oop_null(Address dst) {
5582 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5583 }
5584
5659 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5660 cmp(rscratch2, rscratch1);
5661 br(Assembler::HS, next);
5662 STOP("assert(top >= start)");
5663 should_not_reach_here();
5664
5665 bind(next);
5666 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5667 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5668 cmp(rscratch2, rscratch1);
5669 br(Assembler::HS, ok);
5670 STOP("assert(top <= end)");
5671 should_not_reach_here();
5672
5673 bind(ok);
5674 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5675 }
5676 #endif
5677 }
5678
5679 // Writes to stack successive pages until offset reached to check for
5680 // stack overflow + shadow pages. This clobbers tmp.
5681 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5682 assert_different_registers(tmp, size, rscratch1);
5683 mov(tmp, sp);
5684 // Bang stack for total size given plus shadow page size.
5685 // Bang one page at a time because large size can bang beyond yellow and
5686 // red zones.
5687 Label loop;
5688 mov(rscratch1, (int)os::vm_page_size());
5689 bind(loop);
5690 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5691 subsw(size, size, rscratch1);
5692 str(size, Address(tmp));
5693 br(Assembler::GT, loop);
5694
5695 // Bang down shadow pages too.
5696 // At this point, (tmp-0) is the last address touched, so don't
5697 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5698 // was post-decremented.) Skip this address by starting at i=1, and
5765
5766 // Strictly speaking the card table base isn't an address at all, and it might
5767 // even be negative. It is thus materialised as a constant.
5768 mov(reg, (uint64_t)ctbs->card_table_base_const());
5769 }
5770
5771 void MacroAssembler::load_aotrc_address(Register reg, address a) {
5772 #if INCLUDE_CDS
5773 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
5774 if (AOTCodeCache::is_on_for_dump()) {
5775 // all aotrc field addresses should be registered in the AOTCodeCache address table
5776 lea(reg, ExternalAddress(a));
5777 } else {
5778 mov(reg, (uint64_t)a);
5779 }
5780 #else
5781 ShouldNotReachHere();
5782 #endif
5783 }
5784
5785 void MacroAssembler::build_frame(int framesize) {
5786 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5787 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5788 protect_return_address();
5789 if (framesize < ((1 << 9) + 2 * wordSize)) {
5790 sub(sp, sp, framesize);
5791 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5792 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5793 } else {
5794 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5795 if (PreserveFramePointer) mov(rfp, sp);
5796 if (framesize < ((1 << 12) + 2 * wordSize))
5797 sub(sp, sp, framesize - 2 * wordSize);
5798 else {
5799 mov(rscratch1, framesize - 2 * wordSize);
5800 sub(sp, sp, rscratch1);
5801 }
5802 }
5803 verify_cross_modify_fence_not_required();
5804 }
5805
5806 void MacroAssembler::remove_frame(int framesize) {
5807 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5808 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5809 if (framesize < ((1 << 9) + 2 * wordSize)) {
5810 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5811 add(sp, sp, framesize);
5812 } else {
5813 if (framesize < ((1 << 12) + 2 * wordSize))
5814 add(sp, sp, framesize - 2 * wordSize);
5815 else {
5816 mov(rscratch1, framesize - 2 * wordSize);
5817 add(sp, sp, rscratch1);
5818 }
5819 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5820 }
5821 authenticate_return_address();
5822 }
5823
5824
5825 // This method counts leading positive bytes (highest bit not set) in provided byte array
5826 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
5827 // Simple and most common case of aligned small array which is not at the
5828 // end of memory page is placed here. All other cases are in stub.
5829 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
5830 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
5831 assert_different_registers(ary1, len, result);
5832
5833 mov(result, len);
5834 cmpw(len, 0);
5835 br(LE, DONE);
5836 cmpw(len, 4 * wordSize);
5837 br(GE, STUB_LONG); // size > 32 then go to stub
5838
5839 int shift = 64 - exact_log2(os::vm_page_size());
5840 lsl(rscratch1, ary1, shift);
5841 mov(rscratch2, (size_t)(4 * wordSize) << shift);
5842 adds(rscratch2, rscratch1, rscratch2); // At end of page?
5843 br(CS, STUB); // at the end of page then go to stub
6727 // On other systems, the helper is a usual C function.
6728 //
6729 void MacroAssembler::get_thread(Register dst) {
6730 RegSet saved_regs =
6731 BSD_ONLY(RegSet::range(r0, r17) + lr - dst)
6732 NOT_BSD (RegSet::range(r0, r1) + lr - dst);
6733
6734 protect_return_address();
6735 push(saved_regs, sp);
6736
6737 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6738 blr(lr);
6739 if (dst != c_rarg0) {
6740 mov(dst, c_rarg0);
6741 }
6742
6743 pop(saved_regs, sp);
6744 authenticate_return_address();
6745 }
6746
6747 void MacroAssembler::cache_wb(Address line) {
6748 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
6749 assert(line.index() == noreg, "index should be noreg");
6750 assert(line.offset() == 0, "offset should be 0");
6751 // would like to assert this
6752 // assert(line._ext.shift == 0, "shift should be zero");
6753 if (VM_Version::supports_dcpop()) {
6754 // writeback using clear virtual address to point of persistence
6755 dc(Assembler::CVAP, line.base());
6756 } else {
6757 // no need to generate anything as Unsafe.writebackMemory should
6758 // never invoke this stub
6759 }
6760 }
6761
6762 void MacroAssembler::cache_wbsync(bool is_pre) {
6763 // we only need a barrier post sync
6764 if (!is_pre) {
6765 membar(Assembler::AnyAny);
6766 }
7162 }
7163
7164 // Check if the lock-stack is full.
7165 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7166 cmpw(top, (unsigned)LockStack::end_offset());
7167 br(Assembler::GE, slow);
7168
7169 // Check for recursion.
7170 subw(t, top, oopSize);
7171 ldr(t, Address(rthread, t));
7172 cmp(obj, t);
7173 br(Assembler::EQ, push);
7174
7175 // Check header for monitor (0b10).
7176 tst(mark, markWord::monitor_value);
7177 br(Assembler::NE, slow);
7178
7179 // Try to lock. Transition lock bits 0b01 => 0b00
7180 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7181 orr(mark, mark, markWord::unlocked_value);
7182 eor(t, mark, markWord::unlocked_value);
7183 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7184 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7185 br(Assembler::NE, slow);
7186
7187 bind(push);
7188 // After successful lock, push object on lock-stack.
7189 str(obj, Address(rthread, top));
7190 addw(top, top, oopSize);
7191 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7192 }
7193
7194 // Implements fast-unlocking.
7195 //
7196 // - obj: the object to be unlocked
7197 // - t1, t2, t3: temporary registers
7198 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7199 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7200 // cmpxchg clobbers rscratch1.
7201 assert_different_registers(obj, t1, t2, t3, rscratch1);
|
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "ci/ciInlineKlass.hpp"
30 #include "code/compiledIC.hpp"
31 #include "compiler/compileTask.hpp"
32 #include "compiler/disassembler.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "gc/shared/cardTableBarrierSet.hpp"
37 #include "gc/shared/cardTable.hpp"
38 #include "gc/shared/collectedHeap.hpp"
39 #include "gc/shared/tlab_globals.hpp"
40 #include "interpreter/bytecodeHistogram.hpp"
41 #include "interpreter/interpreter.hpp"
42 #include "interpreter/interpreterRuntime.hpp"
43 #include "jvm.h"
44 #include "memory/resourceArea.hpp"
45 #include "memory/universe.hpp"
46 #include "nativeInst_aarch64.hpp"
47 #include "oops/accessDecorators.hpp"
48 #include "oops/compressedKlass.inline.hpp"
49 #include "oops/compressedOops.inline.hpp"
50 #include "oops/klass.inline.hpp"
51 #include "oops/resolvedFieldEntry.hpp"
52 #include "runtime/arguments.hpp"
53 #include "runtime/continuation.hpp"
54 #include "runtime/globals.hpp"
55 #include "runtime/icache.hpp"
56 #include "runtime/interfaceSupport.inline.hpp"
57 #include "runtime/javaThread.hpp"
58 #include "runtime/jniHandles.inline.hpp"
59 #include "runtime/sharedRuntime.hpp"
60 #include "runtime/signature_cc.hpp"
61 #include "runtime/stubRoutines.hpp"
62 #include "utilities/globalDefinitions.hpp"
63 #include "utilities/integerCast.hpp"
64 #include "utilities/powerOfTwo.hpp"
65 #include "vmreg_aarch64.inline.hpp"
66 #ifdef COMPILER1
67 #include "c1/c1_LIRAssembler.hpp"
68 #endif
69 #ifdef COMPILER2
70 #include "oops/oop.hpp"
71 #include "opto/compile.hpp"
72 #include "opto/node.hpp"
73 #include "opto/output.hpp"
74 #endif
75
76 #include <sys/types.h>
77
78 #ifdef PRODUCT
79 #define BLOCK_COMMENT(str) /* nothing */
80 #else
81 #define BLOCK_COMMENT(str) block_comment(str)
82 #endif
83 #define STOP(str) stop(str);
84 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
85
1997 ldarb(scratch, scratch);
1998 cmp(scratch, InstanceKlass::fully_initialized);
1999 br(Assembler::EQ, *L_fast_path);
2000
2001 // Fast path check: current thread is initializer thread
2002 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2003 cmp(rthread, scratch);
2004
2005 if (L_slow_path == &L_fallthrough) {
2006 br(Assembler::EQ, *L_fast_path);
2007 bind(*L_slow_path);
2008 } else if (L_fast_path == &L_fallthrough) {
2009 br(Assembler::NE, *L_slow_path);
2010 bind(*L_fast_path);
2011 } else {
2012 Unimplemented();
2013 }
2014 }
2015
2016 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2017 if (!VerifyOops || VerifyAdapterSharing) {
2018 // Below address of the code string confuses VerifyAdapterSharing
2019 // because it may differ between otherwise equivalent adapters.
2020 return;
2021 }
2022
2023 // Pass register number to verify_oop_subroutine
2024 const char* b = nullptr;
2025 {
2026 ResourceMark rm;
2027 stringStream ss;
2028 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2029 b = code_string(ss.as_string());
2030 }
2031 BLOCK_COMMENT("verify_oop {");
2032
2033 strip_return_address(); // This might happen within a stack frame.
2034 protect_return_address();
2035 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2036 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2037
2038 mov(r0, reg);
2039 movptr(rscratch1, (uintptr_t)(address)b);
2040
2041 // call indirectly to solve generation ordering problem
2042 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2043 ldr(rscratch2, Address(rscratch2));
2044 blr(rscratch2);
2045
2046 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2047 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2048 authenticate_return_address();
2049
2050 BLOCK_COMMENT("} verify_oop");
2051 }
2052
2053 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2054 if (!VerifyOops || VerifyAdapterSharing) {
2055 // Below address of the code string confuses VerifyAdapterSharing
2056 // because it may differ between otherwise equivalent adapters.
2057 return;
2058 }
2059
2060 const char* b = nullptr;
2061 {
2062 ResourceMark rm;
2063 stringStream ss;
2064 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2065 b = code_string(ss.as_string());
2066 }
2067 BLOCK_COMMENT("verify_oop_addr {");
2068
2069 strip_return_address(); // This might happen within a stack frame.
2070 protect_return_address();
2071 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2072 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2073
2074 // addr may contain sp so we will have to adjust it based on the
2075 // pushes that we just did.
2076 if (addr.uses(sp)) {
2077 lea(r0, addr);
2078 ldr(r0, Address(r0, 4 * wordSize));
2288 call_VM_leaf_base(entry_point, 1);
2289 }
2290
2291 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2292 assert_different_registers(arg_1, c_rarg0);
2293 pass_arg0(this, arg_0);
2294 pass_arg1(this, arg_1);
2295 call_VM_leaf_base(entry_point, 2);
2296 }
2297
2298 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2299 Register arg_1, Register arg_2) {
2300 assert_different_registers(arg_1, c_rarg0);
2301 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2302 pass_arg0(this, arg_0);
2303 pass_arg1(this, arg_1);
2304 pass_arg2(this, arg_2);
2305 call_VM_leaf_base(entry_point, 3);
2306 }
2307
2308 void MacroAssembler::super_call_VM_leaf(address entry_point) {
2309 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2310 }
2311
2312 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2313 pass_arg0(this, arg_0);
2314 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2315 }
2316
2317 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2318
2319 assert_different_registers(arg_0, c_rarg1);
2320 pass_arg1(this, arg_1);
2321 pass_arg0(this, arg_0);
2322 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2323 }
2324
2325 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2326 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2327 assert_different_registers(arg_1, c_rarg2);
2328 pass_arg2(this, arg_2);
2329 pass_arg1(this, arg_1);
2330 pass_arg0(this, arg_0);
2331 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2337 assert_different_registers(arg_2, c_rarg3);
2338 pass_arg3(this, arg_3);
2339 pass_arg2(this, arg_2);
2340 pass_arg1(this, arg_1);
2341 pass_arg0(this, arg_0);
2342 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2343 }
2344
2345 void MacroAssembler::null_check(Register reg, int offset) {
2346 if (needs_explicit_null_check(offset)) {
2347 // provoke OS null exception if reg is null by
2348 // accessing M[reg] w/o changing any registers
2349 // NOTE: this is plenty to provoke a segv
2350 ldr(zr, Address(reg));
2351 } else {
2352 // nothing to do, (later) access of M[reg + offset]
2353 // will provoke OS null exception if reg is null
2354 }
2355 }
2356
2357 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2358 assert_different_registers(markword, rscratch2);
2359 mov(rscratch2, markWord::inline_type_pattern_mask);
2360 andr(markword, markword, rscratch2);
2361 mov(rscratch2, markWord::inline_type_pattern);
2362 cmp(markword, rscratch2);
2363 br(Assembler::EQ, is_inline_type);
2364 }
2365
2366 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2367 assert_different_registers(tmp, rscratch1);
2368 if (can_be_null) {
2369 cbz(object, not_inline_type);
2370 }
2371 const int is_inline_type_mask = markWord::inline_type_pattern;
2372 ldr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2373 mov(rscratch1, is_inline_type_mask);
2374 andr(tmp, tmp, rscratch1);
2375 cmp(tmp, rscratch1);
2376 br(Assembler::NE, not_inline_type);
2377 }
2378
2379 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2380 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2381 tbnz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, is_null_free_inline_type);
2382 }
2383
2384 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2385 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2386 tbz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, not_null_free_inline_type);
2387 }
2388
2389 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2390 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2391 tbnz(flags, ResolvedFieldEntry::is_flat_shift, is_flat);
2392 }
2393
2394 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2395 // load mark word
2396 ldr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2397 if (!UseObjectMonitorTable) {
2398 Label test_mark_word;
2399 // check displaced
2400 tst(temp_reg, markWord::unlocked_value);
2401 br(Assembler::NE, test_mark_word);
2402 // slow path use klass prototype
2403 load_prototype_header(temp_reg, oop);
2404
2405 bind(test_mark_word);
2406 }
2407 andr(temp_reg, temp_reg, test_bit);
2408 if (jmp_set) {
2409 cbnz(temp_reg, jmp_label);
2410 } else {
2411 cbz(temp_reg, jmp_label);
2412 }
2413 }
2414
2415 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array) {
2416 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2417 }
2418
2419 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2420 Label&is_non_flat_array) {
2421 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2422 }
2423
2424 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array) {
2425 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2426 }
2427
2428 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2429 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2430 }
2431
2432 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2433 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2434 br(Assembler::NE, is_flat_array);
2435 }
2436
2437 // MacroAssembler protected routines needed to implement
2438 // public methods
2439
2440 void MacroAssembler::mov(Register r, Address dest) {
2441 code_section()->relocate(pc(), dest.rspec());
2442 uint64_t imm64 = (uint64_t)dest.target();
2443 movptr(r, imm64);
2444 }
2445
2446 // Move a constant pointer into r. In AArch64 mode the virtual
2447 // address space is 48 bits in size, so we only need three
2448 // instructions to create a patchable instruction sequence that can
2449 // reach anywhere.
2450 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2451 #ifndef PRODUCT
2452 {
2453 char buffer[64];
2454 os::snprintf_checked(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2455 block_comment(buffer);
2456 }
5155 adrp(rscratch1, src2, offset);
5156 ldr(rscratch1, Address(rscratch1, offset));
5157 cmp(src1, rscratch1);
5158 }
5159
5160 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5161 cmp(obj1, obj2);
5162 }
5163
5164 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5165 load_method_holder(rresult, rmethod);
5166 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5167 }
5168
5169 void MacroAssembler::load_method_holder(Register holder, Register method) {
5170 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5171 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5172 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5173 }
5174
5175 void MacroAssembler::load_metadata(Register dst, Register src) {
5176 if (UseCompactObjectHeaders) {
5177 load_narrow_klass_compact(dst, src);
5178 } else {
5179 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5180 }
5181 }
5182
5183 // Loads the obj's Klass* into dst.
5184 // Preserves all registers (incl src, rscratch1 and rscratch2).
5185 // Input:
5186 // src - the oop we want to load the klass from.
5187 // dst - output narrow klass.
5188 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5189 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5190 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5191 lsr(dst, dst, markWord::klass_shift);
5192 }
5193
5194 void MacroAssembler::load_klass(Register dst, Register src) {
5195 if (UseCompactObjectHeaders) {
5196 load_narrow_klass_compact(dst, src);
5197 } else {
5198 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5199 }
5200 decode_klass_not_null(dst);
5201 }
5202
5254 } else {
5255 ldrw(tmp, Address(obj, oopDesc::klass_offset_in_bytes()));
5256 }
5257 if (CompressedKlassPointers::base() == nullptr) {
5258 cmp(klass, tmp, LSL, CompressedKlassPointers::shift());
5259 return;
5260 } else if (!AOTCodeCache::is_on_for_dump() &&
5261 ((uint64_t)CompressedKlassPointers::base() & 0xffffffff) == 0
5262 && CompressedKlassPointers::shift() == 0) {
5263 // Only the bottom 32 bits matter
5264 cmpw(klass, tmp);
5265 return;
5266 }
5267 decode_klass_not_null(tmp);
5268 cmp(klass, tmp);
5269 }
5270
5271 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5272 if (UseCompactObjectHeaders) {
5273 load_narrow_klass_compact(tmp1, obj1);
5274 load_narrow_klass_compact(tmp2, obj2);
5275 } else {
5276 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5277 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5278 }
5279 cmpw(tmp1, tmp2);
5280 }
5281
5282 void MacroAssembler::load_prototype_header(Register dst, Register src) {
5283 load_klass(dst, src);
5284 ldr(dst, Address(dst, Klass::prototype_header_offset()));
5285 }
5286
5287 void MacroAssembler::store_klass(Register dst, Register src) {
5288 // FIXME: Should this be a store release? concurrent gcs assumes
5289 // klass length is valid if klass field is not null.
5290 assert(!UseCompactObjectHeaders, "not with compact headers");
5291 encode_klass_not_null(src);
5292 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5293 }
5294
5295 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5296 assert(!UseCompactObjectHeaders, "not with compact headers");
5297 // Store to klass gap in destination
5298 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5299 }
5300
5301 // Algorithm must match CompressedOops::encode.
5302 void MacroAssembler::encode_heap_oop(Register d, Register s) {
5303 #ifdef ASSERT
5304 verify_heapbase("MacroAssembler::encode_heap_oop: heap base corrupted?");
5305 #endif
5306 verify_oop_msg(s, "broken oop in encode_heap_oop");
5656 if (as_raw) {
5657 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5658 } else {
5659 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5660 }
5661 }
5662
5663 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5664 Address dst, Register val,
5665 Register tmp1, Register tmp2, Register tmp3) {
5666 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5667 decorators = AccessInternal::decorator_fixup(decorators, type);
5668 bool as_raw = (decorators & AS_RAW) != 0;
5669 if (as_raw) {
5670 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5671 } else {
5672 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5673 }
5674 }
5675
5676 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5677 Register inline_layout_info) {
5678 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5679 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5680 }
5681
5682 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5683 ldr(offset, Address(inline_klass, InlineKlass::adr_members_offset()));
5684 ldrw(offset, Address(offset, InlineKlass::payload_offset_offset()));
5685 }
5686
5687 void MacroAssembler::payload_address(Register oop, Register data, Register inline_klass) {
5688 // ((address) (void*) o) + vk->payload_offset();
5689 Register offset = (data == oop) ? rscratch1 : data;
5690 payload_offset(inline_klass, offset);
5691 if (data == oop) {
5692 add(data, data, offset);
5693 } else {
5694 lea(data, Address(oop, offset));
5695 }
5696 }
5697
5698 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5699 Register tmp2, DecoratorSet decorators) {
5700 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5701 }
5702
5703 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5704 Register tmp2, DecoratorSet decorators) {
5705 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5706 }
5707
5708 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5709 Register tmp2, Register tmp3, DecoratorSet decorators) {
5710 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5711 }
5712
5713 // Used for storing nulls.
5714 void MacroAssembler::store_heap_oop_null(Address dst) {
5715 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5716 }
5717
5792 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5793 cmp(rscratch2, rscratch1);
5794 br(Assembler::HS, next);
5795 STOP("assert(top >= start)");
5796 should_not_reach_here();
5797
5798 bind(next);
5799 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5800 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5801 cmp(rscratch2, rscratch1);
5802 br(Assembler::HS, ok);
5803 STOP("assert(top <= end)");
5804 should_not_reach_here();
5805
5806 bind(ok);
5807 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5808 }
5809 #endif
5810 }
5811
5812 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
5813 assert_different_registers(holder_klass, index, layout_info);
5814 InlineLayoutInfo array[2];
5815 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
5816 if (is_power_of_2(size)) {
5817 lsl(index, index, log2i_exact(size)); // Scale index by power of 2
5818 } else {
5819 mov(layout_info, size);
5820 mul(index, index, layout_info); // Scale the index to be the entry index * array_element_size
5821 }
5822 ldr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
5823 add(layout_info, layout_info, Array<InlineLayoutInfo>::base_offset_in_bytes());
5824 lea(layout_info, Address(layout_info, index));
5825 }
5826
5827 // Writes to stack successive pages until offset reached to check for
5828 // stack overflow + shadow pages. This clobbers tmp.
5829 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5830 assert_different_registers(tmp, size, rscratch1);
5831 mov(tmp, sp);
5832 // Bang stack for total size given plus shadow page size.
5833 // Bang one page at a time because large size can bang beyond yellow and
5834 // red zones.
5835 Label loop;
5836 mov(rscratch1, (int)os::vm_page_size());
5837 bind(loop);
5838 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5839 subsw(size, size, rscratch1);
5840 str(size, Address(tmp));
5841 br(Assembler::GT, loop);
5842
5843 // Bang down shadow pages too.
5844 // At this point, (tmp-0) is the last address touched, so don't
5845 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5846 // was post-decremented.) Skip this address by starting at i=1, and
5913
5914 // Strictly speaking the card table base isn't an address at all, and it might
5915 // even be negative. It is thus materialised as a constant.
5916 mov(reg, (uint64_t)ctbs->card_table_base_const());
5917 }
5918
5919 void MacroAssembler::load_aotrc_address(Register reg, address a) {
5920 #if INCLUDE_CDS
5921 assert(AOTRuntimeConstants::contains(a), "address out of range for data area");
5922 if (AOTCodeCache::is_on_for_dump()) {
5923 // all aotrc field addresses should be registered in the AOTCodeCache address table
5924 lea(reg, ExternalAddress(a));
5925 } else {
5926 mov(reg, (uint64_t)a);
5927 }
5928 #else
5929 ShouldNotReachHere();
5930 #endif
5931 }
5932
5933 #ifdef ASSERT
5934 void MacroAssembler::build_frame(int framesize) {
5935 build_frame(framesize, false);
5936 }
5937 #endif
5938
5939 void MacroAssembler::build_frame(int framesize DEBUG_ONLY(COMMA bool zap_rfp_lr_spills)) {
5940 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5941 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5942 protect_return_address();
5943 if (framesize < ((1 << 9) + 2 * wordSize)) {
5944 sub(sp, sp, framesize);
5945 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
5946 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
5947 stp(rscratch1, rscratch1, Address(sp, framesize - 2 * wordSize));
5948 } else {
5949 stp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5950 }
5951 if (PreserveFramePointer) add(rfp, sp, framesize - 2 * wordSize);
5952 } else {
5953 if (DEBUG_ONLY(zap_rfp_lr_spills ||) false) {
5954 mov_immediate64(rscratch1, ((uint64_t)badRegWordVal) << 32 | (uint64_t)badRegWordVal);
5955 stp(rscratch1, rscratch1, Address(pre(sp, -2 * wordSize)));
5956 } else {
5957 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
5958 }
5959 if (PreserveFramePointer) mov(rfp, sp);
5960 if (framesize < ((1 << 12) + 2 * wordSize))
5961 sub(sp, sp, framesize - 2 * wordSize);
5962 else {
5963 mov(rscratch1, framesize - 2 * wordSize);
5964 sub(sp, sp, rscratch1);
5965 }
5966 }
5967 verify_cross_modify_fence_not_required();
5968 }
5969
5970 void MacroAssembler::remove_frame(int framesize) {
5971 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5972 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5973 if (framesize < ((1 << 9) + 2 * wordSize)) {
5974 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5975 add(sp, sp, framesize);
5976 } else {
5977 if (framesize < ((1 << 12) + 2 * wordSize))
5978 add(sp, sp, framesize - 2 * wordSize);
5979 else {
5980 mov(rscratch1, framesize - 2 * wordSize);
5981 add(sp, sp, rscratch1);
5982 }
5983 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5984 }
5985 authenticate_return_address();
5986 }
5987
5988 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
5989 if (needs_stack_repair) {
5990 // The method has a scalarized entry point (where fields of value object arguments
5991 // are passed through registers and stack), and a non-scalarized entry point (where
5992 // value object arguments are given as oops). The non-scalarized entry point will
5993 // first load each field of value object arguments and store them in registers and on
5994 // the stack in a way compatible with the scalarized entry point. To do so, some extra
5995 // stack space might be reserved (if argument registers are not enough). On leaving the
5996 // method, this space must be freed.
5997 //
5998 // In case we used the non-scalarized entry point the stack looks like this:
5999 //
6000 // | Arguments from caller |
6001 // |---------------------------| <-- caller's SP
6002 // | Saved LR #1 |
6003 // | Saved FP #1 |
6004 // |---------------------------|
6005 // | Extension space for |
6006 // | inline arg (un)packing |
6007 // |---------------------------| <-- start of this method's frame
6008 // | Saved LR #2 |
6009 // | Saved FP #2 |
6010 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6011 // | sp_inc |
6012 // | method locals |
6013 // |---------------------------| <-- SP
6014 //
6015 // There are two copies of FP and LR on the stack. They will be identical at
6016 // first, but that can change.
6017 // If the caller has been deoptimized, LR #1 will be patched to point at the
6018 // deopt blob, and LR #2 will still point into the old method.
6019 // If the saved FP (x29) was not used as the frame pointer, but to store an
6020 // oop, the GC will be aware only of FP #1 as the spilled location of x29 and
6021 // will fix only this one. Overall, FP/LR #2 are not reliable and are simply
6022 // needed to add space between the extension space and the locals, as there
6023 // would be between the real arguments and the locals if we don't need to
6024 // do unpacking (from the scalarized entry point).
6025 //
6026 // When restoring, one must then load FP #1 into x29, and LR #1 into x30,
6027 // while keeping in mind that from the scalarized entry point, there will be
6028 // only one copy of each. Indeed, in the case we used the scalarized calling
6029 // convention, the stack looks like this:
6030 //
6031 // | Arguments from caller |
6032 // |---------------------------| <-- caller's SP / start of this method's frame
6033 // | Saved LR |
6034 // | Saved FP |
6035 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6036 // | sp_inc |
6037 // | method locals |
6038 // |---------------------------| <-- SP
6039 //
6040 // The sp_inc stack slot holds the total size of the frame including the
6041 // extension space minus two words for the saved FP and LR. That is how to
6042 // find FP/LR #1. This size is expressed in bytes. Be careful when using it
6043 // from C++ in pointer arithmetic; you might need to divide it by wordSize.
6044 //
6045 // One can find sp_inc since the start the method's frame is SP + initial_framesize.
6046
6047 int sp_inc_offset = initial_framesize - 3 * wordSize; // Immediately below saved LR and FP
6048
6049 ldr(rscratch1, Address(sp, sp_inc_offset));
6050 add(sp, sp, rscratch1);
6051 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6052 } else {
6053 remove_frame(initial_framesize);
6054 }
6055 }
6056
6057 void MacroAssembler::save_stack_increment(int sp_inc, int frame_size) {
6058 int real_frame_size = frame_size + sp_inc;
6059 assert(sp_inc == 0 || sp_inc > 2*wordSize, "invalid sp_inc value");
6060 assert(real_frame_size >= 2*wordSize, "frame size must include FP/LR space");
6061 assert((real_frame_size & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6062
6063 int sp_inc_offset = frame_size - 3 * wordSize; // Immediately below saved LR and FP
6064
6065 // Subtract two words for the saved FP and LR as these will be popped
6066 // separately. See remove_frame above.
6067 mov(rscratch1, real_frame_size - 2*wordSize);
6068 str(rscratch1, Address(sp, sp_inc_offset));
6069 }
6070
6071 // This method counts leading positive bytes (highest bit not set) in provided byte array
6072 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
6073 // Simple and most common case of aligned small array which is not at the
6074 // end of memory page is placed here. All other cases are in stub.
6075 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
6076 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
6077 assert_different_registers(ary1, len, result);
6078
6079 mov(result, len);
6080 cmpw(len, 0);
6081 br(LE, DONE);
6082 cmpw(len, 4 * wordSize);
6083 br(GE, STUB_LONG); // size > 32 then go to stub
6084
6085 int shift = 64 - exact_log2(os::vm_page_size());
6086 lsl(rscratch1, ary1, shift);
6087 mov(rscratch2, (size_t)(4 * wordSize) << shift);
6088 adds(rscratch2, rscratch1, rscratch2); // At end of page?
6089 br(CS, STUB); // at the end of page then go to stub
6973 // On other systems, the helper is a usual C function.
6974 //
6975 void MacroAssembler::get_thread(Register dst) {
6976 RegSet saved_regs =
6977 BSD_ONLY(RegSet::range(r0, r17) + lr - dst)
6978 NOT_BSD (RegSet::range(r0, r1) + lr - dst);
6979
6980 protect_return_address();
6981 push(saved_regs, sp);
6982
6983 mov(lr, ExternalAddress(CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)));
6984 blr(lr);
6985 if (dst != c_rarg0) {
6986 mov(dst, c_rarg0);
6987 }
6988
6989 pop(saved_regs, sp);
6990 authenticate_return_address();
6991 }
6992
6993 #ifdef COMPILER2
6994 // C2 compiled method's prolog code
6995 // Moved here from aarch64.ad to support Valhalla code below
6996 void MacroAssembler::verified_entry(Compile* C, int sp_inc) {
6997 if (C->clinit_barrier_on_entry()) {
6998 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
6999
7000 Label L_skip_barrier;
7001
7002 mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
7003 clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
7004 far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
7005 bind(L_skip_barrier);
7006 }
7007
7008 if (C->max_vector_size() > 0) {
7009 reinitialize_ptrue();
7010 }
7011
7012 int bangsize = C->output()->bang_size_in_bytes();
7013 if (C->output()->need_stack_bang(bangsize))
7014 generate_stack_overflow_check(bangsize);
7015
7016 // n.b. frame size includes space for return pc and rfp
7017 const long framesize = C->output()->frame_size_in_bytes();
7018 build_frame(framesize DEBUG_ONLY(COMMA sp_inc != 0));
7019
7020 if (C->needs_stack_repair()) {
7021 save_stack_increment(sp_inc, framesize);
7022 }
7023
7024 if (VerifyStackAtCalls) {
7025 Unimplemented();
7026 }
7027 }
7028 #endif // COMPILER2
7029
7030 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
7031 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
7032 // An inline type might be returned. If fields are in registers we
7033 // need to allocate an inline type instance and initialize it with
7034 // the value of the fields.
7035 Label skip;
7036 // We only need a new buffered inline type if a new one is not returned
7037 tbz(r0, 0, skip);
7038 int call_offset = -1;
7039
7040 // Be careful not to clobber r1-7 which hold returned fields
7041 // Also do not use callee-saved registers as these may be live in the interpreter
7042 Register tmp1 = r13, tmp2 = r14, klass = r15, r0_preserved = r12;
7043
7044 // The following code is similar to the instance allocation code in TemplateTable::_new
7045 // but has some slight differences,
7046 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
7047 // allocating is not necessary if vk != nullptr, etc.
7048 Label slow_case;
7049 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
7050 mov(r0_preserved, r0); // save r0 for slow_case since *_allocate may corrupt it when allocation failed
7051
7052 if (vk != nullptr) {
7053 // Called from C1, where the return type is statically known.
7054 movptr(klass, (intptr_t)vk->get_InlineKlass());
7055 jint lh = vk->layout_helper();
7056 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
7057 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
7058 tlab_allocate(r0, noreg, lh, tmp1, tmp2, slow_case);
7059 } else {
7060 b(slow_case);
7061 }
7062 } else {
7063 // Call from interpreter. R0 contains ((the InlineKlass* of the return type) | 0x01)
7064 andr(klass, r0, -2);
7065 if (UseTLAB) {
7066 ldrw(tmp2, Address(klass, Klass::layout_helper_offset()));
7067 tst(tmp2, Klass::_lh_instance_slow_path_bit);
7068 br(Assembler::NE, slow_case);
7069 tlab_allocate(r0, tmp2, 0, tmp1, tmp2, slow_case);
7070 } else {
7071 b(slow_case);
7072 }
7073 }
7074 if (UseTLAB) {
7075 // 2. Initialize buffered inline instance header
7076 Register buffer_obj = r0;
7077 if (UseCompactObjectHeaders) {
7078 ldr(rscratch1, Address(klass, Klass::prototype_header_offset()));
7079 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7080 } else {
7081 mov(rscratch1, (intptr_t)markWord::inline_type_prototype().value());
7082 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7083 store_klass_gap(buffer_obj, zr);
7084 if (vk == nullptr) {
7085 // store_klass corrupts klass, so save it for later use (interpreter case only).
7086 mov(tmp1, klass);
7087 }
7088 store_klass(buffer_obj, klass);
7089 klass = tmp1;
7090 }
7091 // 3. Initialize its fields with an inline class specific handler
7092 if (vk != nullptr) {
7093 far_call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
7094 } else {
7095 ldr(tmp1, Address(klass, InlineKlass::adr_members_offset()));
7096 ldr(tmp1, Address(tmp1, InlineKlass::pack_handler_offset()));
7097 blr(tmp1);
7098 }
7099
7100 membar(Assembler::StoreStore);
7101 b(skip);
7102 } else {
7103 // Must have already branched to slow_case above.
7104 DEBUG_ONLY(should_not_reach_here());
7105 }
7106 bind(slow_case);
7107 // We failed to allocate a new inline type, fall back to a runtime
7108 // call. Some oop field may be live in some registers but we can't
7109 // tell. That runtime call will take care of preserving them
7110 // across a GC if there's one.
7111 mov(r0, r0_preserved);
7112
7113 if (from_interpreter) {
7114 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
7115 } else {
7116 far_call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
7117 call_offset = offset();
7118 }
7119 membar(Assembler::StoreStore);
7120
7121 bind(skip);
7122 return call_offset;
7123 }
7124
7125 // Move a value between registers/stack slots and update the reg_state
7126 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
7127 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
7128 if (reg_state[to->value()] == reg_written) {
7129 return true; // Already written
7130 }
7131
7132 if (from != to && bt != T_VOID) {
7133 if (reg_state[to->value()] == reg_readonly) {
7134 return false; // Not yet writable
7135 }
7136 if (from->is_reg()) {
7137 if (to->is_reg()) {
7138 if (from->is_Register() && to->is_Register()) {
7139 mov(to->as_Register(), from->as_Register());
7140 } else if (from->is_FloatRegister() && to->is_FloatRegister()) {
7141 fmovd(to->as_FloatRegister(), from->as_FloatRegister());
7142 } else {
7143 ShouldNotReachHere();
7144 }
7145 } else {
7146 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7147 Address to_addr = Address(sp, st_off);
7148 if (from->is_FloatRegister()) {
7149 if (bt == T_DOUBLE) {
7150 strd(from->as_FloatRegister(), to_addr);
7151 } else {
7152 assert(bt == T_FLOAT, "must be float");
7153 strs(from->as_FloatRegister(), to_addr);
7154 }
7155 } else {
7156 str(from->as_Register(), to_addr);
7157 }
7158 }
7159 } else {
7160 Address from_addr = Address(sp, from->reg2stack() * VMRegImpl::stack_slot_size);
7161 if (to->is_reg()) {
7162 if (to->is_FloatRegister()) {
7163 if (bt == T_DOUBLE) {
7164 ldrd(to->as_FloatRegister(), from_addr);
7165 } else {
7166 assert(bt == T_FLOAT, "must be float");
7167 ldrs(to->as_FloatRegister(), from_addr);
7168 }
7169 } else {
7170 ldr(to->as_Register(), from_addr);
7171 }
7172 } else {
7173 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7174 ldr(rscratch1, from_addr);
7175 str(rscratch1, Address(sp, st_off));
7176 }
7177 }
7178 }
7179
7180 // Update register states
7181 reg_state[from->value()] = reg_writable;
7182 reg_state[to->value()] = reg_written;
7183 return true;
7184 }
7185
7186 // Calculate the extra stack space required for packing or unpacking inline
7187 // args and adjust the stack pointer
7188 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
7189 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
7190 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
7191 assert(sp_inc > 0, "sanity");
7192
7193 // Save a copy of the FP and LR here for deoptimization patching and frame walking
7194 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
7195
7196 // Adjust the stack pointer. This will be repaired on return by MacroAssembler::remove_frame
7197 if (sp_inc < (1 << 9)) {
7198 sub(sp, sp, sp_inc); // Fits in an immediate
7199 } else {
7200 mov(rscratch1, sp_inc);
7201 sub(sp, sp, rscratch1);
7202 }
7203
7204 return sp_inc + 2 * wordSize; // Account for the FP/LR space
7205 }
7206
7207 // Read all fields from an inline type oop and store the values in registers/stack slots
7208 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
7209 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
7210 RegState reg_state[]) {
7211 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
7212 assert(from->is_valid(), "source must be valid");
7213 bool progress = false;
7214 #ifdef ASSERT
7215 const int start_offset = offset();
7216 #endif
7217
7218 Label L_null, L_notNull;
7219 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
7220 Register tmp1 = r10;
7221 Register tmp2 = r11;
7222
7223 #ifdef ASSERT
7224 RegSet clobbered_gp_regs = MacroAssembler::call_clobbered_gp_registers();
7225 assert(clobbered_gp_regs.contains(tmp1), "tmp1 must be saved explicitly if it's not a clobber");
7226 assert(clobbered_gp_regs.contains(tmp2), "tmp2 must be saved explicitly if it's not a clobber");
7227 assert(clobbered_gp_regs.contains(r14), "r14 must be saved explicitly if it's not a clobber");
7228 #endif
7229
7230 Register fromReg = noreg;
7231 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
7232 bool done = true;
7233 bool mark_done = true;
7234 VMReg toReg;
7235 BasicType bt;
7236 // Check if argument requires a null check
7237 bool null_check = false;
7238 VMReg nullCheckReg;
7239 while (stream.next(nullCheckReg, bt)) {
7240 if (sig->at(stream.sig_index())._offset == -1) {
7241 null_check = true;
7242 break;
7243 }
7244 }
7245 stream.reset(sig_index, to_index);
7246 while (stream.next(toReg, bt)) {
7247 assert(toReg->is_valid(), "destination must be valid");
7248 int idx = (int)toReg->value();
7249 if (reg_state[idx] == reg_readonly) {
7250 if (idx != from->value()) {
7251 mark_done = false;
7252 }
7253 done = false;
7254 continue;
7255 } else if (reg_state[idx] == reg_written) {
7256 continue;
7257 }
7258 assert(reg_state[idx] == reg_writable, "must be writable");
7259 reg_state[idx] = reg_written;
7260 progress = true;
7261
7262 if (fromReg == noreg) {
7263 if (from->is_reg()) {
7264 fromReg = from->as_Register();
7265 } else {
7266 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size;
7267 ldr(tmp1, Address(sp, st_off));
7268 fromReg = tmp1;
7269 }
7270 if (null_check) {
7271 // Nullable inline type argument, emit null check
7272 cbz(fromReg, L_null);
7273 }
7274 }
7275 int off = sig->at(stream.sig_index())._offset;
7276 if (off == -1) {
7277 assert(null_check, "Missing null check at");
7278 if (toReg->is_stack()) {
7279 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7280 mov(tmp2, 1);
7281 str(tmp2, Address(sp, st_off));
7282 } else {
7283 mov(toReg->as_Register(), 1);
7284 }
7285 continue;
7286 }
7287 if (sig->at(stream.sig_index())._vt_oop) {
7288 if (toReg->is_stack()) {
7289 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7290 str(fromReg, Address(sp, st_off));
7291 } else {
7292 mov(toReg->as_Register(), fromReg);
7293 }
7294 continue;
7295 }
7296 assert(off > 0, "offset in object should be positive");
7297 Address fromAddr = Address(fromReg, off);
7298 if (!toReg->is_FloatRegister()) {
7299 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
7300 if (is_reference_type(bt)) {
7301 load_heap_oop(dst, fromAddr, rscratch1, rscratch2);
7302 } else {
7303 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
7304 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
7305 }
7306 if (toReg->is_stack()) {
7307 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7308 str(dst, Address(sp, st_off));
7309 }
7310 } else if (bt == T_DOUBLE) {
7311 ldrd(toReg->as_FloatRegister(), fromAddr);
7312 } else {
7313 assert(bt == T_FLOAT, "must be float");
7314 ldrs(toReg->as_FloatRegister(), fromAddr);
7315 }
7316 }
7317 if (progress && null_check) {
7318 if (done) {
7319 b(L_notNull);
7320 bind(L_null);
7321 // Set null marker to zero to signal that the argument is null.
7322 // Also set all fields to zero since the runtime requires a canonical
7323 // representation of a flat null.
7324 stream.reset(sig_index, to_index);
7325 while (stream.next(toReg, bt)) {
7326 if (toReg->is_stack()) {
7327 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7328 str(zr, Address(sp, st_off));
7329 } else if (toReg->is_FloatRegister()) {
7330 mov(toReg->as_FloatRegister(), T2S, 0);
7331 } else {
7332 mov(toReg->as_Register(), zr);
7333 }
7334 }
7335 bind(L_notNull);
7336 } else {
7337 bind(L_null);
7338 }
7339 }
7340
7341 sig_index = stream.sig_index();
7342 to_index = stream.regs_index();
7343
7344 if (mark_done && reg_state[from->value()] != reg_written) {
7345 // This is okay because no one else will write to that slot
7346 reg_state[from->value()] = reg_writable;
7347 }
7348 from_index--;
7349 assert(progress || (start_offset == offset()), "should not emit code");
7350 return done;
7351 }
7352
7353 // Pack fields back into an inline type oop
7354 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
7355 VMRegPair* from, int from_count, int& from_index, VMReg to,
7356 RegState reg_state[], Register val_array) {
7357 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
7358 assert(to->is_valid(), "destination must be valid");
7359
7360 if (reg_state[to->value()] == reg_written) {
7361 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7362 return true; // Already written
7363 }
7364
7365 // The GC barrier expanded by store_heap_oop below may call into the
7366 // runtime so use callee-saved registers for any values that need to be
7367 // preserved. The GC barrier assembler should take care of saving the
7368 // Java argument registers.
7369 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
7370 Register val_obj_tmp = r21;
7371 Register from_reg_tmp = r22;
7372 Register tmp1 = r14;
7373 Register tmp2 = r13;
7374 Register tmp3 = r12;
7375 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
7376
7377 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
7378
7379 if (reg_state[to->value()] == reg_readonly) {
7380 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
7381 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7382 return false; // Not yet writable
7383 }
7384 val_obj = val_obj_tmp;
7385 }
7386
7387 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
7388 VMReg fromReg;
7389 BasicType bt;
7390 Label L_null;
7391 while (stream.next(fromReg, bt)) {
7392 assert(fromReg->is_valid(), "source must be valid");
7393 reg_state[fromReg->value()] = reg_writable;
7394
7395 int off = sig->at(stream.sig_index())._offset;
7396 if (off == -1) {
7397 // Nullable inline type argument, emit null check
7398 Label L_notNull;
7399 if (fromReg->is_stack()) {
7400 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7401 ldrb(tmp2, Address(sp, ld_off));
7402 cbnz(tmp2, L_notNull);
7403 } else {
7404 cbnz(fromReg->as_Register(), L_notNull);
7405 }
7406 mov(val_obj, 0);
7407 b(L_null);
7408 bind(L_notNull);
7409 continue;
7410 }
7411 if (sig->at(stream.sig_index())._vt_oop) {
7412 if (fromReg->is_stack()) {
7413 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7414 ldr(val_obj, Address(sp, ld_off));
7415 } else {
7416 mov(val_obj, fromReg->as_Register());
7417 }
7418 cbnz(val_obj, L_null);
7419 // get the buffer from the just allocated pool of buffers
7420 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
7421 load_heap_oop(val_obj, Address(val_array, index), rscratch1, rscratch2);
7422 continue;
7423 }
7424
7425 assert(off > 0, "offset in object should be positive");
7426 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
7427
7428 // Pack the scalarized field into the value object.
7429 Address dst(val_obj, off);
7430 if (!fromReg->is_FloatRegister()) {
7431 Register src;
7432 if (fromReg->is_stack()) {
7433 src = from_reg_tmp;
7434 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7435 load_sized_value(src, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
7436 } else {
7437 src = fromReg->as_Register();
7438 }
7439 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
7440 if (is_reference_type(bt)) {
7441 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep val_obj valid.
7442 mov(tmp3, val_obj);
7443 Address dst_with_tmp3(tmp3, off);
7444 store_heap_oop(dst_with_tmp3, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
7445 } else {
7446 store_sized_value(dst, src, size_in_bytes);
7447 }
7448 } else if (bt == T_DOUBLE) {
7449 strd(fromReg->as_FloatRegister(), dst);
7450 } else {
7451 assert(bt == T_FLOAT, "must be float");
7452 strs(fromReg->as_FloatRegister(), dst);
7453 }
7454 }
7455 bind(L_null);
7456 sig_index = stream.sig_index();
7457 from_index = stream.regs_index();
7458
7459 assert(reg_state[to->value()] == reg_writable, "must have already been read");
7460 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
7461 assert(success, "to register must be writable");
7462 return true;
7463 }
7464
7465 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
7466 return (reg->is_FloatRegister()) ? v8->as_VMReg() : r14->as_VMReg();
7467 }
7468
7469 void MacroAssembler::cache_wb(Address line) {
7470 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
7471 assert(line.index() == noreg, "index should be noreg");
7472 assert(line.offset() == 0, "offset should be 0");
7473 // would like to assert this
7474 // assert(line._ext.shift == 0, "shift should be zero");
7475 if (VM_Version::supports_dcpop()) {
7476 // writeback using clear virtual address to point of persistence
7477 dc(Assembler::CVAP, line.base());
7478 } else {
7479 // no need to generate anything as Unsafe.writebackMemory should
7480 // never invoke this stub
7481 }
7482 }
7483
7484 void MacroAssembler::cache_wbsync(bool is_pre) {
7485 // we only need a barrier post sync
7486 if (!is_pre) {
7487 membar(Assembler::AnyAny);
7488 }
7884 }
7885
7886 // Check if the lock-stack is full.
7887 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7888 cmpw(top, (unsigned)LockStack::end_offset());
7889 br(Assembler::GE, slow);
7890
7891 // Check for recursion.
7892 subw(t, top, oopSize);
7893 ldr(t, Address(rthread, t));
7894 cmp(obj, t);
7895 br(Assembler::EQ, push);
7896
7897 // Check header for monitor (0b10).
7898 tst(mark, markWord::monitor_value);
7899 br(Assembler::NE, slow);
7900
7901 // Try to lock. Transition lock bits 0b01 => 0b00
7902 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7903 orr(mark, mark, markWord::unlocked_value);
7904 // Mask inline_type bit such that we go to the slow path if object is an inline type
7905 andr(mark, mark, ~((int) markWord::inline_type_bit_in_place));
7906
7907 eor(t, mark, markWord::unlocked_value);
7908 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7909 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7910 br(Assembler::NE, slow);
7911
7912 bind(push);
7913 // After successful lock, push object on lock-stack.
7914 str(obj, Address(rthread, top));
7915 addw(top, top, oopSize);
7916 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7917 }
7918
7919 // Implements fast-unlocking.
7920 //
7921 // - obj: the object to be unlocked
7922 // - t1, t2, t3: temporary registers
7923 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7924 void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7925 // cmpxchg clobbers rscratch1.
7926 assert_different_registers(obj, t1, t2, t3, rscratch1);
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