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src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp

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  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.
  23  *
  24  */
  25 
  26 #ifndef CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
  27 #define CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
  28 
  29 #include "asm/assembler.inline.hpp"
  30 #include "oops/compressedOops.hpp"
  31 #include "runtime/vm_version.hpp"

  32 #include "utilities/powerOfTwo.hpp"




  33 
  34 // MacroAssembler extends Assembler by frequently used macros.
  35 //
  36 // Instructions for which a 'better' code sequence exists depending
  37 // on arguments should also go in here.
  38 
  39 class MacroAssembler: public Assembler {
  40   friend class LIR_Assembler;
  41 
  42  public:
  43   using Assembler::mov;
  44   using Assembler::movi;
  45 
  46  protected:
  47 
  48   // Support for VM calls
  49   //
  50   // This is the base routine called by the different versions of call_VM_leaf. The interpreter
  51   // may customize this version by overriding it for its purposes (e.g., to save/restore
  52   // additional registers when doing a VM call).

 588     mrs(0b011, 0b0000, 0b0000, 0b001, reg);
 589   }
 590 
 591   // idiv variant which deals with MINLONG as dividend and -1 as divisor
 592   int corrected_idivl(Register result, Register ra, Register rb,
 593                       bool want_remainder, Register tmp = rscratch1);
 594   int corrected_idivq(Register result, Register ra, Register rb,
 595                       bool want_remainder, Register tmp = rscratch1);
 596 
 597   // Support for NULL-checks
 598   //
 599   // Generates code that causes a NULL OS exception if the content of reg is NULL.
 600   // If the accessed location is M[reg + offset] and the offset is known, provide the
 601   // offset. No explicit code generation is needed if the offset is within a certain
 602   // range (0 <= offset <= page_size).
 603 
 604   virtual void null_check(Register reg, int offset = -1);
 605   static bool needs_explicit_null_check(intptr_t offset);
 606   static bool uses_implicit_null_check(void* address);
 607 































 608   static address target_addr_for_insn(address insn_addr, unsigned insn);
 609   static address target_addr_for_insn(address insn_addr) {
 610     unsigned insn = *(unsigned*)insn_addr;
 611     return target_addr_for_insn(insn_addr, insn);
 612   }
 613 
 614   // Required platform-specific helpers for Label::patch_instructions.
 615   // They _shadow_ the declarations in AbstractAssembler, which are undefined.
 616   static int pd_patch_instruction_size(address branch, address target);
 617   static void pd_patch_instruction(address branch, address target, const char* file = NULL, int line = 0) {
 618     pd_patch_instruction_size(branch, target);
 619   }
 620   static address pd_call_destination(address branch) {
 621     return target_addr_for_insn(branch);
 622   }
 623 #ifndef PRODUCT
 624   static void pd_print_patched_instruction(address branch);
 625 #endif
 626 
 627   static int patch_oop(address insn_addr, address o);

 795                            Register scratch);
 796 
 797   void reset_last_Java_frame(Register thread);
 798 
 799   // thread in the default location (rthread)
 800   void reset_last_Java_frame(bool clear_fp);
 801 
 802   // Stores
 803   void store_check(Register obj);                // store check for obj - register is destroyed afterwards
 804   void store_check(Register obj, Address dst);   // same as above, dst is exact store location (reg. is destroyed)
 805 
 806   void resolve_jobject(Register value, Register thread, Register tmp);
 807 
 808   // C 'boolean' to Java boolean: x == 0 ? 0 : 1
 809   void c2bool(Register x);
 810 
 811   void load_method_holder_cld(Register rresult, Register rmethod);
 812   void load_method_holder(Register holder, Register method);
 813 
 814   // oop manipulations


 815   void load_klass(Register dst, Register src);
 816   void store_klass(Register dst, Register src);
 817   void cmp_klass(Register oop, Register trial_klass, Register tmp);
 818 
 819   void resolve_weak_handle(Register result, Register tmp);
 820   void resolve_oop_handle(Register result, Register tmp = r5);
 821   void load_mirror(Register dst, Register method, Register tmp = r5);
 822 
 823   void access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
 824                       Register tmp1, Register tmp_thread);
 825 
 826   void access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register src,
 827                        Register tmp1, Register tmp_thread);









 828 
 829   void load_heap_oop(Register dst, Address src, Register tmp1 = noreg,
 830                      Register thread_tmp = noreg, DecoratorSet decorators = 0);
 831 
 832   void load_heap_oop_not_null(Register dst, Address src, Register tmp1 = noreg,
 833                               Register thread_tmp = noreg, DecoratorSet decorators = 0);
 834   void store_heap_oop(Address dst, Register src, Register tmp1 = noreg,
 835                       Register tmp_thread = noreg, DecoratorSet decorators = 0);
 836 
 837   // currently unimplemented
 838   // Used for storing NULL. All other oop constants should be
 839   // stored using routines that take a jobject.
 840   void store_heap_oop_null(Address dst);
 841 


 842   void store_klass_gap(Register dst, Register src);
 843 
 844   // This dummy is to prevent a call to store_heap_oop from
 845   // converting a zero (like NULL) into a Register by giving
 846   // the compiler two choices it can't resolve
 847 
 848   void store_heap_oop(Address dst, void* dummy);
 849 
 850   void encode_heap_oop(Register d, Register s);
 851   void encode_heap_oop(Register r) { encode_heap_oop(r, r); }
 852   void decode_heap_oop(Register d, Register s);
 853   void decode_heap_oop(Register r) { decode_heap_oop(r, r); }
 854   void encode_heap_oop_not_null(Register r);
 855   void decode_heap_oop_not_null(Register r);
 856   void encode_heap_oop_not_null(Register dst, Register src);
 857   void decode_heap_oop_not_null(Register dst, Register src);
 858 
 859   void set_narrow_oop(Register dst, jobject obj);
 860 
 861   void encode_klass_not_null(Register r);
 862   void decode_klass_not_null(Register r);
 863   void encode_klass_not_null(Register dst, Register src);
 864   void decode_klass_not_null(Register dst, Register src);
 865 
 866   void set_narrow_klass(Register dst, Klass* k);
 867 
 868   // if heap base register is used - reinit it with the correct value
 869   void reinit_heapbase();
 870 
 871   DEBUG_ONLY(void verify_heapbase(const char* msg);)
 872 
 873   void push_CPU_state(bool save_vectors = false, bool use_sve = false,
 874                       int sve_vector_size_in_bytes = 0, int total_predicate_in_bytes = 0);
 875   void pop_CPU_state(bool restore_vectors = false, bool use_sve = false,
 876                      int sve_vector_size_in_bytes = 0, int total_predicate_in_bytes = 0);
 877 
 878   // Round up to a power of two
 879   void round_to(Register reg, int modulus);
 880 
 881   // allocation









 882   void eden_allocate(
 883     Register obj,                      // result: pointer to object after successful allocation
 884     Register var_size_in_bytes,        // object size in bytes if unknown at compile time; invalid otherwise
 885     int      con_size_in_bytes,        // object size in bytes if   known at compile time
 886     Register t1,                       // temp register
 887     Label&   slow_case                 // continuation point if fast allocation fails
 888   );
 889   void tlab_allocate(
 890     Register obj,                      // result: pointer to object after successful allocation
 891     Register var_size_in_bytes,        // object size in bytes if unknown at compile time; invalid otherwise
 892     int      con_size_in_bytes,        // object size in bytes if   known at compile time
 893     Register t1,                       // temp register
 894     Register t2,                       // temp register
 895     Label&   slow_case                 // continuation point if fast allocation fails
 896   );
 897   void verify_tlab();
 898 



 899   // interface method calling
 900   void lookup_interface_method(Register recv_klass,
 901                                Register intf_klass,
 902                                RegisterOrConstant itable_index,
 903                                Register method_result,
 904                                Register scan_temp,
 905                                Label& no_such_interface,
 906                    bool return_method = true);
 907 
 908   // virtual method calling
 909   // n.b. x86 allows RegisterOrConstant for vtable_index
 910   void lookup_virtual_method(Register recv_klass,
 911                              RegisterOrConstant vtable_index,
 912                              Register method_result);
 913 
 914   // Test sub_klass against super_klass, with fast and slow paths.
 915 
 916   // The fast path produces a tri-state answer: yes / no / maybe-slow.
 917   // One of the three labels can be NULL, meaning take the fall-through.
 918   // If super_check_offset is -1, the value is loaded up from super_klass.

1163   }                                                                     \
1164                                                                         \
1165   void INSN(Register Rd, Register Rn, Register Rm) {                    \
1166     Assembler::INSN(Rd, Rn, Rm);                                        \
1167   }                                                                     \
1168                                                                         \
1169   void INSN(Register Rd, Register Rn, Register Rm,                      \
1170            ext::operation option, int amount = 0) {                     \
1171     Assembler::INSN(Rd, Rn, Rm, option, amount);                        \
1172   }
1173 
1174   WRAP(adds) WRAP(addsw) WRAP(subs) WRAP(subsw)
1175 
1176   void add(Register Rd, Register Rn, RegisterOrConstant increment);
1177   void addw(Register Rd, Register Rn, RegisterOrConstant increment);
1178   void sub(Register Rd, Register Rn, RegisterOrConstant decrement);
1179   void subw(Register Rd, Register Rn, RegisterOrConstant decrement);
1180 
1181   void adrp(Register reg1, const Address &dest, uint64_t &byte_offset);
1182 


















1183   void tableswitch(Register index, jint lowbound, jint highbound,
1184                    Label &jumptable, Label &jumptable_end, int stride = 1) {
1185     adr(rscratch1, jumptable);
1186     subsw(rscratch2, index, lowbound);
1187     subsw(zr, rscratch2, highbound - lowbound);
1188     br(Assembler::HS, jumptable_end);
1189     add(rscratch1, rscratch1, rscratch2,
1190         ext::sxtw, exact_log2(stride * Assembler::instruction_size));
1191     br(rscratch1);
1192   }
1193 
1194   // Form an address from base + offset in Rd.  Rd may or may not
1195   // actually be used: you must use the Address that is returned.  It
1196   // is up to you to ensure that the shift provided matches the size
1197   // of your data.
1198   Address form_address(Register Rd, Register base, int64_t byte_offset, int shift);
1199 
1200   // Return true iff an address is within the 48-bit AArch64 address
1201   // space.
1202   bool is_valid_AArch64_address(address a) {

1227   }
1228 
1229   address read_polling_page(Register r, relocInfo::relocType rtype);
1230   void get_polling_page(Register dest, relocInfo::relocType rtype);
1231 
1232   // CRC32 code for java.util.zip.CRC32::updateBytes() instrinsic.
1233   void update_byte_crc32(Register crc, Register val, Register table);
1234   void update_word_crc32(Register crc, Register v, Register tmp,
1235         Register table0, Register table1, Register table2, Register table3,
1236         bool upper = false);
1237 
1238   address has_negatives(Register ary1, Register len, Register result);
1239 
1240   address arrays_equals(Register a1, Register a2, Register result, Register cnt1,
1241                         Register tmp1, Register tmp2, Register tmp3, int elem_size);
1242 
1243   void string_equals(Register a1, Register a2, Register result, Register cnt1,
1244                      int elem_size);
1245 
1246   void fill_words(Register base, Register cnt, Register value);


1247   void zero_words(Register base, uint64_t cnt);
1248   address zero_words(Register ptr, Register cnt);
1249   void zero_dcache_blocks(Register base, Register cnt);
1250 
1251   static const int zero_words_block_size;
1252 
1253   address byte_array_inflate(Register src, Register dst, Register len,
1254                              FloatRegister vtmp1, FloatRegister vtmp2,
1255                              FloatRegister vtmp3, Register tmp4);
1256 
1257   void char_array_compress(Register src, Register dst, Register len,
1258                            FloatRegister tmp1Reg, FloatRegister tmp2Reg,
1259                            FloatRegister tmp3Reg, FloatRegister tmp4Reg,
1260                            Register result);
1261 
1262   void encode_iso_array(Register src, Register dst,
1263                         Register len, Register result,
1264                         FloatRegister Vtmp1, FloatRegister Vtmp2,
1265                         FloatRegister Vtmp3, FloatRegister Vtmp4);
1266   void fast_log(FloatRegister vtmp0, FloatRegister vtmp1, FloatRegister vtmp2,

  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.
  23  *
  24  */
  25 
  26 #ifndef CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
  27 #define CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
  28 
  29 #include "asm/assembler.inline.hpp"
  30 #include "oops/compressedOops.hpp"
  31 #include "runtime/vm_version.hpp"
  32 #include "utilities/macros.hpp"
  33 #include "utilities/powerOfTwo.hpp"
  34 #include "runtime/signature.hpp"
  35 
  36 
  37 class ciInlineKlass;
  38 
  39 // MacroAssembler extends Assembler by frequently used macros.
  40 //
  41 // Instructions for which a 'better' code sequence exists depending
  42 // on arguments should also go in here.
  43 
  44 class MacroAssembler: public Assembler {
  45   friend class LIR_Assembler;
  46 
  47  public:
  48   using Assembler::mov;
  49   using Assembler::movi;
  50 
  51  protected:
  52 
  53   // Support for VM calls
  54   //
  55   // This is the base routine called by the different versions of call_VM_leaf. The interpreter
  56   // may customize this version by overriding it for its purposes (e.g., to save/restore
  57   // additional registers when doing a VM call).

 593     mrs(0b011, 0b0000, 0b0000, 0b001, reg);
 594   }
 595 
 596   // idiv variant which deals with MINLONG as dividend and -1 as divisor
 597   int corrected_idivl(Register result, Register ra, Register rb,
 598                       bool want_remainder, Register tmp = rscratch1);
 599   int corrected_idivq(Register result, Register ra, Register rb,
 600                       bool want_remainder, Register tmp = rscratch1);
 601 
 602   // Support for NULL-checks
 603   //
 604   // Generates code that causes a NULL OS exception if the content of reg is NULL.
 605   // If the accessed location is M[reg + offset] and the offset is known, provide the
 606   // offset. No explicit code generation is needed if the offset is within a certain
 607   // range (0 <= offset <= page_size).
 608 
 609   virtual void null_check(Register reg, int offset = -1);
 610   static bool needs_explicit_null_check(intptr_t offset);
 611   static bool uses_implicit_null_check(void* address);
 612 
 613   // markWord tests, kills markWord reg
 614   void test_markword_is_inline_type(Register markword, Label& is_inline_type);
 615 
 616   // inlineKlass queries, kills temp_reg
 617   void test_klass_is_inline_type(Register klass, Register temp_reg, Label& is_inline_type);
 618   void test_klass_is_empty_inline_type(Register klass, Register temp_reg, Label& is_empty_inline_type);
 619   void test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type);
 620 
 621   // Get the default value oop for the given InlineKlass
 622   void get_default_value_oop(Register inline_klass, Register temp_reg, Register obj);
 623   // The empty value oop, for the given InlineKlass ("empty" as in no instance fields)
 624   // get_default_value_oop with extra assertion for empty inline klass
 625   void get_empty_inline_type_oop(Register inline_klass, Register temp_reg, Register obj);
 626 
 627   void test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free);
 628   void test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free);
 629   void test_field_is_inlined(Register flags, Register temp_reg, Label& is_flattened);
 630 
 631   // Check oops for special arrays, i.e. flattened and/or null-free
 632   void test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label);
 633   void test_flattened_array_oop(Register klass, Register temp_reg, Label& is_flattened_array);
 634   void test_non_flattened_array_oop(Register oop, Register temp_reg, Label&is_non_flattened_array);
 635   void test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array);
 636   void test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array);
 637 
 638   // Check array klass layout helper for flatten or null-free arrays...
 639   void test_flattened_array_layout(Register lh, Label& is_flattened_array);
 640   void test_non_flattened_array_layout(Register lh, Label& is_non_flattened_array);
 641   void test_null_free_array_layout(Register lh, Label& is_null_free_array);
 642   void test_non_null_free_array_layout(Register lh, Label& is_non_null_free_array);
 643 
 644   static address target_addr_for_insn(address insn_addr, unsigned insn);
 645   static address target_addr_for_insn(address insn_addr) {
 646     unsigned insn = *(unsigned*)insn_addr;
 647     return target_addr_for_insn(insn_addr, insn);
 648   }
 649 
 650   // Required platform-specific helpers for Label::patch_instructions.
 651   // They _shadow_ the declarations in AbstractAssembler, which are undefined.
 652   static int pd_patch_instruction_size(address branch, address target);
 653   static void pd_patch_instruction(address branch, address target, const char* file = NULL, int line = 0) {
 654     pd_patch_instruction_size(branch, target);
 655   }
 656   static address pd_call_destination(address branch) {
 657     return target_addr_for_insn(branch);
 658   }
 659 #ifndef PRODUCT
 660   static void pd_print_patched_instruction(address branch);
 661 #endif
 662 
 663   static int patch_oop(address insn_addr, address o);

 831                            Register scratch);
 832 
 833   void reset_last_Java_frame(Register thread);
 834 
 835   // thread in the default location (rthread)
 836   void reset_last_Java_frame(bool clear_fp);
 837 
 838   // Stores
 839   void store_check(Register obj);                // store check for obj - register is destroyed afterwards
 840   void store_check(Register obj, Address dst);   // same as above, dst is exact store location (reg. is destroyed)
 841 
 842   void resolve_jobject(Register value, Register thread, Register tmp);
 843 
 844   // C 'boolean' to Java boolean: x == 0 ? 0 : 1
 845   void c2bool(Register x);
 846 
 847   void load_method_holder_cld(Register rresult, Register rmethod);
 848   void load_method_holder(Register holder, Register method);
 849 
 850   // oop manipulations
 851   void load_metadata(Register dst, Register src);
 852 
 853   void load_klass(Register dst, Register src);
 854   void store_klass(Register dst, Register src);
 855   void cmp_klass(Register oop, Register trial_klass, Register tmp);
 856 
 857   void resolve_weak_handle(Register result, Register tmp);
 858   void resolve_oop_handle(Register result, Register tmp = r5);
 859   void load_mirror(Register dst, Register method, Register tmp = r5);
 860 
 861   void access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
 862                       Register tmp1, Register tmp_thread);
 863 
 864   void access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register src,
 865                        Register tmp1, Register tmp_thread, Register tmp3 = noreg);
 866 
 867   void access_value_copy(DecoratorSet decorators, Register src, Register dst, Register inline_klass);
 868 
 869   // inline type data payload offsets...
 870   void first_field_offset(Register inline_klass, Register offset);
 871   void data_for_oop(Register oop, Register data, Register inline_klass);
 872   // get data payload ptr a flat value array at index, kills rcx and index
 873   void data_for_value_array_index(Register array, Register array_klass,
 874                                   Register index, Register data);
 875 
 876   void load_heap_oop(Register dst, Address src, Register tmp1 = noreg,
 877                      Register thread_tmp = noreg, DecoratorSet decorators = 0);
 878 
 879   void load_heap_oop_not_null(Register dst, Address src, Register tmp1 = noreg,
 880                               Register thread_tmp = noreg, DecoratorSet decorators = 0);
 881   void store_heap_oop(Address dst, Register src, Register tmp1 = noreg,
 882                       Register tmp_thread = noreg, Register tmp3 = noreg, DecoratorSet decorators = 0);
 883 
 884   // currently unimplemented
 885   // Used for storing NULL. All other oop constants should be
 886   // stored using routines that take a jobject.
 887   void store_heap_oop_null(Address dst);
 888 
 889   void load_prototype_header(Register dst, Register src);
 890 
 891   void store_klass_gap(Register dst, Register src);
 892 
 893   // This dummy is to prevent a call to store_heap_oop from
 894   // converting a zero (like NULL) into a Register by giving
 895   // the compiler two choices it can't resolve
 896 
 897   void store_heap_oop(Address dst, void* dummy);
 898 
 899   void encode_heap_oop(Register d, Register s);
 900   void encode_heap_oop(Register r) { encode_heap_oop(r, r); }
 901   void decode_heap_oop(Register d, Register s);
 902   void decode_heap_oop(Register r) { decode_heap_oop(r, r); }
 903   void encode_heap_oop_not_null(Register r);
 904   void decode_heap_oop_not_null(Register r);
 905   void encode_heap_oop_not_null(Register dst, Register src);
 906   void decode_heap_oop_not_null(Register dst, Register src);
 907 
 908   void set_narrow_oop(Register dst, jobject obj);
 909 
 910   void encode_klass_not_null(Register r);
 911   void decode_klass_not_null(Register r);
 912   void encode_klass_not_null(Register dst, Register src);
 913   void decode_klass_not_null(Register dst, Register src);
 914 
 915   void set_narrow_klass(Register dst, Klass* k);
 916 
 917   // if heap base register is used - reinit it with the correct value
 918   void reinit_heapbase();
 919 
 920   DEBUG_ONLY(void verify_heapbase(const char* msg);)
 921 
 922   void push_CPU_state(bool save_vectors = false, bool use_sve = false,
 923                       int sve_vector_size_in_bytes = 0, int total_predicate_in_bytes = 0);
 924   void pop_CPU_state(bool restore_vectors = false, bool use_sve = false,
 925                      int sve_vector_size_in_bytes = 0, int total_predicate_in_bytes = 0);
 926 
 927   // Round up to a power of two
 928   void round_to(Register reg, int modulus);
 929 
 930   // allocation
 931 
 932   // Object / value buffer allocation...
 933   // Allocate instance of klass, assumes klass initialized by caller
 934   // new_obj prefers to be rax
 935   // Kills t1 and t2, perserves klass, return allocation in new_obj (rsi on LP64)
 936   void allocate_instance(Register klass, Register new_obj,
 937                          Register t1, Register t2,
 938                          bool clear_fields, Label& alloc_failed);
 939 
 940   void eden_allocate(
 941     Register obj,                      // result: pointer to object after successful allocation
 942     Register var_size_in_bytes,        // object size in bytes if unknown at compile time; invalid otherwise
 943     int      con_size_in_bytes,        // object size in bytes if   known at compile time
 944     Register t1,                       // temp register
 945     Label&   slow_case                 // continuation point if fast allocation fails
 946   );
 947   void tlab_allocate(
 948     Register obj,                      // result: pointer to object after successful allocation
 949     Register var_size_in_bytes,        // object size in bytes if unknown at compile time; invalid otherwise
 950     int      con_size_in_bytes,        // object size in bytes if   known at compile time
 951     Register t1,                       // temp register
 952     Register t2,                       // temp register
 953     Label&   slow_case                 // continuation point if fast allocation fails
 954   );
 955   void verify_tlab();
 956 
 957   // For field "index" within "klass", return inline_klass ...
 958   void get_inline_type_field_klass(Register klass, Register index, Register inline_klass);
 959 
 960   // interface method calling
 961   void lookup_interface_method(Register recv_klass,
 962                                Register intf_klass,
 963                                RegisterOrConstant itable_index,
 964                                Register method_result,
 965                                Register scan_temp,
 966                                Label& no_such_interface,
 967                    bool return_method = true);
 968 
 969   // virtual method calling
 970   // n.b. x86 allows RegisterOrConstant for vtable_index
 971   void lookup_virtual_method(Register recv_klass,
 972                              RegisterOrConstant vtable_index,
 973                              Register method_result);
 974 
 975   // Test sub_klass against super_klass, with fast and slow paths.
 976 
 977   // The fast path produces a tri-state answer: yes / no / maybe-slow.
 978   // One of the three labels can be NULL, meaning take the fall-through.
 979   // If super_check_offset is -1, the value is loaded up from super_klass.

1224   }                                                                     \
1225                                                                         \
1226   void INSN(Register Rd, Register Rn, Register Rm) {                    \
1227     Assembler::INSN(Rd, Rn, Rm);                                        \
1228   }                                                                     \
1229                                                                         \
1230   void INSN(Register Rd, Register Rn, Register Rm,                      \
1231            ext::operation option, int amount = 0) {                     \
1232     Assembler::INSN(Rd, Rn, Rm, option, amount);                        \
1233   }
1234 
1235   WRAP(adds) WRAP(addsw) WRAP(subs) WRAP(subsw)
1236 
1237   void add(Register Rd, Register Rn, RegisterOrConstant increment);
1238   void addw(Register Rd, Register Rn, RegisterOrConstant increment);
1239   void sub(Register Rd, Register Rn, RegisterOrConstant decrement);
1240   void subw(Register Rd, Register Rn, RegisterOrConstant decrement);
1241 
1242   void adrp(Register reg1, const Address &dest, uint64_t &byte_offset);
1243 
1244   void verified_entry(Compile* C, int sp_inc);
1245 
1246   // Inline type specific methods
1247   #include "asm/macroAssembler_common.hpp"
1248 
1249   int store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter = true);
1250   bool move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]);
1251   bool unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
1252                             VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
1253                             RegState reg_state[]);
1254   bool pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
1255                           VMRegPair* from, int from_count, int& from_index, VMReg to,
1256                           RegState reg_state[], Register val_array);
1257   int extend_stack_for_inline_args(int args_on_stack);
1258   void remove_frame(int initial_framesize, bool needs_stack_repair);
1259   VMReg spill_reg_for(VMReg reg);
1260   void save_stack_increment(int sp_inc, int frame_size);
1261 
1262   void tableswitch(Register index, jint lowbound, jint highbound,
1263                    Label &jumptable, Label &jumptable_end, int stride = 1) {
1264     adr(rscratch1, jumptable);
1265     subsw(rscratch2, index, lowbound);
1266     subsw(zr, rscratch2, highbound - lowbound);
1267     br(Assembler::HS, jumptable_end);
1268     add(rscratch1, rscratch1, rscratch2,
1269         ext::sxtw, exact_log2(stride * Assembler::instruction_size));
1270     br(rscratch1);
1271   }
1272 
1273   // Form an address from base + offset in Rd.  Rd may or may not
1274   // actually be used: you must use the Address that is returned.  It
1275   // is up to you to ensure that the shift provided matches the size
1276   // of your data.
1277   Address form_address(Register Rd, Register base, int64_t byte_offset, int shift);
1278 
1279   // Return true iff an address is within the 48-bit AArch64 address
1280   // space.
1281   bool is_valid_AArch64_address(address a) {

1306   }
1307 
1308   address read_polling_page(Register r, relocInfo::relocType rtype);
1309   void get_polling_page(Register dest, relocInfo::relocType rtype);
1310 
1311   // CRC32 code for java.util.zip.CRC32::updateBytes() instrinsic.
1312   void update_byte_crc32(Register crc, Register val, Register table);
1313   void update_word_crc32(Register crc, Register v, Register tmp,
1314         Register table0, Register table1, Register table2, Register table3,
1315         bool upper = false);
1316 
1317   address has_negatives(Register ary1, Register len, Register result);
1318 
1319   address arrays_equals(Register a1, Register a2, Register result, Register cnt1,
1320                         Register tmp1, Register tmp2, Register tmp3, int elem_size);
1321 
1322   void string_equals(Register a1, Register a2, Register result, Register cnt1,
1323                      int elem_size);
1324 
1325   void fill_words(Register base, Register cnt, Register value);
1326   void fill_words(Register base, uint64_t cnt, Register value);
1327 
1328   void zero_words(Register base, uint64_t cnt);
1329   address zero_words(Register ptr, Register cnt);
1330   void zero_dcache_blocks(Register base, Register cnt);
1331 
1332   static const int zero_words_block_size;
1333 
1334   address byte_array_inflate(Register src, Register dst, Register len,
1335                              FloatRegister vtmp1, FloatRegister vtmp2,
1336                              FloatRegister vtmp3, Register tmp4);
1337 
1338   void char_array_compress(Register src, Register dst, Register len,
1339                            FloatRegister tmp1Reg, FloatRegister tmp2Reg,
1340                            FloatRegister tmp3Reg, FloatRegister tmp4Reg,
1341                            Register result);
1342 
1343   void encode_iso_array(Register src, Register dst,
1344                         Register len, Register result,
1345                         FloatRegister Vtmp1, FloatRegister Vtmp2,
1346                         FloatRegister Vtmp3, FloatRegister Vtmp4);
1347   void fast_log(FloatRegister vtmp0, FloatRegister vtmp1, FloatRegister vtmp2,
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