15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #ifndef CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
27 #define CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
28
29 #include "asm/assembler.inline.hpp"
30 #include "code/vmreg.hpp"
31 #include "metaprogramming/enableIf.hpp"
32 #include "oops/compressedOops.hpp"
33 #include "oops/compressedKlass.hpp"
34 #include "runtime/vm_version.hpp"
35 #include "utilities/powerOfTwo.hpp"
36
37 class OopMap;
38
39 // MacroAssembler extends Assembler by frequently used macros.
40 //
41 // Instructions for which a 'better' code sequence exists depending
42 // on arguments should also go in here.
43
44 class MacroAssembler: public Assembler {
45 friend class LIR_Assembler;
46
47 public:
48 using Assembler::mov;
49 using Assembler::movi;
50
51 protected:
52
53 // Support for VM calls
54 //
55 // This is the base routine called by the different versions of call_VM_leaf. The interpreter
610 msr(0b011, 0b0100, 0b0010, 0b000, reg);
611 }
612
613 // idiv variant which deals with MINLONG as dividend and -1 as divisor
614 int corrected_idivl(Register result, Register ra, Register rb,
615 bool want_remainder, Register tmp = rscratch1);
616 int corrected_idivq(Register result, Register ra, Register rb,
617 bool want_remainder, Register tmp = rscratch1);
618
619 // Support for null-checks
620 //
621 // Generates code that causes a null OS exception if the content of reg is null.
622 // If the accessed location is M[reg + offset] and the offset is known, provide the
623 // offset. No explicit code generation is needed if the offset is within a certain
624 // range (0 <= offset <= page_size).
625
626 virtual void null_check(Register reg, int offset = -1);
627 static bool needs_explicit_null_check(intptr_t offset);
628 static bool uses_implicit_null_check(void* address);
629
630 static address target_addr_for_insn(address insn_addr, unsigned insn);
631 static address target_addr_for_insn_or_null(address insn_addr, unsigned insn);
632 static address target_addr_for_insn(address insn_addr) {
633 unsigned insn = *(unsigned*)insn_addr;
634 return target_addr_for_insn(insn_addr, insn);
635 }
636 static address target_addr_for_insn_or_null(address insn_addr) {
637 unsigned insn = *(unsigned*)insn_addr;
638 return target_addr_for_insn_or_null(insn_addr, insn);
639 }
640
641 // Required platform-specific helpers for Label::patch_instructions.
642 // They _shadow_ the declarations in AbstractAssembler, which are undefined.
643 static int pd_patch_instruction_size(address branch, address target);
644 static void pd_patch_instruction(address branch, address target, const char* file = nullptr, int line = 0) {
645 pd_patch_instruction_size(branch, target);
646 }
647 static address pd_call_destination(address branch) {
648 return target_addr_for_insn(branch);
649 }
847
848 void reset_last_Java_frame(Register thread);
849
850 // thread in the default location (rthread)
851 void reset_last_Java_frame(bool clear_fp);
852
853 // Stores
854 void store_check(Register obj); // store check for obj - register is destroyed afterwards
855 void store_check(Register obj, Address dst); // same as above, dst is exact store location (reg. is destroyed)
856
857 void resolve_jobject(Register value, Register tmp1, Register tmp2);
858 void resolve_global_jobject(Register value, Register tmp1, Register tmp2);
859
860 // C 'boolean' to Java boolean: x == 0 ? 0 : 1
861 void c2bool(Register x);
862
863 void load_method_holder_cld(Register rresult, Register rmethod);
864 void load_method_holder(Register holder, Register method);
865
866 // oop manipulations
867 void load_klass(Register dst, Register src);
868 void store_klass(Register dst, Register src);
869 void cmp_klass(Register oop, Register trial_klass, Register tmp);
870
871 void resolve_weak_handle(Register result, Register tmp1, Register tmp2);
872 void resolve_oop_handle(Register result, Register tmp1, Register tmp2);
873 void load_mirror(Register dst, Register method, Register tmp1, Register tmp2);
874
875 void access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
876 Register tmp1, Register tmp2);
877
878 void access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
879 Register tmp1, Register tmp2, Register tmp3);
880
881 void load_heap_oop(Register dst, Address src, Register tmp1,
882 Register tmp2, DecoratorSet decorators = 0);
883
884 void load_heap_oop_not_null(Register dst, Address src, Register tmp1,
885 Register tmp2, DecoratorSet decorators = 0);
886 void store_heap_oop(Address dst, Register val, Register tmp1,
887 Register tmp2, Register tmp3, DecoratorSet decorators = 0);
888
889 // currently unimplemented
890 // Used for storing null. All other oop constants should be
891 // stored using routines that take a jobject.
892 void store_heap_oop_null(Address dst);
893
894 void store_klass_gap(Register dst, Register src);
895
896 // This dummy is to prevent a call to store_heap_oop from
897 // converting a zero (like null) into a Register by giving
898 // the compiler two choices it can't resolve
899
900 void store_heap_oop(Address dst, void* dummy);
901
902 void encode_heap_oop(Register d, Register s);
903 void encode_heap_oop(Register r) { encode_heap_oop(r, r); }
904 void decode_heap_oop(Register d, Register s);
905 void decode_heap_oop(Register r) { decode_heap_oop(r, r); }
906 void encode_heap_oop_not_null(Register r);
907 void decode_heap_oop_not_null(Register r);
908 void encode_heap_oop_not_null(Register dst, Register src);
909 void decode_heap_oop_not_null(Register dst, Register src);
910
911 void set_narrow_oop(Register dst, jobject obj);
912
913 void encode_klass_not_null(Register r);
921 void reinit_heapbase();
922
923 DEBUG_ONLY(void verify_heapbase(const char* msg);)
924
925 void push_CPU_state(bool save_vectors = false, bool use_sve = false,
926 int sve_vector_size_in_bytes = 0, int total_predicate_in_bytes = 0);
927 void pop_CPU_state(bool restore_vectors = false, bool use_sve = false,
928 int sve_vector_size_in_bytes = 0, int total_predicate_in_bytes = 0);
929
930 void push_cont_fastpath(Register java_thread);
931 void pop_cont_fastpath(Register java_thread);
932
933 // Round up to a power of two
934 void round_to(Register reg, int modulus);
935
936 // java.lang.Math::round intrinsics
937 void java_round_double(Register dst, FloatRegister src, FloatRegister ftmp);
938 void java_round_float(Register dst, FloatRegister src, FloatRegister ftmp);
939
940 // allocation
941 void tlab_allocate(
942 Register obj, // result: pointer to object after successful allocation
943 Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise
944 int con_size_in_bytes, // object size in bytes if known at compile time
945 Register t1, // temp register
946 Register t2, // temp register
947 Label& slow_case // continuation point if fast allocation fails
948 );
949 void verify_tlab();
950
951 // interface method calling
952 void lookup_interface_method(Register recv_klass,
953 Register intf_klass,
954 RegisterOrConstant itable_index,
955 Register method_result,
956 Register scan_temp,
957 Label& no_such_interface,
958 bool return_method = true);
959
960 void lookup_interface_method_stub(Register recv_klass,
961 Register holder_klass,
962 Register resolved_klass,
963 Register method_result,
964 Register temp_reg,
965 Register temp_reg2,
966 int itable_index,
967 Label& L_no_such_interface);
968
969 // virtual method calling
970 // n.b. x86 allows RegisterOrConstant for vtable_index
1325 } \
1326 \
1327 void INSN(Register Rd, Register Rn, Register Rm) { \
1328 Assembler::INSN(Rd, Rn, Rm); \
1329 } \
1330 \
1331 void INSN(Register Rd, Register Rn, Register Rm, \
1332 ext::operation option, int amount = 0) { \
1333 Assembler::INSN(Rd, Rn, Rm, option, amount); \
1334 }
1335
1336 WRAP(adds, false) WRAP(addsw, true) WRAP(subs, false) WRAP(subsw, true)
1337
1338 void add(Register Rd, Register Rn, RegisterOrConstant increment);
1339 void addw(Register Rd, Register Rn, RegisterOrConstant increment);
1340 void sub(Register Rd, Register Rn, RegisterOrConstant decrement);
1341 void subw(Register Rd, Register Rn, RegisterOrConstant decrement);
1342
1343 void adrp(Register reg1, const Address &dest, uint64_t &byte_offset);
1344
1345 void tableswitch(Register index, jint lowbound, jint highbound,
1346 Label &jumptable, Label &jumptable_end, int stride = 1) {
1347 adr(rscratch1, jumptable);
1348 subsw(rscratch2, index, lowbound);
1349 subsw(zr, rscratch2, highbound - lowbound);
1350 br(Assembler::HS, jumptable_end);
1351 add(rscratch1, rscratch1, rscratch2,
1352 ext::sxtw, exact_log2(stride * Assembler::instruction_size));
1353 br(rscratch1);
1354 }
1355
1356 // Form an address from base + offset in Rd. Rd may or may not
1357 // actually be used: you must use the Address that is returned. It
1358 // is up to you to ensure that the shift provided matches the size
1359 // of your data.
1360 Address form_address(Register Rd, Register base, int64_t byte_offset, int shift);
1361
1362 // Return true iff an address is within the 48-bit AArch64 address
1363 // space.
1364 bool is_valid_AArch64_address(address a) {
1388 }
1389 }
1390
1391 address read_polling_page(Register r, relocInfo::relocType rtype);
1392 void get_polling_page(Register dest, relocInfo::relocType rtype);
1393
1394 // CRC32 code for java.util.zip.CRC32::updateBytes() intrinsic.
1395 void update_byte_crc32(Register crc, Register val, Register table);
1396 void update_word_crc32(Register crc, Register v, Register tmp,
1397 Register table0, Register table1, Register table2, Register table3,
1398 bool upper = false);
1399
1400 address count_positives(Register ary1, Register len, Register result);
1401
1402 address arrays_equals(Register a1, Register a2, Register result, Register cnt1,
1403 Register tmp1, Register tmp2, Register tmp3, int elem_size);
1404
1405 void string_equals(Register a1, Register a2, Register result, Register cnt1);
1406
1407 void fill_words(Register base, Register cnt, Register value);
1408 address zero_words(Register base, uint64_t cnt);
1409 address zero_words(Register ptr, Register cnt);
1410 void zero_dcache_blocks(Register base, Register cnt);
1411
1412 static const int zero_words_block_size;
1413
1414 address byte_array_inflate(Register src, Register dst, Register len,
1415 FloatRegister vtmp1, FloatRegister vtmp2,
1416 FloatRegister vtmp3, Register tmp4);
1417
1418 void char_array_compress(Register src, Register dst, Register len,
1419 Register res,
1420 FloatRegister vtmp0, FloatRegister vtmp1,
1421 FloatRegister vtmp2, FloatRegister vtmp3,
1422 FloatRegister vtmp4, FloatRegister vtmp5);
1423
1424 void encode_iso_array(Register src, Register dst,
1425 Register len, Register res, bool ascii,
1426 FloatRegister vtmp0, FloatRegister vtmp1,
1427 FloatRegister vtmp2, FloatRegister vtmp3,
|
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #ifndef CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
27 #define CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
28
29 #include "asm/assembler.inline.hpp"
30 #include "code/vmreg.hpp"
31 #include "metaprogramming/enableIf.hpp"
32 #include "oops/compressedOops.hpp"
33 #include "oops/compressedKlass.hpp"
34 #include "runtime/vm_version.hpp"
35 #include "utilities/macros.hpp"
36 #include "utilities/powerOfTwo.hpp"
37 #include "runtime/signature.hpp"
38
39
40 class ciInlineKlass;
41
42 class OopMap;
43
44 // MacroAssembler extends Assembler by frequently used macros.
45 //
46 // Instructions for which a 'better' code sequence exists depending
47 // on arguments should also go in here.
48
49 class MacroAssembler: public Assembler {
50 friend class LIR_Assembler;
51
52 public:
53 using Assembler::mov;
54 using Assembler::movi;
55
56 protected:
57
58 // Support for VM calls
59 //
60 // This is the base routine called by the different versions of call_VM_leaf. The interpreter
615 msr(0b011, 0b0100, 0b0010, 0b000, reg);
616 }
617
618 // idiv variant which deals with MINLONG as dividend and -1 as divisor
619 int corrected_idivl(Register result, Register ra, Register rb,
620 bool want_remainder, Register tmp = rscratch1);
621 int corrected_idivq(Register result, Register ra, Register rb,
622 bool want_remainder, Register tmp = rscratch1);
623
624 // Support for null-checks
625 //
626 // Generates code that causes a null OS exception if the content of reg is null.
627 // If the accessed location is M[reg + offset] and the offset is known, provide the
628 // offset. No explicit code generation is needed if the offset is within a certain
629 // range (0 <= offset <= page_size).
630
631 virtual void null_check(Register reg, int offset = -1);
632 static bool needs_explicit_null_check(intptr_t offset);
633 static bool uses_implicit_null_check(void* address);
634
635 // markWord tests, kills markWord reg
636 void test_markword_is_inline_type(Register markword, Label& is_inline_type);
637
638 // inlineKlass queries, kills temp_reg
639 void test_klass_is_inline_type(Register klass, Register temp_reg, Label& is_inline_type);
640 void test_klass_is_empty_inline_type(Register klass, Register temp_reg, Label& is_empty_inline_type);
641 void test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type);
642
643 // Get the default value oop for the given InlineKlass
644 void get_default_value_oop(Register inline_klass, Register temp_reg, Register obj);
645 // The empty value oop, for the given InlineKlass ("empty" as in no instance fields)
646 // get_default_value_oop with extra assertion for empty inline klass
647 void get_empty_inline_type_oop(Register inline_klass, Register temp_reg, Register obj);
648
649 void test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free);
650 void test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free);
651 void test_field_is_flat(Register flags, Register temp_reg, Label& is_flat);
652 void test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker);
653
654 // Check oops for special arrays, i.e. flat arrays and/or null-free arrays
655 void test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label);
656 void test_flat_array_oop(Register klass, Register temp_reg, Label& is_flat_array);
657 void test_non_flat_array_oop(Register oop, Register temp_reg, Label&is_non_flat_array);
658 void test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array);
659 void test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array);
660
661 // Check array klass layout helper for flat or null-free arrays...
662 void test_flat_array_layout(Register lh, Label& is_flat_array);
663 void test_non_flat_array_layout(Register lh, Label& is_non_flat_array);
664
665 static address target_addr_for_insn(address insn_addr, unsigned insn);
666 static address target_addr_for_insn_or_null(address insn_addr, unsigned insn);
667 static address target_addr_for_insn(address insn_addr) {
668 unsigned insn = *(unsigned*)insn_addr;
669 return target_addr_for_insn(insn_addr, insn);
670 }
671 static address target_addr_for_insn_or_null(address insn_addr) {
672 unsigned insn = *(unsigned*)insn_addr;
673 return target_addr_for_insn_or_null(insn_addr, insn);
674 }
675
676 // Required platform-specific helpers for Label::patch_instructions.
677 // They _shadow_ the declarations in AbstractAssembler, which are undefined.
678 static int pd_patch_instruction_size(address branch, address target);
679 static void pd_patch_instruction(address branch, address target, const char* file = nullptr, int line = 0) {
680 pd_patch_instruction_size(branch, target);
681 }
682 static address pd_call_destination(address branch) {
683 return target_addr_for_insn(branch);
684 }
882
883 void reset_last_Java_frame(Register thread);
884
885 // thread in the default location (rthread)
886 void reset_last_Java_frame(bool clear_fp);
887
888 // Stores
889 void store_check(Register obj); // store check for obj - register is destroyed afterwards
890 void store_check(Register obj, Address dst); // same as above, dst is exact store location (reg. is destroyed)
891
892 void resolve_jobject(Register value, Register tmp1, Register tmp2);
893 void resolve_global_jobject(Register value, Register tmp1, Register tmp2);
894
895 // C 'boolean' to Java boolean: x == 0 ? 0 : 1
896 void c2bool(Register x);
897
898 void load_method_holder_cld(Register rresult, Register rmethod);
899 void load_method_holder(Register holder, Register method);
900
901 // oop manipulations
902 void load_metadata(Register dst, Register src);
903
904 void load_klass(Register dst, Register src);
905 void store_klass(Register dst, Register src);
906 void cmp_klass(Register oop, Register trial_klass, Register tmp);
907
908 void resolve_weak_handle(Register result, Register tmp1, Register tmp2);
909 void resolve_oop_handle(Register result, Register tmp1, Register tmp2);
910 void load_mirror(Register dst, Register method, Register tmp1, Register tmp2);
911
912 void access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
913 Register tmp1, Register tmp2);
914
915 void access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
916 Register tmp1, Register tmp2, Register tmp3);
917
918 void access_value_copy(DecoratorSet decorators, Register src, Register dst, Register inline_klass);
919
920 // inline type data payload offsets...
921 void first_field_offset(Register inline_klass, Register offset);
922 void data_for_oop(Register oop, Register data, Register inline_klass);
923 // get data payload ptr a flat value array at index, kills rcx and index
924 void data_for_value_array_index(Register array, Register array_klass,
925 Register index, Register data);
926
927 void load_heap_oop(Register dst, Address src, Register tmp1,
928 Register tmp2, DecoratorSet decorators = 0);
929
930 void load_heap_oop_not_null(Register dst, Address src, Register tmp1,
931 Register tmp2, DecoratorSet decorators = 0);
932 void store_heap_oop(Address dst, Register val, Register tmp1,
933 Register tmp2, Register tmp3, DecoratorSet decorators = 0);
934
935 // currently unimplemented
936 // Used for storing null. All other oop constants should be
937 // stored using routines that take a jobject.
938 void store_heap_oop_null(Address dst);
939
940 void load_prototype_header(Register dst, Register src);
941
942 void store_klass_gap(Register dst, Register src);
943
944 // This dummy is to prevent a call to store_heap_oop from
945 // converting a zero (like null) into a Register by giving
946 // the compiler two choices it can't resolve
947
948 void store_heap_oop(Address dst, void* dummy);
949
950 void encode_heap_oop(Register d, Register s);
951 void encode_heap_oop(Register r) { encode_heap_oop(r, r); }
952 void decode_heap_oop(Register d, Register s);
953 void decode_heap_oop(Register r) { decode_heap_oop(r, r); }
954 void encode_heap_oop_not_null(Register r);
955 void decode_heap_oop_not_null(Register r);
956 void encode_heap_oop_not_null(Register dst, Register src);
957 void decode_heap_oop_not_null(Register dst, Register src);
958
959 void set_narrow_oop(Register dst, jobject obj);
960
961 void encode_klass_not_null(Register r);
969 void reinit_heapbase();
970
971 DEBUG_ONLY(void verify_heapbase(const char* msg);)
972
973 void push_CPU_state(bool save_vectors = false, bool use_sve = false,
974 int sve_vector_size_in_bytes = 0, int total_predicate_in_bytes = 0);
975 void pop_CPU_state(bool restore_vectors = false, bool use_sve = false,
976 int sve_vector_size_in_bytes = 0, int total_predicate_in_bytes = 0);
977
978 void push_cont_fastpath(Register java_thread);
979 void pop_cont_fastpath(Register java_thread);
980
981 // Round up to a power of two
982 void round_to(Register reg, int modulus);
983
984 // java.lang.Math::round intrinsics
985 void java_round_double(Register dst, FloatRegister src, FloatRegister ftmp);
986 void java_round_float(Register dst, FloatRegister src, FloatRegister ftmp);
987
988 // allocation
989
990 // Object / value buffer allocation...
991 // Allocate instance of klass, assumes klass initialized by caller
992 // new_obj prefers to be rax
993 // Kills t1 and t2, perserves klass, return allocation in new_obj (rsi on LP64)
994 void allocate_instance(Register klass, Register new_obj,
995 Register t1, Register t2,
996 bool clear_fields, Label& alloc_failed);
997
998 void tlab_allocate(
999 Register obj, // result: pointer to object after successful allocation
1000 Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise
1001 int con_size_in_bytes, // object size in bytes if known at compile time
1002 Register t1, // temp register
1003 Register t2, // temp register
1004 Label& slow_case // continuation point if fast allocation fails
1005 );
1006 void verify_tlab();
1007
1008 // For field "index" within "klass", return inline_klass ...
1009 void get_inline_type_field_klass(Register klass, Register index, Register inline_klass);
1010
1011 // interface method calling
1012 void lookup_interface_method(Register recv_klass,
1013 Register intf_klass,
1014 RegisterOrConstant itable_index,
1015 Register method_result,
1016 Register scan_temp,
1017 Label& no_such_interface,
1018 bool return_method = true);
1019
1020 void lookup_interface_method_stub(Register recv_klass,
1021 Register holder_klass,
1022 Register resolved_klass,
1023 Register method_result,
1024 Register temp_reg,
1025 Register temp_reg2,
1026 int itable_index,
1027 Label& L_no_such_interface);
1028
1029 // virtual method calling
1030 // n.b. x86 allows RegisterOrConstant for vtable_index
1385 } \
1386 \
1387 void INSN(Register Rd, Register Rn, Register Rm) { \
1388 Assembler::INSN(Rd, Rn, Rm); \
1389 } \
1390 \
1391 void INSN(Register Rd, Register Rn, Register Rm, \
1392 ext::operation option, int amount = 0) { \
1393 Assembler::INSN(Rd, Rn, Rm, option, amount); \
1394 }
1395
1396 WRAP(adds, false) WRAP(addsw, true) WRAP(subs, false) WRAP(subsw, true)
1397
1398 void add(Register Rd, Register Rn, RegisterOrConstant increment);
1399 void addw(Register Rd, Register Rn, RegisterOrConstant increment);
1400 void sub(Register Rd, Register Rn, RegisterOrConstant decrement);
1401 void subw(Register Rd, Register Rn, RegisterOrConstant decrement);
1402
1403 void adrp(Register reg1, const Address &dest, uint64_t &byte_offset);
1404
1405 void verified_entry(Compile* C, int sp_inc);
1406
1407 // Inline type specific methods
1408 #include "asm/macroAssembler_common.hpp"
1409
1410 int store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter = true);
1411 bool move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]);
1412 bool unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
1413 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
1414 RegState reg_state[]);
1415 bool pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
1416 VMRegPair* from, int from_count, int& from_index, VMReg to,
1417 RegState reg_state[], Register val_array);
1418 int extend_stack_for_inline_args(int args_on_stack);
1419 void remove_frame(int initial_framesize, bool needs_stack_repair);
1420 VMReg spill_reg_for(VMReg reg);
1421 void save_stack_increment(int sp_inc, int frame_size);
1422
1423 void tableswitch(Register index, jint lowbound, jint highbound,
1424 Label &jumptable, Label &jumptable_end, int stride = 1) {
1425 adr(rscratch1, jumptable);
1426 subsw(rscratch2, index, lowbound);
1427 subsw(zr, rscratch2, highbound - lowbound);
1428 br(Assembler::HS, jumptable_end);
1429 add(rscratch1, rscratch1, rscratch2,
1430 ext::sxtw, exact_log2(stride * Assembler::instruction_size));
1431 br(rscratch1);
1432 }
1433
1434 // Form an address from base + offset in Rd. Rd may or may not
1435 // actually be used: you must use the Address that is returned. It
1436 // is up to you to ensure that the shift provided matches the size
1437 // of your data.
1438 Address form_address(Register Rd, Register base, int64_t byte_offset, int shift);
1439
1440 // Return true iff an address is within the 48-bit AArch64 address
1441 // space.
1442 bool is_valid_AArch64_address(address a) {
1466 }
1467 }
1468
1469 address read_polling_page(Register r, relocInfo::relocType rtype);
1470 void get_polling_page(Register dest, relocInfo::relocType rtype);
1471
1472 // CRC32 code for java.util.zip.CRC32::updateBytes() intrinsic.
1473 void update_byte_crc32(Register crc, Register val, Register table);
1474 void update_word_crc32(Register crc, Register v, Register tmp,
1475 Register table0, Register table1, Register table2, Register table3,
1476 bool upper = false);
1477
1478 address count_positives(Register ary1, Register len, Register result);
1479
1480 address arrays_equals(Register a1, Register a2, Register result, Register cnt1,
1481 Register tmp1, Register tmp2, Register tmp3, int elem_size);
1482
1483 void string_equals(Register a1, Register a2, Register result, Register cnt1);
1484
1485 void fill_words(Register base, Register cnt, Register value);
1486 void fill_words(Register base, uint64_t cnt, Register value);
1487
1488 address zero_words(Register base, uint64_t cnt);
1489 address zero_words(Register ptr, Register cnt);
1490 void zero_dcache_blocks(Register base, Register cnt);
1491
1492 static const int zero_words_block_size;
1493
1494 address byte_array_inflate(Register src, Register dst, Register len,
1495 FloatRegister vtmp1, FloatRegister vtmp2,
1496 FloatRegister vtmp3, Register tmp4);
1497
1498 void char_array_compress(Register src, Register dst, Register len,
1499 Register res,
1500 FloatRegister vtmp0, FloatRegister vtmp1,
1501 FloatRegister vtmp2, FloatRegister vtmp3,
1502 FloatRegister vtmp4, FloatRegister vtmp5);
1503
1504 void encode_iso_array(Register src, Register dst,
1505 Register len, Register res, bool ascii,
1506 FloatRegister vtmp0, FloatRegister vtmp1,
1507 FloatRegister vtmp2, FloatRegister vtmp3,
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