2553       // Receiver did not match any saved receiver and there is no empty row for it.
2554       // Increment total counter to indicate polymorphic case.
2555       __ ldr(tmp1, counter_addr);
2556       __ add(tmp1, tmp1, DataLayout::counter_increment);
2557       __ str(tmp1, counter_addr);
2558 
2559       __ bind(update_done);
2560     }
2561   } else {
2562     // Static call
2563     __ ldr(tmp1, counter_addr);
2564     __ add(tmp1, tmp1, DataLayout::counter_increment);
2565     __ str(tmp1, counter_addr);
2566   }
2567 }
2568 
2569 void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
2570   fatal("Type profiling not implemented on this platform");
2571 }
2572 




2573 void LIR_Assembler::emit_delay(LIR_OpDelay*) {
2574   Unimplemented();
2575 }
2576 
2577 
2578 void LIR_Assembler::monitor_address(int monitor_no, LIR_Opr dst) {
2579   Address mon_addr = frame_map()->address_for_monitor_lock(monitor_no);
2580   __ add_slow(dst->as_pointer_register(), mon_addr.base(), mon_addr.disp());
2581 }
2582 
2583 
2584 void LIR_Assembler::align_backward_branch_target() {
2585   // Some ARM processors do better with 8-byte branch target alignment
2586   __ align(8);
2587 }
2588 
2589 
2590 void LIR_Assembler::negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp) {
2591   // tmp must be unused
2592   assert(tmp->is_illegal(), "wasting a register if tmp is allocated");

2553       // Receiver did not match any saved receiver and there is no empty row for it.
2554       // Increment total counter to indicate polymorphic case.
2555       __ ldr(tmp1, counter_addr);
2556       __ add(tmp1, tmp1, DataLayout::counter_increment);
2557       __ str(tmp1, counter_addr);
2558 
2559       __ bind(update_done);
2560     }
2561   } else {
2562     // Static call
2563     __ ldr(tmp1, counter_addr);
2564     __ add(tmp1, tmp1, DataLayout::counter_increment);
2565     __ str(tmp1, counter_addr);
2566   }
2567 }
2568 
2569 void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
2570   fatal("Type profiling not implemented on this platform");
2571 }
2572 
2573 void LIR_Assembler::emit_profile_inline_type(LIR_OpProfileInlineType* op) {
2574   Unimplemented();
2575 }
2576 
2577 void LIR_Assembler::emit_delay(LIR_OpDelay*) {
2578   Unimplemented();
2579 }
2580 
2581 
2582 void LIR_Assembler::monitor_address(int monitor_no, LIR_Opr dst) {
2583   Address mon_addr = frame_map()->address_for_monitor_lock(monitor_no);
2584   __ add_slow(dst->as_pointer_register(), mon_addr.base(), mon_addr.disp());
2585 }
2586 
2587 
2588 void LIR_Assembler::align_backward_branch_target() {
2589   // Some ARM processors do better with 8-byte branch target alignment
2590   __ align(8);
2591 }
2592 
2593 
2594 void LIR_Assembler::negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp) {
2595   // tmp must be unused
2596   assert(tmp->is_illegal(), "wasting a register if tmp is allocated");