1 /*
2 * Copyright (c) 2008, 2025, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
2542 // Receiver did not match any saved receiver and there is no empty row for it.
2543 // Increment total counter to indicate polymorphic case.
2544 __ ldr(tmp1, counter_addr);
2545 __ add(tmp1, tmp1, DataLayout::counter_increment);
2546 __ str(tmp1, counter_addr);
2547
2548 __ bind(update_done);
2549 }
2550 } else {
2551 // Static call
2552 __ ldr(tmp1, counter_addr);
2553 __ add(tmp1, tmp1, DataLayout::counter_increment);
2554 __ str(tmp1, counter_addr);
2555 }
2556 }
2557
2558 void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
2559 fatal("Type profiling not implemented on this platform");
2560 }
2561
2562 void LIR_Assembler::monitor_address(int monitor_no, LIR_Opr dst) {
2563 Address mon_addr = frame_map()->address_for_monitor_lock(monitor_no);
2564 __ add_slow(dst->as_pointer_register(), mon_addr.base(), mon_addr.disp());
2565 }
2566
2567
2568 void LIR_Assembler::align_backward_branch_target() {
2569 // Some ARM processors do better with 8-byte branch target alignment
2570 __ align(8);
2571 }
2572
2573
2574 void LIR_Assembler::negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp) {
2575 // tmp must be unused
2576 assert(tmp->is_illegal(), "wasting a register if tmp is allocated");
2577
2578 if (left->is_single_cpu()) {
2579 assert (dest->type() == T_INT, "unexpected result type");
2580 assert (left->type() == T_INT, "unexpected left type");
2581 __ neg_32(dest->as_register(), left->as_register());
2841 }
2842 new_val_lo = tmp_lo;
2843 } else {
2844 new_val_lo = data->as_register_lo();
2845 Register new_val_hi = data->as_register_hi();
2846
2847 assert_different_registers(dst_lo, dst_hi, new_val_lo, new_val_hi);
2848 assert(new_val_hi->encoding() == new_val_lo->encoding() + 1, "non aligned register pair");
2849 assert((new_val_lo->encoding() & 0x1) == 0, "misaligned register pair");
2850 }
2851 __ strexd(Rtemp, new_val_lo, addr);
2852 } else {
2853 ShouldNotReachHere();
2854 }
2855
2856 __ cbnz_32(Rtemp, retry);
2857 __ membar(MacroAssembler::Membar_mask_bits(MacroAssembler::StoreLoad | MacroAssembler::StoreStore), Rtemp);
2858
2859 }
2860
2861 #undef __
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1 /*
2 * Copyright (c) 2008, 2026, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
2542 // Receiver did not match any saved receiver and there is no empty row for it.
2543 // Increment total counter to indicate polymorphic case.
2544 __ ldr(tmp1, counter_addr);
2545 __ add(tmp1, tmp1, DataLayout::counter_increment);
2546 __ str(tmp1, counter_addr);
2547
2548 __ bind(update_done);
2549 }
2550 } else {
2551 // Static call
2552 __ ldr(tmp1, counter_addr);
2553 __ add(tmp1, tmp1, DataLayout::counter_increment);
2554 __ str(tmp1, counter_addr);
2555 }
2556 }
2557
2558 void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
2559 fatal("Type profiling not implemented on this platform");
2560 }
2561
2562 void LIR_Assembler::emit_profile_inline_type(LIR_OpProfileInlineType* op) {
2563 Unimplemented();
2564 }
2565
2566 void LIR_Assembler::monitor_address(int monitor_no, LIR_Opr dst) {
2567 Address mon_addr = frame_map()->address_for_monitor_lock(monitor_no);
2568 __ add_slow(dst->as_pointer_register(), mon_addr.base(), mon_addr.disp());
2569 }
2570
2571
2572 void LIR_Assembler::align_backward_branch_target() {
2573 // Some ARM processors do better with 8-byte branch target alignment
2574 __ align(8);
2575 }
2576
2577
2578 void LIR_Assembler::negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp) {
2579 // tmp must be unused
2580 assert(tmp->is_illegal(), "wasting a register if tmp is allocated");
2581
2582 if (left->is_single_cpu()) {
2583 assert (dest->type() == T_INT, "unexpected result type");
2584 assert (left->type() == T_INT, "unexpected left type");
2585 __ neg_32(dest->as_register(), left->as_register());
2845 }
2846 new_val_lo = tmp_lo;
2847 } else {
2848 new_val_lo = data->as_register_lo();
2849 Register new_val_hi = data->as_register_hi();
2850
2851 assert_different_registers(dst_lo, dst_hi, new_val_lo, new_val_hi);
2852 assert(new_val_hi->encoding() == new_val_lo->encoding() + 1, "non aligned register pair");
2853 assert((new_val_lo->encoding() & 0x1) == 0, "misaligned register pair");
2854 }
2855 __ strexd(Rtemp, new_val_lo, addr);
2856 } else {
2857 ShouldNotReachHere();
2858 }
2859
2860 __ cbnz_32(Rtemp, retry);
2861 __ membar(MacroAssembler::Membar_mask_bits(MacroAssembler::StoreLoad | MacroAssembler::StoreStore), Rtemp);
2862
2863 }
2864
2865 // Valhalla support
2866
2867 void LIR_Assembler::check_orig_pc() {
2868 Unimplemented();
2869 }
2870
2871 int LIR_Assembler::store_inline_type_fields_to_buf(ciInlineKlass* vk) {
2872 Unimplemented();
2873 return 0;
2874 }
2875
2876 void LIR_Assembler::emit_opFlattenedArrayCheck(LIR_OpFlattenedArrayCheck* op) {
2877 Unimplemented();
2878 }
2879
2880 void LIR_Assembler::emit_opNullFreeArrayCheck(LIR_OpNullFreeArrayCheck* op) {
2881 Unimplemented();
2882 }
2883
2884 void LIR_Assembler::emit_opSubstitutabilityCheck(LIR_OpSubstitutabilityCheck* op) {
2885 Unimplemented();
2886 }
2887
2888 #undef __
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