2542       // Receiver did not match any saved receiver and there is no empty row for it.
2543       // Increment total counter to indicate polymorphic case.
2544       __ ldr(tmp1, counter_addr);
2545       __ add(tmp1, tmp1, DataLayout::counter_increment);
2546       __ str(tmp1, counter_addr);
2547 
2548       __ bind(update_done);
2549     }
2550   } else {
2551     // Static call
2552     __ ldr(tmp1, counter_addr);
2553     __ add(tmp1, tmp1, DataLayout::counter_increment);
2554     __ str(tmp1, counter_addr);
2555   }
2556 }
2557 
2558 void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
2559   fatal("Type profiling not implemented on this platform");
2560 }
2561 




2562 void LIR_Assembler::monitor_address(int monitor_no, LIR_Opr dst) {
2563   Address mon_addr = frame_map()->address_for_monitor_lock(monitor_no);
2564   __ add_slow(dst->as_pointer_register(), mon_addr.base(), mon_addr.disp());
2565 }
2566 
2567 
2568 void LIR_Assembler::align_backward_branch_target() {
2569   // Some ARM processors do better with 8-byte branch target alignment
2570   __ align(8);
2571 }
2572 
2573 
2574 void LIR_Assembler::negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp) {
2575   // tmp must be unused
2576   assert(tmp->is_illegal(), "wasting a register if tmp is allocated");
2577 
2578   if (left->is_single_cpu()) {
2579     assert (dest->type() == T_INT, "unexpected result type");
2580     assert (left->type() == T_INT, "unexpected left type");
2581     __ neg_32(dest->as_register(), left->as_register());

2542       // Receiver did not match any saved receiver and there is no empty row for it.
2543       // Increment total counter to indicate polymorphic case.
2544       __ ldr(tmp1, counter_addr);
2545       __ add(tmp1, tmp1, DataLayout::counter_increment);
2546       __ str(tmp1, counter_addr);
2547 
2548       __ bind(update_done);
2549     }
2550   } else {
2551     // Static call
2552     __ ldr(tmp1, counter_addr);
2553     __ add(tmp1, tmp1, DataLayout::counter_increment);
2554     __ str(tmp1, counter_addr);
2555   }
2556 }
2557 
2558 void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
2559   fatal("Type profiling not implemented on this platform");
2560 }
2561 
2562 void LIR_Assembler::emit_profile_inline_type(LIR_OpProfileInlineType* op) {
2563   Unimplemented();
2564 }
2565 
2566 void LIR_Assembler::monitor_address(int monitor_no, LIR_Opr dst) {
2567   Address mon_addr = frame_map()->address_for_monitor_lock(monitor_no);
2568   __ add_slow(dst->as_pointer_register(), mon_addr.base(), mon_addr.disp());
2569 }
2570 
2571 
2572 void LIR_Assembler::align_backward_branch_target() {
2573   // Some ARM processors do better with 8-byte branch target alignment
2574   __ align(8);
2575 }
2576 
2577 
2578 void LIR_Assembler::negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp) {
2579   // tmp must be unused
2580   assert(tmp->is_illegal(), "wasting a register if tmp is allocated");
2581 
2582   if (left->is_single_cpu()) {
2583     assert (dest->type() == T_INT, "unexpected result type");
2584     assert (left->type() == T_INT, "unexpected left type");
2585     __ neg_32(dest->as_register(), left->as_register());