2547       // Receiver did not match any saved receiver and there is no empty row for it.
2548       // Increment total counter to indicate polymorphic case.
2549       __ ldr(tmp1, counter_addr);
2550       __ add(tmp1, tmp1, DataLayout::counter_increment);
2551       __ str(tmp1, counter_addr);
2552 
2553       __ bind(update_done);
2554     }
2555   } else {
2556     // Static call
2557     __ ldr(tmp1, counter_addr);
2558     __ add(tmp1, tmp1, DataLayout::counter_increment);
2559     __ str(tmp1, counter_addr);
2560   }
2561 }
2562 
2563 void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
2564   fatal("Type profiling not implemented on this platform");
2565 }
2566 




2567 void LIR_Assembler::emit_delay(LIR_OpDelay*) {
2568   Unimplemented();
2569 }
2570 
2571 
2572 void LIR_Assembler::monitor_address(int monitor_no, LIR_Opr dst) {
2573   Address mon_addr = frame_map()->address_for_monitor_lock(monitor_no);
2574   __ add_slow(dst->as_pointer_register(), mon_addr.base(), mon_addr.disp());
2575 }
2576 
2577 
2578 void LIR_Assembler::align_backward_branch_target() {
2579   // Some ARM processors do better with 8-byte branch target alignment
2580   __ align(8);
2581 }
2582 
2583 
2584 void LIR_Assembler::negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp) {
2585   // tmp must be unused
2586   assert(tmp->is_illegal(), "wasting a register if tmp is allocated");

2547       // Receiver did not match any saved receiver and there is no empty row for it.
2548       // Increment total counter to indicate polymorphic case.
2549       __ ldr(tmp1, counter_addr);
2550       __ add(tmp1, tmp1, DataLayout::counter_increment);
2551       __ str(tmp1, counter_addr);
2552 
2553       __ bind(update_done);
2554     }
2555   } else {
2556     // Static call
2557     __ ldr(tmp1, counter_addr);
2558     __ add(tmp1, tmp1, DataLayout::counter_increment);
2559     __ str(tmp1, counter_addr);
2560   }
2561 }
2562 
2563 void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
2564   fatal("Type profiling not implemented on this platform");
2565 }
2566 
2567 void LIR_Assembler::emit_profile_inline_type(LIR_OpProfileInlineType* op) {
2568   Unimplemented();
2569 }
2570 
2571 void LIR_Assembler::emit_delay(LIR_OpDelay*) {
2572   Unimplemented();
2573 }
2574 
2575 
2576 void LIR_Assembler::monitor_address(int monitor_no, LIR_Opr dst) {
2577   Address mon_addr = frame_map()->address_for_monitor_lock(monitor_no);
2578   __ add_slow(dst->as_pointer_register(), mon_addr.base(), mon_addr.disp());
2579 }
2580 
2581 
2582 void LIR_Assembler::align_backward_branch_target() {
2583   // Some ARM processors do better with 8-byte branch target alignment
2584   __ align(8);
2585 }
2586 
2587 
2588 void LIR_Assembler::negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp) {
2589   // tmp must be unused
2590   assert(tmp->is_illegal(), "wasting a register if tmp is allocated");