2554       // Receiver did not match any saved receiver and there is no empty row for it.
2555       // Increment total counter to indicate polymorphic case.
2556       __ ldr(tmp1, counter_addr);
2557       __ add(tmp1, tmp1, DataLayout::counter_increment);
2558       __ str(tmp1, counter_addr);
2559 
2560       __ bind(update_done);
2561     }
2562   } else {
2563     // Static call
2564     __ ldr(tmp1, counter_addr);
2565     __ add(tmp1, tmp1, DataLayout::counter_increment);
2566     __ str(tmp1, counter_addr);
2567   }
2568 }
2569 
2570 void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
2571   fatal("Type profiling not implemented on this platform");
2572 }
2573 




2574 void LIR_Assembler::emit_delay(LIR_OpDelay*) {
2575   Unimplemented();
2576 }
2577 
2578 
2579 void LIR_Assembler::monitor_address(int monitor_no, LIR_Opr dst) {
2580   Address mon_addr = frame_map()->address_for_monitor_lock(monitor_no);
2581   __ add_slow(dst->as_pointer_register(), mon_addr.base(), mon_addr.disp());
2582 }
2583 
2584 
2585 void LIR_Assembler::align_backward_branch_target() {
2586   // Some ARM processors do better with 8-byte branch target alignment
2587   __ align(8);
2588 }
2589 
2590 
2591 void LIR_Assembler::negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp) {
2592   // tmp must be unused
2593   assert(tmp->is_illegal(), "wasting a register if tmp is allocated");

2554       // Receiver did not match any saved receiver and there is no empty row for it.
2555       // Increment total counter to indicate polymorphic case.
2556       __ ldr(tmp1, counter_addr);
2557       __ add(tmp1, tmp1, DataLayout::counter_increment);
2558       __ str(tmp1, counter_addr);
2559 
2560       __ bind(update_done);
2561     }
2562   } else {
2563     // Static call
2564     __ ldr(tmp1, counter_addr);
2565     __ add(tmp1, tmp1, DataLayout::counter_increment);
2566     __ str(tmp1, counter_addr);
2567   }
2568 }
2569 
2570 void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
2571   fatal("Type profiling not implemented on this platform");
2572 }
2573 
2574 void LIR_Assembler::emit_profile_inline_type(LIR_OpProfileInlineType* op) {
2575   Unimplemented();
2576 }
2577 
2578 void LIR_Assembler::emit_delay(LIR_OpDelay*) {
2579   Unimplemented();
2580 }
2581 
2582 
2583 void LIR_Assembler::monitor_address(int monitor_no, LIR_Opr dst) {
2584   Address mon_addr = frame_map()->address_for_monitor_lock(monitor_no);
2585   __ add_slow(dst->as_pointer_register(), mon_addr.base(), mon_addr.disp());
2586 }
2587 
2588 
2589 void LIR_Assembler::align_backward_branch_target() {
2590   // Some ARM processors do better with 8-byte branch target alignment
2591   __ align(8);
2592 }
2593 
2594 
2595 void LIR_Assembler::negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp) {
2596   // tmp must be unused
2597   assert(tmp->is_illegal(), "wasting a register if tmp is allocated");