2541       // Receiver did not match any saved receiver and there is no empty row for it.
2542       // Increment total counter to indicate polymorphic case.
2543       __ ldr(tmp1, counter_addr);
2544       __ add(tmp1, tmp1, DataLayout::counter_increment);
2545       __ str(tmp1, counter_addr);
2546 
2547       __ bind(update_done);
2548     }
2549   } else {
2550     // Static call
2551     __ ldr(tmp1, counter_addr);
2552     __ add(tmp1, tmp1, DataLayout::counter_increment);
2553     __ str(tmp1, counter_addr);
2554   }
2555 }
2556 
2557 void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
2558   fatal("Type profiling not implemented on this platform");
2559 }
2560 




2561 void LIR_Assembler::emit_delay(LIR_OpDelay*) {
2562   Unimplemented();
2563 }
2564 
2565 
2566 void LIR_Assembler::monitor_address(int monitor_no, LIR_Opr dst) {
2567   Address mon_addr = frame_map()->address_for_monitor_lock(monitor_no);
2568   __ add_slow(dst->as_pointer_register(), mon_addr.base(), mon_addr.disp());
2569 }
2570 
2571 
2572 void LIR_Assembler::align_backward_branch_target() {
2573   // Some ARM processors do better with 8-byte branch target alignment
2574   __ align(8);
2575 }
2576 
2577 
2578 void LIR_Assembler::negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp) {
2579   // tmp must be unused
2580   assert(tmp->is_illegal(), "wasting a register if tmp is allocated");

2541       // Receiver did not match any saved receiver and there is no empty row for it.
2542       // Increment total counter to indicate polymorphic case.
2543       __ ldr(tmp1, counter_addr);
2544       __ add(tmp1, tmp1, DataLayout::counter_increment);
2545       __ str(tmp1, counter_addr);
2546 
2547       __ bind(update_done);
2548     }
2549   } else {
2550     // Static call
2551     __ ldr(tmp1, counter_addr);
2552     __ add(tmp1, tmp1, DataLayout::counter_increment);
2553     __ str(tmp1, counter_addr);
2554   }
2555 }
2556 
2557 void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
2558   fatal("Type profiling not implemented on this platform");
2559 }
2560 
2561 void LIR_Assembler::emit_profile_inline_type(LIR_OpProfileInlineType* op) {
2562   Unimplemented();
2563 }
2564 
2565 void LIR_Assembler::emit_delay(LIR_OpDelay*) {
2566   Unimplemented();
2567 }
2568 
2569 
2570 void LIR_Assembler::monitor_address(int monitor_no, LIR_Opr dst) {
2571   Address mon_addr = frame_map()->address_for_monitor_lock(monitor_no);
2572   __ add_slow(dst->as_pointer_register(), mon_addr.base(), mon_addr.disp());
2573 }
2574 
2575 
2576 void LIR_Assembler::align_backward_branch_target() {
2577   // Some ARM processors do better with 8-byte branch target alignment
2578   __ align(8);
2579 }
2580 
2581 
2582 void LIR_Assembler::negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp) {
2583   // tmp must be unused
2584   assert(tmp->is_illegal(), "wasting a register if tmp is allocated");