2534 // Receiver did not match any saved receiver and there is no empty row for it.
2535 // Increment total counter to indicate polymorphic case.
2536 __ ldr(tmp1, counter_addr);
2537 __ add(tmp1, tmp1, DataLayout::counter_increment);
2538 __ str(tmp1, counter_addr);
2539
2540 __ bind(update_done);
2541 }
2542 } else {
2543 // Static call
2544 __ ldr(tmp1, counter_addr);
2545 __ add(tmp1, tmp1, DataLayout::counter_increment);
2546 __ str(tmp1, counter_addr);
2547 }
2548 }
2549
2550 void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
2551 fatal("Type profiling not implemented on this platform");
2552 }
2553
2554 void LIR_Assembler::monitor_address(int monitor_no, LIR_Opr dst) {
2555 Address mon_addr = frame_map()->address_for_monitor_lock(monitor_no);
2556 __ add_slow(dst->as_pointer_register(), mon_addr.base(), mon_addr.disp());
2557 }
2558
2559
2560 void LIR_Assembler::align_backward_branch_target() {
2561 // Some ARM processors do better with 8-byte branch target alignment
2562 __ align(8);
2563 }
2564
2565
2566 void LIR_Assembler::negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp) {
2567 // tmp must be unused
2568 assert(tmp->is_illegal(), "wasting a register if tmp is allocated");
2569
2570 if (left->is_single_cpu()) {
2571 assert (dest->type() == T_INT, "unexpected result type");
2572 assert (left->type() == T_INT, "unexpected left type");
2573 __ neg_32(dest->as_register(), left->as_register());
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2534 // Receiver did not match any saved receiver and there is no empty row for it.
2535 // Increment total counter to indicate polymorphic case.
2536 __ ldr(tmp1, counter_addr);
2537 __ add(tmp1, tmp1, DataLayout::counter_increment);
2538 __ str(tmp1, counter_addr);
2539
2540 __ bind(update_done);
2541 }
2542 } else {
2543 // Static call
2544 __ ldr(tmp1, counter_addr);
2545 __ add(tmp1, tmp1, DataLayout::counter_increment);
2546 __ str(tmp1, counter_addr);
2547 }
2548 }
2549
2550 void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
2551 fatal("Type profiling not implemented on this platform");
2552 }
2553
2554 void LIR_Assembler::emit_profile_inline_type(LIR_OpProfileInlineType* op) {
2555 Unimplemented();
2556 }
2557
2558 void LIR_Assembler::monitor_address(int monitor_no, LIR_Opr dst) {
2559 Address mon_addr = frame_map()->address_for_monitor_lock(monitor_no);
2560 __ add_slow(dst->as_pointer_register(), mon_addr.base(), mon_addr.disp());
2561 }
2562
2563
2564 void LIR_Assembler::align_backward_branch_target() {
2565 // Some ARM processors do better with 8-byte branch target alignment
2566 __ align(8);
2567 }
2568
2569
2570 void LIR_Assembler::negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp) {
2571 // tmp must be unused
2572 assert(tmp->is_illegal(), "wasting a register if tmp is allocated");
2573
2574 if (left->is_single_cpu()) {
2575 assert (dest->type() == T_INT, "unexpected result type");
2576 assert (left->type() == T_INT, "unexpected left type");
2577 __ neg_32(dest->as_register(), left->as_register());
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