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src/hotspot/cpu/riscv/c1_LIRAssembler_riscv.hpp

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  1 /*
  2  * Copyright (c) 2000, 2025, Oracle and/or its affiliates. All rights reserved.
  3  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
  4  * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved.
  5  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  6  *
  7  * This code is free software; you can redistribute it and/or modify it
  8  * under the terms of the GNU General Public License version 2 only, as
  9  * published by the Free Software Foundation.
 10  *
 11  * This code is distributed in the hope that it will be useful, but WITHOUT
 12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 14  * version 2 for more details (a copy is included in the LICENSE file that
 15  * accompanied this code).
 16  *
 17  * You should have received a copy of the GNU General Public License version
 18  * 2 along with this work; if not, write to the Free Software Foundation,
 19  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 20  *
 21  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 22  * or visit www.oracle.com if you need additional information or have any

 95                                   Register k_RInfo, Register klass_RInfo,
 96                                   Label* failure_target, Label* success_target);
 97   void profile_object(ciMethodData* md, ciProfileData* data, Register obj,
 98                       Register k_RInfo, Register klass_RInfo, Label* obj_is_null);
 99   void typecheck_loaded(LIR_OpTypeCheck* op, ciKlass* k, Register k_RInfo);
100 
101   // emit_opTypeCheck sub functions
102   void typecheck_lir_store(LIR_OpTypeCheck* op, bool should_profile);
103 
104   void lir_store_slowcheck(Register k_RInfo, Register klass_RInfo, Register Rtmp1,
105                            Label* success_target, Label* failure_target);
106 
107   void const2reg_helper(LIR_Opr src);
108 
109   void emit_branch(LIR_Condition cmp_flag, LIR_Opr cmp1, LIR_Opr cmp2, Label& label, bool is_far, bool is_unordered);
110 
111   void logic_op_reg32(Register dst, Register left, Register right, LIR_Code code);
112   void logic_op_reg(Register dst, Register left, Register right, LIR_Code code);
113   void logic_op_imm(Register dst, Register left, int right, LIR_Code code);
114 

115 public:
116 
117   void emit_cmove(LIR_Op4* op);
118 
119   void store_parameter(Register r, int offset_from_rsp_in_words);
120   void store_parameter(jint c, int offset_from_rsp_in_words);
121 
122 #endif // CPU_RISCV_C1_LIRASSEMBLER_RISCV_HPP

  1 /*
  2  * Copyright (c) 2000, 2026, Oracle and/or its affiliates. All rights reserved.
  3  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
  4  * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved.
  5  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  6  *
  7  * This code is free software; you can redistribute it and/or modify it
  8  * under the terms of the GNU General Public License version 2 only, as
  9  * published by the Free Software Foundation.
 10  *
 11  * This code is distributed in the hope that it will be useful, but WITHOUT
 12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 14  * version 2 for more details (a copy is included in the LICENSE file that
 15  * accompanied this code).
 16  *
 17  * You should have received a copy of the GNU General Public License version
 18  * 2 along with this work; if not, write to the Free Software Foundation,
 19  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 20  *
 21  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 22  * or visit www.oracle.com if you need additional information or have any

 95                                   Register k_RInfo, Register klass_RInfo,
 96                                   Label* failure_target, Label* success_target);
 97   void profile_object(ciMethodData* md, ciProfileData* data, Register obj,
 98                       Register k_RInfo, Register klass_RInfo, Label* obj_is_null);
 99   void typecheck_loaded(LIR_OpTypeCheck* op, ciKlass* k, Register k_RInfo);
100 
101   // emit_opTypeCheck sub functions
102   void typecheck_lir_store(LIR_OpTypeCheck* op, bool should_profile);
103 
104   void lir_store_slowcheck(Register k_RInfo, Register klass_RInfo, Register Rtmp1,
105                            Label* success_target, Label* failure_target);
106 
107   void const2reg_helper(LIR_Opr src);
108 
109   void emit_branch(LIR_Condition cmp_flag, LIR_Opr cmp1, LIR_Opr cmp2, Label& label, bool is_far, bool is_unordered);
110 
111   void logic_op_reg32(Register dst, Register left, Register right, LIR_Code code);
112   void logic_op_reg(Register dst, Register left, Register right, LIR_Code code);
113   void logic_op_imm(Register dst, Register left, int right, LIR_Code code);
114 
115   void move(LIR_Opr src, LIR_Opr dst);
116 public:
117 
118   void emit_cmove(LIR_Op4* op);
119 
120   void store_parameter(Register r, int offset_from_rsp_in_words);
121   void store_parameter(jint c, int offset_from_rsp_in_words);
122 
123 #endif // CPU_RISCV_C1_LIRASSEMBLER_RISCV_HPP
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