16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
23 * questions.
24 *
25 */
26
27 #ifndef CPU_RISCV_MACROASSEMBLER_RISCV_HPP
28 #define CPU_RISCV_MACROASSEMBLER_RISCV_HPP
29
30 #include "asm/assembler.inline.hpp"
31 #include "code/vmreg.hpp"
32 #include "metaprogramming/enableIf.hpp"
33 #include "oops/compressedOops.hpp"
34 #include "utilities/powerOfTwo.hpp"
35
36 // MacroAssembler extends Assembler by frequently used macros.
37 //
38 // Instructions for which a 'better' code sequence exists depending
39 // on arguments should also go in here.
40
41 class MacroAssembler: public Assembler {
42
43 public:
44
45 MacroAssembler(CodeBuffer* code) : Assembler(code) {}
46
47 void safepoint_poll(Label& slow_path, bool at_return, bool in_nmethod, Register tmp_reg = t0);
48
49 // Alignment
50 int align(int modulus, int extra_offset = 0);
51
52 static inline void assert_alignment(address pc, int alignment = MacroAssembler::instruction_size) {
53 assert(is_aligned(pc, alignment), "bad alignment");
54 }
55
1791
1792 // the instruction sequence of load_label is as below:
1793 // auipc
1794 // load
1795 static bool check_load_pc_relative_data_dependency(address instr) {
1796 address auipc = instr;
1797 address load = auipc + MacroAssembler::instruction_size;
1798
1799 return extract_rd(load) == extract_rd(auipc) &&
1800 extract_rs1(load) == extract_rd(load);
1801 }
1802
1803 static bool is_li32_at(address instr);
1804 static bool is_pc_relative_at(address branch);
1805
1806 static bool is_membar(address addr) {
1807 return (Bytes::get_native_u4(addr) & 0x7f) == 0b1111 && extract_funct3(addr) == 0;
1808 }
1809 static uint32_t get_membar_kind(address addr);
1810 static void set_membar_kind(address addr, uint32_t order_kind);
1811 };
1812
1813 #ifdef ASSERT
1814 inline bool AbstractAssembler::pd_check_instruction_mark() { return false; }
1815 #endif
1816
1817 #endif // CPU_RISCV_MACROASSEMBLER_RISCV_HPP
|
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
23 * questions.
24 *
25 */
26
27 #ifndef CPU_RISCV_MACROASSEMBLER_RISCV_HPP
28 #define CPU_RISCV_MACROASSEMBLER_RISCV_HPP
29
30 #include "asm/assembler.inline.hpp"
31 #include "code/vmreg.hpp"
32 #include "metaprogramming/enableIf.hpp"
33 #include "oops/compressedOops.hpp"
34 #include "utilities/powerOfTwo.hpp"
35
36 class ciInlineKlass;
37 class SigEntry;
38 class VMRegPair;
39
40 // MacroAssembler extends Assembler by frequently used macros.
41 //
42 // Instructions for which a 'better' code sequence exists depending
43 // on arguments should also go in here.
44
45 class MacroAssembler: public Assembler {
46
47 public:
48
49 MacroAssembler(CodeBuffer* code) : Assembler(code) {}
50
51 void safepoint_poll(Label& slow_path, bool at_return, bool in_nmethod, Register tmp_reg = t0);
52
53 // Alignment
54 int align(int modulus, int extra_offset = 0);
55
56 static inline void assert_alignment(address pc, int alignment = MacroAssembler::instruction_size) {
57 assert(is_aligned(pc, alignment), "bad alignment");
58 }
59
1795
1796 // the instruction sequence of load_label is as below:
1797 // auipc
1798 // load
1799 static bool check_load_pc_relative_data_dependency(address instr) {
1800 address auipc = instr;
1801 address load = auipc + MacroAssembler::instruction_size;
1802
1803 return extract_rd(load) == extract_rd(auipc) &&
1804 extract_rs1(load) == extract_rd(load);
1805 }
1806
1807 static bool is_li32_at(address instr);
1808 static bool is_pc_relative_at(address branch);
1809
1810 static bool is_membar(address addr) {
1811 return (Bytes::get_native_u4(addr) & 0x7f) == 0b1111 && extract_funct3(addr) == 0;
1812 }
1813 static uint32_t get_membar_kind(address addr);
1814 static void set_membar_kind(address addr, uint32_t order_kind);
1815
1816 public:
1817 // Inline type specific methods
1818 #include "asm/macroAssembler_common.hpp"
1819 };
1820
1821 #ifdef ASSERT
1822 inline bool AbstractAssembler::pd_check_instruction_mark() { return false; }
1823 #endif
1824
1825 #endif // CPU_RISCV_MACROASSEMBLER_RISCV_HPP
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