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src/hotspot/cpu/riscv/riscv.ad

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 1423       C2EntryBarrierStub* stub = new (Compile::current()->comp_arena()) C2EntryBarrierStub();
 1424       Compile::current()->output()->add_stub(stub);
 1425       slow_path = &stub->entry();
 1426       continuation = &stub->continuation();
 1427       guard = &stub->guard();
 1428     }
 1429     // In the C2 code, we move the non-hot part of nmethod entry barriers out-of-line to a stub.
 1430     bs->nmethod_entry_barrier(masm, slow_path, continuation, guard);
 1431   }
 1432 
 1433   C->output()->set_frame_complete(__ offset());
 1434 
 1435   if (C->has_mach_constant_base_node()) {
 1436     // NOTE: We set the table base offset here because users might be
 1437     // emitted before MachConstantBaseNode.
 1438     ConstantTable& constant_table = C->output()->constant_table();
 1439     constant_table.set_table_base_offset(constant_table.calculate_table_base_offset());
 1440   }
 1441 }
 1442 
 1443 uint MachPrologNode::size(PhaseRegAlloc* ra_) const
 1444 {
 1445   assert_cond(ra_ != nullptr);
 1446   return MachNode::size(ra_); // too many variables; just compute it
 1447                               // the hard way
 1448 }
 1449 
 1450 int MachPrologNode::reloc() const
 1451 {
 1452   return 0;
 1453 }
 1454 
 1455 //=============================================================================
 1456 
 1457 #ifndef PRODUCT
 1458 void MachEpilogNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
 1459   assert_cond(st != nullptr && ra_ != nullptr);
 1460   Compile* C = ra_->C;
 1461   assert_cond(C != nullptr);
 1462   int framesize = C->output()->frame_size_in_bytes();
 1463 
 1464   st->print("# pop frame %d\n\t", framesize);
 1465 
 1466   if (framesize == 0) {
 1467     st->print("ld  ra, [sp,#%d]\n\t", (2 * wordSize));
 1468     st->print("ld  fp, [sp,#%d]\n\t", (3 * wordSize));
 1469     st->print("add sp, sp, #%d\n\t", (2 * wordSize));

 1489 
 1490   __ remove_frame(framesize);
 1491 
 1492   if (StackReservedPages > 0 && C->has_reserved_stack_access()) {
 1493     __ reserved_stack_check();
 1494   }
 1495 
 1496   if (do_polling() && C->is_method_compilation()) {
 1497     Label dummy_label;
 1498     Label* code_stub = &dummy_label;
 1499     if (!C->output()->in_scratch_emit_size()) {
 1500       C2SafepointPollStub* stub = new (C->comp_arena()) C2SafepointPollStub(__ offset());
 1501       C->output()->add_stub(stub);
 1502       code_stub = &stub->entry();
 1503     }
 1504     __ relocate(relocInfo::poll_return_type);
 1505     __ safepoint_poll(*code_stub, true /* at_return */, true /* in_nmethod */);
 1506   }
 1507 }
 1508 
 1509 uint MachEpilogNode::size(PhaseRegAlloc *ra_) const {
 1510   assert_cond(ra_ != nullptr);
 1511   // Variable size. Determine dynamically.
 1512   return MachNode::size(ra_);
 1513 }
 1514 
 1515 int MachEpilogNode::reloc() const {
 1516   // Return number of relocatable values contained in this instruction.
 1517   return 1; // 1 for polling page.
 1518 }
 1519 const Pipeline * MachEpilogNode::pipeline() const {
 1520   return MachNode::pipeline_class();
 1521 }
 1522 
 1523 //=============================================================================
 1524 
 1525 // Figure out which register class each belongs in: rc_int, rc_float or
 1526 // rc_stack.
 1527 enum RC { rc_bad, rc_int, rc_float, rc_vector, rc_stack };
 1528 
 1529 static enum RC rc_class(OptoReg::Name reg) {
 1530 
 1531   if (reg == OptoReg::Bad) {
 1532     return rc_bad;
 1533   }
 1534 

 1773     __ addi(as_Register(reg), sp, offset);
 1774   } else {
 1775     __ li32(t0, offset);
 1776     __ add(as_Register(reg), sp, t0);
 1777   }
 1778 }
 1779 
 1780 uint BoxLockNode::size(PhaseRegAlloc *ra_) const {
 1781   // BoxLockNode is not a MachNode, so we can't just call MachNode::size(ra_).
 1782   int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
 1783 
 1784   if (Assembler::is_simm12(offset)) {
 1785     return NativeInstruction::instruction_size;
 1786   } else {
 1787     return 3 * NativeInstruction::instruction_size; // lui + addiw + add;
 1788   }
 1789 }
 1790 
 1791 //=============================================================================
 1792 












 1793 #ifndef PRODUCT
 1794 void MachUEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
 1795 {
 1796   assert_cond(st != nullptr);
 1797   st->print_cr("# MachUEPNode");
 1798   st->print_cr("\tlwu t1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass");
 1799   st->print_cr("\tlwu t2, [t0      + CompiledICData::speculated_klass_offset()]\t# compressed klass");
 1800   st->print_cr("\tbeq t1, t2, ic_hit");
 1801   st->print_cr("\tj, SharedRuntime::_ic_miss_stub\t # Inline cache check");
 1802   st->print_cr("\tic_hit:");
 1803 }
 1804 #endif
 1805 
 1806 void MachUEPNode::emit(C2_MacroAssembler* masm, PhaseRegAlloc* ra_) const
 1807 {
 1808   // This is the unverified entry point.
 1809   __ ic_check(CodeEntryAlignment);
 1810 
 1811   // ic_check() aligns to CodeEntryAlignment >= InteriorEntryAlignment(min 16) > NativeInstruction::instruction_size(4).
 1812   assert(((__ offset()) % CodeEntryAlignment) == 0, "Misaligned verified entry point");
 1813 }
 1814 
 1815 uint MachUEPNode::size(PhaseRegAlloc* ra_) const
 1816 {
 1817   assert_cond(ra_ != nullptr);
 1818   return MachNode::size(ra_);
 1819 }
 1820 
 1821 // REQUIRED EMIT CODE
 1822 
 1823 //=============================================================================
 1824 
 1825 // Emit deopt handler code.
 1826 int HandlerImpl::emit_deopt_handler(C2_MacroAssembler* masm)
 1827 {
 1828   address base = __ start_a_stub(size_deopt_handler());
 1829   if (base == nullptr) {
 1830     ciEnv::current()->record_failure("CodeCache is full");
 1831     return 0;  // CodeBuffer::expand failed
 1832   }
 1833   int offset = __ offset();
 1834 
 1835   Label start;
 1836   __ bind(start);
 1837 
 1838   __ far_call(RuntimeAddress(SharedRuntime::deopt_blob()->unpack()));
 1839 
 1840   int entry_offset = __ offset();

 1423       C2EntryBarrierStub* stub = new (Compile::current()->comp_arena()) C2EntryBarrierStub();
 1424       Compile::current()->output()->add_stub(stub);
 1425       slow_path = &stub->entry();
 1426       continuation = &stub->continuation();
 1427       guard = &stub->guard();
 1428     }
 1429     // In the C2 code, we move the non-hot part of nmethod entry barriers out-of-line to a stub.
 1430     bs->nmethod_entry_barrier(masm, slow_path, continuation, guard);
 1431   }
 1432 
 1433   C->output()->set_frame_complete(__ offset());
 1434 
 1435   if (C->has_mach_constant_base_node()) {
 1436     // NOTE: We set the table base offset here because users might be
 1437     // emitted before MachConstantBaseNode.
 1438     ConstantTable& constant_table = C->output()->constant_table();
 1439     constant_table.set_table_base_offset(constant_table.calculate_table_base_offset());
 1440   }
 1441 }
 1442 







 1443 int MachPrologNode::reloc() const
 1444 {
 1445   return 0;
 1446 }
 1447 
 1448 //=============================================================================
 1449 
 1450 #ifndef PRODUCT
 1451 void MachEpilogNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
 1452   assert_cond(st != nullptr && ra_ != nullptr);
 1453   Compile* C = ra_->C;
 1454   assert_cond(C != nullptr);
 1455   int framesize = C->output()->frame_size_in_bytes();
 1456 
 1457   st->print("# pop frame %d\n\t", framesize);
 1458 
 1459   if (framesize == 0) {
 1460     st->print("ld  ra, [sp,#%d]\n\t", (2 * wordSize));
 1461     st->print("ld  fp, [sp,#%d]\n\t", (3 * wordSize));
 1462     st->print("add sp, sp, #%d\n\t", (2 * wordSize));

 1482 
 1483   __ remove_frame(framesize);
 1484 
 1485   if (StackReservedPages > 0 && C->has_reserved_stack_access()) {
 1486     __ reserved_stack_check();
 1487   }
 1488 
 1489   if (do_polling() && C->is_method_compilation()) {
 1490     Label dummy_label;
 1491     Label* code_stub = &dummy_label;
 1492     if (!C->output()->in_scratch_emit_size()) {
 1493       C2SafepointPollStub* stub = new (C->comp_arena()) C2SafepointPollStub(__ offset());
 1494       C->output()->add_stub(stub);
 1495       code_stub = &stub->entry();
 1496     }
 1497     __ relocate(relocInfo::poll_return_type);
 1498     __ safepoint_poll(*code_stub, true /* at_return */, true /* in_nmethod */);
 1499   }
 1500 }
 1501 






 1502 int MachEpilogNode::reloc() const {
 1503   // Return number of relocatable values contained in this instruction.
 1504   return 1; // 1 for polling page.
 1505 }
 1506 const Pipeline * MachEpilogNode::pipeline() const {
 1507   return MachNode::pipeline_class();
 1508 }
 1509 
 1510 //=============================================================================
 1511 
 1512 // Figure out which register class each belongs in: rc_int, rc_float or
 1513 // rc_stack.
 1514 enum RC { rc_bad, rc_int, rc_float, rc_vector, rc_stack };
 1515 
 1516 static enum RC rc_class(OptoReg::Name reg) {
 1517 
 1518   if (reg == OptoReg::Bad) {
 1519     return rc_bad;
 1520   }
 1521 

 1760     __ addi(as_Register(reg), sp, offset);
 1761   } else {
 1762     __ li32(t0, offset);
 1763     __ add(as_Register(reg), sp, t0);
 1764   }
 1765 }
 1766 
 1767 uint BoxLockNode::size(PhaseRegAlloc *ra_) const {
 1768   // BoxLockNode is not a MachNode, so we can't just call MachNode::size(ra_).
 1769   int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
 1770 
 1771   if (Assembler::is_simm12(offset)) {
 1772     return NativeInstruction::instruction_size;
 1773   } else {
 1774     return 3 * NativeInstruction::instruction_size; // lui + addiw + add;
 1775   }
 1776 }
 1777 
 1778 //=============================================================================
 1779 
 1780 #ifndef PRODUCT
 1781 void MachVEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
 1782 {
 1783   Unimplemented();
 1784 }
 1785 #endif
 1786 
 1787 void MachVEPNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc* ra_) const
 1788 {
 1789   Unimplemented();
 1790 }
 1791 
 1792 #ifndef PRODUCT
 1793 void MachUEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
 1794 {
 1795   assert_cond(st != nullptr);
 1796   st->print_cr("# MachUEPNode");
 1797   st->print_cr("\tlwu t1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass");
 1798   st->print_cr("\tlwu t2, [t0      + CompiledICData::speculated_klass_offset()]\t# compressed klass");
 1799   st->print_cr("\tbeq t1, t2, ic_hit");
 1800   st->print_cr("\tj, SharedRuntime::_ic_miss_stub\t # Inline cache check");
 1801   st->print_cr("\tic_hit:");
 1802 }
 1803 #endif
 1804 
 1805 void MachUEPNode::emit(C2_MacroAssembler* masm, PhaseRegAlloc* ra_) const
 1806 {
 1807   // This is the unverified entry point.
 1808   __ ic_check(CodeEntryAlignment);
 1809 
 1810   // ic_check() aligns to CodeEntryAlignment >= InteriorEntryAlignment(min 16) > NativeInstruction::instruction_size(4).
 1811   assert(((__ offset()) % CodeEntryAlignment) == 0, "Misaligned verified entry point");
 1812 }
 1813 






 1814 // REQUIRED EMIT CODE
 1815 
 1816 //=============================================================================
 1817 
 1818 // Emit deopt handler code.
 1819 int HandlerImpl::emit_deopt_handler(C2_MacroAssembler* masm)
 1820 {
 1821   address base = __ start_a_stub(size_deopt_handler());
 1822   if (base == nullptr) {
 1823     ciEnv::current()->record_failure("CodeCache is full");
 1824     return 0;  // CodeBuffer::expand failed
 1825   }
 1826   int offset = __ offset();
 1827 
 1828   Label start;
 1829   __ bind(start);
 1830 
 1831   __ far_call(RuntimeAddress(SharedRuntime::deopt_blob()->unpack()));
 1832 
 1833   int entry_offset = __ offset();
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