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src/hotspot/cpu/riscv/riscv.ad

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 1429       C2EntryBarrierStub* stub = new (Compile::current()->comp_arena()) C2EntryBarrierStub();
 1430       Compile::current()->output()->add_stub(stub);
 1431       slow_path = &stub->entry();
 1432       continuation = &stub->continuation();
 1433       guard = &stub->guard();
 1434     }
 1435     // In the C2 code, we move the non-hot part of nmethod entry barriers out-of-line to a stub.
 1436     bs->nmethod_entry_barrier(masm, slow_path, continuation, guard);
 1437   }
 1438 
 1439   C->output()->set_frame_complete(__ offset());
 1440 
 1441   if (C->has_mach_constant_base_node()) {
 1442     // NOTE: We set the table base offset here because users might be
 1443     // emitted before MachConstantBaseNode.
 1444     ConstantTable& constant_table = C->output()->constant_table();
 1445     constant_table.set_table_base_offset(constant_table.calculate_table_base_offset());
 1446   }
 1447 }
 1448 
 1449 uint MachPrologNode::size(PhaseRegAlloc* ra_) const
 1450 {
 1451   assert_cond(ra_ != nullptr);
 1452   return MachNode::size(ra_); // too many variables; just compute it
 1453                               // the hard way
 1454 }
 1455 
 1456 int MachPrologNode::reloc() const
 1457 {
 1458   return 0;
 1459 }
 1460 
 1461 //=============================================================================
 1462 
 1463 #ifndef PRODUCT
 1464 void MachEpilogNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
 1465   assert_cond(st != nullptr && ra_ != nullptr);
 1466   Compile* C = ra_->C;
 1467   assert_cond(C != nullptr);
 1468   int framesize = C->output()->frame_size_in_bytes();
 1469 
 1470   st->print("# pop frame %d\n\t", framesize);
 1471 
 1472   if (framesize == 0) {
 1473     st->print("ld  ra, [sp,#%d]\n\t", (2 * wordSize));
 1474     st->print("ld  fp, [sp,#%d]\n\t", (3 * wordSize));
 1475     st->print("add sp, sp, #%d\n\t", (2 * wordSize));

 1495 
 1496   __ remove_frame(framesize);
 1497 
 1498   if (StackReservedPages > 0 && C->has_reserved_stack_access()) {
 1499     __ reserved_stack_check();
 1500   }
 1501 
 1502   if (do_polling() && C->is_method_compilation()) {
 1503     Label dummy_label;
 1504     Label* code_stub = &dummy_label;
 1505     if (!C->output()->in_scratch_emit_size()) {
 1506       C2SafepointPollStub* stub = new (C->comp_arena()) C2SafepointPollStub(__ offset());
 1507       C->output()->add_stub(stub);
 1508       code_stub = &stub->entry();
 1509     }
 1510     __ relocate(relocInfo::poll_return_type);
 1511     __ safepoint_poll(*code_stub, true /* at_return */, true /* in_nmethod */);
 1512   }
 1513 }
 1514 
 1515 uint MachEpilogNode::size(PhaseRegAlloc *ra_) const {
 1516   assert_cond(ra_ != nullptr);
 1517   // Variable size. Determine dynamically.
 1518   return MachNode::size(ra_);
 1519 }
 1520 
 1521 int MachEpilogNode::reloc() const {
 1522   // Return number of relocatable values contained in this instruction.
 1523   return 1; // 1 for polling page.
 1524 }
 1525 const Pipeline * MachEpilogNode::pipeline() const {
 1526   return MachNode::pipeline_class();
 1527 }
 1528 
 1529 //=============================================================================
 1530 
 1531 // Figure out which register class each belongs in: rc_int, rc_float or
 1532 // rc_stack.
 1533 enum RC { rc_bad, rc_int, rc_float, rc_vector, rc_stack };
 1534 
 1535 static enum RC rc_class(OptoReg::Name reg) {
 1536 
 1537   if (reg == OptoReg::Bad) {
 1538     return rc_bad;
 1539   }
 1540 

 1779     __ addi(as_Register(reg), sp, offset);
 1780   } else {
 1781     __ li32(t0, offset);
 1782     __ add(as_Register(reg), sp, t0);
 1783   }
 1784 }
 1785 
 1786 uint BoxLockNode::size(PhaseRegAlloc *ra_) const {
 1787   // BoxLockNode is not a MachNode, so we can't just call MachNode::size(ra_).
 1788   int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
 1789 
 1790   if (Assembler::is_simm12(offset)) {
 1791     return NativeInstruction::instruction_size;
 1792   } else {
 1793     return 3 * NativeInstruction::instruction_size; // lui + addiw + add;
 1794   }
 1795 }
 1796 
 1797 //=============================================================================
 1798 












 1799 #ifndef PRODUCT
 1800 void MachUEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
 1801 {
 1802   assert_cond(st != nullptr);
 1803   st->print_cr("# MachUEPNode");
 1804   st->print_cr("\tlwu t1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass");
 1805   st->print_cr("\tlwu t2, [t0      + CompiledICData::speculated_klass_offset()]\t# compressed klass");
 1806   st->print_cr("\tbeq t1, t2, ic_hit");
 1807   st->print_cr("\tj, SharedRuntime::_ic_miss_stub\t # Inline cache check");
 1808   st->print_cr("\tic_hit:");
 1809 }
 1810 #endif
 1811 
 1812 void MachUEPNode::emit(C2_MacroAssembler* masm, PhaseRegAlloc* ra_) const
 1813 {
 1814   // This is the unverified entry point.
 1815   __ ic_check(CodeEntryAlignment);
 1816 
 1817   // ic_check() aligns to CodeEntryAlignment >= InteriorEntryAlignment(min 16) > NativeInstruction::instruction_size(4).
 1818   assert(((__ offset()) % CodeEntryAlignment) == 0, "Misaligned verified entry point");
 1819 }
 1820 
 1821 uint MachUEPNode::size(PhaseRegAlloc* ra_) const
 1822 {
 1823   assert_cond(ra_ != nullptr);
 1824   return MachNode::size(ra_);
 1825 }
 1826 
 1827 // REQUIRED EMIT CODE
 1828 
 1829 //=============================================================================
 1830 
 1831 // Emit deopt handler code.
 1832 int HandlerImpl::emit_deopt_handler(C2_MacroAssembler* masm)
 1833 {
 1834   address base = __ start_a_stub(size_deopt_handler());
 1835   if (base == nullptr) {
 1836     ciEnv::current()->record_failure("CodeCache is full");
 1837     return 0;  // CodeBuffer::expand failed
 1838   }
 1839   int offset = __ offset();
 1840 
 1841   Label start;
 1842   __ bind(start);
 1843 
 1844   __ far_call(RuntimeAddress(SharedRuntime::deopt_blob()->unpack()));
 1845 
 1846   int entry_offset = __ offset();

 1429       C2EntryBarrierStub* stub = new (Compile::current()->comp_arena()) C2EntryBarrierStub();
 1430       Compile::current()->output()->add_stub(stub);
 1431       slow_path = &stub->entry();
 1432       continuation = &stub->continuation();
 1433       guard = &stub->guard();
 1434     }
 1435     // In the C2 code, we move the non-hot part of nmethod entry barriers out-of-line to a stub.
 1436     bs->nmethod_entry_barrier(masm, slow_path, continuation, guard);
 1437   }
 1438 
 1439   C->output()->set_frame_complete(__ offset());
 1440 
 1441   if (C->has_mach_constant_base_node()) {
 1442     // NOTE: We set the table base offset here because users might be
 1443     // emitted before MachConstantBaseNode.
 1444     ConstantTable& constant_table = C->output()->constant_table();
 1445     constant_table.set_table_base_offset(constant_table.calculate_table_base_offset());
 1446   }
 1447 }
 1448 







 1449 int MachPrologNode::reloc() const
 1450 {
 1451   return 0;
 1452 }
 1453 
 1454 //=============================================================================
 1455 
 1456 #ifndef PRODUCT
 1457 void MachEpilogNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
 1458   assert_cond(st != nullptr && ra_ != nullptr);
 1459   Compile* C = ra_->C;
 1460   assert_cond(C != nullptr);
 1461   int framesize = C->output()->frame_size_in_bytes();
 1462 
 1463   st->print("# pop frame %d\n\t", framesize);
 1464 
 1465   if (framesize == 0) {
 1466     st->print("ld  ra, [sp,#%d]\n\t", (2 * wordSize));
 1467     st->print("ld  fp, [sp,#%d]\n\t", (3 * wordSize));
 1468     st->print("add sp, sp, #%d\n\t", (2 * wordSize));

 1488 
 1489   __ remove_frame(framesize);
 1490 
 1491   if (StackReservedPages > 0 && C->has_reserved_stack_access()) {
 1492     __ reserved_stack_check();
 1493   }
 1494 
 1495   if (do_polling() && C->is_method_compilation()) {
 1496     Label dummy_label;
 1497     Label* code_stub = &dummy_label;
 1498     if (!C->output()->in_scratch_emit_size()) {
 1499       C2SafepointPollStub* stub = new (C->comp_arena()) C2SafepointPollStub(__ offset());
 1500       C->output()->add_stub(stub);
 1501       code_stub = &stub->entry();
 1502     }
 1503     __ relocate(relocInfo::poll_return_type);
 1504     __ safepoint_poll(*code_stub, true /* at_return */, true /* in_nmethod */);
 1505   }
 1506 }
 1507 






 1508 int MachEpilogNode::reloc() const {
 1509   // Return number of relocatable values contained in this instruction.
 1510   return 1; // 1 for polling page.
 1511 }
 1512 const Pipeline * MachEpilogNode::pipeline() const {
 1513   return MachNode::pipeline_class();
 1514 }
 1515 
 1516 //=============================================================================
 1517 
 1518 // Figure out which register class each belongs in: rc_int, rc_float or
 1519 // rc_stack.
 1520 enum RC { rc_bad, rc_int, rc_float, rc_vector, rc_stack };
 1521 
 1522 static enum RC rc_class(OptoReg::Name reg) {
 1523 
 1524   if (reg == OptoReg::Bad) {
 1525     return rc_bad;
 1526   }
 1527 

 1766     __ addi(as_Register(reg), sp, offset);
 1767   } else {
 1768     __ li32(t0, offset);
 1769     __ add(as_Register(reg), sp, t0);
 1770   }
 1771 }
 1772 
 1773 uint BoxLockNode::size(PhaseRegAlloc *ra_) const {
 1774   // BoxLockNode is not a MachNode, so we can't just call MachNode::size(ra_).
 1775   int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
 1776 
 1777   if (Assembler::is_simm12(offset)) {
 1778     return NativeInstruction::instruction_size;
 1779   } else {
 1780     return 3 * NativeInstruction::instruction_size; // lui + addiw + add;
 1781   }
 1782 }
 1783 
 1784 //=============================================================================
 1785 
 1786 #ifndef PRODUCT
 1787 void MachVEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
 1788 {
 1789   Unimplemented();
 1790 }
 1791 #endif
 1792 
 1793 void MachVEPNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc* ra_) const
 1794 {
 1795   Unimplemented();
 1796 }
 1797 
 1798 #ifndef PRODUCT
 1799 void MachUEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
 1800 {
 1801   assert_cond(st != nullptr);
 1802   st->print_cr("# MachUEPNode");
 1803   st->print_cr("\tlwu t1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass");
 1804   st->print_cr("\tlwu t2, [t0      + CompiledICData::speculated_klass_offset()]\t# compressed klass");
 1805   st->print_cr("\tbeq t1, t2, ic_hit");
 1806   st->print_cr("\tj, SharedRuntime::_ic_miss_stub\t # Inline cache check");
 1807   st->print_cr("\tic_hit:");
 1808 }
 1809 #endif
 1810 
 1811 void MachUEPNode::emit(C2_MacroAssembler* masm, PhaseRegAlloc* ra_) const
 1812 {
 1813   // This is the unverified entry point.
 1814   __ ic_check(CodeEntryAlignment);
 1815 
 1816   // ic_check() aligns to CodeEntryAlignment >= InteriorEntryAlignment(min 16) > NativeInstruction::instruction_size(4).
 1817   assert(((__ offset()) % CodeEntryAlignment) == 0, "Misaligned verified entry point");
 1818 }
 1819 






 1820 // REQUIRED EMIT CODE
 1821 
 1822 //=============================================================================
 1823 
 1824 // Emit deopt handler code.
 1825 int HandlerImpl::emit_deopt_handler(C2_MacroAssembler* masm)
 1826 {
 1827   address base = __ start_a_stub(size_deopt_handler());
 1828   if (base == nullptr) {
 1829     ciEnv::current()->record_failure("CodeCache is full");
 1830     return 0;  // CodeBuffer::expand failed
 1831   }
 1832   int offset = __ offset();
 1833 
 1834   Label start;
 1835   __ bind(start);
 1836 
 1837   __ far_call(RuntimeAddress(SharedRuntime::deopt_blob()->unpack()));
 1838 
 1839   int entry_offset = __ offset();
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