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src/hotspot/cpu/x86/gc/g1/g1BarrierSetAssembler_x86.hpp

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   1 /*
   2  * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *


  37  protected:
  38   virtual void gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators, Register addr, Register count);
  39   virtual void gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators, Register addr, Register count, Register tmp);
  40 
  41   void g1_write_barrier_pre(MacroAssembler* masm,
  42                             Register obj,
  43                             Register pre_val,
  44                             Register thread,
  45                             Register tmp,
  46                             bool tosca_live,
  47                             bool expand_call);
  48 
  49   void g1_write_barrier_post(MacroAssembler* masm,
  50                              Register store_addr,
  51                              Register new_val,
  52                              Register thread,
  53                              Register tmp,
  54                              Register tmp2);
  55 
  56   virtual void oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
  57                             Address dst, Register val, Register tmp1, Register tmp2);
  58 
  59  public:
  60   void gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub);
  61   void gen_post_barrier_stub(LIR_Assembler* ce, G1PostBarrierStub* stub);
  62 
  63   void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
  64   void generate_c1_post_barrier_runtime_stub(StubAssembler* sasm);
  65 
  66   virtual void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
  67                        Register dst, Address src, Register tmp1, Register tmp_thread);
  68 };
  69 
  70 #endif // CPU_X86_GC_G1_G1BARRIERSETASSEMBLER_X86_HPP
   1 /*
   2  * Copyright (c) 2018, 2019, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *


  37  protected:
  38   virtual void gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators, Register addr, Register count);
  39   virtual void gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators, Register addr, Register count, Register tmp);
  40 
  41   void g1_write_barrier_pre(MacroAssembler* masm,
  42                             Register obj,
  43                             Register pre_val,
  44                             Register thread,
  45                             Register tmp,
  46                             bool tosca_live,
  47                             bool expand_call);
  48 
  49   void g1_write_barrier_post(MacroAssembler* masm,
  50                              Register store_addr,
  51                              Register new_val,
  52                              Register thread,
  53                              Register tmp,
  54                              Register tmp2);
  55 
  56   virtual void oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
  57                             Address dst, Register val, Register tmp1, Register tmp2, Register tmp3);
  58 
  59  public:
  60   void gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub);
  61   void gen_post_barrier_stub(LIR_Assembler* ce, G1PostBarrierStub* stub);
  62 
  63   void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
  64   void generate_c1_post_barrier_runtime_stub(StubAssembler* sasm);
  65 
  66   virtual void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
  67                        Register dst, Address src, Register tmp1, Register tmp_thread);
  68 };
  69 
  70 #endif // CPU_X86_GC_G1_G1BARRIERSETASSEMBLER_X86_HPP
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