11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/assembler.hpp"
26 #include "asm/assembler.inline.hpp"
27 #include "code/aotCodeCache.hpp"
28 #include "code/compiledIC.hpp"
29 #include "compiler/compiler_globals.hpp"
30 #include "compiler/disassembler.hpp"
31 #include "crc32c.h"
32 #include "gc/shared/barrierSet.hpp"
33 #include "gc/shared/barrierSetAssembler.hpp"
34 #include "gc/shared/collectedHeap.inline.hpp"
35 #include "gc/shared/tlab_globals.hpp"
36 #include "interpreter/bytecodeHistogram.hpp"
37 #include "interpreter/interpreter.hpp"
38 #include "interpreter/interpreterRuntime.hpp"
39 #include "jvm.h"
40 #include "memory/resourceArea.hpp"
41 #include "memory/universe.hpp"
42 #include "oops/accessDecorators.hpp"
43 #include "oops/compressedKlass.inline.hpp"
44 #include "oops/compressedOops.inline.hpp"
45 #include "oops/klass.inline.hpp"
46 #include "prims/methodHandles.hpp"
47 #include "runtime/continuation.hpp"
48 #include "runtime/interfaceSupport.inline.hpp"
49 #include "runtime/javaThread.hpp"
50 #include "runtime/jniHandles.hpp"
51 #include "runtime/objectMonitor.hpp"
52 #include "runtime/os.hpp"
53 #include "runtime/safepoint.hpp"
54 #include "runtime/safepointMechanism.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/checkedCast.hpp"
58 #include "utilities/globalDefinitions.hpp"
59 #include "utilities/macros.hpp"
60
61 #ifdef PRODUCT
62 #define BLOCK_COMMENT(str) /* nothing */
63 #define STOP(error) stop(error)
64 #else
65 #define BLOCK_COMMENT(str) block_comment(str)
66 #define STOP(error) block_comment(error); stop(error)
67 #endif
68
69 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
70
71 #ifdef ASSERT
72 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
73 #endif
74
75 static const Assembler::Condition reverse[] = {
76 Assembler::noOverflow /* overflow = 0x0 */ ,
77 Assembler::overflow /* noOverflow = 0x1 */ ,
78 Assembler::aboveEqual /* carrySet = 0x2, below = 0x2 */ ,
79 Assembler::below /* aboveEqual = 0x3, carryClear = 0x3 */ ,
1285 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1286 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1287 assert_different_registers(arg_1, c_rarg2);
1288 pass_arg2(this, arg_2);
1289 pass_arg1(this, arg_1);
1290 pass_arg0(this, arg_0);
1291 call_VM_leaf(entry_point, 3);
1292 }
1293
1294 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
1295 assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
1296 assert_different_registers(arg_1, c_rarg2, c_rarg3);
1297 assert_different_registers(arg_2, c_rarg3);
1298 pass_arg3(this, arg_3);
1299 pass_arg2(this, arg_2);
1300 pass_arg1(this, arg_1);
1301 pass_arg0(this, arg_0);
1302 call_VM_leaf(entry_point, 3);
1303 }
1304
1305 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
1306 pass_arg0(this, arg_0);
1307 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1308 }
1309
1310 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
1311 assert_different_registers(arg_0, c_rarg1);
1312 pass_arg1(this, arg_1);
1313 pass_arg0(this, arg_0);
1314 MacroAssembler::call_VM_leaf_base(entry_point, 2);
1315 }
1316
1317 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1318 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1319 assert_different_registers(arg_1, c_rarg2);
1320 pass_arg2(this, arg_2);
1321 pass_arg1(this, arg_1);
1322 pass_arg0(this, arg_0);
1323 MacroAssembler::call_VM_leaf_base(entry_point, 3);
1324 }
2376 lea(rscratch, src);
2377 Assembler::mulss(dst, Address(rscratch, 0));
2378 }
2379 }
2380
2381 void MacroAssembler::null_check(Register reg, int offset) {
2382 if (needs_explicit_null_check(offset)) {
2383 // provoke OS null exception if reg is null by
2384 // accessing M[reg] w/o changing any (non-CC) registers
2385 // NOTE: cmpl is plenty here to provoke a segv
2386 cmpptr(rax, Address(reg, 0));
2387 // Note: should probably use testl(rax, Address(reg, 0));
2388 // may be shorter code (however, this version of
2389 // testl needs to be implemented first)
2390 } else {
2391 // nothing to do, (later) access of M[reg + offset]
2392 // will provoke OS null exception if reg is null
2393 }
2394 }
2395
2396 void MacroAssembler::os_breakpoint() {
2397 // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
2398 // (e.g., MSVC can't call ps() otherwise)
2399 call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
2400 }
2401
2402 void MacroAssembler::unimplemented(const char* what) {
2403 const char* buf = nullptr;
2404 {
2405 ResourceMark rm;
2406 stringStream ss;
2407 ss.print("unimplemented: %s", what);
2408 buf = code_string(ss.as_string());
2409 }
2410 stop(buf);
2411 }
2412
2413 #define XSTATE_BV 0x200
2414
2415 void MacroAssembler::pop_CPU_state() {
3716 xorptr(temp, temp); // use _zero reg to clear memory (shorter code)
3717 if (UseIncDec) {
3718 shrptr(index, 3); // divide by 8/16 and set carry flag if bit 2 was set
3719 } else {
3720 shrptr(index, 2); // use 2 instructions to avoid partial flag stall
3721 shrptr(index, 1);
3722 }
3723
3724 // initialize remaining object fields: index is a multiple of 2 now
3725 {
3726 Label loop;
3727 bind(loop);
3728 movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
3729 decrement(index);
3730 jcc(Assembler::notZero, loop);
3731 }
3732
3733 bind(done);
3734 }
3735
3736 // Look up the method for a megamorphic invokeinterface call.
3737 // The target method is determined by <intf_klass, itable_index>.
3738 // The receiver klass is in recv_klass.
3739 // On success, the result will be in method_result, and execution falls through.
3740 // On failure, execution transfers to the given label.
3741 void MacroAssembler::lookup_interface_method(Register recv_klass,
3742 Register intf_klass,
3743 RegisterOrConstant itable_index,
3744 Register method_result,
3745 Register scan_temp,
3746 Label& L_no_such_interface,
3747 bool return_method) {
3748 assert_different_registers(recv_klass, intf_klass, scan_temp);
3749 assert_different_registers(method_result, intf_klass, scan_temp);
3750 assert(recv_klass != method_result || !return_method,
3751 "recv_klass can be destroyed when method isn't needed");
3752
3753 assert(itable_index.is_constant() || itable_index.as_register() == method_result,
3754 "caller must use same register for non-constant itable index as for method");
3755
4766 } else {
4767 Label L;
4768 jccb(negate_condition(cc), L);
4769 movl(dst, src);
4770 bind(L);
4771 }
4772 }
4773
4774 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
4775 if (VM_Version::supports_cmov()) {
4776 cmovl(cc, dst, src);
4777 } else {
4778 Label L;
4779 jccb(negate_condition(cc), L);
4780 movl(dst, src);
4781 bind(L);
4782 }
4783 }
4784
4785 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
4786 if (!VerifyOops) return;
4787
4788 BLOCK_COMMENT("verify_oop {");
4789 push(rscratch1);
4790 push(rax); // save rax
4791 push(reg); // pass register argument
4792
4793 // Pass register number to verify_oop_subroutine
4794 const char* b = nullptr;
4795 {
4796 ResourceMark rm;
4797 stringStream ss;
4798 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
4799 b = code_string(ss.as_string());
4800 }
4801 AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
4802 pushptr(buffer.addr(), rscratch1);
4803
4804 // call indirectly to solve generation ordering problem
4805 movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
4806 call(rax);
5019 } else {
5020 pop(rax);
5021 }
5022
5023 // CAS success means the slot now has the receiver we want. CAS failure means
5024 // something had claimed the slot concurrently: it can be the same receiver we want,
5025 // or something else. Since this is a slow path, we can optimize for code density,
5026 // and just restart the search from the beginning.
5027 jmpb(L_restart);
5028
5029 // Found a receiver, convert its slot offset to corresponding count offset.
5030 bind(L_found_recv);
5031 addptr(offset, receiver_to_count_step);
5032
5033 // Finally, update the counter
5034 bind(L_count_update);
5035 addptr(Address(mdp, offset, Address::times_ptr), DataLayout::counter_increment);
5036 }
5037
5038 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
5039 if (!VerifyOops) return;
5040
5041 push(rscratch1);
5042 push(rax); // save rax,
5043 // addr may contain rsp so we will have to adjust it based on the push
5044 // we just did (and on 64 bit we do two pushes)
5045 // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
5046 // stores rax into addr which is backwards of what was intended.
5047 if (addr.uses(rsp)) {
5048 lea(rax, addr);
5049 pushptr(Address(rax, 2 * BytesPerWord));
5050 } else {
5051 pushptr(addr);
5052 }
5053
5054 // Pass register number to verify_oop_subroutine
5055 const char* b = nullptr;
5056 {
5057 ResourceMark rm;
5058 stringStream ss;
5059 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
5411
5412 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
5413 // get mirror
5414 const int mirror_offset = in_bytes(Klass::java_mirror_offset());
5415 load_method_holder(mirror, method);
5416 movptr(mirror, Address(mirror, mirror_offset));
5417 resolve_oop_handle(mirror, tmp);
5418 }
5419
5420 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5421 load_method_holder(rresult, rmethod);
5422 movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5423 }
5424
5425 void MacroAssembler::load_method_holder(Register holder, Register method) {
5426 movptr(holder, Address(method, Method::const_offset())); // ConstMethod*
5427 movptr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5428 movptr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5429 }
5430
5431 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5432 assert(UseCompactObjectHeaders, "expect compact object headers");
5433 movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5434 shrq(dst, markWord::klass_shift);
5435 }
5436
5437 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
5438 assert_different_registers(src, tmp);
5439 assert_different_registers(dst, tmp);
5440
5441 if (UseCompactObjectHeaders) {
5442 load_narrow_klass_compact(dst, src);
5443 decode_klass_not_null(dst, tmp);
5444 } else {
5445 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5446 decode_klass_not_null(dst, tmp);
5447 }
5448 }
5449
5450 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
5451 assert(!UseCompactObjectHeaders, "not with compact headers");
5452 assert_different_registers(src, tmp);
5453 assert_different_registers(dst, tmp);
5454 encode_klass_not_null(src, tmp);
5455 movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5456 }
5457
5458 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
5459 if (UseCompactObjectHeaders) {
5460 assert(tmp != noreg, "need tmp");
5461 assert_different_registers(klass, obj, tmp);
5462 load_narrow_klass_compact(tmp, obj);
5463 cmpl(klass, tmp);
5464 } else {
5465 cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
5466 }
5467 }
5468
5469 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5486 bool as_raw = (decorators & AS_RAW) != 0;
5487 if (as_raw) {
5488 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
5489 } else {
5490 bs->load_at(this, decorators, type, dst, src, tmp1);
5491 }
5492 }
5493
5494 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
5495 Register tmp1, Register tmp2, Register tmp3) {
5496 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5497 decorators = AccessInternal::decorator_fixup(decorators, type);
5498 bool as_raw = (decorators & AS_RAW) != 0;
5499 if (as_raw) {
5500 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5501 } else {
5502 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5503 }
5504 }
5505
5506 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5507 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
5508 }
5509
5510 // Doesn't do verification, generates fixed size code
5511 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5512 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
5513 }
5514
5515 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5516 Register tmp2, Register tmp3, DecoratorSet decorators) {
5517 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5518 }
5519
5520 // Used for storing nulls.
5521 void MacroAssembler::store_heap_oop_null(Address dst) {
5522 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5523 }
5524
5525 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5848 assert (oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5849 int klass_index = oop_recorder()->find_index(k);
5850 RelocationHolder rspec = metadata_Relocation::spec(klass_index);
5851 Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
5852 }
5853
5854 void MacroAssembler::reinit_heapbase() {
5855 if (UseCompressedOops) {
5856 if (Universe::heap() != nullptr && !AOTCodeCache::is_on_for_dump()) {
5857 if (CompressedOops::base() == nullptr) {
5858 MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
5859 } else {
5860 mov64(r12_heapbase, (int64_t)CompressedOops::base());
5861 }
5862 } else {
5863 movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
5864 }
5865 }
5866 }
5867
5868 #ifdef COMPILER2
5869
5870 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
5871 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
5872 // cnt - number of qwords (8-byte words).
5873 // base - start address, qword aligned.
5874 Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
5875 bool use64byteVector = (MaxVectorSize == 64) && (CopyAVX3Threshold == 0);
5876 if (use64byteVector) {
5877 vpxor(xtmp, xtmp, xtmp, AVX_512bit);
5878 } else if (MaxVectorSize >= 32) {
5879 vpxor(xtmp, xtmp, xtmp, AVX_256bit);
5880 } else {
5881 pxor(xtmp, xtmp);
5882 }
5883 jmp(L_zero_64_bytes);
5884
5885 BIND(L_loop);
5886 if (MaxVectorSize >= 32) {
5887 fill64(base, 0, xtmp, use64byteVector);
5888 } else {
5889 movdqu(Address(base, 0), xtmp);
5890 movdqu(Address(base, 16), xtmp);
5891 movdqu(Address(base, 32), xtmp);
5892 movdqu(Address(base, 48), xtmp);
5893 }
5894 addptr(base, 64);
5895
5896 BIND(L_zero_64_bytes);
5897 subptr(cnt, 8);
5898 jccb(Assembler::greaterEqual, L_loop);
5899
5900 // Copy trailing 64 bytes
5901 if (use64byteVector) {
5902 addptr(cnt, 8);
5903 jccb(Assembler::equal, L_end);
5904 fill64_masked(3, base, 0, xtmp, mask, cnt, rtmp, true);
5905 jmp(L_end);
5906 } else {
5907 addptr(cnt, 4);
5908 jccb(Assembler::less, L_tail);
5909 if (MaxVectorSize >= 32) {
5910 vmovdqu(Address(base, 0), xtmp);
5911 } else {
5912 movdqu(Address(base, 0), xtmp);
5913 movdqu(Address(base, 16), xtmp);
5914 }
5915 }
5916 addptr(base, 32);
5917 subptr(cnt, 4);
5918
5919 BIND(L_tail);
5920 addptr(cnt, 4);
5921 jccb(Assembler::lessEqual, L_end);
5922 if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
5923 fill32_masked(3, base, 0, xtmp, mask, cnt, rtmp);
5924 } else {
5925 decrement(cnt);
5926
5927 BIND(L_sloop);
5928 movq(Address(base, 0), xtmp);
5929 addptr(base, 8);
5930 decrement(cnt);
5931 jccb(Assembler::greaterEqual, L_sloop);
5932 }
5933 BIND(L_end);
5934 }
5935
5936 // Clearing constant sized memory using YMM/ZMM registers.
5937 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
5938 assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
5939 bool use64byteVector = (MaxVectorSize > 32) && (CopyAVX3Threshold == 0);
5940
5941 int vector64_count = (cnt & (~0x7)) >> 3;
5942 cnt = cnt & 0x7;
5943 const int fill64_per_loop = 4;
6005 break;
6006 case 7:
6007 if (use64byteVector) {
6008 movl(rtmp, 0x7F);
6009 kmovwl(mask, rtmp);
6010 evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
6011 } else {
6012 evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
6013 movl(rtmp, 0x7);
6014 kmovwl(mask, rtmp);
6015 evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
6016 }
6017 break;
6018 default:
6019 fatal("Unexpected length : %d\n",cnt);
6020 break;
6021 }
6022 }
6023 }
6024
6025 void MacroAssembler::clear_mem(Register base, Register cnt, Register tmp, XMMRegister xtmp,
6026 bool is_large, KRegister mask) {
6027 // cnt - number of qwords (8-byte words).
6028 // base - start address, qword aligned.
6029 // is_large - if optimizers know cnt is larger than InitArrayShortSize
6030 assert(base==rdi, "base register must be edi for rep stos");
6031 assert(tmp==rax, "tmp register must be eax for rep stos");
6032 assert(cnt==rcx, "cnt register must be ecx for rep stos");
6033 assert(InitArrayShortSize % BytesPerLong == 0,
6034 "InitArrayShortSize should be the multiple of BytesPerLong");
6035
6036 Label DONE;
6037 if (!is_large || !UseXMMForObjInit) {
6038 xorptr(tmp, tmp);
6039 }
6040
6041 if (!is_large) {
6042 Label LOOP, LONG;
6043 cmpptr(cnt, InitArrayShortSize/BytesPerLong);
6044 jccb(Assembler::greater, LONG);
6045
6046 decrement(cnt);
6047 jccb(Assembler::negative, DONE); // Zero length
6048
6049 // Use individual pointer-sized stores for small counts:
6050 BIND(LOOP);
6051 movptr(Address(base, cnt, Address::times_ptr), tmp);
6052 decrement(cnt);
6053 jccb(Assembler::greaterEqual, LOOP);
6054 jmpb(DONE);
6055
6056 BIND(LONG);
6057 }
6058
6059 // Use longer rep-prefixed ops for non-small counts:
6060 if (UseFastStosb) {
6061 shlptr(cnt, 3); // convert to number of bytes
6062 rep_stosb();
6063 } else if (UseXMMForObjInit) {
6064 xmm_clear_mem(base, cnt, tmp, xtmp, mask);
6065 } else {
6066 rep_stos();
6067 }
6068
6069 BIND(DONE);
6070 }
6071
6072 #endif //COMPILER2
6073
6074
6075 void MacroAssembler::generate_fill(BasicType t, bool aligned,
6076 Register to, Register value, Register count,
6077 Register rtmp, XMMRegister xtmp) {
6078 ShortBranchVerifier sbv(this);
6079 assert_different_registers(to, value, count, rtmp);
6080 Label L_exit;
6081 Label L_fill_2_bytes, L_fill_4_bytes;
6082
6083 #if defined(COMPILER2)
6084 if(MaxVectorSize >=32 &&
9961
9962 // Load top.
9963 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
9964
9965 // Check if the lock-stack is full.
9966 cmpl(top, LockStack::end_offset());
9967 jcc(Assembler::greaterEqual, slow);
9968
9969 // Check for recursion.
9970 cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
9971 jcc(Assembler::equal, push);
9972
9973 // Check header for monitor (0b10).
9974 testptr(reg_rax, markWord::monitor_value);
9975 jcc(Assembler::notZero, slow);
9976
9977 // Try to lock. Transition lock bits 0b01 => 0b00
9978 movptr(tmp, reg_rax);
9979 andptr(tmp, ~(int32_t)markWord::unlocked_value);
9980 orptr(reg_rax, markWord::unlocked_value);
9981 lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
9982 jcc(Assembler::notEqual, slow);
9983
9984 // Restore top, CAS clobbers register.
9985 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
9986
9987 bind(push);
9988 // After successful lock, push object on lock-stack.
9989 movptr(Address(thread, top), obj);
9990 incrementl(top, oopSize);
9991 movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
9992 }
9993
9994 // Implements fast-unlocking.
9995 //
9996 // obj: the object to be unlocked
9997 // reg_rax: rax
9998 // thread: the thread
9999 // tmp: a temporary register
10000 void MacroAssembler::fast_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {
|
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/assembler.hpp"
26 #include "asm/assembler.inline.hpp"
27 #include "code/aotCodeCache.hpp"
28 #include "code/compiledIC.hpp"
29 #include "compiler/compiler_globals.hpp"
30 #include "compiler/disassembler.hpp"
31 #include "ci/ciInlineKlass.hpp"
32 #include "crc32c.h"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/collectedHeap.inline.hpp"
36 #include "gc/shared/tlab_globals.hpp"
37 #include "interpreter/bytecodeHistogram.hpp"
38 #include "interpreter/interpreter.hpp"
39 #include "interpreter/interpreterRuntime.hpp"
40 #include "jvm.h"
41 #include "memory/resourceArea.hpp"
42 #include "memory/universe.hpp"
43 #include "oops/accessDecorators.hpp"
44 #include "oops/compressedKlass.inline.hpp"
45 #include "oops/compressedOops.inline.hpp"
46 #include "oops/klass.inline.hpp"
47 #include "oops/resolvedFieldEntry.hpp"
48 #include "prims/methodHandles.hpp"
49 #include "runtime/arguments.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/interfaceSupport.inline.hpp"
52 #include "runtime/javaThread.hpp"
53 #include "runtime/jniHandles.hpp"
54 #include "runtime/objectMonitor.hpp"
55 #include "runtime/os.hpp"
56 #include "runtime/safepoint.hpp"
57 #include "runtime/safepointMechanism.hpp"
58 #include "runtime/sharedRuntime.hpp"
59 #include "runtime/signature_cc.hpp"
60 #include "runtime/stubRoutines.hpp"
61 #include "utilities/checkedCast.hpp"
62 #include "utilities/globalDefinitions.hpp"
63 #include "utilities/macros.hpp"
64 #include "vmreg_x86.inline.hpp"
65 #ifdef COMPILER2
66 #include "opto/output.hpp"
67 #endif
68
69 #ifdef PRODUCT
70 #define BLOCK_COMMENT(str) /* nothing */
71 #define STOP(error) stop(error)
72 #else
73 #define BLOCK_COMMENT(str) block_comment(str)
74 #define STOP(error) block_comment(error); stop(error)
75 #endif
76
77 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
78
79 #ifdef ASSERT
80 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
81 #endif
82
83 static const Assembler::Condition reverse[] = {
84 Assembler::noOverflow /* overflow = 0x0 */ ,
85 Assembler::overflow /* noOverflow = 0x1 */ ,
86 Assembler::aboveEqual /* carrySet = 0x2, below = 0x2 */ ,
87 Assembler::below /* aboveEqual = 0x3, carryClear = 0x3 */ ,
1293 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1294 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1295 assert_different_registers(arg_1, c_rarg2);
1296 pass_arg2(this, arg_2);
1297 pass_arg1(this, arg_1);
1298 pass_arg0(this, arg_0);
1299 call_VM_leaf(entry_point, 3);
1300 }
1301
1302 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
1303 assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
1304 assert_different_registers(arg_1, c_rarg2, c_rarg3);
1305 assert_different_registers(arg_2, c_rarg3);
1306 pass_arg3(this, arg_3);
1307 pass_arg2(this, arg_2);
1308 pass_arg1(this, arg_1);
1309 pass_arg0(this, arg_0);
1310 call_VM_leaf(entry_point, 3);
1311 }
1312
1313 void MacroAssembler::super_call_VM_leaf(address entry_point) {
1314 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1315 }
1316
1317 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
1318 pass_arg0(this, arg_0);
1319 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1320 }
1321
1322 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
1323 assert_different_registers(arg_0, c_rarg1);
1324 pass_arg1(this, arg_1);
1325 pass_arg0(this, arg_0);
1326 MacroAssembler::call_VM_leaf_base(entry_point, 2);
1327 }
1328
1329 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1330 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1331 assert_different_registers(arg_1, c_rarg2);
1332 pass_arg2(this, arg_2);
1333 pass_arg1(this, arg_1);
1334 pass_arg0(this, arg_0);
1335 MacroAssembler::call_VM_leaf_base(entry_point, 3);
1336 }
2388 lea(rscratch, src);
2389 Assembler::mulss(dst, Address(rscratch, 0));
2390 }
2391 }
2392
2393 void MacroAssembler::null_check(Register reg, int offset) {
2394 if (needs_explicit_null_check(offset)) {
2395 // provoke OS null exception if reg is null by
2396 // accessing M[reg] w/o changing any (non-CC) registers
2397 // NOTE: cmpl is plenty here to provoke a segv
2398 cmpptr(rax, Address(reg, 0));
2399 // Note: should probably use testl(rax, Address(reg, 0));
2400 // may be shorter code (however, this version of
2401 // testl needs to be implemented first)
2402 } else {
2403 // nothing to do, (later) access of M[reg + offset]
2404 // will provoke OS null exception if reg is null
2405 }
2406 }
2407
2408 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2409 andptr(markword, markWord::inline_type_pattern_mask);
2410 cmpptr(markword, markWord::inline_type_pattern);
2411 jcc(Assembler::equal, is_inline_type);
2412 }
2413
2414 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2415 if (can_be_null) {
2416 testptr(object, object);
2417 jcc(Assembler::zero, not_inline_type);
2418 }
2419 const int is_inline_type_mask = markWord::inline_type_pattern;
2420 movptr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2421 andptr(tmp, is_inline_type_mask);
2422 cmpptr(tmp, is_inline_type_mask);
2423 jcc(Assembler::notEqual, not_inline_type);
2424 }
2425
2426 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2427 movl(temp_reg, flags);
2428 testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
2429 jcc(Assembler::notEqual, is_null_free_inline_type);
2430 }
2431
2432 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2433 movl(temp_reg, flags);
2434 testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
2435 jcc(Assembler::equal, not_null_free_inline_type);
2436 }
2437
2438 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2439 movl(temp_reg, flags);
2440 testl(temp_reg, 1 << ResolvedFieldEntry::is_flat_shift);
2441 jcc(Assembler::notEqual, is_flat);
2442 }
2443
2444 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2445 // load mark word
2446 movptr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2447 if (!UseObjectMonitorTable) {
2448 Label test_mark_word;
2449 // check displaced
2450 testl(temp_reg, markWord::unlocked_value);
2451 jccb(Assembler::notZero, test_mark_word);
2452 // slow path use klass prototype
2453 push(rscratch1);
2454 load_prototype_header(temp_reg, oop, rscratch1);
2455 pop(rscratch1);
2456
2457 bind(test_mark_word);
2458 }
2459 testl(temp_reg, test_bit);
2460 jcc((jmp_set) ? Assembler::notZero : Assembler::zero, jmp_label);
2461 }
2462
2463 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg,
2464 Label& is_flat_array) {
2465 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2466 }
2467
2468 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2469 Label& is_non_flat_array) {
2470 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2471 }
2472
2473 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label&is_null_free_array) {
2474 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2475 }
2476
2477 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2478 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2479 }
2480
2481 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2482 testl(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2483 jcc(Assembler::notZero, is_flat_array);
2484 }
2485
2486 void MacroAssembler::os_breakpoint() {
2487 // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
2488 // (e.g., MSVC can't call ps() otherwise)
2489 call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
2490 }
2491
2492 void MacroAssembler::unimplemented(const char* what) {
2493 const char* buf = nullptr;
2494 {
2495 ResourceMark rm;
2496 stringStream ss;
2497 ss.print("unimplemented: %s", what);
2498 buf = code_string(ss.as_string());
2499 }
2500 stop(buf);
2501 }
2502
2503 #define XSTATE_BV 0x200
2504
2505 void MacroAssembler::pop_CPU_state() {
3806 xorptr(temp, temp); // use _zero reg to clear memory (shorter code)
3807 if (UseIncDec) {
3808 shrptr(index, 3); // divide by 8/16 and set carry flag if bit 2 was set
3809 } else {
3810 shrptr(index, 2); // use 2 instructions to avoid partial flag stall
3811 shrptr(index, 1);
3812 }
3813
3814 // initialize remaining object fields: index is a multiple of 2 now
3815 {
3816 Label loop;
3817 bind(loop);
3818 movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
3819 decrement(index);
3820 jcc(Assembler::notZero, loop);
3821 }
3822
3823 bind(done);
3824 }
3825
3826 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
3827 movptr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
3828 #ifdef ASSERT
3829 {
3830 Label done;
3831 cmpptr(layout_info, 0);
3832 jcc(Assembler::notEqual, done);
3833 stop("inline_layout_info_array is null");
3834 bind(done);
3835 }
3836 #endif
3837
3838 InlineLayoutInfo array[2];
3839 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
3840 if (is_power_of_2(size)) {
3841 shll(index, log2i_exact(size)); // Scale index by power of 2
3842 } else {
3843 imull(index, index, size); // Scale the index to be the entry index * array_element_size
3844 }
3845 lea(layout_info, Address(layout_info, index, Address::times_1, Array<InlineLayoutInfo>::base_offset_in_bytes()));
3846 }
3847
3848 // Look up the method for a megamorphic invokeinterface call.
3849 // The target method is determined by <intf_klass, itable_index>.
3850 // The receiver klass is in recv_klass.
3851 // On success, the result will be in method_result, and execution falls through.
3852 // On failure, execution transfers to the given label.
3853 void MacroAssembler::lookup_interface_method(Register recv_klass,
3854 Register intf_klass,
3855 RegisterOrConstant itable_index,
3856 Register method_result,
3857 Register scan_temp,
3858 Label& L_no_such_interface,
3859 bool return_method) {
3860 assert_different_registers(recv_klass, intf_klass, scan_temp);
3861 assert_different_registers(method_result, intf_klass, scan_temp);
3862 assert(recv_klass != method_result || !return_method,
3863 "recv_klass can be destroyed when method isn't needed");
3864
3865 assert(itable_index.is_constant() || itable_index.as_register() == method_result,
3866 "caller must use same register for non-constant itable index as for method");
3867
4878 } else {
4879 Label L;
4880 jccb(negate_condition(cc), L);
4881 movl(dst, src);
4882 bind(L);
4883 }
4884 }
4885
4886 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
4887 if (VM_Version::supports_cmov()) {
4888 cmovl(cc, dst, src);
4889 } else {
4890 Label L;
4891 jccb(negate_condition(cc), L);
4892 movl(dst, src);
4893 bind(L);
4894 }
4895 }
4896
4897 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
4898 if (!VerifyOops || VerifyAdapterSharing) {
4899 // Below address of the code string confuses VerifyAdapterSharing
4900 // because it may differ between otherwise equivalent adapters.
4901 return;
4902 }
4903
4904 BLOCK_COMMENT("verify_oop {");
4905 push(rscratch1);
4906 push(rax); // save rax
4907 push(reg); // pass register argument
4908
4909 // Pass register number to verify_oop_subroutine
4910 const char* b = nullptr;
4911 {
4912 ResourceMark rm;
4913 stringStream ss;
4914 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
4915 b = code_string(ss.as_string());
4916 }
4917 AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
4918 pushptr(buffer.addr(), rscratch1);
4919
4920 // call indirectly to solve generation ordering problem
4921 movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
4922 call(rax);
5135 } else {
5136 pop(rax);
5137 }
5138
5139 // CAS success means the slot now has the receiver we want. CAS failure means
5140 // something had claimed the slot concurrently: it can be the same receiver we want,
5141 // or something else. Since this is a slow path, we can optimize for code density,
5142 // and just restart the search from the beginning.
5143 jmpb(L_restart);
5144
5145 // Found a receiver, convert its slot offset to corresponding count offset.
5146 bind(L_found_recv);
5147 addptr(offset, receiver_to_count_step);
5148
5149 // Finally, update the counter
5150 bind(L_count_update);
5151 addptr(Address(mdp, offset, Address::times_ptr), DataLayout::counter_increment);
5152 }
5153
5154 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
5155 if (!VerifyOops || VerifyAdapterSharing) {
5156 // Below address of the code string confuses VerifyAdapterSharing
5157 // because it may differ between otherwise equivalent adapters.
5158 return;
5159 }
5160
5161 push(rscratch1);
5162 push(rax); // save rax,
5163 // addr may contain rsp so we will have to adjust it based on the push
5164 // we just did (and on 64 bit we do two pushes)
5165 // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
5166 // stores rax into addr which is backwards of what was intended.
5167 if (addr.uses(rsp)) {
5168 lea(rax, addr);
5169 pushptr(Address(rax, 2 * BytesPerWord));
5170 } else {
5171 pushptr(addr);
5172 }
5173
5174 // Pass register number to verify_oop_subroutine
5175 const char* b = nullptr;
5176 {
5177 ResourceMark rm;
5178 stringStream ss;
5179 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
5531
5532 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
5533 // get mirror
5534 const int mirror_offset = in_bytes(Klass::java_mirror_offset());
5535 load_method_holder(mirror, method);
5536 movptr(mirror, Address(mirror, mirror_offset));
5537 resolve_oop_handle(mirror, tmp);
5538 }
5539
5540 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5541 load_method_holder(rresult, rmethod);
5542 movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5543 }
5544
5545 void MacroAssembler::load_method_holder(Register holder, Register method) {
5546 movptr(holder, Address(method, Method::const_offset())); // ConstMethod*
5547 movptr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5548 movptr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5549 }
5550
5551 void MacroAssembler::load_metadata(Register dst, Register src) {
5552 if (UseCompactObjectHeaders) {
5553 load_narrow_klass_compact(dst, src);
5554 } else {
5555 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5556 }
5557 }
5558
5559 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5560 assert(UseCompactObjectHeaders, "expect compact object headers");
5561 movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5562 shrq(dst, markWord::klass_shift);
5563 }
5564
5565 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
5566 assert_different_registers(src, tmp);
5567 assert_different_registers(dst, tmp);
5568
5569 if (UseCompactObjectHeaders) {
5570 load_narrow_klass_compact(dst, src);
5571 decode_klass_not_null(dst, tmp);
5572 } else {
5573 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5574 decode_klass_not_null(dst, tmp);
5575 }
5576 }
5577
5578 void MacroAssembler::load_prototype_header(Register dst, Register src, Register tmp) {
5579 load_klass(dst, src, tmp);
5580 movptr(dst, Address(dst, Klass::prototype_header_offset()));
5581 }
5582
5583 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
5584 assert(!UseCompactObjectHeaders, "not with compact headers");
5585 assert_different_registers(src, tmp);
5586 assert_different_registers(dst, tmp);
5587 encode_klass_not_null(src, tmp);
5588 movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5589 }
5590
5591 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
5592 if (UseCompactObjectHeaders) {
5593 assert(tmp != noreg, "need tmp");
5594 assert_different_registers(klass, obj, tmp);
5595 load_narrow_klass_compact(tmp, obj);
5596 cmpl(klass, tmp);
5597 } else {
5598 cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
5599 }
5600 }
5601
5602 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5619 bool as_raw = (decorators & AS_RAW) != 0;
5620 if (as_raw) {
5621 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
5622 } else {
5623 bs->load_at(this, decorators, type, dst, src, tmp1);
5624 }
5625 }
5626
5627 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
5628 Register tmp1, Register tmp2, Register tmp3) {
5629 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5630 decorators = AccessInternal::decorator_fixup(decorators, type);
5631 bool as_raw = (decorators & AS_RAW) != 0;
5632 if (as_raw) {
5633 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5634 } else {
5635 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5636 }
5637 }
5638
5639 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5640 Register inline_layout_info) {
5641 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5642 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5643 }
5644
5645 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5646 movptr(offset, Address(inline_klass, InlineKlass::adr_members_offset()));
5647 movl(offset, Address(offset, InlineKlass::payload_offset_offset()));
5648 }
5649
5650 void MacroAssembler::payload_addr(Register oop, Register data, Register inline_klass) {
5651 // ((address) (void*) o) + vk->payload_offset();
5652 Register offset = (data == oop) ? rscratch1 : data;
5653 payload_offset(inline_klass, offset);
5654 if (data == oop) {
5655 addptr(data, offset);
5656 } else {
5657 lea(data, Address(oop, offset));
5658 }
5659 }
5660
5661 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5662 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
5663 }
5664
5665 // Doesn't do verification, generates fixed size code
5666 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5667 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
5668 }
5669
5670 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5671 Register tmp2, Register tmp3, DecoratorSet decorators) {
5672 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5673 }
5674
5675 // Used for storing nulls.
5676 void MacroAssembler::store_heap_oop_null(Address dst) {
5677 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5678 }
5679
5680 void MacroAssembler::store_klass_gap(Register dst, Register src) {
6003 assert (oop_recorder() != nullptr, "this assembler needs an OopRecorder");
6004 int klass_index = oop_recorder()->find_index(k);
6005 RelocationHolder rspec = metadata_Relocation::spec(klass_index);
6006 Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
6007 }
6008
6009 void MacroAssembler::reinit_heapbase() {
6010 if (UseCompressedOops) {
6011 if (Universe::heap() != nullptr && !AOTCodeCache::is_on_for_dump()) {
6012 if (CompressedOops::base() == nullptr) {
6013 MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
6014 } else {
6015 mov64(r12_heapbase, (int64_t)CompressedOops::base());
6016 }
6017 } else {
6018 movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
6019 }
6020 }
6021 }
6022
6023 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
6024 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
6025 // An inline type might be returned. If fields are in registers we
6026 // need to allocate an inline type instance and initialize it with
6027 // the value of the fields.
6028 Label skip;
6029 // We only need a new buffered inline type if a new one is not returned
6030 testptr(rax, 1);
6031 jcc(Assembler::zero, skip);
6032 int call_offset = -1;
6033
6034 // The following code is similar to allocation code in TemplateTable::_new but has some slight differences,
6035 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
6036 // allocating is not necessary if vk != nullptr, etc.
6037 Label slow_case;
6038 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
6039 mov(rscratch1, rax); // save rax for slow_case since *_allocate may corrupt it when allocation failed
6040 if (vk != nullptr) {
6041 // Called from C1, where the return type is statically known.
6042 movptr(rbx, (intptr_t)vk->get_InlineKlass());
6043 jint lh = vk->layout_helper();
6044 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
6045 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
6046 tlab_allocate(rax, noreg, lh, r13, r14, slow_case);
6047 } else {
6048 jmp(slow_case);
6049 }
6050 } else {
6051 // Call from interpreter. RAX contains ((the InlineKlass* of the return type) | 0x01)
6052 mov(rbx, rax);
6053 andptr(rbx, -2);
6054 if (UseTLAB) {
6055 movl(r14, Address(rbx, Klass::layout_helper_offset()));
6056 testl(r14, Klass::_lh_instance_slow_path_bit);
6057 jcc(Assembler::notZero, slow_case);
6058 tlab_allocate(rax, r14, 0, r13, r14, slow_case);
6059 } else {
6060 jmp(slow_case);
6061 }
6062 }
6063 if (UseTLAB) {
6064 // 2. Initialize buffered inline instance header
6065 Register buffer_obj = rax;
6066 Register klass = rbx;
6067 if (UseCompactObjectHeaders) {
6068 Register mark_word = r13;
6069 movptr(mark_word, Address(klass, Klass::prototype_header_offset()));
6070 movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes()), mark_word);
6071 } else {
6072 movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes()), (intptr_t)markWord::inline_type_prototype().value());
6073 xorl(r13, r13);
6074 store_klass_gap(buffer_obj, r13);
6075 if (vk == nullptr) {
6076 // store_klass corrupts rbx(klass), so save it in r13 for later use (interpreter case only).
6077 mov(r13, klass);
6078 }
6079 store_klass(buffer_obj, klass, rscratch1);
6080 klass = r13;
6081 }
6082 // 3. Initialize its fields with an inline class specific handler
6083 if (vk != nullptr) {
6084 call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
6085 } else {
6086 movptr(rbx, Address(klass, InlineKlass::adr_members_offset()));
6087 movptr(rbx, Address(rbx, InlineKlass::pack_handler_offset()));
6088 call(rbx);
6089 }
6090 jmp(skip);
6091 }
6092 bind(slow_case);
6093 // We failed to allocate a new inline type, fall back to a runtime
6094 // call. Some oop field may be live in some registers but we can't
6095 // tell. That runtime call will take care of preserving them
6096 // across a GC if there's one.
6097 mov(rax, rscratch1);
6098
6099 if (from_interpreter) {
6100 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
6101 } else {
6102 call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
6103 call_offset = offset();
6104 }
6105
6106 bind(skip);
6107 return call_offset;
6108 }
6109
6110 // Move a value between registers/stack slots and update the reg_state
6111 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
6112 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
6113 if (reg_state[to->value()] == reg_written) {
6114 return true; // Already written
6115 }
6116 if (from != to && bt != T_VOID) {
6117 if (reg_state[to->value()] == reg_readonly) {
6118 return false; // Not yet writable
6119 }
6120 if (from->is_reg()) {
6121 if (to->is_reg()) {
6122 if (from->is_XMMRegister()) {
6123 if (bt == T_DOUBLE) {
6124 movdbl(to->as_XMMRegister(), from->as_XMMRegister());
6125 } else {
6126 assert(bt == T_FLOAT, "must be float");
6127 movflt(to->as_XMMRegister(), from->as_XMMRegister());
6128 }
6129 } else {
6130 movq(to->as_Register(), from->as_Register());
6131 }
6132 } else {
6133 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6134 Address to_addr = Address(rsp, st_off);
6135 if (from->is_XMMRegister()) {
6136 if (bt == T_DOUBLE) {
6137 movdbl(to_addr, from->as_XMMRegister());
6138 } else {
6139 assert(bt == T_FLOAT, "must be float");
6140 movflt(to_addr, from->as_XMMRegister());
6141 }
6142 } else {
6143 movq(to_addr, from->as_Register());
6144 }
6145 }
6146 } else {
6147 Address from_addr = Address(rsp, from->reg2stack() * VMRegImpl::stack_slot_size + wordSize);
6148 if (to->is_reg()) {
6149 if (to->is_XMMRegister()) {
6150 if (bt == T_DOUBLE) {
6151 movdbl(to->as_XMMRegister(), from_addr);
6152 } else {
6153 assert(bt == T_FLOAT, "must be float");
6154 movflt(to->as_XMMRegister(), from_addr);
6155 }
6156 } else {
6157 movq(to->as_Register(), from_addr);
6158 }
6159 } else {
6160 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6161 movq(r13, from_addr);
6162 movq(Address(rsp, st_off), r13);
6163 }
6164 }
6165 }
6166 // Update register states
6167 reg_state[from->value()] = reg_writable;
6168 reg_state[to->value()] = reg_written;
6169 return true;
6170 }
6171
6172 // Calculate the extra stack space required for packing or unpacking inline
6173 // args and adjust the stack pointer (see MacroAssembler::remove_frame).
6174 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
6175 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
6176 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
6177 assert(sp_inc > 0, "sanity");
6178 // Two additional slots to account for return address
6179 sp_inc += 2 * VMRegImpl::stack_slot_size;
6180
6181 push(rbp);
6182 subptr(rsp, sp_inc);
6183 #ifdef ASSERT
6184 movl(Address(rsp, 0), badRegWordVal);
6185 movl(Address(rsp, VMRegImpl::stack_slot_size), badRegWordVal);
6186 #endif
6187 return sp_inc + wordSize; // account for rbp space
6188 }
6189
6190 // Read all fields from an inline type buffer and store the field values in registers/stack slots.
6191 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
6192 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
6193 RegState reg_state[]) {
6194 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
6195 assert(from->is_valid(), "source must be valid");
6196 bool progress = false;
6197 #ifdef ASSERT
6198 const int start_offset = offset();
6199 #endif
6200
6201 Label L_null, L_notNull;
6202 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
6203 Register tmp1 = r10;
6204 Register tmp2 = r13;
6205 Register fromReg = noreg;
6206 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
6207 bool done = true;
6208 bool mark_done = true;
6209 VMReg toReg;
6210 BasicType bt;
6211 // Check if argument requires a null check
6212 bool null_check = false;
6213 VMReg nullCheckReg;
6214 while (stream.next(nullCheckReg, bt)) {
6215 if (sig->at(stream.sig_index())._offset == -1) {
6216 null_check = true;
6217 break;
6218 }
6219 }
6220 stream.reset(sig_index, to_index);
6221 while (stream.next(toReg, bt)) {
6222 assert(toReg->is_valid(), "destination must be valid");
6223 int idx = (int)toReg->value();
6224 if (reg_state[idx] == reg_readonly) {
6225 if (idx != from->value()) {
6226 mark_done = false;
6227 }
6228 done = false;
6229 continue;
6230 } else if (reg_state[idx] == reg_written) {
6231 continue;
6232 }
6233 assert(reg_state[idx] == reg_writable, "must be writable");
6234 reg_state[idx] = reg_written;
6235 progress = true;
6236
6237 if (fromReg == noreg) {
6238 if (from->is_reg()) {
6239 fromReg = from->as_Register();
6240 } else {
6241 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6242 movq(tmp1, Address(rsp, st_off));
6243 fromReg = tmp1;
6244 }
6245 if (null_check) {
6246 // Nullable inline type argument, emit null check
6247 testptr(fromReg, fromReg);
6248 jcc(Assembler::zero, L_null);
6249 }
6250 }
6251 int off = sig->at(stream.sig_index())._offset;
6252 if (off == -1) {
6253 assert(null_check, "Missing null check at");
6254 if (toReg->is_stack()) {
6255 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6256 movq(Address(rsp, st_off), 1);
6257 } else {
6258 movq(toReg->as_Register(), 1);
6259 }
6260 continue;
6261 }
6262 if (sig->at(stream.sig_index())._vt_oop) {
6263 if (toReg->is_stack()) {
6264 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6265 movq(Address(rsp, st_off), fromReg);
6266 } else {
6267 movq(toReg->as_Register(), fromReg);
6268 }
6269 continue;
6270 }
6271 assert(off > 0, "offset in object should be positive");
6272 Address fromAddr = Address(fromReg, off);
6273 if (!toReg->is_XMMRegister()) {
6274 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
6275 if (is_reference_type(bt)) {
6276 load_heap_oop(dst, fromAddr);
6277 } else {
6278 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
6279 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
6280 }
6281 if (toReg->is_stack()) {
6282 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6283 movq(Address(rsp, st_off), dst);
6284 }
6285 } else if (bt == T_DOUBLE) {
6286 movdbl(toReg->as_XMMRegister(), fromAddr);
6287 } else {
6288 assert(bt == T_FLOAT, "must be float");
6289 movflt(toReg->as_XMMRegister(), fromAddr);
6290 }
6291 }
6292 if (progress && null_check) {
6293 if (done) {
6294 jmp(L_notNull);
6295 bind(L_null);
6296 // Set null marker to zero to signal that the argument is null.
6297 // Also set all fields to zero since the runtime requires a canonical
6298 // representation of a flat null.
6299 stream.reset(sig_index, to_index);
6300 while (stream.next(toReg, bt)) {
6301 if (toReg->is_stack()) {
6302 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6303 movq(Address(rsp, st_off), 0);
6304 } else if (toReg->is_XMMRegister()) {
6305 xorps(toReg->as_XMMRegister(), toReg->as_XMMRegister());
6306 } else {
6307 xorl(toReg->as_Register(), toReg->as_Register());
6308 }
6309 }
6310 bind(L_notNull);
6311 } else {
6312 bind(L_null);
6313 }
6314 }
6315
6316 sig_index = stream.sig_index();
6317 to_index = stream.regs_index();
6318
6319 if (mark_done && reg_state[from->value()] != reg_written) {
6320 // This is okay because no one else will write to that slot
6321 reg_state[from->value()] = reg_writable;
6322 }
6323 from_index--;
6324 assert(progress || (start_offset == offset()), "should not emit code");
6325 return done;
6326 }
6327
6328 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
6329 VMRegPair* from, int from_count, int& from_index, VMReg to,
6330 RegState reg_state[], Register val_array) {
6331 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
6332 assert(to->is_valid(), "destination must be valid");
6333
6334 if (reg_state[to->value()] == reg_written) {
6335 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
6336 return true; // Already written
6337 }
6338
6339 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
6340 Register val_obj_tmp = r11;
6341 Register from_reg_tmp = r14;
6342 Register tmp1 = r10;
6343 Register tmp2 = r13;
6344 Register tmp3 = rbx;
6345 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
6346
6347 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
6348
6349 if (reg_state[to->value()] == reg_readonly) {
6350 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
6351 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
6352 return false; // Not yet writable
6353 }
6354 val_obj = val_obj_tmp;
6355 }
6356
6357 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
6358 VMReg fromReg;
6359 BasicType bt;
6360 Label L_null;
6361 while (stream.next(fromReg, bt)) {
6362 assert(fromReg->is_valid(), "source must be valid");
6363 reg_state[fromReg->value()] = reg_writable;
6364
6365 int off = sig->at(stream.sig_index())._offset;
6366 if (off == -1) {
6367 // Nullable inline type argument, emit null check
6368 Label L_notNull;
6369 if (fromReg->is_stack()) {
6370 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6371 testb(Address(rsp, ld_off), 1);
6372 } else {
6373 testb(fromReg->as_Register(), 1);
6374 }
6375 jcc(Assembler::notZero, L_notNull);
6376 movptr(val_obj, 0);
6377 jmp(L_null);
6378 bind(L_notNull);
6379 continue;
6380 }
6381 if (sig->at(stream.sig_index())._vt_oop) {
6382 // buffer argument: use if non null
6383 if (fromReg->is_stack()) {
6384 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6385 movptr(val_obj, Address(rsp, ld_off));
6386 } else {
6387 movptr(val_obj, fromReg->as_Register());
6388 }
6389 testptr(val_obj, val_obj);
6390 jcc(Assembler::notEqual, L_null);
6391 // otherwise get the buffer from the just allocated pool of buffers
6392 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
6393 load_heap_oop(val_obj, Address(val_array, index));
6394 continue;
6395 }
6396
6397 assert(off > 0, "offset in object should be positive");
6398 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
6399
6400 // Pack the scalarized field into the value object.
6401 Address dst(val_obj, off);
6402 if (!fromReg->is_XMMRegister()) {
6403 Register src;
6404 if (fromReg->is_stack()) {
6405 src = from_reg_tmp;
6406 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6407 load_sized_value(src, Address(rsp, ld_off), size_in_bytes, /* is_signed */ false);
6408 } else {
6409 src = fromReg->as_Register();
6410 }
6411 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
6412 if (is_reference_type(bt)) {
6413 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep val_obj valid.
6414 mov(tmp3, val_obj);
6415 Address dst_with_tmp3(tmp3, off);
6416 store_heap_oop(dst_with_tmp3, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
6417 } else {
6418 store_sized_value(dst, src, size_in_bytes);
6419 }
6420 } else if (bt == T_DOUBLE) {
6421 movdbl(dst, fromReg->as_XMMRegister());
6422 } else {
6423 assert(bt == T_FLOAT, "must be float");
6424 movflt(dst, fromReg->as_XMMRegister());
6425 }
6426 }
6427 bind(L_null);
6428 sig_index = stream.sig_index();
6429 from_index = stream.regs_index();
6430
6431 assert(reg_state[to->value()] == reg_writable, "must have already been read");
6432 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
6433 assert(success, "to register must be writable");
6434 return true;
6435 }
6436
6437 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
6438 return reg->is_XMMRegister() ? xmm8->as_VMReg() : r14->as_VMReg();
6439 }
6440
6441 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6442 assert((initial_framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6443 if (needs_stack_repair) {
6444 // The method has a scalarized entry point (where fields of value object arguments
6445 // are passed through registers and stack), and a non-scalarized entry point (where
6446 // value object arguments are given as oops). The non-scalarized entry point will
6447 // first load each field of value object arguments and store them in registers and on
6448 // the stack in a way compatible with the scalarized entry point. To do so, some extra
6449 // stack space might be reserved (if argument registers are not enough). On leaving the
6450 // method, this space must be freed.
6451 //
6452 // In case we used the non-scalarized entry point the stack looks like this:
6453 //
6454 // | Arguments from caller |
6455 // |---------------------------| <-- caller's SP
6456 // | Return address #1 |
6457 // | Saved RBP #1 |
6458 // |---------------------------|
6459 // | Extension space for |
6460 // | inline arg (un)packing |
6461 // |---------------------------| <-- start of this method's frame
6462 // | Return address #2 |
6463 // | Saved RBP #2 |
6464 // |---------------------------| <-- RBP (with -XX:+PreserveFramePointer)
6465 // | sp_inc |
6466 // | method locals |
6467 // |---------------------------| <-- SP
6468 //
6469 // Space for the return pc and saved rbp is reserved twice. But only the #1 copies
6470 // contain the real values of return pc and saved rbp. The #2 copies are not reliable
6471 // and should not be used. They are mostly needed to add space between the extension
6472 // space and the locals, as there would be between the real arguments and the locals
6473 // if we don't need to do unpacking (from the scalarized entry point).
6474 //
6475 // When leaving, one must load RBP #1 into RBP, and use the copy #1 of the return address,
6476 // while keeping in mind that from the scalarized entry point, there will be only one
6477 // copy. Indeed, in the case we used the scalarized calling convention, the stack looks like this:
6478 //
6479 // | Arguments from caller |
6480 // |---------------------------| <-- caller's SP
6481 // | Return address |
6482 // | Saved RBP |
6483 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6484 // | sp_inc |
6485 // | method locals |
6486 // |---------------------------| <-- SP
6487 //
6488 // The sp_inc stack slot holds the total size of the frame, including the extension
6489 // space and copies #2 of the return address and the saved RBP (but never the copies
6490 // #1 of the return address and saved RBP). That is how to find the copies #1 of the
6491 // return address and saved rbp. This size is expressed in bytes. Be careful when using
6492 // it from C++ in pointer arithmetic you might need to divide it by wordSize.
6493
6494 // The stack increment resides just below the saved rbp
6495 addq(rsp, Address(rsp, initial_framesize - wordSize));
6496 pop(rbp);
6497 } else {
6498 if (initial_framesize > 0) {
6499 addq(rsp, initial_framesize);
6500 }
6501 pop(rbp);
6502 }
6503 }
6504
6505 #ifdef COMPILER2
6506
6507 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
6508 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp, KRegister mask) {
6509 // cnt - number of qwords (8-byte words).
6510 // base - start address, qword aligned.
6511 Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
6512 bool use64byteVector = (MaxVectorSize == 64) && (CopyAVX3Threshold == 0);
6513 if (use64byteVector) {
6514 evpbroadcastq(xtmp, val, AVX_512bit);
6515 } else if (MaxVectorSize >= 32) {
6516 movdq(xtmp, val);
6517 punpcklqdq(xtmp, xtmp);
6518 vinserti128_high(xtmp, xtmp);
6519 } else {
6520 movdq(xtmp, val);
6521 punpcklqdq(xtmp, xtmp);
6522 }
6523 jmp(L_zero_64_bytes);
6524
6525 BIND(L_loop);
6526 if (MaxVectorSize >= 32) {
6527 fill64(base, 0, xtmp, use64byteVector);
6528 } else {
6529 movdqu(Address(base, 0), xtmp);
6530 movdqu(Address(base, 16), xtmp);
6531 movdqu(Address(base, 32), xtmp);
6532 movdqu(Address(base, 48), xtmp);
6533 }
6534 addptr(base, 64);
6535
6536 BIND(L_zero_64_bytes);
6537 subptr(cnt, 8);
6538 jccb(Assembler::greaterEqual, L_loop);
6539
6540 // Copy trailing 64 bytes
6541 if (use64byteVector) {
6542 addptr(cnt, 8);
6543 jccb(Assembler::equal, L_end);
6544 fill64_masked(3, base, 0, xtmp, mask, cnt, val, true);
6545 jmp(L_end);
6546 } else {
6547 addptr(cnt, 4);
6548 jccb(Assembler::less, L_tail);
6549 if (MaxVectorSize >= 32) {
6550 vmovdqu(Address(base, 0), xtmp);
6551 } else {
6552 movdqu(Address(base, 0), xtmp);
6553 movdqu(Address(base, 16), xtmp);
6554 }
6555 }
6556 addptr(base, 32);
6557 subptr(cnt, 4);
6558
6559 BIND(L_tail);
6560 addptr(cnt, 4);
6561 jccb(Assembler::lessEqual, L_end);
6562 if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
6563 fill32_masked(3, base, 0, xtmp, mask, cnt, val);
6564 } else {
6565 decrement(cnt);
6566
6567 BIND(L_sloop);
6568 movq(Address(base, 0), xtmp);
6569 addptr(base, 8);
6570 decrement(cnt);
6571 jccb(Assembler::greaterEqual, L_sloop);
6572 }
6573 BIND(L_end);
6574 }
6575
6576 // Clearing constant sized memory using YMM/ZMM registers.
6577 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
6578 assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
6579 bool use64byteVector = (MaxVectorSize > 32) && (CopyAVX3Threshold == 0);
6580
6581 int vector64_count = (cnt & (~0x7)) >> 3;
6582 cnt = cnt & 0x7;
6583 const int fill64_per_loop = 4;
6645 break;
6646 case 7:
6647 if (use64byteVector) {
6648 movl(rtmp, 0x7F);
6649 kmovwl(mask, rtmp);
6650 evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
6651 } else {
6652 evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
6653 movl(rtmp, 0x7);
6654 kmovwl(mask, rtmp);
6655 evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
6656 }
6657 break;
6658 default:
6659 fatal("Unexpected length : %d\n",cnt);
6660 break;
6661 }
6662 }
6663 }
6664
6665 void MacroAssembler::clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp,
6666 bool is_large, bool word_copy_only, KRegister mask) {
6667 // cnt - number of qwords (8-byte words).
6668 // base - start address, qword aligned.
6669 // is_large - if optimizers know cnt is larger than InitArrayShortSize
6670 assert(base==rdi, "base register must be edi for rep stos");
6671 assert(val==rax, "val register must be eax for rep stos");
6672 assert(cnt==rcx, "cnt register must be ecx for rep stos");
6673 assert(InitArrayShortSize % BytesPerLong == 0,
6674 "InitArrayShortSize should be the multiple of BytesPerLong");
6675
6676 Label DONE;
6677
6678 if (!is_large) {
6679 Label LOOP, LONG;
6680 cmpptr(cnt, InitArrayShortSize/BytesPerLong);
6681 jccb(Assembler::greater, LONG);
6682
6683 decrement(cnt);
6684 jccb(Assembler::negative, DONE); // Zero length
6685
6686 // Use individual pointer-sized stores for small counts:
6687 BIND(LOOP);
6688 movptr(Address(base, cnt, Address::times_ptr), val);
6689 decrement(cnt);
6690 jccb(Assembler::greaterEqual, LOOP);
6691 jmpb(DONE);
6692
6693 BIND(LONG);
6694 }
6695
6696 // Use longer rep-prefixed ops for non-small counts:
6697 if (UseFastStosb && !word_copy_only) {
6698 shlptr(cnt, 3); // convert to number of bytes
6699 rep_stosb();
6700 } else if (UseXMMForObjInit) {
6701 xmm_clear_mem(base, cnt, val, xtmp, mask);
6702 } else {
6703 rep_stos();
6704 }
6705
6706 BIND(DONE);
6707 }
6708
6709 #endif //COMPILER2
6710
6711
6712 void MacroAssembler::generate_fill(BasicType t, bool aligned,
6713 Register to, Register value, Register count,
6714 Register rtmp, XMMRegister xtmp) {
6715 ShortBranchVerifier sbv(this);
6716 assert_different_registers(to, value, count, rtmp);
6717 Label L_exit;
6718 Label L_fill_2_bytes, L_fill_4_bytes;
6719
6720 #if defined(COMPILER2)
6721 if(MaxVectorSize >=32 &&
10598
10599 // Load top.
10600 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10601
10602 // Check if the lock-stack is full.
10603 cmpl(top, LockStack::end_offset());
10604 jcc(Assembler::greaterEqual, slow);
10605
10606 // Check for recursion.
10607 cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
10608 jcc(Assembler::equal, push);
10609
10610 // Check header for monitor (0b10).
10611 testptr(reg_rax, markWord::monitor_value);
10612 jcc(Assembler::notZero, slow);
10613
10614 // Try to lock. Transition lock bits 0b01 => 0b00
10615 movptr(tmp, reg_rax);
10616 andptr(tmp, ~(int32_t)markWord::unlocked_value);
10617 orptr(reg_rax, markWord::unlocked_value);
10618 // Mask inline_type bit such that we go to the slow path if object is an inline type
10619 andptr(reg_rax, ~((int) markWord::inline_type_bit_in_place));
10620
10621 lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
10622 jcc(Assembler::notEqual, slow);
10623
10624 // Restore top, CAS clobbers register.
10625 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10626
10627 bind(push);
10628 // After successful lock, push object on lock-stack.
10629 movptr(Address(thread, top), obj);
10630 incrementl(top, oopSize);
10631 movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
10632 }
10633
10634 // Implements fast-unlocking.
10635 //
10636 // obj: the object to be unlocked
10637 // reg_rax: rax
10638 // thread: the thread
10639 // tmp: a temporary register
10640 void MacroAssembler::fast_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {
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