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src/hotspot/cpu/x86/macroAssembler_x86.cpp

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   11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
   12  * version 2 for more details (a copy is included in the LICENSE file that
   13  * accompanied this code).
   14  *
   15  * You should have received a copy of the GNU General Public License version
   16  * 2 along with this work; if not, write to the Free Software Foundation,
   17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
   18  *
   19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
   20  * or visit www.oracle.com if you need additional information or have any
   21  * questions.
   22  *
   23  */
   24 
   25 #include "asm/assembler.hpp"
   26 #include "asm/assembler.inline.hpp"
   27 #include "code/aotCodeCache.hpp"
   28 #include "code/compiledIC.hpp"
   29 #include "compiler/compiler_globals.hpp"
   30 #include "compiler/disassembler.hpp"

   31 #include "crc32c.h"
   32 #include "gc/shared/barrierSet.hpp"
   33 #include "gc/shared/barrierSetAssembler.hpp"
   34 #include "gc/shared/collectedHeap.inline.hpp"
   35 #include "gc/shared/tlab_globals.hpp"
   36 #include "interpreter/bytecodeHistogram.hpp"
   37 #include "interpreter/interpreter.hpp"
   38 #include "interpreter/interpreterRuntime.hpp"
   39 #include "jvm.h"
   40 #include "memory/resourceArea.hpp"
   41 #include "memory/universe.hpp"
   42 #include "oops/accessDecorators.hpp"
   43 #include "oops/compressedKlass.inline.hpp"
   44 #include "oops/compressedOops.inline.hpp"
   45 #include "oops/klass.inline.hpp"

   46 #include "prims/methodHandles.hpp"
   47 #include "runtime/continuation.hpp"
   48 #include "runtime/interfaceSupport.inline.hpp"
   49 #include "runtime/javaThread.hpp"
   50 #include "runtime/jniHandles.hpp"
   51 #include "runtime/objectMonitor.hpp"
   52 #include "runtime/os.hpp"
   53 #include "runtime/safepoint.hpp"
   54 #include "runtime/safepointMechanism.hpp"
   55 #include "runtime/sharedRuntime.hpp"

   56 #include "runtime/stubRoutines.hpp"
   57 #include "utilities/checkedCast.hpp"
   58 #include "utilities/macros.hpp"




   59 
   60 #ifdef PRODUCT
   61 #define BLOCK_COMMENT(str) /* nothing */
   62 #define STOP(error) stop(error)
   63 #else
   64 #define BLOCK_COMMENT(str) block_comment(str)
   65 #define STOP(error) block_comment(error); stop(error)
   66 #endif
   67 
   68 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
   69 
   70 #ifdef ASSERT
   71 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
   72 #endif
   73 
   74 static const Assembler::Condition reverse[] = {
   75     Assembler::noOverflow     /* overflow      = 0x0 */ ,
   76     Assembler::overflow       /* noOverflow    = 0x1 */ ,
   77     Assembler::aboveEqual     /* carrySet      = 0x2, below         = 0x2 */ ,
   78     Assembler::below          /* aboveEqual    = 0x3, carryClear    = 0x3 */ ,

 1270 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
 1271   assert_different_registers(arg_0, c_rarg1, c_rarg2);
 1272   assert_different_registers(arg_1, c_rarg2);
 1273   pass_arg2(this, arg_2);
 1274   pass_arg1(this, arg_1);
 1275   pass_arg0(this, arg_0);
 1276   call_VM_leaf(entry_point, 3);
 1277 }
 1278 
 1279 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
 1280   assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
 1281   assert_different_registers(arg_1, c_rarg2, c_rarg3);
 1282   assert_different_registers(arg_2, c_rarg3);
 1283   pass_arg3(this, arg_3);
 1284   pass_arg2(this, arg_2);
 1285   pass_arg1(this, arg_1);
 1286   pass_arg0(this, arg_0);
 1287   call_VM_leaf(entry_point, 3);
 1288 }
 1289 




 1290 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
 1291   pass_arg0(this, arg_0);
 1292   MacroAssembler::call_VM_leaf_base(entry_point, 1);
 1293 }
 1294 
 1295 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
 1296   assert_different_registers(arg_0, c_rarg1);
 1297   pass_arg1(this, arg_1);
 1298   pass_arg0(this, arg_0);
 1299   MacroAssembler::call_VM_leaf_base(entry_point, 2);
 1300 }
 1301 
 1302 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
 1303   assert_different_registers(arg_0, c_rarg1, c_rarg2);
 1304   assert_different_registers(arg_1, c_rarg2);
 1305   pass_arg2(this, arg_2);
 1306   pass_arg1(this, arg_1);
 1307   pass_arg0(this, arg_0);
 1308   MacroAssembler::call_VM_leaf_base(entry_point, 3);
 1309 }

 2323     lea(rscratch, src);
 2324     Assembler::mulss(dst, Address(rscratch, 0));
 2325   }
 2326 }
 2327 
 2328 void MacroAssembler::null_check(Register reg, int offset) {
 2329   if (needs_explicit_null_check(offset)) {
 2330     // provoke OS null exception if reg is null by
 2331     // accessing M[reg] w/o changing any (non-CC) registers
 2332     // NOTE: cmpl is plenty here to provoke a segv
 2333     cmpptr(rax, Address(reg, 0));
 2334     // Note: should probably use testl(rax, Address(reg, 0));
 2335     //       may be shorter code (however, this version of
 2336     //       testl needs to be implemented first)
 2337   } else {
 2338     // nothing to do, (later) access of M[reg + offset]
 2339     // will provoke OS null exception if reg is null
 2340   }
 2341 }
 2342 











































































































 2343 void MacroAssembler::os_breakpoint() {
 2344   // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
 2345   // (e.g., MSVC can't call ps() otherwise)
 2346   call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
 2347 }
 2348 
 2349 void MacroAssembler::unimplemented(const char* what) {
 2350   const char* buf = nullptr;
 2351   {
 2352     ResourceMark rm;
 2353     stringStream ss;
 2354     ss.print("unimplemented: %s", what);
 2355     buf = code_string(ss.as_string());
 2356   }
 2357   stop(buf);
 2358 }
 2359 
 2360 #define XSTATE_BV 0x200
 2361 
 2362 void MacroAssembler::pop_CPU_state() {

 3411 }
 3412 
 3413 // C++ bool manipulation
 3414 void MacroAssembler::testbool(Register dst) {
 3415   if(sizeof(bool) == 1)
 3416     testb(dst, 0xff);
 3417   else if(sizeof(bool) == 2) {
 3418     // testw implementation needed for two byte bools
 3419     ShouldNotReachHere();
 3420   } else if(sizeof(bool) == 4)
 3421     testl(dst, dst);
 3422   else
 3423     // unsupported
 3424     ShouldNotReachHere();
 3425 }
 3426 
 3427 void MacroAssembler::testptr(Register dst, Register src) {
 3428   testq(dst, src);
 3429 }
 3430 






















































































































 3431 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
 3432 void MacroAssembler::tlab_allocate(Register obj,
 3433                                    Register var_size_in_bytes,
 3434                                    int con_size_in_bytes,
 3435                                    Register t1,
 3436                                    Register t2,
 3437                                    Label& slow_case) {
 3438   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 3439   bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
 3440 }
 3441 
 3442 RegSet MacroAssembler::call_clobbered_gp_registers() {
 3443   RegSet regs;
 3444   regs += RegSet::of(rax, rcx, rdx);
 3445 #ifndef _WINDOWS
 3446   regs += RegSet::of(rsi, rdi);
 3447 #endif
 3448   regs += RegSet::range(r8, r11);
 3449   if (UseAPX) {
 3450     regs += RegSet::range(r16, as_Register(Register::number_of_registers - 1));

 3614   xorptr(temp, temp);    // use _zero reg to clear memory (shorter code)
 3615   if (UseIncDec) {
 3616     shrptr(index, 3);  // divide by 8/16 and set carry flag if bit 2 was set
 3617   } else {
 3618     shrptr(index, 2);  // use 2 instructions to avoid partial flag stall
 3619     shrptr(index, 1);
 3620   }
 3621 
 3622   // initialize remaining object fields: index is a multiple of 2 now
 3623   {
 3624     Label loop;
 3625     bind(loop);
 3626     movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
 3627     decrement(index);
 3628     jcc(Assembler::notZero, loop);
 3629   }
 3630 
 3631   bind(done);
 3632 }
 3633 



























 3634 // Look up the method for a megamorphic invokeinterface call.
 3635 // The target method is determined by <intf_klass, itable_index>.
 3636 // The receiver klass is in recv_klass.
 3637 // On success, the result will be in method_result, and execution falls through.
 3638 // On failure, execution transfers to the given label.
 3639 void MacroAssembler::lookup_interface_method(Register recv_klass,
 3640                                              Register intf_klass,
 3641                                              RegisterOrConstant itable_index,
 3642                                              Register method_result,
 3643                                              Register scan_temp,
 3644                                              Label& L_no_such_interface,
 3645                                              bool return_method) {
 3646   assert_different_registers(recv_klass, intf_klass, scan_temp);
 3647   assert_different_registers(method_result, intf_klass, scan_temp);
 3648   assert(recv_klass != method_result || !return_method,
 3649          "recv_klass can be destroyed when method isn't needed");
 3650 
 3651   assert(itable_index.is_constant() || itable_index.as_register() == method_result,
 3652          "caller must use same register for non-constant itable index as for method");
 3653 

 4664   } else {
 4665     Label L;
 4666     jccb(negate_condition(cc), L);
 4667     movl(dst, src);
 4668     bind(L);
 4669   }
 4670 }
 4671 
 4672 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
 4673   if (VM_Version::supports_cmov()) {
 4674     cmovl(cc, dst, src);
 4675   } else {
 4676     Label L;
 4677     jccb(negate_condition(cc), L);
 4678     movl(dst, src);
 4679     bind(L);
 4680   }
 4681 }
 4682 
 4683 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
 4684   if (!VerifyOops) return;




 4685 
 4686   BLOCK_COMMENT("verify_oop {");
 4687   push(rscratch1);
 4688   push(rax);                          // save rax
 4689   push(reg);                          // pass register argument
 4690 
 4691   // Pass register number to verify_oop_subroutine
 4692   const char* b = nullptr;
 4693   {
 4694     ResourceMark rm;
 4695     stringStream ss;
 4696     ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
 4697     b = code_string(ss.as_string());
 4698   }
 4699   AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
 4700   pushptr(buffer.addr(), rscratch1);
 4701 
 4702   // call indirectly to solve generation ordering problem
 4703   movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
 4704   call(rax);

 4723   // cf. TemplateTable::prepare_invoke(), if (load_receiver).
 4724   int stackElementSize = Interpreter::stackElementSize;
 4725   int offset = Interpreter::expr_offset_in_bytes(extra_slot_offset+0);
 4726 #ifdef ASSERT
 4727   int offset1 = Interpreter::expr_offset_in_bytes(extra_slot_offset+1);
 4728   assert(offset1 - offset == stackElementSize, "correct arithmetic");
 4729 #endif
 4730   Register             scale_reg    = noreg;
 4731   Address::ScaleFactor scale_factor = Address::no_scale;
 4732   if (arg_slot.is_constant()) {
 4733     offset += arg_slot.as_constant() * stackElementSize;
 4734   } else {
 4735     scale_reg    = arg_slot.as_register();
 4736     scale_factor = Address::times(stackElementSize);
 4737   }
 4738   offset += wordSize;           // return PC is on stack
 4739   return Address(rsp, scale_reg, scale_factor, offset);
 4740 }
 4741 
 4742 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
 4743   if (!VerifyOops) return;




 4744 
 4745   push(rscratch1);
 4746   push(rax); // save rax,
 4747   // addr may contain rsp so we will have to adjust it based on the push
 4748   // we just did (and on 64 bit we do two pushes)
 4749   // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
 4750   // stores rax into addr which is backwards of what was intended.
 4751   if (addr.uses(rsp)) {
 4752     lea(rax, addr);
 4753     pushptr(Address(rax, 2 * BytesPerWord));
 4754   } else {
 4755     pushptr(addr);
 4756   }
 4757 
 4758   // Pass register number to verify_oop_subroutine
 4759   const char* b = nullptr;
 4760   {
 4761     ResourceMark rm;
 4762     stringStream ss;
 4763     ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);

 5117 
 5118 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
 5119   // get mirror
 5120   const int mirror_offset = in_bytes(Klass::java_mirror_offset());
 5121   load_method_holder(mirror, method);
 5122   movptr(mirror, Address(mirror, mirror_offset));
 5123   resolve_oop_handle(mirror, tmp);
 5124 }
 5125 
 5126 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
 5127   load_method_holder(rresult, rmethod);
 5128   movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
 5129 }
 5130 
 5131 void MacroAssembler::load_method_holder(Register holder, Register method) {
 5132   movptr(holder, Address(method, Method::const_offset()));                      // ConstMethod*
 5133   movptr(holder, Address(holder, ConstMethod::constants_offset()));             // ConstantPool*
 5134   movptr(holder, Address(holder, ConstantPool::pool_holder_offset()));          // InstanceKlass*
 5135 }
 5136 










 5137 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
 5138   assert(UseCompactObjectHeaders, "expect compact object headers");
 5139   movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
 5140   shrq(dst, markWord::klass_shift);
 5141 }
 5142 
 5143 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
 5144   assert_different_registers(src, tmp);
 5145   assert_different_registers(dst, tmp);
 5146 
 5147   if (UseCompactObjectHeaders) {
 5148     load_narrow_klass_compact(dst, src);
 5149     decode_klass_not_null(dst, tmp);
 5150   } else if (UseCompressedClassPointers) {
 5151     movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 5152     decode_klass_not_null(dst, tmp);
 5153   } else {
 5154     movptr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 5155   }
 5156 }
 5157 





 5158 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
 5159   assert(!UseCompactObjectHeaders, "not with compact headers");
 5160   assert_different_registers(src, tmp);
 5161   assert_different_registers(dst, tmp);
 5162   if (UseCompressedClassPointers) {
 5163     encode_klass_not_null(src, tmp);
 5164     movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
 5165   } else {
 5166     movptr(Address(dst, oopDesc::klass_offset_in_bytes()), src);
 5167   }
 5168 }
 5169 
 5170 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
 5171   if (UseCompactObjectHeaders) {
 5172     assert(tmp != noreg, "need tmp");
 5173     assert_different_registers(klass, obj, tmp);
 5174     load_narrow_klass_compact(tmp, obj);
 5175     cmpl(klass, tmp);
 5176   } else if (UseCompressedClassPointers) {
 5177     cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));

 5203   bool as_raw = (decorators & AS_RAW) != 0;
 5204   if (as_raw) {
 5205     bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
 5206   } else {
 5207     bs->load_at(this, decorators, type, dst, src, tmp1);
 5208   }
 5209 }
 5210 
 5211 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
 5212                                      Register tmp1, Register tmp2, Register tmp3) {
 5213   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 5214   decorators = AccessInternal::decorator_fixup(decorators, type);
 5215   bool as_raw = (decorators & AS_RAW) != 0;
 5216   if (as_raw) {
 5217     bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
 5218   } else {
 5219     bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
 5220   }
 5221 }
 5222 








































 5223 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
 5224   access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
 5225 }
 5226 
 5227 // Doesn't do verification, generates fixed size code
 5228 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
 5229   access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
 5230 }
 5231 
 5232 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
 5233                                     Register tmp2, Register tmp3, DecoratorSet decorators) {
 5234   access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
 5235 }
 5236 
 5237 // Used for storing nulls.
 5238 void MacroAssembler::store_heap_oop_null(Address dst) {
 5239   access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
 5240 }
 5241 
 5242 void MacroAssembler::store_klass_gap(Register dst, Register src) {

 5562   Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
 5563 }
 5564 
 5565 void MacroAssembler::reinit_heapbase() {
 5566   if (UseCompressedOops) {
 5567     if (Universe::heap() != nullptr) {
 5568       if (CompressedOops::base() == nullptr) {
 5569         MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
 5570       } else {
 5571         mov64(r12_heapbase, (int64_t)CompressedOops::base());
 5572       }
 5573     } else {
 5574       movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
 5575     }
 5576   }
 5577 }
 5578 
 5579 #if COMPILER2_OR_JVMCI
 5580 
 5581 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
 5582 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
 5583   // cnt - number of qwords (8-byte words).
 5584   // base - start address, qword aligned.
 5585   Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
 5586   bool use64byteVector = (MaxVectorSize == 64) && (VM_Version::avx3_threshold() == 0);
 5587   if (use64byteVector) {
 5588     vpxor(xtmp, xtmp, xtmp, AVX_512bit);
 5589   } else if (MaxVectorSize >= 32) {
 5590     vpxor(xtmp, xtmp, xtmp, AVX_256bit);


 5591   } else {
 5592     pxor(xtmp, xtmp);

 5593   }
 5594   jmp(L_zero_64_bytes);
 5595 
 5596   BIND(L_loop);
 5597   if (MaxVectorSize >= 32) {
 5598     fill64(base, 0, xtmp, use64byteVector);
 5599   } else {
 5600     movdqu(Address(base,  0), xtmp);
 5601     movdqu(Address(base, 16), xtmp);
 5602     movdqu(Address(base, 32), xtmp);
 5603     movdqu(Address(base, 48), xtmp);
 5604   }
 5605   addptr(base, 64);
 5606 
 5607   BIND(L_zero_64_bytes);
 5608   subptr(cnt, 8);
 5609   jccb(Assembler::greaterEqual, L_loop);
 5610 
 5611   // Copy trailing 64 bytes
 5612   if (use64byteVector) {
 5613     addptr(cnt, 8);
 5614     jccb(Assembler::equal, L_end);
 5615     fill64_masked(3, base, 0, xtmp, mask, cnt, rtmp, true);
 5616     jmp(L_end);
 5617   } else {
 5618     addptr(cnt, 4);
 5619     jccb(Assembler::less, L_tail);
 5620     if (MaxVectorSize >= 32) {
 5621       vmovdqu(Address(base, 0), xtmp);
 5622     } else {
 5623       movdqu(Address(base,  0), xtmp);
 5624       movdqu(Address(base, 16), xtmp);
 5625     }
 5626   }
 5627   addptr(base, 32);
 5628   subptr(cnt, 4);
 5629 
 5630   BIND(L_tail);
 5631   addptr(cnt, 4);
 5632   jccb(Assembler::lessEqual, L_end);
 5633   if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
 5634     fill32_masked(3, base, 0, xtmp, mask, cnt, rtmp);
 5635   } else {
 5636     decrement(cnt);
 5637 
 5638     BIND(L_sloop);
 5639     movq(Address(base, 0), xtmp);
 5640     addptr(base, 8);
 5641     decrement(cnt);
 5642     jccb(Assembler::greaterEqual, L_sloop);
 5643   }
 5644   BIND(L_end);
 5645 }
 5646 
























































































































































































































































































































































































































 5647 // Clearing constant sized memory using YMM/ZMM registers.
 5648 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
 5649   assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
 5650   bool use64byteVector = (MaxVectorSize > 32) && (VM_Version::avx3_threshold() == 0);
 5651 
 5652   int vector64_count = (cnt & (~0x7)) >> 3;
 5653   cnt = cnt & 0x7;
 5654   const int fill64_per_loop = 4;
 5655   const int max_unrolled_fill64 = 8;
 5656 
 5657   // 64 byte initialization loop.
 5658   vpxor(xtmp, xtmp, xtmp, use64byteVector ? AVX_512bit : AVX_256bit);
 5659   int start64 = 0;
 5660   if (vector64_count > max_unrolled_fill64) {
 5661     Label LOOP;
 5662     Register index = rtmp;
 5663 
 5664     start64 = vector64_count - (vector64_count % fill64_per_loop);
 5665 
 5666     movl(index, 0);

 5716         break;
 5717       case 7:
 5718         if (use64byteVector) {
 5719           movl(rtmp, 0x7F);
 5720           kmovwl(mask, rtmp);
 5721           evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
 5722         } else {
 5723           evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
 5724           movl(rtmp, 0x7);
 5725           kmovwl(mask, rtmp);
 5726           evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
 5727         }
 5728         break;
 5729       default:
 5730         fatal("Unexpected length : %d\n",cnt);
 5731         break;
 5732     }
 5733   }
 5734 }
 5735 
 5736 void MacroAssembler::clear_mem(Register base, Register cnt, Register tmp, XMMRegister xtmp,
 5737                                bool is_large, KRegister mask) {
 5738   // cnt      - number of qwords (8-byte words).
 5739   // base     - start address, qword aligned.
 5740   // is_large - if optimizers know cnt is larger than InitArrayShortSize
 5741   assert(base==rdi, "base register must be edi for rep stos");
 5742   assert(tmp==rax,   "tmp register must be eax for rep stos");
 5743   assert(cnt==rcx,   "cnt register must be ecx for rep stos");
 5744   assert(InitArrayShortSize % BytesPerLong == 0,
 5745     "InitArrayShortSize should be the multiple of BytesPerLong");
 5746 
 5747   Label DONE;
 5748   if (!is_large || !UseXMMForObjInit) {
 5749     xorptr(tmp, tmp);
 5750   }
 5751 
 5752   if (!is_large) {
 5753     Label LOOP, LONG;
 5754     cmpptr(cnt, InitArrayShortSize/BytesPerLong);
 5755     jccb(Assembler::greater, LONG);
 5756 
 5757     decrement(cnt);
 5758     jccb(Assembler::negative, DONE); // Zero length
 5759 
 5760     // Use individual pointer-sized stores for small counts:
 5761     BIND(LOOP);
 5762     movptr(Address(base, cnt, Address::times_ptr), tmp);
 5763     decrement(cnt);
 5764     jccb(Assembler::greaterEqual, LOOP);
 5765     jmpb(DONE);
 5766 
 5767     BIND(LONG);
 5768   }
 5769 
 5770   // Use longer rep-prefixed ops for non-small counts:
 5771   if (UseFastStosb) {
 5772     shlptr(cnt, 3); // convert to number of bytes
 5773     rep_stosb();
 5774   } else if (UseXMMForObjInit) {
 5775     xmm_clear_mem(base, cnt, tmp, xtmp, mask);
 5776   } else {
 5777     rep_stos();
 5778   }
 5779 
 5780   BIND(DONE);
 5781 }
 5782 
 5783 #endif //COMPILER2_OR_JVMCI
 5784 
 5785 
 5786 void MacroAssembler::generate_fill(BasicType t, bool aligned,
 5787                                    Register to, Register value, Register count,
 5788                                    Register rtmp, XMMRegister xtmp) {
 5789   ShortBranchVerifier sbv(this);
 5790   assert_different_registers(to, value, count, rtmp);
 5791   Label L_exit;
 5792   Label L_fill_2_bytes, L_fill_4_bytes;
 5793 
 5794 #if defined(COMPILER2)
 5795   if(MaxVectorSize >=32 &&

 9628 
 9629   // Load top.
 9630   movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
 9631 
 9632   // Check if the lock-stack is full.
 9633   cmpl(top, LockStack::end_offset());
 9634   jcc(Assembler::greaterEqual, slow);
 9635 
 9636   // Check for recursion.
 9637   cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
 9638   jcc(Assembler::equal, push);
 9639 
 9640   // Check header for monitor (0b10).
 9641   testptr(reg_rax, markWord::monitor_value);
 9642   jcc(Assembler::notZero, slow);
 9643 
 9644   // Try to lock. Transition lock bits 0b01 => 0b00
 9645   movptr(tmp, reg_rax);
 9646   andptr(tmp, ~(int32_t)markWord::unlocked_value);
 9647   orptr(reg_rax, markWord::unlocked_value);




 9648   lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
 9649   jcc(Assembler::notEqual, slow);
 9650 
 9651   // Restore top, CAS clobbers register.
 9652   movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
 9653 
 9654   bind(push);
 9655   // After successful lock, push object on lock-stack.
 9656   movptr(Address(thread, top), obj);
 9657   incrementl(top, oopSize);
 9658   movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
 9659 }
 9660 
 9661 // Implements lightweight-unlocking.
 9662 //
 9663 // obj: the object to be unlocked
 9664 // reg_rax: rax
 9665 // thread: the thread
 9666 // tmp: a temporary register
 9667 void MacroAssembler::lightweight_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {

   11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
   12  * version 2 for more details (a copy is included in the LICENSE file that
   13  * accompanied this code).
   14  *
   15  * You should have received a copy of the GNU General Public License version
   16  * 2 along with this work; if not, write to the Free Software Foundation,
   17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
   18  *
   19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
   20  * or visit www.oracle.com if you need additional information or have any
   21  * questions.
   22  *
   23  */
   24 
   25 #include "asm/assembler.hpp"
   26 #include "asm/assembler.inline.hpp"
   27 #include "code/aotCodeCache.hpp"
   28 #include "code/compiledIC.hpp"
   29 #include "compiler/compiler_globals.hpp"
   30 #include "compiler/disassembler.hpp"
   31 #include "ci/ciInlineKlass.hpp"
   32 #include "crc32c.h"
   33 #include "gc/shared/barrierSet.hpp"
   34 #include "gc/shared/barrierSetAssembler.hpp"
   35 #include "gc/shared/collectedHeap.inline.hpp"
   36 #include "gc/shared/tlab_globals.hpp"
   37 #include "interpreter/bytecodeHistogram.hpp"
   38 #include "interpreter/interpreter.hpp"
   39 #include "interpreter/interpreterRuntime.hpp"
   40 #include "jvm.h"
   41 #include "memory/resourceArea.hpp"
   42 #include "memory/universe.hpp"
   43 #include "oops/accessDecorators.hpp"
   44 #include "oops/compressedKlass.inline.hpp"
   45 #include "oops/compressedOops.inline.hpp"
   46 #include "oops/klass.inline.hpp"
   47 #include "oops/resolvedFieldEntry.hpp"
   48 #include "prims/methodHandles.hpp"
   49 #include "runtime/continuation.hpp"
   50 #include "runtime/interfaceSupport.inline.hpp"
   51 #include "runtime/javaThread.hpp"
   52 #include "runtime/jniHandles.hpp"
   53 #include "runtime/objectMonitor.hpp"
   54 #include "runtime/os.hpp"
   55 #include "runtime/safepoint.hpp"
   56 #include "runtime/safepointMechanism.hpp"
   57 #include "runtime/sharedRuntime.hpp"
   58 #include "runtime/signature_cc.hpp"
   59 #include "runtime/stubRoutines.hpp"
   60 #include "utilities/checkedCast.hpp"
   61 #include "utilities/macros.hpp"
   62 #include "vmreg_x86.inline.hpp"
   63 #ifdef COMPILER2
   64 #include "opto/output.hpp"
   65 #endif
   66 
   67 #ifdef PRODUCT
   68 #define BLOCK_COMMENT(str) /* nothing */
   69 #define STOP(error) stop(error)
   70 #else
   71 #define BLOCK_COMMENT(str) block_comment(str)
   72 #define STOP(error) block_comment(error); stop(error)
   73 #endif
   74 
   75 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
   76 
   77 #ifdef ASSERT
   78 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
   79 #endif
   80 
   81 static const Assembler::Condition reverse[] = {
   82     Assembler::noOverflow     /* overflow      = 0x0 */ ,
   83     Assembler::overflow       /* noOverflow    = 0x1 */ ,
   84     Assembler::aboveEqual     /* carrySet      = 0x2, below         = 0x2 */ ,
   85     Assembler::below          /* aboveEqual    = 0x3, carryClear    = 0x3 */ ,

 1277 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
 1278   assert_different_registers(arg_0, c_rarg1, c_rarg2);
 1279   assert_different_registers(arg_1, c_rarg2);
 1280   pass_arg2(this, arg_2);
 1281   pass_arg1(this, arg_1);
 1282   pass_arg0(this, arg_0);
 1283   call_VM_leaf(entry_point, 3);
 1284 }
 1285 
 1286 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
 1287   assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
 1288   assert_different_registers(arg_1, c_rarg2, c_rarg3);
 1289   assert_different_registers(arg_2, c_rarg3);
 1290   pass_arg3(this, arg_3);
 1291   pass_arg2(this, arg_2);
 1292   pass_arg1(this, arg_1);
 1293   pass_arg0(this, arg_0);
 1294   call_VM_leaf(entry_point, 3);
 1295 }
 1296 
 1297 void MacroAssembler::super_call_VM_leaf(address entry_point) {
 1298   MacroAssembler::call_VM_leaf_base(entry_point, 1);
 1299 }
 1300 
 1301 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
 1302   pass_arg0(this, arg_0);
 1303   MacroAssembler::call_VM_leaf_base(entry_point, 1);
 1304 }
 1305 
 1306 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
 1307   assert_different_registers(arg_0, c_rarg1);
 1308   pass_arg1(this, arg_1);
 1309   pass_arg0(this, arg_0);
 1310   MacroAssembler::call_VM_leaf_base(entry_point, 2);
 1311 }
 1312 
 1313 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
 1314   assert_different_registers(arg_0, c_rarg1, c_rarg2);
 1315   assert_different_registers(arg_1, c_rarg2);
 1316   pass_arg2(this, arg_2);
 1317   pass_arg1(this, arg_1);
 1318   pass_arg0(this, arg_0);
 1319   MacroAssembler::call_VM_leaf_base(entry_point, 3);
 1320 }

 2334     lea(rscratch, src);
 2335     Assembler::mulss(dst, Address(rscratch, 0));
 2336   }
 2337 }
 2338 
 2339 void MacroAssembler::null_check(Register reg, int offset) {
 2340   if (needs_explicit_null_check(offset)) {
 2341     // provoke OS null exception if reg is null by
 2342     // accessing M[reg] w/o changing any (non-CC) registers
 2343     // NOTE: cmpl is plenty here to provoke a segv
 2344     cmpptr(rax, Address(reg, 0));
 2345     // Note: should probably use testl(rax, Address(reg, 0));
 2346     //       may be shorter code (however, this version of
 2347     //       testl needs to be implemented first)
 2348   } else {
 2349     // nothing to do, (later) access of M[reg + offset]
 2350     // will provoke OS null exception if reg is null
 2351   }
 2352 }
 2353 
 2354 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
 2355   andptr(markword, markWord::inline_type_mask_in_place);
 2356   cmpptr(markword, markWord::inline_type_pattern);
 2357   jcc(Assembler::equal, is_inline_type);
 2358 }
 2359 
 2360 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
 2361   if (can_be_null) {
 2362     testptr(object, object);
 2363     jcc(Assembler::zero, not_inline_type);
 2364   }
 2365   const int is_inline_type_mask = markWord::inline_type_pattern;
 2366   movptr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
 2367   andptr(tmp, is_inline_type_mask);
 2368   cmpptr(tmp, is_inline_type_mask);
 2369   jcc(Assembler::notEqual, not_inline_type);
 2370 }
 2371 
 2372 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
 2373   movl(temp_reg, flags);
 2374   testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
 2375   jcc(Assembler::notEqual, is_null_free_inline_type);
 2376 }
 2377 
 2378 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
 2379   movl(temp_reg, flags);
 2380   testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
 2381   jcc(Assembler::equal, not_null_free_inline_type);
 2382 }
 2383 
 2384 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
 2385   movl(temp_reg, flags);
 2386   testl(temp_reg, 1 << ResolvedFieldEntry::is_flat_shift);
 2387   jcc(Assembler::notEqual, is_flat);
 2388 }
 2389 
 2390 void MacroAssembler::test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker) {
 2391   movl(temp_reg, flags);
 2392   testl(temp_reg, 1 << ResolvedFieldEntry::has_null_marker_shift);
 2393   jcc(Assembler::notEqual, has_null_marker);
 2394 }
 2395 
 2396 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
 2397   Label test_mark_word;
 2398   // load mark word
 2399   movptr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
 2400   // check displaced
 2401   testl(temp_reg, markWord::unlocked_value);
 2402   jccb(Assembler::notZero, test_mark_word);
 2403   // slow path use klass prototype
 2404   push(rscratch1);
 2405   load_prototype_header(temp_reg, oop, rscratch1);
 2406   pop(rscratch1);
 2407 
 2408   bind(test_mark_word);
 2409   testl(temp_reg, test_bit);
 2410   jcc((jmp_set) ? Assembler::notZero : Assembler::zero, jmp_label);
 2411 }
 2412 
 2413 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg,
 2414                                          Label& is_flat_array) {
 2415 #ifdef _LP64
 2416   test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
 2417 #else
 2418   load_klass(temp_reg, oop, noreg);
 2419   movl(temp_reg, Address(temp_reg, Klass::layout_helper_offset()));
 2420   test_flat_array_layout(temp_reg, is_flat_array);
 2421 #endif
 2422 }
 2423 
 2424 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
 2425                                              Label& is_non_flat_array) {
 2426 #ifdef _LP64
 2427   test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
 2428 #else
 2429   load_klass(temp_reg, oop, noreg);
 2430   movl(temp_reg, Address(temp_reg, Klass::layout_helper_offset()));
 2431   test_non_flat_array_layout(temp_reg, is_non_flat_array);
 2432 #endif
 2433 }
 2434 
 2435 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label&is_null_free_array) {
 2436 #ifdef _LP64
 2437   test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
 2438 #else
 2439   Unimplemented();
 2440 #endif
 2441 }
 2442 
 2443 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
 2444 #ifdef _LP64
 2445   test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
 2446 #else
 2447   Unimplemented();
 2448 #endif
 2449 }
 2450 
 2451 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
 2452   testl(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
 2453   jcc(Assembler::notZero, is_flat_array);
 2454 }
 2455 
 2456 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
 2457   testl(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
 2458   jcc(Assembler::zero, is_non_flat_array);
 2459 }
 2460 
 2461 void MacroAssembler::os_breakpoint() {
 2462   // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
 2463   // (e.g., MSVC can't call ps() otherwise)
 2464   call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
 2465 }
 2466 
 2467 void MacroAssembler::unimplemented(const char* what) {
 2468   const char* buf = nullptr;
 2469   {
 2470     ResourceMark rm;
 2471     stringStream ss;
 2472     ss.print("unimplemented: %s", what);
 2473     buf = code_string(ss.as_string());
 2474   }
 2475   stop(buf);
 2476 }
 2477 
 2478 #define XSTATE_BV 0x200
 2479 
 2480 void MacroAssembler::pop_CPU_state() {

 3529 }
 3530 
 3531 // C++ bool manipulation
 3532 void MacroAssembler::testbool(Register dst) {
 3533   if(sizeof(bool) == 1)
 3534     testb(dst, 0xff);
 3535   else if(sizeof(bool) == 2) {
 3536     // testw implementation needed for two byte bools
 3537     ShouldNotReachHere();
 3538   } else if(sizeof(bool) == 4)
 3539     testl(dst, dst);
 3540   else
 3541     // unsupported
 3542     ShouldNotReachHere();
 3543 }
 3544 
 3545 void MacroAssembler::testptr(Register dst, Register src) {
 3546   testq(dst, src);
 3547 }
 3548 
 3549 // Object / value buffer allocation...
 3550 //
 3551 // Kills klass and rsi on LP64
 3552 void MacroAssembler::allocate_instance(Register klass, Register new_obj,
 3553                                        Register t1, Register t2,
 3554                                        bool clear_fields, Label& alloc_failed)
 3555 {
 3556   Label done, initialize_header, initialize_object, slow_case, slow_case_no_pop;
 3557   Register layout_size = t1;
 3558   assert(new_obj == rax, "needs to be rax");
 3559   assert_different_registers(klass, new_obj, t1, t2);
 3560 
 3561   // get instance_size in InstanceKlass (scaled to a count of bytes)
 3562   movl(layout_size, Address(klass, Klass::layout_helper_offset()));
 3563   // test to see if it is malformed in some way
 3564   testl(layout_size, Klass::_lh_instance_slow_path_bit);
 3565   jcc(Assembler::notZero, slow_case_no_pop);
 3566 
 3567   // Allocate the instance:
 3568   //  If TLAB is enabled:
 3569   //    Try to allocate in the TLAB.
 3570   //    If fails, go to the slow path.
 3571   //  Else If inline contiguous allocations are enabled:
 3572   //    Try to allocate in eden.
 3573   //    If fails due to heap end, go to slow path.
 3574   //
 3575   //  If TLAB is enabled OR inline contiguous is enabled:
 3576   //    Initialize the allocation.
 3577   //    Exit.
 3578   //
 3579   //  Go to slow path.
 3580 
 3581   push(klass);
 3582   if (UseTLAB) {
 3583     tlab_allocate(new_obj, layout_size, 0, klass, t2, slow_case);
 3584     if (ZeroTLAB || (!clear_fields)) {
 3585       // the fields have been already cleared
 3586       jmp(initialize_header);
 3587     } else {
 3588       // initialize both the header and fields
 3589       jmp(initialize_object);
 3590     }
 3591   } else {
 3592     jmp(slow_case);
 3593   }
 3594 
 3595   // If UseTLAB is true, the object is created above and there is an initialize need.
 3596   // Otherwise, skip and go to the slow path.
 3597   if (UseTLAB) {
 3598     if (clear_fields) {
 3599       // The object is initialized before the header.  If the object size is
 3600       // zero, go directly to the header initialization.
 3601       bind(initialize_object);
 3602       if (UseCompactObjectHeaders) {
 3603         assert(is_aligned(oopDesc::base_offset_in_bytes(), BytesPerLong), "oop base offset must be 8-byte-aligned");
 3604         decrement(layout_size, oopDesc::base_offset_in_bytes());
 3605       } else {
 3606         decrement(layout_size, sizeof(oopDesc));
 3607       }
 3608       jcc(Assembler::zero, initialize_header);
 3609 
 3610       // Initialize topmost object field, divide size by 8, check if odd and
 3611       // test if zero.
 3612       Register zero = klass;
 3613       xorl(zero, zero);    // use zero reg to clear memory (shorter code)
 3614       shrl(layout_size, LogBytesPerLong); // divide by 2*oopSize and set carry flag if odd
 3615 
 3616   #ifdef ASSERT
 3617       // make sure instance_size was multiple of 8
 3618       Label L;
 3619       // Ignore partial flag stall after shrl() since it is debug VM
 3620       jcc(Assembler::carryClear, L);
 3621       stop("object size is not multiple of 2 - adjust this code");
 3622       bind(L);
 3623       // must be > 0, no extra check needed here
 3624   #endif
 3625 
 3626       // initialize remaining object fields: instance_size was a multiple of 8
 3627       {
 3628         Label loop;
 3629         bind(loop);
 3630         int header_size_bytes = oopDesc::header_size() * HeapWordSize;
 3631         assert(is_aligned(header_size_bytes, BytesPerLong), "oop header size must be 8-byte-aligned");
 3632         movptr(Address(new_obj, layout_size, Address::times_8, header_size_bytes - 1*oopSize), zero);
 3633         decrement(layout_size);
 3634         jcc(Assembler::notZero, loop);
 3635       }
 3636     } // clear_fields
 3637 
 3638     // initialize object header only.
 3639     bind(initialize_header);
 3640     if (UseCompactObjectHeaders || EnableValhalla) {
 3641       pop(klass);
 3642       Register mark_word = t2;
 3643       movptr(mark_word, Address(klass, Klass::prototype_header_offset()));
 3644       movptr(Address(new_obj, oopDesc::mark_offset_in_bytes ()), mark_word);
 3645     } else {
 3646      movptr(Address(new_obj, oopDesc::mark_offset_in_bytes()),
 3647             (intptr_t)markWord::prototype().value()); // header
 3648      pop(klass);   // get saved klass back in the register.
 3649     }
 3650     if (!UseCompactObjectHeaders) {
 3651       xorl(rsi, rsi);                 // use zero reg to clear memory (shorter code)
 3652       store_klass_gap(new_obj, rsi);  // zero klass gap for compressed oops
 3653       movptr(t2, klass);         // preserve klass
 3654       store_klass(new_obj, t2, rscratch1);  // src klass reg is potentially compressed
 3655     }
 3656     jmp(done);
 3657   }
 3658 
 3659   bind(slow_case);
 3660   pop(klass);
 3661   bind(slow_case_no_pop);
 3662   jmp(alloc_failed);
 3663 
 3664   bind(done);
 3665 }
 3666 
 3667 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
 3668 void MacroAssembler::tlab_allocate(Register obj,
 3669                                    Register var_size_in_bytes,
 3670                                    int con_size_in_bytes,
 3671                                    Register t1,
 3672                                    Register t2,
 3673                                    Label& slow_case) {
 3674   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 3675   bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
 3676 }
 3677 
 3678 RegSet MacroAssembler::call_clobbered_gp_registers() {
 3679   RegSet regs;
 3680   regs += RegSet::of(rax, rcx, rdx);
 3681 #ifndef _WINDOWS
 3682   regs += RegSet::of(rsi, rdi);
 3683 #endif
 3684   regs += RegSet::range(r8, r11);
 3685   if (UseAPX) {
 3686     regs += RegSet::range(r16, as_Register(Register::number_of_registers - 1));

 3850   xorptr(temp, temp);    // use _zero reg to clear memory (shorter code)
 3851   if (UseIncDec) {
 3852     shrptr(index, 3);  // divide by 8/16 and set carry flag if bit 2 was set
 3853   } else {
 3854     shrptr(index, 2);  // use 2 instructions to avoid partial flag stall
 3855     shrptr(index, 1);
 3856   }
 3857 
 3858   // initialize remaining object fields: index is a multiple of 2 now
 3859   {
 3860     Label loop;
 3861     bind(loop);
 3862     movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
 3863     decrement(index);
 3864     jcc(Assembler::notZero, loop);
 3865   }
 3866 
 3867   bind(done);
 3868 }
 3869 
 3870 void MacroAssembler::get_inline_type_field_klass(Register holder_klass, Register index, Register inline_klass) {
 3871   inline_layout_info(holder_klass, index, inline_klass);
 3872   movptr(inline_klass, Address(inline_klass, InlineLayoutInfo::klass_offset()));
 3873 }
 3874 
 3875 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
 3876   movptr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
 3877 #ifdef ASSERT
 3878   {
 3879     Label done;
 3880     cmpptr(layout_info, 0);
 3881     jcc(Assembler::notEqual, done);
 3882     stop("inline_layout_info_array is null");
 3883     bind(done);
 3884   }
 3885 #endif
 3886 
 3887   InlineLayoutInfo array[2];
 3888   int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
 3889   if (is_power_of_2(size)) {
 3890     shll(index, log2i_exact(size)); // Scale index by power of 2
 3891   } else {
 3892     imull(index, index, size); // Scale the index to be the entry index * array_element_size
 3893   }
 3894   lea(layout_info, Address(layout_info, index, Address::times_1, Array<InlineLayoutInfo>::base_offset_in_bytes()));
 3895 }
 3896 
 3897 // Look up the method for a megamorphic invokeinterface call.
 3898 // The target method is determined by <intf_klass, itable_index>.
 3899 // The receiver klass is in recv_klass.
 3900 // On success, the result will be in method_result, and execution falls through.
 3901 // On failure, execution transfers to the given label.
 3902 void MacroAssembler::lookup_interface_method(Register recv_klass,
 3903                                              Register intf_klass,
 3904                                              RegisterOrConstant itable_index,
 3905                                              Register method_result,
 3906                                              Register scan_temp,
 3907                                              Label& L_no_such_interface,
 3908                                              bool return_method) {
 3909   assert_different_registers(recv_klass, intf_klass, scan_temp);
 3910   assert_different_registers(method_result, intf_klass, scan_temp);
 3911   assert(recv_klass != method_result || !return_method,
 3912          "recv_klass can be destroyed when method isn't needed");
 3913 
 3914   assert(itable_index.is_constant() || itable_index.as_register() == method_result,
 3915          "caller must use same register for non-constant itable index as for method");
 3916 

 4927   } else {
 4928     Label L;
 4929     jccb(negate_condition(cc), L);
 4930     movl(dst, src);
 4931     bind(L);
 4932   }
 4933 }
 4934 
 4935 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
 4936   if (VM_Version::supports_cmov()) {
 4937     cmovl(cc, dst, src);
 4938   } else {
 4939     Label L;
 4940     jccb(negate_condition(cc), L);
 4941     movl(dst, src);
 4942     bind(L);
 4943   }
 4944 }
 4945 
 4946 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
 4947   if (!VerifyOops || VerifyAdapterSharing) {
 4948     // Below address of the code string confuses VerifyAdapterSharing
 4949     // because it may differ between otherwise equivalent adapters.
 4950     return;
 4951   }
 4952 
 4953   BLOCK_COMMENT("verify_oop {");
 4954   push(rscratch1);
 4955   push(rax);                          // save rax
 4956   push(reg);                          // pass register argument
 4957 
 4958   // Pass register number to verify_oop_subroutine
 4959   const char* b = nullptr;
 4960   {
 4961     ResourceMark rm;
 4962     stringStream ss;
 4963     ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
 4964     b = code_string(ss.as_string());
 4965   }
 4966   AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
 4967   pushptr(buffer.addr(), rscratch1);
 4968 
 4969   // call indirectly to solve generation ordering problem
 4970   movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
 4971   call(rax);

 4990   // cf. TemplateTable::prepare_invoke(), if (load_receiver).
 4991   int stackElementSize = Interpreter::stackElementSize;
 4992   int offset = Interpreter::expr_offset_in_bytes(extra_slot_offset+0);
 4993 #ifdef ASSERT
 4994   int offset1 = Interpreter::expr_offset_in_bytes(extra_slot_offset+1);
 4995   assert(offset1 - offset == stackElementSize, "correct arithmetic");
 4996 #endif
 4997   Register             scale_reg    = noreg;
 4998   Address::ScaleFactor scale_factor = Address::no_scale;
 4999   if (arg_slot.is_constant()) {
 5000     offset += arg_slot.as_constant() * stackElementSize;
 5001   } else {
 5002     scale_reg    = arg_slot.as_register();
 5003     scale_factor = Address::times(stackElementSize);
 5004   }
 5005   offset += wordSize;           // return PC is on stack
 5006   return Address(rsp, scale_reg, scale_factor, offset);
 5007 }
 5008 
 5009 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
 5010   if (!VerifyOops || VerifyAdapterSharing) {
 5011     // Below address of the code string confuses VerifyAdapterSharing
 5012     // because it may differ between otherwise equivalent adapters.
 5013     return;
 5014   }
 5015 
 5016   push(rscratch1);
 5017   push(rax); // save rax,
 5018   // addr may contain rsp so we will have to adjust it based on the push
 5019   // we just did (and on 64 bit we do two pushes)
 5020   // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
 5021   // stores rax into addr which is backwards of what was intended.
 5022   if (addr.uses(rsp)) {
 5023     lea(rax, addr);
 5024     pushptr(Address(rax, 2 * BytesPerWord));
 5025   } else {
 5026     pushptr(addr);
 5027   }
 5028 
 5029   // Pass register number to verify_oop_subroutine
 5030   const char* b = nullptr;
 5031   {
 5032     ResourceMark rm;
 5033     stringStream ss;
 5034     ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);

 5388 
 5389 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
 5390   // get mirror
 5391   const int mirror_offset = in_bytes(Klass::java_mirror_offset());
 5392   load_method_holder(mirror, method);
 5393   movptr(mirror, Address(mirror, mirror_offset));
 5394   resolve_oop_handle(mirror, tmp);
 5395 }
 5396 
 5397 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
 5398   load_method_holder(rresult, rmethod);
 5399   movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
 5400 }
 5401 
 5402 void MacroAssembler::load_method_holder(Register holder, Register method) {
 5403   movptr(holder, Address(method, Method::const_offset()));                      // ConstMethod*
 5404   movptr(holder, Address(holder, ConstMethod::constants_offset()));             // ConstantPool*
 5405   movptr(holder, Address(holder, ConstantPool::pool_holder_offset()));          // InstanceKlass*
 5406 }
 5407 
 5408 void MacroAssembler::load_metadata(Register dst, Register src) {
 5409   if (UseCompactObjectHeaders) {
 5410     load_narrow_klass_compact(dst, src);
 5411   } else if (UseCompressedClassPointers) {
 5412     movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 5413   } else {
 5414     movptr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 5415   }
 5416 }
 5417 
 5418 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
 5419   assert(UseCompactObjectHeaders, "expect compact object headers");
 5420   movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
 5421   shrq(dst, markWord::klass_shift);
 5422 }
 5423 
 5424 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
 5425   assert_different_registers(src, tmp);
 5426   assert_different_registers(dst, tmp);
 5427 
 5428   if (UseCompactObjectHeaders) {
 5429     load_narrow_klass_compact(dst, src);
 5430     decode_klass_not_null(dst, tmp);
 5431   } else if (UseCompressedClassPointers) {
 5432     movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 5433     decode_klass_not_null(dst, tmp);
 5434   } else {
 5435     movptr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 5436   }
 5437 }
 5438 
 5439 void MacroAssembler::load_prototype_header(Register dst, Register src, Register tmp) {
 5440   load_klass(dst, src, tmp);
 5441   movptr(dst, Address(dst, Klass::prototype_header_offset()));
 5442 }
 5443 
 5444 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
 5445   assert(!UseCompactObjectHeaders, "not with compact headers");
 5446   assert_different_registers(src, tmp);
 5447   assert_different_registers(dst, tmp);
 5448   if (UseCompressedClassPointers) {
 5449     encode_klass_not_null(src, tmp);
 5450     movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
 5451   } else {
 5452     movptr(Address(dst, oopDesc::klass_offset_in_bytes()), src);
 5453   }
 5454 }
 5455 
 5456 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
 5457   if (UseCompactObjectHeaders) {
 5458     assert(tmp != noreg, "need tmp");
 5459     assert_different_registers(klass, obj, tmp);
 5460     load_narrow_klass_compact(tmp, obj);
 5461     cmpl(klass, tmp);
 5462   } else if (UseCompressedClassPointers) {
 5463     cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));

 5489   bool as_raw = (decorators & AS_RAW) != 0;
 5490   if (as_raw) {
 5491     bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
 5492   } else {
 5493     bs->load_at(this, decorators, type, dst, src, tmp1);
 5494   }
 5495 }
 5496 
 5497 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
 5498                                      Register tmp1, Register tmp2, Register tmp3) {
 5499   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 5500   decorators = AccessInternal::decorator_fixup(decorators, type);
 5501   bool as_raw = (decorators & AS_RAW) != 0;
 5502   if (as_raw) {
 5503     bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
 5504   } else {
 5505     bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
 5506   }
 5507 }
 5508 
 5509 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
 5510                                      Register inline_layout_info) {
 5511   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 5512   bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
 5513 }
 5514 
 5515 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
 5516   movptr(offset, Address(inline_klass, InstanceKlass::adr_inlineklass_fixed_block_offset()));
 5517   movl(offset, Address(offset, InlineKlass::payload_offset_offset()));
 5518 }
 5519 
 5520 void MacroAssembler::payload_addr(Register oop, Register data, Register inline_klass) {
 5521   // ((address) (void*) o) + vk->payload_offset();
 5522   Register offset = (data == oop) ? rscratch1 : data;
 5523   payload_offset(inline_klass, offset);
 5524   if (data == oop) {
 5525     addptr(data, offset);
 5526   } else {
 5527     lea(data, Address(oop, offset));
 5528   }
 5529 }
 5530 
 5531 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
 5532                                                 Register index, Register data) {
 5533   assert(index != rcx, "index needs to shift by rcx");
 5534   assert_different_registers(array, array_klass, index);
 5535   assert_different_registers(rcx, array, index);
 5536 
 5537   // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
 5538   movl(rcx, Address(array_klass, Klass::layout_helper_offset()));
 5539 
 5540   // Klass::layout_helper_log2_element_size(lh)
 5541   // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
 5542   shrl(rcx, Klass::_lh_log2_element_size_shift);
 5543   andl(rcx, Klass::_lh_log2_element_size_mask);
 5544   shlptr(index); // index << rcx
 5545 
 5546   lea(data, Address(array, index, Address::times_1, arrayOopDesc::base_offset_in_bytes(T_FLAT_ELEMENT)));
 5547 }
 5548 
 5549 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
 5550   access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
 5551 }
 5552 
 5553 // Doesn't do verification, generates fixed size code
 5554 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
 5555   access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
 5556 }
 5557 
 5558 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
 5559                                     Register tmp2, Register tmp3, DecoratorSet decorators) {
 5560   access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
 5561 }
 5562 
 5563 // Used for storing nulls.
 5564 void MacroAssembler::store_heap_oop_null(Address dst) {
 5565   access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
 5566 }
 5567 
 5568 void MacroAssembler::store_klass_gap(Register dst, Register src) {

 5888   Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
 5889 }
 5890 
 5891 void MacroAssembler::reinit_heapbase() {
 5892   if (UseCompressedOops) {
 5893     if (Universe::heap() != nullptr) {
 5894       if (CompressedOops::base() == nullptr) {
 5895         MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
 5896       } else {
 5897         mov64(r12_heapbase, (int64_t)CompressedOops::base());
 5898       }
 5899     } else {
 5900       movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
 5901     }
 5902   }
 5903 }
 5904 
 5905 #if COMPILER2_OR_JVMCI
 5906 
 5907 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
 5908 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp, KRegister mask) {
 5909   // cnt - number of qwords (8-byte words).
 5910   // base - start address, qword aligned.
 5911   Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
 5912   bool use64byteVector = (MaxVectorSize == 64) && (VM_Version::avx3_threshold() == 0);
 5913   if (use64byteVector) {
 5914     evpbroadcastq(xtmp, val, AVX_512bit);
 5915   } else if (MaxVectorSize >= 32) {
 5916     movdq(xtmp, val);
 5917     punpcklqdq(xtmp, xtmp);
 5918     vinserti128_high(xtmp, xtmp);
 5919   } else {
 5920     movdq(xtmp, val);
 5921     punpcklqdq(xtmp, xtmp);
 5922   }
 5923   jmp(L_zero_64_bytes);
 5924 
 5925   BIND(L_loop);
 5926   if (MaxVectorSize >= 32) {
 5927     fill64(base, 0, xtmp, use64byteVector);
 5928   } else {
 5929     movdqu(Address(base,  0), xtmp);
 5930     movdqu(Address(base, 16), xtmp);
 5931     movdqu(Address(base, 32), xtmp);
 5932     movdqu(Address(base, 48), xtmp);
 5933   }
 5934   addptr(base, 64);
 5935 
 5936   BIND(L_zero_64_bytes);
 5937   subptr(cnt, 8);
 5938   jccb(Assembler::greaterEqual, L_loop);
 5939 
 5940   // Copy trailing 64 bytes
 5941   if (use64byteVector) {
 5942     addptr(cnt, 8);
 5943     jccb(Assembler::equal, L_end);
 5944     fill64_masked(3, base, 0, xtmp, mask, cnt, val, true);
 5945     jmp(L_end);
 5946   } else {
 5947     addptr(cnt, 4);
 5948     jccb(Assembler::less, L_tail);
 5949     if (MaxVectorSize >= 32) {
 5950       vmovdqu(Address(base, 0), xtmp);
 5951     } else {
 5952       movdqu(Address(base,  0), xtmp);
 5953       movdqu(Address(base, 16), xtmp);
 5954     }
 5955   }
 5956   addptr(base, 32);
 5957   subptr(cnt, 4);
 5958 
 5959   BIND(L_tail);
 5960   addptr(cnt, 4);
 5961   jccb(Assembler::lessEqual, L_end);
 5962   if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
 5963     fill32_masked(3, base, 0, xtmp, mask, cnt, val);
 5964   } else {
 5965     decrement(cnt);
 5966 
 5967     BIND(L_sloop);
 5968     movq(Address(base, 0), xtmp);
 5969     addptr(base, 8);
 5970     decrement(cnt);
 5971     jccb(Assembler::greaterEqual, L_sloop);
 5972   }
 5973   BIND(L_end);
 5974 }
 5975 
 5976 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
 5977   assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
 5978   // An inline type might be returned. If fields are in registers we
 5979   // need to allocate an inline type instance and initialize it with
 5980   // the value of the fields.
 5981   Label skip;
 5982   // We only need a new buffered inline type if a new one is not returned
 5983   testptr(rax, 1);
 5984   jcc(Assembler::zero, skip);
 5985   int call_offset = -1;
 5986 
 5987 #ifdef _LP64
 5988   // The following code is similar to allocate_instance but has some slight differences,
 5989   // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
 5990   // allocating is not necessary if vk != nullptr, etc. allocate_instance is not aware of these.
 5991   Label slow_case;
 5992   // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
 5993   mov(rscratch1, rax); // save rax for slow_case since *_allocate may corrupt it when allocation failed
 5994   if (vk != nullptr) {
 5995     // Called from C1, where the return type is statically known.
 5996     movptr(rbx, (intptr_t)vk->get_InlineKlass());
 5997     jint lh = vk->layout_helper();
 5998     assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
 5999     if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
 6000       tlab_allocate(rax, noreg, lh, r13, r14, slow_case);
 6001     } else {
 6002       jmp(slow_case);
 6003     }
 6004   } else {
 6005     // Call from interpreter. RAX contains ((the InlineKlass* of the return type) | 0x01)
 6006     mov(rbx, rax);
 6007     andptr(rbx, -2);
 6008     if (UseTLAB) {
 6009       movl(r14, Address(rbx, Klass::layout_helper_offset()));
 6010       testl(r14, Klass::_lh_instance_slow_path_bit);
 6011       jcc(Assembler::notZero, slow_case);
 6012       tlab_allocate(rax, r14, 0, r13, r14, slow_case);
 6013     } else {
 6014       jmp(slow_case);
 6015     }
 6016   }
 6017   if (UseTLAB) {
 6018     // 2. Initialize buffered inline instance header
 6019     Register buffer_obj = rax;
 6020     if (UseCompactObjectHeaders) {
 6021       Register mark_word = r13;
 6022       movptr(mark_word, Address(rbx, Klass::prototype_header_offset()));
 6023       movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes ()), mark_word);
 6024     } else {
 6025       movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes()), (intptr_t)markWord::inline_type_prototype().value());
 6026       xorl(r13, r13);
 6027       store_klass_gap(buffer_obj, r13);
 6028       if (vk == nullptr) {
 6029         // store_klass corrupts rbx(klass), so save it in r13 for later use (interpreter case only).
 6030         mov(r13, rbx);
 6031       }
 6032       store_klass(buffer_obj, rbx, rscratch1);
 6033     }
 6034     // 3. Initialize its fields with an inline class specific handler
 6035     if (vk != nullptr) {
 6036       call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
 6037     } else {
 6038       movptr(rbx, Address(r13, InstanceKlass::adr_inlineklass_fixed_block_offset()));
 6039       movptr(rbx, Address(rbx, InlineKlass::pack_handler_offset()));
 6040       call(rbx);
 6041     }
 6042     jmp(skip);
 6043   }
 6044   bind(slow_case);
 6045   // We failed to allocate a new inline type, fall back to a runtime
 6046   // call. Some oop field may be live in some registers but we can't
 6047   // tell. That runtime call will take care of preserving them
 6048   // across a GC if there's one.
 6049   mov(rax, rscratch1);
 6050 #endif
 6051 
 6052   if (from_interpreter) {
 6053     super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
 6054   } else {
 6055     call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
 6056     call_offset = offset();
 6057   }
 6058 
 6059   bind(skip);
 6060   return call_offset;
 6061 }
 6062 
 6063 // Move a value between registers/stack slots and update the reg_state
 6064 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
 6065   assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
 6066   if (reg_state[to->value()] == reg_written) {
 6067     return true; // Already written
 6068   }
 6069   if (from != to && bt != T_VOID) {
 6070     if (reg_state[to->value()] == reg_readonly) {
 6071       return false; // Not yet writable
 6072     }
 6073     if (from->is_reg()) {
 6074       if (to->is_reg()) {
 6075         if (from->is_XMMRegister()) {
 6076           if (bt == T_DOUBLE) {
 6077             movdbl(to->as_XMMRegister(), from->as_XMMRegister());
 6078           } else {
 6079             assert(bt == T_FLOAT, "must be float");
 6080             movflt(to->as_XMMRegister(), from->as_XMMRegister());
 6081           }
 6082         } else {
 6083           movq(to->as_Register(), from->as_Register());
 6084         }
 6085       } else {
 6086         int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6087         Address to_addr = Address(rsp, st_off);
 6088         if (from->is_XMMRegister()) {
 6089           if (bt == T_DOUBLE) {
 6090             movdbl(to_addr, from->as_XMMRegister());
 6091           } else {
 6092             assert(bt == T_FLOAT, "must be float");
 6093             movflt(to_addr, from->as_XMMRegister());
 6094           }
 6095         } else {
 6096           movq(to_addr, from->as_Register());
 6097         }
 6098       }
 6099     } else {
 6100       Address from_addr = Address(rsp, from->reg2stack() * VMRegImpl::stack_slot_size + wordSize);
 6101       if (to->is_reg()) {
 6102         if (to->is_XMMRegister()) {
 6103           if (bt == T_DOUBLE) {
 6104             movdbl(to->as_XMMRegister(), from_addr);
 6105           } else {
 6106             assert(bt == T_FLOAT, "must be float");
 6107             movflt(to->as_XMMRegister(), from_addr);
 6108           }
 6109         } else {
 6110           movq(to->as_Register(), from_addr);
 6111         }
 6112       } else {
 6113         int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6114         movq(r13, from_addr);
 6115         movq(Address(rsp, st_off), r13);
 6116       }
 6117     }
 6118   }
 6119   // Update register states
 6120   reg_state[from->value()] = reg_writable;
 6121   reg_state[to->value()] = reg_written;
 6122   return true;
 6123 }
 6124 
 6125 // Calculate the extra stack space required for packing or unpacking inline
 6126 // args and adjust the stack pointer
 6127 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
 6128   // Two additional slots to account for return address
 6129   int sp_inc = (args_on_stack + 2) * VMRegImpl::stack_slot_size;
 6130   sp_inc = align_up(sp_inc, StackAlignmentInBytes);
 6131   // Save the return address, adjust the stack (make sure it is properly
 6132   // 16-byte aligned) and copy the return address to the new top of the stack.
 6133   // The stack will be repaired on return (see MacroAssembler::remove_frame).
 6134   assert(sp_inc > 0, "sanity");
 6135   pop(r13);
 6136   subptr(rsp, sp_inc);
 6137   push(r13);
 6138   return sp_inc;
 6139 }
 6140 
 6141 // Read all fields from an inline type buffer and store the field values in registers/stack slots.
 6142 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
 6143                                           VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
 6144                                           RegState reg_state[]) {
 6145   assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
 6146   assert(from->is_valid(), "source must be valid");
 6147   bool progress = false;
 6148 #ifdef ASSERT
 6149   const int start_offset = offset();
 6150 #endif
 6151 
 6152   Label L_null, L_notNull;
 6153   // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
 6154   Register tmp1 = r10;
 6155   Register tmp2 = r13;
 6156   Register fromReg = noreg;
 6157   ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, -1);
 6158   bool done = true;
 6159   bool mark_done = true;
 6160   VMReg toReg;
 6161   BasicType bt;
 6162   // Check if argument requires a null check
 6163   bool null_check = false;
 6164   VMReg nullCheckReg;
 6165   while (stream.next(nullCheckReg, bt)) {
 6166     if (sig->at(stream.sig_index())._offset == -1) {
 6167       null_check = true;
 6168       break;
 6169     }
 6170   }
 6171   stream.reset(sig_index, to_index);
 6172   while (stream.next(toReg, bt)) {
 6173     assert(toReg->is_valid(), "destination must be valid");
 6174     int idx = (int)toReg->value();
 6175     if (reg_state[idx] == reg_readonly) {
 6176       if (idx != from->value()) {
 6177         mark_done = false;
 6178       }
 6179       done = false;
 6180       continue;
 6181     } else if (reg_state[idx] == reg_written) {
 6182       continue;
 6183     }
 6184     assert(reg_state[idx] == reg_writable, "must be writable");
 6185     reg_state[idx] = reg_written;
 6186     progress = true;
 6187 
 6188     if (fromReg == noreg) {
 6189       if (from->is_reg()) {
 6190         fromReg = from->as_Register();
 6191       } else {
 6192         int st_off = from->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6193         movq(tmp1, Address(rsp, st_off));
 6194         fromReg = tmp1;
 6195       }
 6196       if (null_check) {
 6197         // Nullable inline type argument, emit null check
 6198         testptr(fromReg, fromReg);
 6199         jcc(Assembler::zero, L_null);
 6200       }
 6201     }
 6202     int off = sig->at(stream.sig_index())._offset;
 6203     if (off == -1) {
 6204       assert(null_check, "Missing null check at");
 6205       if (toReg->is_stack()) {
 6206         int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6207         movq(Address(rsp, st_off), 1);
 6208       } else {
 6209         movq(toReg->as_Register(), 1);
 6210       }
 6211       continue;
 6212     }
 6213     assert(off > 0, "offset in object should be positive");
 6214     Address fromAddr = Address(fromReg, off);
 6215     if (!toReg->is_XMMRegister()) {
 6216       Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
 6217       if (is_reference_type(bt)) {
 6218         load_heap_oop(dst, fromAddr);
 6219       } else {
 6220         bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
 6221         load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
 6222       }
 6223       if (toReg->is_stack()) {
 6224         int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6225         movq(Address(rsp, st_off), dst);
 6226       }
 6227     } else if (bt == T_DOUBLE) {
 6228       movdbl(toReg->as_XMMRegister(), fromAddr);
 6229     } else {
 6230       assert(bt == T_FLOAT, "must be float");
 6231       movflt(toReg->as_XMMRegister(), fromAddr);
 6232     }
 6233   }
 6234   if (progress && null_check) {
 6235     if (done) {
 6236       jmp(L_notNull);
 6237       bind(L_null);
 6238       // Set null marker to zero to signal that the argument is null.
 6239       // Also set all oop fields to zero to make the GC happy.
 6240       stream.reset(sig_index, to_index);
 6241       while (stream.next(toReg, bt)) {
 6242         if (sig->at(stream.sig_index())._offset == -1 ||
 6243             bt == T_OBJECT || bt == T_ARRAY) {
 6244           if (toReg->is_stack()) {
 6245             int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6246             movq(Address(rsp, st_off), 0);
 6247           } else {
 6248             xorq(toReg->as_Register(), toReg->as_Register());
 6249           }
 6250         }
 6251       }
 6252       bind(L_notNull);
 6253     } else {
 6254       bind(L_null);
 6255     }
 6256   }
 6257 
 6258   sig_index = stream.sig_index();
 6259   to_index = stream.regs_index();
 6260 
 6261   if (mark_done && reg_state[from->value()] != reg_written) {
 6262     // This is okay because no one else will write to that slot
 6263     reg_state[from->value()] = reg_writable;
 6264   }
 6265   from_index--;
 6266   assert(progress || (start_offset == offset()), "should not emit code");
 6267   return done;
 6268 }
 6269 
 6270 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
 6271                                         VMRegPair* from, int from_count, int& from_index, VMReg to,
 6272                                         RegState reg_state[], Register val_array) {
 6273   assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
 6274   assert(to->is_valid(), "destination must be valid");
 6275 
 6276   if (reg_state[to->value()] == reg_written) {
 6277     skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
 6278     return true; // Already written
 6279   }
 6280 
 6281   // TODO 8284443 Isn't it an issue if below code uses r14 as tmp when it contains a spilled value?
 6282   // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
 6283   Register val_obj_tmp = r11;
 6284   Register from_reg_tmp = r14;
 6285   Register tmp1 = r10;
 6286   Register tmp2 = r13;
 6287   Register tmp3 = rbx;
 6288   Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
 6289 
 6290   assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
 6291 
 6292   if (reg_state[to->value()] == reg_readonly) {
 6293     if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
 6294       skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
 6295       return false; // Not yet writable
 6296     }
 6297     val_obj = val_obj_tmp;
 6298   }
 6299 
 6300   int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
 6301   load_heap_oop(val_obj, Address(val_array, index));
 6302 
 6303   ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
 6304   VMReg fromReg;
 6305   BasicType bt;
 6306   Label L_null;
 6307   while (stream.next(fromReg, bt)) {
 6308     assert(fromReg->is_valid(), "source must be valid");
 6309     reg_state[fromReg->value()] = reg_writable;
 6310 
 6311     int off = sig->at(stream.sig_index())._offset;
 6312     if (off == -1) {
 6313       // Nullable inline type argument, emit null check
 6314       Label L_notNull;
 6315       if (fromReg->is_stack()) {
 6316         int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6317         testb(Address(rsp, ld_off), 1);
 6318       } else {
 6319         testb(fromReg->as_Register(), 1);
 6320       }
 6321       jcc(Assembler::notZero, L_notNull);
 6322       movptr(val_obj, 0);
 6323       jmp(L_null);
 6324       bind(L_notNull);
 6325       continue;
 6326     }
 6327 
 6328     assert(off > 0, "offset in object should be positive");
 6329     size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
 6330 
 6331     // Pack the scalarized field into the value object.
 6332     Address dst(val_obj, off);
 6333     if (!fromReg->is_XMMRegister()) {
 6334       Register src;
 6335       if (fromReg->is_stack()) {
 6336         src = from_reg_tmp;
 6337         int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6338         load_sized_value(src, Address(rsp, ld_off), size_in_bytes, /* is_signed */ false);
 6339       } else {
 6340         src = fromReg->as_Register();
 6341       }
 6342       assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
 6343       if (is_reference_type(bt)) {
 6344         store_heap_oop(dst, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
 6345       } else {
 6346         store_sized_value(dst, src, size_in_bytes);
 6347       }
 6348     } else if (bt == T_DOUBLE) {
 6349       movdbl(dst, fromReg->as_XMMRegister());
 6350     } else {
 6351       assert(bt == T_FLOAT, "must be float");
 6352       movflt(dst, fromReg->as_XMMRegister());
 6353     }
 6354   }
 6355   bind(L_null);
 6356   sig_index = stream.sig_index();
 6357   from_index = stream.regs_index();
 6358 
 6359   assert(reg_state[to->value()] == reg_writable, "must have already been read");
 6360   bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
 6361   assert(success, "to register must be writeable");
 6362   return true;
 6363 }
 6364 
 6365 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
 6366   return reg->is_XMMRegister() ? xmm8->as_VMReg() : r14->as_VMReg();
 6367 }
 6368 
 6369 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
 6370   assert((initial_framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
 6371   if (needs_stack_repair) {
 6372     // TODO 8284443 Add a comment drawing the frame like in Aarch64's version of MacroAssembler::remove_frame
 6373     movq(rbp, Address(rsp, initial_framesize));
 6374     // The stack increment resides just below the saved rbp
 6375     addq(rsp, Address(rsp, initial_framesize - wordSize));
 6376   } else {
 6377     if (initial_framesize > 0) {
 6378       addq(rsp, initial_framesize);
 6379     }
 6380     pop(rbp);
 6381   }
 6382 }
 6383 
 6384 // Clearing constant sized memory using YMM/ZMM registers.
 6385 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
 6386   assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
 6387   bool use64byteVector = (MaxVectorSize > 32) && (VM_Version::avx3_threshold() == 0);
 6388 
 6389   int vector64_count = (cnt & (~0x7)) >> 3;
 6390   cnt = cnt & 0x7;
 6391   const int fill64_per_loop = 4;
 6392   const int max_unrolled_fill64 = 8;
 6393 
 6394   // 64 byte initialization loop.
 6395   vpxor(xtmp, xtmp, xtmp, use64byteVector ? AVX_512bit : AVX_256bit);
 6396   int start64 = 0;
 6397   if (vector64_count > max_unrolled_fill64) {
 6398     Label LOOP;
 6399     Register index = rtmp;
 6400 
 6401     start64 = vector64_count - (vector64_count % fill64_per_loop);
 6402 
 6403     movl(index, 0);

 6453         break;
 6454       case 7:
 6455         if (use64byteVector) {
 6456           movl(rtmp, 0x7F);
 6457           kmovwl(mask, rtmp);
 6458           evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
 6459         } else {
 6460           evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
 6461           movl(rtmp, 0x7);
 6462           kmovwl(mask, rtmp);
 6463           evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
 6464         }
 6465         break;
 6466       default:
 6467         fatal("Unexpected length : %d\n",cnt);
 6468         break;
 6469     }
 6470   }
 6471 }
 6472 
 6473 void MacroAssembler::clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp,
 6474                                bool is_large, bool word_copy_only, KRegister mask) {
 6475   // cnt      - number of qwords (8-byte words).
 6476   // base     - start address, qword aligned.
 6477   // is_large - if optimizers know cnt is larger than InitArrayShortSize
 6478   assert(base==rdi, "base register must be edi for rep stos");
 6479   assert(val==rax,   "val register must be eax for rep stos");
 6480   assert(cnt==rcx,   "cnt register must be ecx for rep stos");
 6481   assert(InitArrayShortSize % BytesPerLong == 0,
 6482     "InitArrayShortSize should be the multiple of BytesPerLong");
 6483 
 6484   Label DONE;



 6485 
 6486   if (!is_large) {
 6487     Label LOOP, LONG;
 6488     cmpptr(cnt, InitArrayShortSize/BytesPerLong);
 6489     jccb(Assembler::greater, LONG);
 6490 
 6491     decrement(cnt);
 6492     jccb(Assembler::negative, DONE); // Zero length
 6493 
 6494     // Use individual pointer-sized stores for small counts:
 6495     BIND(LOOP);
 6496     movptr(Address(base, cnt, Address::times_ptr), val);
 6497     decrement(cnt);
 6498     jccb(Assembler::greaterEqual, LOOP);
 6499     jmpb(DONE);
 6500 
 6501     BIND(LONG);
 6502   }
 6503 
 6504   // Use longer rep-prefixed ops for non-small counts:
 6505   if (UseFastStosb && !word_copy_only) {
 6506     shlptr(cnt, 3); // convert to number of bytes
 6507     rep_stosb();
 6508   } else if (UseXMMForObjInit) {
 6509     xmm_clear_mem(base, cnt, val, xtmp, mask);
 6510   } else {
 6511     rep_stos();
 6512   }
 6513 
 6514   BIND(DONE);
 6515 }
 6516 
 6517 #endif //COMPILER2_OR_JVMCI
 6518 
 6519 
 6520 void MacroAssembler::generate_fill(BasicType t, bool aligned,
 6521                                    Register to, Register value, Register count,
 6522                                    Register rtmp, XMMRegister xtmp) {
 6523   ShortBranchVerifier sbv(this);
 6524   assert_different_registers(to, value, count, rtmp);
 6525   Label L_exit;
 6526   Label L_fill_2_bytes, L_fill_4_bytes;
 6527 
 6528 #if defined(COMPILER2)
 6529   if(MaxVectorSize >=32 &&

10362 
10363   // Load top.
10364   movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10365 
10366   // Check if the lock-stack is full.
10367   cmpl(top, LockStack::end_offset());
10368   jcc(Assembler::greaterEqual, slow);
10369 
10370   // Check for recursion.
10371   cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
10372   jcc(Assembler::equal, push);
10373 
10374   // Check header for monitor (0b10).
10375   testptr(reg_rax, markWord::monitor_value);
10376   jcc(Assembler::notZero, slow);
10377 
10378   // Try to lock. Transition lock bits 0b01 => 0b00
10379   movptr(tmp, reg_rax);
10380   andptr(tmp, ~(int32_t)markWord::unlocked_value);
10381   orptr(reg_rax, markWord::unlocked_value);
10382   if (EnableValhalla) {
10383     // Mask inline_type bit such that we go to the slow path if object is an inline type
10384     andptr(reg_rax, ~((int) markWord::inline_type_bit_in_place));
10385   }
10386   lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
10387   jcc(Assembler::notEqual, slow);
10388 
10389   // Restore top, CAS clobbers register.
10390   movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10391 
10392   bind(push);
10393   // After successful lock, push object on lock-stack.
10394   movptr(Address(thread, top), obj);
10395   incrementl(top, oopSize);
10396   movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
10397 }
10398 
10399 // Implements lightweight-unlocking.
10400 //
10401 // obj: the object to be unlocked
10402 // reg_rax: rax
10403 // thread: the thread
10404 // tmp: a temporary register
10405 void MacroAssembler::lightweight_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {
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