< prev index next >

src/hotspot/cpu/x86/macroAssembler_x86.cpp

Print this page

   10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
   11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
   12  * version 2 for more details (a copy is included in the LICENSE file that
   13  * accompanied this code).
   14  *
   15  * You should have received a copy of the GNU General Public License version
   16  * 2 along with this work; if not, write to the Free Software Foundation,
   17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
   18  *
   19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
   20  * or visit www.oracle.com if you need additional information or have any
   21  * questions.
   22  *
   23  */
   24 
   25 #include "precompiled.hpp"
   26 #include "asm/assembler.hpp"
   27 #include "asm/assembler.inline.hpp"
   28 #include "compiler/compiler_globals.hpp"
   29 #include "compiler/disassembler.hpp"

   30 #include "crc32c.h"
   31 #include "gc/shared/barrierSet.hpp"
   32 #include "gc/shared/barrierSetAssembler.hpp"
   33 #include "gc/shared/collectedHeap.inline.hpp"
   34 #include "gc/shared/tlab_globals.hpp"
   35 #include "interpreter/bytecodeHistogram.hpp"
   36 #include "interpreter/interpreter.hpp"
   37 #include "jvm.h"
   38 #include "memory/resourceArea.hpp"
   39 #include "memory/universe.hpp"
   40 #include "oops/accessDecorators.hpp"
   41 #include "oops/compressedKlass.inline.hpp"
   42 #include "oops/compressedOops.inline.hpp"
   43 #include "oops/klass.inline.hpp"

   44 #include "prims/methodHandles.hpp"
   45 #include "runtime/continuation.hpp"
   46 #include "runtime/interfaceSupport.inline.hpp"
   47 #include "runtime/javaThread.hpp"
   48 #include "runtime/jniHandles.hpp"
   49 #include "runtime/objectMonitor.hpp"
   50 #include "runtime/os.hpp"
   51 #include "runtime/safepoint.hpp"
   52 #include "runtime/safepointMechanism.hpp"
   53 #include "runtime/sharedRuntime.hpp"

   54 #include "runtime/stubRoutines.hpp"
   55 #include "utilities/checkedCast.hpp"
   56 #include "utilities/macros.hpp"




   57 
   58 #ifdef PRODUCT
   59 #define BLOCK_COMMENT(str) /* nothing */
   60 #define STOP(error) stop(error)
   61 #else
   62 #define BLOCK_COMMENT(str) block_comment(str)
   63 #define STOP(error) block_comment(error); stop(error)
   64 #endif
   65 
   66 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
   67 
   68 #ifdef ASSERT
   69 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
   70 #endif
   71 
   72 static const Assembler::Condition reverse[] = {
   73     Assembler::noOverflow     /* overflow      = 0x0 */ ,
   74     Assembler::overflow       /* noOverflow    = 0x1 */ ,
   75     Assembler::aboveEqual     /* carrySet      = 0x2, below         = 0x2 */ ,
   76     Assembler::below          /* aboveEqual    = 0x3, carryClear    = 0x3 */ ,

 1668 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
 1669   LP64_ONLY(assert_different_registers(arg_0, c_rarg1, c_rarg2));
 1670   LP64_ONLY(assert_different_registers(arg_1, c_rarg2));
 1671   pass_arg2(this, arg_2);
 1672   pass_arg1(this, arg_1);
 1673   pass_arg0(this, arg_0);
 1674   call_VM_leaf(entry_point, 3);
 1675 }
 1676 
 1677 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
 1678   LP64_ONLY(assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3));
 1679   LP64_ONLY(assert_different_registers(arg_1, c_rarg2, c_rarg3));
 1680   LP64_ONLY(assert_different_registers(arg_2, c_rarg3));
 1681   pass_arg3(this, arg_3);
 1682   pass_arg2(this, arg_2);
 1683   pass_arg1(this, arg_1);
 1684   pass_arg0(this, arg_0);
 1685   call_VM_leaf(entry_point, 3);
 1686 }
 1687 




 1688 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
 1689   pass_arg0(this, arg_0);
 1690   MacroAssembler::call_VM_leaf_base(entry_point, 1);
 1691 }
 1692 
 1693 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
 1694   LP64_ONLY(assert_different_registers(arg_0, c_rarg1));
 1695   pass_arg1(this, arg_1);
 1696   pass_arg0(this, arg_0);
 1697   MacroAssembler::call_VM_leaf_base(entry_point, 2);
 1698 }
 1699 
 1700 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
 1701   LP64_ONLY(assert_different_registers(arg_0, c_rarg1, c_rarg2));
 1702   LP64_ONLY(assert_different_registers(arg_1, c_rarg2));
 1703   pass_arg2(this, arg_2);
 1704   pass_arg1(this, arg_1);
 1705   pass_arg0(this, arg_0);
 1706   MacroAssembler::call_VM_leaf_base(entry_point, 3);
 1707 }

 2936     lea(rscratch, src);
 2937     Assembler::mulss(dst, Address(rscratch, 0));
 2938   }
 2939 }
 2940 
 2941 void MacroAssembler::null_check(Register reg, int offset) {
 2942   if (needs_explicit_null_check(offset)) {
 2943     // provoke OS null exception if reg is null by
 2944     // accessing M[reg] w/o changing any (non-CC) registers
 2945     // NOTE: cmpl is plenty here to provoke a segv
 2946     cmpptr(rax, Address(reg, 0));
 2947     // Note: should probably use testl(rax, Address(reg, 0));
 2948     //       may be shorter code (however, this version of
 2949     //       testl needs to be implemented first)
 2950   } else {
 2951     // nothing to do, (later) access of M[reg + offset]
 2952     // will provoke OS null exception if reg is null
 2953   }
 2954 }
 2955 






































































































































 2956 void MacroAssembler::os_breakpoint() {
 2957   // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
 2958   // (e.g., MSVC can't call ps() otherwise)
 2959   call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
 2960 }
 2961 
 2962 void MacroAssembler::unimplemented(const char* what) {
 2963   const char* buf = nullptr;
 2964   {
 2965     ResourceMark rm;
 2966     stringStream ss;
 2967     ss.print("unimplemented: %s", what);
 2968     buf = code_string(ss.as_string());
 2969   }
 2970   stop(buf);
 2971 }
 2972 
 2973 #ifdef _LP64
 2974 #define XSTATE_BV 0x200
 2975 #endif

 4040 }
 4041 
 4042 // C++ bool manipulation
 4043 void MacroAssembler::testbool(Register dst) {
 4044   if(sizeof(bool) == 1)
 4045     testb(dst, 0xff);
 4046   else if(sizeof(bool) == 2) {
 4047     // testw implementation needed for two byte bools
 4048     ShouldNotReachHere();
 4049   } else if(sizeof(bool) == 4)
 4050     testl(dst, dst);
 4051   else
 4052     // unsupported
 4053     ShouldNotReachHere();
 4054 }
 4055 
 4056 void MacroAssembler::testptr(Register dst, Register src) {
 4057   LP64_ONLY(testq(dst, src)) NOT_LP64(testl(dst, src));
 4058 }
 4059 


















































































































 4060 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
 4061 void MacroAssembler::tlab_allocate(Register thread, Register obj,
 4062                                    Register var_size_in_bytes,
 4063                                    int con_size_in_bytes,
 4064                                    Register t1,
 4065                                    Register t2,
 4066                                    Label& slow_case) {
 4067   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 4068   bs->tlab_allocate(this, thread, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
 4069 }
 4070 
 4071 RegSet MacroAssembler::call_clobbered_gp_registers() {
 4072   RegSet regs;
 4073 #ifdef _LP64
 4074   regs += RegSet::of(rax, rcx, rdx);
 4075 #ifndef WINDOWS
 4076   regs += RegSet::of(rsi, rdi);
 4077 #endif
 4078   regs += RegSet::range(r8, r11);
 4079 #else

 4292     // clear topmost word (no jump would be needed if conditional assignment worked here)
 4293     movptr(Address(address, index, Address::times_8, offset_in_bytes - 0*BytesPerWord), temp);
 4294     // index could be 0 now, must check again
 4295     jcc(Assembler::zero, done);
 4296     bind(even);
 4297   }
 4298 #endif // !_LP64
 4299   // initialize remaining object fields: index is a multiple of 2 now
 4300   {
 4301     Label loop;
 4302     bind(loop);
 4303     movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
 4304     NOT_LP64(movptr(Address(address, index, Address::times_8, offset_in_bytes - 2*BytesPerWord), temp);)
 4305     decrement(index);
 4306     jcc(Assembler::notZero, loop);
 4307   }
 4308 
 4309   bind(done);
 4310 }
 4311 


















































 4312 // Look up the method for a megamorphic invokeinterface call.
 4313 // The target method is determined by <intf_klass, itable_index>.
 4314 // The receiver klass is in recv_klass.
 4315 // On success, the result will be in method_result, and execution falls through.
 4316 // On failure, execution transfers to the given label.
 4317 void MacroAssembler::lookup_interface_method(Register recv_klass,
 4318                                              Register intf_klass,
 4319                                              RegisterOrConstant itable_index,
 4320                                              Register method_result,
 4321                                              Register scan_temp,
 4322                                              Label& L_no_such_interface,
 4323                                              bool return_method) {
 4324   assert_different_registers(recv_klass, intf_klass, scan_temp);
 4325   assert_different_registers(method_result, intf_klass, scan_temp);
 4326   assert(recv_klass != method_result || !return_method,
 4327          "recv_klass can be destroyed when method isn't needed");
 4328 
 4329   assert(itable_index.is_constant() || itable_index.as_register() == method_result,
 4330          "caller must use same register for non-constant itable index as for method");
 4331 

 4759   } else {
 4760     Label L;
 4761     jccb(negate_condition(cc), L);
 4762     movl(dst, src);
 4763     bind(L);
 4764   }
 4765 }
 4766 
 4767 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
 4768   if (VM_Version::supports_cmov()) {
 4769     cmovl(cc, dst, src);
 4770   } else {
 4771     Label L;
 4772     jccb(negate_condition(cc), L);
 4773     movl(dst, src);
 4774     bind(L);
 4775   }
 4776 }
 4777 
 4778 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
 4779   if (!VerifyOops) return;




 4780 
 4781   BLOCK_COMMENT("verify_oop {");
 4782 #ifdef _LP64
 4783   push(rscratch1);
 4784 #endif
 4785   push(rax);                          // save rax
 4786   push(reg);                          // pass register argument
 4787 
 4788   // Pass register number to verify_oop_subroutine
 4789   const char* b = nullptr;
 4790   {
 4791     ResourceMark rm;
 4792     stringStream ss;
 4793     ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
 4794     b = code_string(ss.as_string());
 4795   }
 4796   ExternalAddress buffer((address) b);
 4797   pushptr(buffer.addr(), rscratch1);
 4798 
 4799   // call indirectly to solve generation ordering problem

 4821   // cf. TemplateTable::prepare_invoke(), if (load_receiver).
 4822   int stackElementSize = Interpreter::stackElementSize;
 4823   int offset = Interpreter::expr_offset_in_bytes(extra_slot_offset+0);
 4824 #ifdef ASSERT
 4825   int offset1 = Interpreter::expr_offset_in_bytes(extra_slot_offset+1);
 4826   assert(offset1 - offset == stackElementSize, "correct arithmetic");
 4827 #endif
 4828   Register             scale_reg    = noreg;
 4829   Address::ScaleFactor scale_factor = Address::no_scale;
 4830   if (arg_slot.is_constant()) {
 4831     offset += arg_slot.as_constant() * stackElementSize;
 4832   } else {
 4833     scale_reg    = arg_slot.as_register();
 4834     scale_factor = Address::times(stackElementSize);
 4835   }
 4836   offset += wordSize;           // return PC is on stack
 4837   return Address(rsp, scale_reg, scale_factor, offset);
 4838 }
 4839 
 4840 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
 4841   if (!VerifyOops) return;




 4842 
 4843 #ifdef _LP64
 4844   push(rscratch1);
 4845 #endif
 4846   push(rax); // save rax,
 4847   // addr may contain rsp so we will have to adjust it based on the push
 4848   // we just did (and on 64 bit we do two pushes)
 4849   // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
 4850   // stores rax into addr which is backwards of what was intended.
 4851   if (addr.uses(rsp)) {
 4852     lea(rax, addr);
 4853     pushptr(Address(rax, LP64_ONLY(2 *) BytesPerWord));
 4854   } else {
 4855     pushptr(addr);
 4856   }
 4857 
 4858   // Pass register number to verify_oop_subroutine
 4859   const char* b = nullptr;
 4860   {
 4861     ResourceMark rm;

 5308 
 5309 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
 5310   // get mirror
 5311   const int mirror_offset = in_bytes(Klass::java_mirror_offset());
 5312   load_method_holder(mirror, method);
 5313   movptr(mirror, Address(mirror, mirror_offset));
 5314   resolve_oop_handle(mirror, tmp);
 5315 }
 5316 
 5317 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
 5318   load_method_holder(rresult, rmethod);
 5319   movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
 5320 }
 5321 
 5322 void MacroAssembler::load_method_holder(Register holder, Register method) {
 5323   movptr(holder, Address(method, Method::const_offset()));                      // ConstMethod*
 5324   movptr(holder, Address(holder, ConstMethod::constants_offset()));             // ConstantPool*
 5325   movptr(holder, Address(holder, ConstantPool::pool_holder_offset()));          // InstanceKlass*
 5326 }
 5327 








 5328 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
 5329   assert_different_registers(src, tmp);
 5330   assert_different_registers(dst, tmp);
 5331 #ifdef _LP64
 5332   if (UseCompressedClassPointers) {
 5333     movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 5334     decode_klass_not_null(dst, tmp);
 5335   } else
 5336 #endif
 5337     movptr(dst, Address(src, oopDesc::klass_offset_in_bytes()));





 5338 }
 5339 
 5340 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
 5341   assert_different_registers(src, tmp);
 5342   assert_different_registers(dst, tmp);
 5343 #ifdef _LP64
 5344   if (UseCompressedClassPointers) {
 5345     encode_klass_not_null(src, tmp);
 5346     movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
 5347   } else
 5348 #endif
 5349     movptr(Address(dst, oopDesc::klass_offset_in_bytes()), src);
 5350 }
 5351 
 5352 void MacroAssembler::access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
 5353                                     Register tmp1, Register thread_tmp) {
 5354   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 5355   decorators = AccessInternal::decorator_fixup(decorators, type);
 5356   bool as_raw = (decorators & AS_RAW) != 0;
 5357   if (as_raw) {
 5358     bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, thread_tmp);
 5359   } else {
 5360     bs->load_at(this, decorators, type, dst, src, tmp1, thread_tmp);
 5361   }
 5362 }
 5363 
 5364 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
 5365                                      Register tmp1, Register tmp2, Register tmp3) {
 5366   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 5367   decorators = AccessInternal::decorator_fixup(decorators, type);
 5368   bool as_raw = (decorators & AS_RAW) != 0;
 5369   if (as_raw) {
 5370     bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
 5371   } else {
 5372     bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
 5373   }
 5374 }
 5375 








































 5376 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
 5377                                    Register thread_tmp, DecoratorSet decorators) {
 5378   access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, thread_tmp);
 5379 }
 5380 
 5381 // Doesn't do verification, generates fixed size code
 5382 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
 5383                                             Register thread_tmp, DecoratorSet decorators) {
 5384   access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, thread_tmp);
 5385 }
 5386 
 5387 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
 5388                                     Register tmp2, Register tmp3, DecoratorSet decorators) {
 5389   access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
 5390 }
 5391 
 5392 // Used for storing nulls.
 5393 void MacroAssembler::store_heap_oop_null(Address dst) {
 5394   access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
 5395 }

 5695 
 5696 void MacroAssembler::reinit_heapbase() {
 5697   if (UseCompressedOops) {
 5698     if (Universe::heap() != nullptr) {
 5699       if (CompressedOops::base() == nullptr) {
 5700         MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
 5701       } else {
 5702         mov64(r12_heapbase, (int64_t)CompressedOops::ptrs_base());
 5703       }
 5704     } else {
 5705       movptr(r12_heapbase, ExternalAddress(CompressedOops::ptrs_base_addr()));
 5706     }
 5707   }
 5708 }
 5709 
 5710 #endif // _LP64
 5711 
 5712 #if COMPILER2_OR_JVMCI
 5713 
 5714 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
 5715 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
 5716   // cnt - number of qwords (8-byte words).
 5717   // base - start address, qword aligned.
 5718   Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
 5719   bool use64byteVector = (MaxVectorSize == 64) && (VM_Version::avx3_threshold() == 0);
 5720   if (use64byteVector) {
 5721     vpxor(xtmp, xtmp, xtmp, AVX_512bit);
 5722   } else if (MaxVectorSize >= 32) {
 5723     vpxor(xtmp, xtmp, xtmp, AVX_256bit);


 5724   } else {
 5725     pxor(xtmp, xtmp);

 5726   }
 5727   jmp(L_zero_64_bytes);
 5728 
 5729   BIND(L_loop);
 5730   if (MaxVectorSize >= 32) {
 5731     fill64(base, 0, xtmp, use64byteVector);
 5732   } else {
 5733     movdqu(Address(base,  0), xtmp);
 5734     movdqu(Address(base, 16), xtmp);
 5735     movdqu(Address(base, 32), xtmp);
 5736     movdqu(Address(base, 48), xtmp);
 5737   }
 5738   addptr(base, 64);
 5739 
 5740   BIND(L_zero_64_bytes);
 5741   subptr(cnt, 8);
 5742   jccb(Assembler::greaterEqual, L_loop);
 5743 
 5744   // Copy trailing 64 bytes
 5745   if (use64byteVector) {
 5746     addptr(cnt, 8);
 5747     jccb(Assembler::equal, L_end);
 5748     fill64_masked(3, base, 0, xtmp, mask, cnt, rtmp, true);
 5749     jmp(L_end);
 5750   } else {
 5751     addptr(cnt, 4);
 5752     jccb(Assembler::less, L_tail);
 5753     if (MaxVectorSize >= 32) {
 5754       vmovdqu(Address(base, 0), xtmp);
 5755     } else {
 5756       movdqu(Address(base,  0), xtmp);
 5757       movdqu(Address(base, 16), xtmp);
 5758     }
 5759   }
 5760   addptr(base, 32);
 5761   subptr(cnt, 4);
 5762 
 5763   BIND(L_tail);
 5764   addptr(cnt, 4);
 5765   jccb(Assembler::lessEqual, L_end);
 5766   if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
 5767     fill32_masked(3, base, 0, xtmp, mask, cnt, rtmp);
 5768   } else {
 5769     decrement(cnt);
 5770 
 5771     BIND(L_sloop);
 5772     movq(Address(base, 0), xtmp);
 5773     addptr(base, 8);
 5774     decrement(cnt);
 5775     jccb(Assembler::greaterEqual, L_sloop);
 5776   }
 5777   BIND(L_end);
 5778 }
 5779 














































































































































































































































































































































































































 5780 // Clearing constant sized memory using YMM/ZMM registers.
 5781 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
 5782   assert(UseAVX > 2 && VM_Version::supports_avx512vlbw(), "");
 5783   bool use64byteVector = (MaxVectorSize > 32) && (VM_Version::avx3_threshold() == 0);
 5784 
 5785   int vector64_count = (cnt & (~0x7)) >> 3;
 5786   cnt = cnt & 0x7;
 5787   const int fill64_per_loop = 4;
 5788   const int max_unrolled_fill64 = 8;
 5789 
 5790   // 64 byte initialization loop.
 5791   vpxor(xtmp, xtmp, xtmp, use64byteVector ? AVX_512bit : AVX_256bit);
 5792   int start64 = 0;
 5793   if (vector64_count > max_unrolled_fill64) {
 5794     Label LOOP;
 5795     Register index = rtmp;
 5796 
 5797     start64 = vector64_count - (vector64_count % fill64_per_loop);
 5798 
 5799     movl(index, 0);

 5849         break;
 5850       case 7:
 5851         if (use64byteVector) {
 5852           movl(rtmp, 0x7F);
 5853           kmovwl(mask, rtmp);
 5854           evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
 5855         } else {
 5856           evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
 5857           movl(rtmp, 0x7);
 5858           kmovwl(mask, rtmp);
 5859           evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
 5860         }
 5861         break;
 5862       default:
 5863         fatal("Unexpected length : %d\n",cnt);
 5864         break;
 5865     }
 5866   }
 5867 }
 5868 
 5869 void MacroAssembler::clear_mem(Register base, Register cnt, Register tmp, XMMRegister xtmp,
 5870                                bool is_large, KRegister mask) {
 5871   // cnt      - number of qwords (8-byte words).
 5872   // base     - start address, qword aligned.
 5873   // is_large - if optimizers know cnt is larger than InitArrayShortSize
 5874   assert(base==rdi, "base register must be edi for rep stos");
 5875   assert(tmp==rax,   "tmp register must be eax for rep stos");
 5876   assert(cnt==rcx,   "cnt register must be ecx for rep stos");
 5877   assert(InitArrayShortSize % BytesPerLong == 0,
 5878     "InitArrayShortSize should be the multiple of BytesPerLong");
 5879 
 5880   Label DONE;
 5881   if (!is_large || !UseXMMForObjInit) {
 5882     xorptr(tmp, tmp);
 5883   }
 5884 
 5885   if (!is_large) {
 5886     Label LOOP, LONG;
 5887     cmpptr(cnt, InitArrayShortSize/BytesPerLong);
 5888     jccb(Assembler::greater, LONG);
 5889 
 5890     NOT_LP64(shlptr(cnt, 1);) // convert to number of 32-bit words for 32-bit VM
 5891 
 5892     decrement(cnt);
 5893     jccb(Assembler::negative, DONE); // Zero length
 5894 
 5895     // Use individual pointer-sized stores for small counts:
 5896     BIND(LOOP);
 5897     movptr(Address(base, cnt, Address::times_ptr), tmp);
 5898     decrement(cnt);
 5899     jccb(Assembler::greaterEqual, LOOP);
 5900     jmpb(DONE);
 5901 
 5902     BIND(LONG);
 5903   }
 5904 
 5905   // Use longer rep-prefixed ops for non-small counts:
 5906   if (UseFastStosb) {
 5907     shlptr(cnt, 3); // convert to number of bytes
 5908     rep_stosb();
 5909   } else if (UseXMMForObjInit) {
 5910     xmm_clear_mem(base, cnt, tmp, xtmp, mask);
 5911   } else {
 5912     NOT_LP64(shlptr(cnt, 1);) // convert to number of 32-bit words for 32-bit VM
 5913     rep_stos();
 5914   }
 5915 
 5916   BIND(DONE);
 5917 }
 5918 
 5919 #endif //COMPILER2_OR_JVMCI
 5920 
 5921 
 5922 void MacroAssembler::generate_fill(BasicType t, bool aligned,
 5923                                    Register to, Register value, Register count,
 5924                                    Register rtmp, XMMRegister xtmp) {
 5925   ShortBranchVerifier sbv(this);
 5926   assert_different_registers(to, value, count, rtmp);
 5927   Label L_exit;
 5928   Label L_fill_2_bytes, L_fill_4_bytes;
 5929 
 5930 #if defined(COMPILER2) && defined(_LP64)

 9907 // hdr: the (pre-loaded) header of the object, must be rax
 9908 // thread: the thread which attempts to lock obj
 9909 // tmp: a temporary register
 9910 void MacroAssembler::lightweight_lock(Register obj, Register hdr, Register thread, Register tmp, Label& slow) {
 9911   assert(hdr == rax, "header must be in rax for cmpxchg");
 9912   assert_different_registers(obj, hdr, thread, tmp);
 9913 
 9914   // First we need to check if the lock-stack has room for pushing the object reference.
 9915   // Note: we subtract 1 from the end-offset so that we can do a 'greater' comparison, instead
 9916   // of 'greaterEqual' below, which readily clears the ZF. This makes C2 code a little simpler and
 9917   // avoids one branch.
 9918   cmpl(Address(thread, JavaThread::lock_stack_top_offset()), LockStack::end_offset() - 1);
 9919   jcc(Assembler::greater, slow);
 9920 
 9921   // Now we attempt to take the fast-lock.
 9922   // Clear lock_mask bits (locked state).
 9923   andptr(hdr, ~(int32_t)markWord::lock_mask_in_place);
 9924   movptr(tmp, hdr);
 9925   // Set unlocked_value bit.
 9926   orptr(hdr, markWord::unlocked_value);




 9927   lock();
 9928   cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
 9929   jcc(Assembler::notEqual, slow);
 9930 
 9931   // If successful, push object to lock-stack.
 9932   movl(tmp, Address(thread, JavaThread::lock_stack_top_offset()));
 9933   movptr(Address(thread, tmp), obj);
 9934   incrementl(tmp, oopSize);
 9935   movl(Address(thread, JavaThread::lock_stack_top_offset()), tmp);
 9936 }
 9937 
 9938 // Implements lightweight-unlocking.
 9939 // Branches to slow upon failure, with ZF cleared.
 9940 // Falls through upon success, with unspecified ZF.
 9941 //
 9942 // obj: the object to be unlocked
 9943 // hdr: the (pre-loaded) header of the object, must be rax
 9944 // tmp: a temporary register
 9945 void MacroAssembler::lightweight_unlock(Register obj, Register hdr, Register tmp, Label& slow) {
 9946   assert(hdr == rax, "header must be in rax for cmpxchg");

   10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
   11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
   12  * version 2 for more details (a copy is included in the LICENSE file that
   13  * accompanied this code).
   14  *
   15  * You should have received a copy of the GNU General Public License version
   16  * 2 along with this work; if not, write to the Free Software Foundation,
   17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
   18  *
   19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
   20  * or visit www.oracle.com if you need additional information or have any
   21  * questions.
   22  *
   23  */
   24 
   25 #include "precompiled.hpp"
   26 #include "asm/assembler.hpp"
   27 #include "asm/assembler.inline.hpp"
   28 #include "compiler/compiler_globals.hpp"
   29 #include "compiler/disassembler.hpp"
   30 #include "ci/ciInlineKlass.hpp"
   31 #include "crc32c.h"
   32 #include "gc/shared/barrierSet.hpp"
   33 #include "gc/shared/barrierSetAssembler.hpp"
   34 #include "gc/shared/collectedHeap.inline.hpp"
   35 #include "gc/shared/tlab_globals.hpp"
   36 #include "interpreter/bytecodeHistogram.hpp"
   37 #include "interpreter/interpreter.hpp"
   38 #include "jvm.h"
   39 #include "memory/resourceArea.hpp"
   40 #include "memory/universe.hpp"
   41 #include "oops/accessDecorators.hpp"
   42 #include "oops/compressedKlass.inline.hpp"
   43 #include "oops/compressedOops.inline.hpp"
   44 #include "oops/klass.inline.hpp"
   45 #include "oops/resolvedFieldEntry.hpp"
   46 #include "prims/methodHandles.hpp"
   47 #include "runtime/continuation.hpp"
   48 #include "runtime/interfaceSupport.inline.hpp"
   49 #include "runtime/javaThread.hpp"
   50 #include "runtime/jniHandles.hpp"
   51 #include "runtime/objectMonitor.hpp"
   52 #include "runtime/os.hpp"
   53 #include "runtime/safepoint.hpp"
   54 #include "runtime/safepointMechanism.hpp"
   55 #include "runtime/sharedRuntime.hpp"
   56 #include "runtime/signature_cc.hpp"
   57 #include "runtime/stubRoutines.hpp"
   58 #include "utilities/checkedCast.hpp"
   59 #include "utilities/macros.hpp"
   60 #include "vmreg_x86.inline.hpp"
   61 #ifdef COMPILER2
   62 #include "opto/output.hpp"
   63 #endif
   64 
   65 #ifdef PRODUCT
   66 #define BLOCK_COMMENT(str) /* nothing */
   67 #define STOP(error) stop(error)
   68 #else
   69 #define BLOCK_COMMENT(str) block_comment(str)
   70 #define STOP(error) block_comment(error); stop(error)
   71 #endif
   72 
   73 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
   74 
   75 #ifdef ASSERT
   76 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
   77 #endif
   78 
   79 static const Assembler::Condition reverse[] = {
   80     Assembler::noOverflow     /* overflow      = 0x0 */ ,
   81     Assembler::overflow       /* noOverflow    = 0x1 */ ,
   82     Assembler::aboveEqual     /* carrySet      = 0x2, below         = 0x2 */ ,
   83     Assembler::below          /* aboveEqual    = 0x3, carryClear    = 0x3 */ ,

 1675 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
 1676   LP64_ONLY(assert_different_registers(arg_0, c_rarg1, c_rarg2));
 1677   LP64_ONLY(assert_different_registers(arg_1, c_rarg2));
 1678   pass_arg2(this, arg_2);
 1679   pass_arg1(this, arg_1);
 1680   pass_arg0(this, arg_0);
 1681   call_VM_leaf(entry_point, 3);
 1682 }
 1683 
 1684 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
 1685   LP64_ONLY(assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3));
 1686   LP64_ONLY(assert_different_registers(arg_1, c_rarg2, c_rarg3));
 1687   LP64_ONLY(assert_different_registers(arg_2, c_rarg3));
 1688   pass_arg3(this, arg_3);
 1689   pass_arg2(this, arg_2);
 1690   pass_arg1(this, arg_1);
 1691   pass_arg0(this, arg_0);
 1692   call_VM_leaf(entry_point, 3);
 1693 }
 1694 
 1695 void MacroAssembler::super_call_VM_leaf(address entry_point) {
 1696   MacroAssembler::call_VM_leaf_base(entry_point, 1);
 1697 }
 1698 
 1699 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
 1700   pass_arg0(this, arg_0);
 1701   MacroAssembler::call_VM_leaf_base(entry_point, 1);
 1702 }
 1703 
 1704 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
 1705   LP64_ONLY(assert_different_registers(arg_0, c_rarg1));
 1706   pass_arg1(this, arg_1);
 1707   pass_arg0(this, arg_0);
 1708   MacroAssembler::call_VM_leaf_base(entry_point, 2);
 1709 }
 1710 
 1711 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
 1712   LP64_ONLY(assert_different_registers(arg_0, c_rarg1, c_rarg2));
 1713   LP64_ONLY(assert_different_registers(arg_1, c_rarg2));
 1714   pass_arg2(this, arg_2);
 1715   pass_arg1(this, arg_1);
 1716   pass_arg0(this, arg_0);
 1717   MacroAssembler::call_VM_leaf_base(entry_point, 3);
 1718 }

 2947     lea(rscratch, src);
 2948     Assembler::mulss(dst, Address(rscratch, 0));
 2949   }
 2950 }
 2951 
 2952 void MacroAssembler::null_check(Register reg, int offset) {
 2953   if (needs_explicit_null_check(offset)) {
 2954     // provoke OS null exception if reg is null by
 2955     // accessing M[reg] w/o changing any (non-CC) registers
 2956     // NOTE: cmpl is plenty here to provoke a segv
 2957     cmpptr(rax, Address(reg, 0));
 2958     // Note: should probably use testl(rax, Address(reg, 0));
 2959     //       may be shorter code (however, this version of
 2960     //       testl needs to be implemented first)
 2961   } else {
 2962     // nothing to do, (later) access of M[reg + offset]
 2963     // will provoke OS null exception if reg is null
 2964   }
 2965 }
 2966 
 2967 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
 2968   andptr(markword, markWord::inline_type_mask_in_place);
 2969   cmpptr(markword, markWord::inline_type_pattern);
 2970   jcc(Assembler::equal, is_inline_type);
 2971 }
 2972 
 2973 void MacroAssembler::test_klass_is_inline_type(Register klass, Register temp_reg, Label& is_inline_type) {
 2974   movl(temp_reg, Address(klass, Klass::access_flags_offset()));
 2975   testl(temp_reg, JVM_ACC_IDENTITY);
 2976   jcc(Assembler::zero, is_inline_type);
 2977 }
 2978 
 2979 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type) {
 2980   testptr(object, object);
 2981   jcc(Assembler::zero, not_inline_type);
 2982   const int is_inline_type_mask = markWord::inline_type_pattern;
 2983   movptr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
 2984   andptr(tmp, is_inline_type_mask);
 2985   cmpptr(tmp, is_inline_type_mask);
 2986   jcc(Assembler::notEqual, not_inline_type);
 2987 }
 2988 
 2989 void MacroAssembler::test_klass_is_empty_inline_type(Register klass, Register temp_reg, Label& is_empty_inline_type) {
 2990 #ifdef ASSERT
 2991   {
 2992     Label done_check;
 2993     test_klass_is_inline_type(klass, temp_reg, done_check);
 2994     stop("test_klass_is_empty_inline_type with non inline type klass");
 2995     bind(done_check);
 2996   }
 2997 #endif
 2998   movl(temp_reg, Address(klass, InstanceKlass::misc_flags_offset()));
 2999   testl(temp_reg, InstanceKlassFlags::is_empty_inline_type_value());
 3000   jcc(Assembler::notZero, is_empty_inline_type);
 3001 }
 3002 
 3003 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
 3004   movl(temp_reg, flags);
 3005   testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
 3006   jcc(Assembler::notEqual, is_null_free_inline_type);
 3007 }
 3008 
 3009 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
 3010   movl(temp_reg, flags);
 3011   testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
 3012   jcc(Assembler::equal, not_null_free_inline_type);
 3013 }
 3014 
 3015 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
 3016   movl(temp_reg, flags);
 3017   testl(temp_reg, 1 << ResolvedFieldEntry::is_flat_shift);
 3018   jcc(Assembler::notEqual, is_flat);
 3019 }
 3020 
 3021 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
 3022   Label test_mark_word;
 3023   // load mark word
 3024   movptr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
 3025   // check displaced
 3026   testl(temp_reg, markWord::unlocked_value);
 3027   jccb(Assembler::notZero, test_mark_word);
 3028   // slow path use klass prototype
 3029   push(rscratch1);
 3030   load_prototype_header(temp_reg, oop, rscratch1);
 3031   pop(rscratch1);
 3032 
 3033   bind(test_mark_word);
 3034   testl(temp_reg, test_bit);
 3035   jcc((jmp_set) ? Assembler::notZero : Assembler::zero, jmp_label);
 3036 }
 3037 
 3038 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg,
 3039                                          Label& is_flat_array) {
 3040 #ifdef _LP64
 3041   test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
 3042 #else
 3043   load_klass(temp_reg, oop, noreg);
 3044   movl(temp_reg, Address(temp_reg, Klass::layout_helper_offset()));
 3045   test_flat_array_layout(temp_reg, is_flat_array);
 3046 #endif
 3047 }
 3048 
 3049 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
 3050                                              Label& is_non_flat_array) {
 3051 #ifdef _LP64
 3052   test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
 3053 #else
 3054   load_klass(temp_reg, oop, noreg);
 3055   movl(temp_reg, Address(temp_reg, Klass::layout_helper_offset()));
 3056   test_non_flat_array_layout(temp_reg, is_non_flat_array);
 3057 #endif
 3058 }
 3059 
 3060 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label&is_null_free_array) {
 3061 #ifdef _LP64
 3062   test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
 3063 #else
 3064   load_klass(temp_reg, oop, noreg);
 3065   movl(temp_reg, Address(temp_reg, Klass::layout_helper_offset()));
 3066   test_null_free_array_layout(temp_reg, is_null_free_array);
 3067 #endif
 3068 }
 3069 
 3070 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
 3071 #ifdef _LP64
 3072   test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
 3073 #else
 3074   load_klass(temp_reg, oop, noreg);
 3075   movl(temp_reg, Address(temp_reg, Klass::layout_helper_offset()));
 3076   test_non_null_free_array_layout(temp_reg, is_non_null_free_array);
 3077 #endif
 3078 }
 3079 
 3080 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
 3081   testl(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
 3082   jcc(Assembler::notZero, is_flat_array);
 3083 }
 3084 
 3085 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
 3086   testl(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
 3087   jcc(Assembler::zero, is_non_flat_array);
 3088 }
 3089 
 3090 void MacroAssembler::test_null_free_array_layout(Register lh, Label& is_null_free_array) {
 3091   testl(lh, Klass::_lh_null_free_array_bit_inplace);
 3092   jcc(Assembler::notZero, is_null_free_array);
 3093 }
 3094 
 3095 void MacroAssembler::test_non_null_free_array_layout(Register lh, Label& is_non_null_free_array) {
 3096   testl(lh, Klass::_lh_null_free_array_bit_inplace);
 3097   jcc(Assembler::zero, is_non_null_free_array);
 3098 }
 3099 
 3100 
 3101 void MacroAssembler::os_breakpoint() {
 3102   // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
 3103   // (e.g., MSVC can't call ps() otherwise)
 3104   call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
 3105 }
 3106 
 3107 void MacroAssembler::unimplemented(const char* what) {
 3108   const char* buf = nullptr;
 3109   {
 3110     ResourceMark rm;
 3111     stringStream ss;
 3112     ss.print("unimplemented: %s", what);
 3113     buf = code_string(ss.as_string());
 3114   }
 3115   stop(buf);
 3116 }
 3117 
 3118 #ifdef _LP64
 3119 #define XSTATE_BV 0x200
 3120 #endif

 4185 }
 4186 
 4187 // C++ bool manipulation
 4188 void MacroAssembler::testbool(Register dst) {
 4189   if(sizeof(bool) == 1)
 4190     testb(dst, 0xff);
 4191   else if(sizeof(bool) == 2) {
 4192     // testw implementation needed for two byte bools
 4193     ShouldNotReachHere();
 4194   } else if(sizeof(bool) == 4)
 4195     testl(dst, dst);
 4196   else
 4197     // unsupported
 4198     ShouldNotReachHere();
 4199 }
 4200 
 4201 void MacroAssembler::testptr(Register dst, Register src) {
 4202   LP64_ONLY(testq(dst, src)) NOT_LP64(testl(dst, src));
 4203 }
 4204 
 4205 // Object / value buffer allocation...
 4206 //
 4207 // Kills klass and rsi on LP64
 4208 void MacroAssembler::allocate_instance(Register klass, Register new_obj,
 4209                                        Register t1, Register t2,
 4210                                        bool clear_fields, Label& alloc_failed)
 4211 {
 4212   Label done, initialize_header, initialize_object, slow_case, slow_case_no_pop;
 4213   Register layout_size = t1;
 4214   assert(new_obj == rax, "needs to be rax");
 4215   assert_different_registers(klass, new_obj, t1, t2);
 4216 
 4217   // get instance_size in InstanceKlass (scaled to a count of bytes)
 4218   movl(layout_size, Address(klass, Klass::layout_helper_offset()));
 4219   // test to see if it has a finalizer or is malformed in some way
 4220   testl(layout_size, Klass::_lh_instance_slow_path_bit);
 4221   jcc(Assembler::notZero, slow_case_no_pop);
 4222 
 4223   // Allocate the instance:
 4224   //  If TLAB is enabled:
 4225   //    Try to allocate in the TLAB.
 4226   //    If fails, go to the slow path.
 4227   //  Else If inline contiguous allocations are enabled:
 4228   //    Try to allocate in eden.
 4229   //    If fails due to heap end, go to slow path.
 4230   //
 4231   //  If TLAB is enabled OR inline contiguous is enabled:
 4232   //    Initialize the allocation.
 4233   //    Exit.
 4234   //
 4235   //  Go to slow path.
 4236 
 4237   push(klass);
 4238   const Register thread = LP64_ONLY(r15_thread) NOT_LP64(klass);
 4239 #ifndef _LP64
 4240   if (UseTLAB) {
 4241     get_thread(thread);
 4242   }
 4243 #endif // _LP64
 4244 
 4245   if (UseTLAB) {
 4246     tlab_allocate(thread, new_obj, layout_size, 0, klass, t2, slow_case);
 4247     if (ZeroTLAB || (!clear_fields)) {
 4248       // the fields have been already cleared
 4249       jmp(initialize_header);
 4250     } else {
 4251       // initialize both the header and fields
 4252       jmp(initialize_object);
 4253     }
 4254   } else {
 4255     jmp(slow_case);
 4256   }
 4257 
 4258   // If UseTLAB is true, the object is created above and there is an initialize need.
 4259   // Otherwise, skip and go to the slow path.
 4260   if (UseTLAB) {
 4261     if (clear_fields) {
 4262       // The object is initialized before the header.  If the object size is
 4263       // zero, go directly to the header initialization.
 4264       bind(initialize_object);
 4265       decrement(layout_size, sizeof(oopDesc));
 4266       jcc(Assembler::zero, initialize_header);
 4267 
 4268       // Initialize topmost object field, divide size by 8, check if odd and
 4269       // test if zero.
 4270       Register zero = klass;
 4271       xorl(zero, zero);    // use zero reg to clear memory (shorter code)
 4272       shrl(layout_size, LogBytesPerLong); // divide by 2*oopSize and set carry flag if odd
 4273 
 4274   #ifdef ASSERT
 4275       // make sure instance_size was multiple of 8
 4276       Label L;
 4277       // Ignore partial flag stall after shrl() since it is debug VM
 4278       jcc(Assembler::carryClear, L);
 4279       stop("object size is not multiple of 2 - adjust this code");
 4280       bind(L);
 4281       // must be > 0, no extra check needed here
 4282   #endif
 4283 
 4284       // initialize remaining object fields: instance_size was a multiple of 8
 4285       {
 4286         Label loop;
 4287         bind(loop);
 4288         movptr(Address(new_obj, layout_size, Address::times_8, sizeof(oopDesc) - 1*oopSize), zero);
 4289         NOT_LP64(movptr(Address(new_obj, layout_size, Address::times_8, sizeof(oopDesc) - 2*oopSize), zero));
 4290         decrement(layout_size);
 4291         jcc(Assembler::notZero, loop);
 4292       }
 4293     } // clear_fields
 4294 
 4295     // initialize object header only.
 4296     bind(initialize_header);
 4297     pop(klass);
 4298     Register mark_word = t2;
 4299     movptr(mark_word, Address(klass, Klass::prototype_header_offset()));
 4300     movptr(Address(new_obj, oopDesc::mark_offset_in_bytes ()), mark_word);
 4301 #ifdef _LP64
 4302     xorl(rsi, rsi);                 // use zero reg to clear memory (shorter code)
 4303     store_klass_gap(new_obj, rsi);  // zero klass gap for compressed oops
 4304 #endif
 4305     movptr(t2, klass);         // preserve klass
 4306     store_klass(new_obj, t2, rscratch1);  // src klass reg is potentially compressed
 4307 
 4308     jmp(done);
 4309   }
 4310 
 4311   bind(slow_case);
 4312   pop(klass);
 4313   bind(slow_case_no_pop);
 4314   jmp(alloc_failed);
 4315 
 4316   bind(done);
 4317 }
 4318 
 4319 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
 4320 void MacroAssembler::tlab_allocate(Register thread, Register obj,
 4321                                    Register var_size_in_bytes,
 4322                                    int con_size_in_bytes,
 4323                                    Register t1,
 4324                                    Register t2,
 4325                                    Label& slow_case) {
 4326   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 4327   bs->tlab_allocate(this, thread, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
 4328 }
 4329 
 4330 RegSet MacroAssembler::call_clobbered_gp_registers() {
 4331   RegSet regs;
 4332 #ifdef _LP64
 4333   regs += RegSet::of(rax, rcx, rdx);
 4334 #ifndef WINDOWS
 4335   regs += RegSet::of(rsi, rdi);
 4336 #endif
 4337   regs += RegSet::range(r8, r11);
 4338 #else

 4551     // clear topmost word (no jump would be needed if conditional assignment worked here)
 4552     movptr(Address(address, index, Address::times_8, offset_in_bytes - 0*BytesPerWord), temp);
 4553     // index could be 0 now, must check again
 4554     jcc(Assembler::zero, done);
 4555     bind(even);
 4556   }
 4557 #endif // !_LP64
 4558   // initialize remaining object fields: index is a multiple of 2 now
 4559   {
 4560     Label loop;
 4561     bind(loop);
 4562     movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
 4563     NOT_LP64(movptr(Address(address, index, Address::times_8, offset_in_bytes - 2*BytesPerWord), temp);)
 4564     decrement(index);
 4565     jcc(Assembler::notZero, loop);
 4566   }
 4567 
 4568   bind(done);
 4569 }
 4570 
 4571 void MacroAssembler::get_inline_type_field_klass(Register klass, Register index, Register inline_klass) {
 4572   movptr(inline_klass, Address(klass, InstanceKlass::inline_type_field_klasses_offset()));
 4573 #ifdef ASSERT
 4574   {
 4575     Label done;
 4576     cmpptr(inline_klass, 0);
 4577     jcc(Assembler::notEqual, done);
 4578     stop("get_inline_type_field_klass contains no inline klass");
 4579     bind(done);
 4580   }
 4581 #endif
 4582   movptr(inline_klass, Address(inline_klass, index, Address::times_ptr, Array<InlineKlass*>::base_offset_in_bytes()));
 4583 }
 4584 
 4585 void MacroAssembler::get_default_value_oop(Register inline_klass, Register temp_reg, Register obj) {
 4586 #ifdef ASSERT
 4587   {
 4588     Label done_check;
 4589     test_klass_is_inline_type(inline_klass, temp_reg, done_check);
 4590     stop("get_default_value_oop from non inline type klass");
 4591     bind(done_check);
 4592   }
 4593 #endif
 4594   Register offset = temp_reg;
 4595   // Getting the offset of the pre-allocated default value
 4596   movptr(offset, Address(inline_klass, in_bytes(InstanceKlass::adr_inlineklass_fixed_block_offset())));
 4597   movl(offset, Address(offset, in_bytes(InlineKlass::default_value_offset_offset())));
 4598 
 4599   // Getting the mirror
 4600   movptr(obj, Address(inline_klass, in_bytes(Klass::java_mirror_offset())));
 4601   resolve_oop_handle(obj, inline_klass);
 4602 
 4603   // Getting the pre-allocated default value from the mirror
 4604   Address field(obj, offset, Address::times_1);
 4605   load_heap_oop(obj, field);
 4606 }
 4607 
 4608 void MacroAssembler::get_empty_inline_type_oop(Register inline_klass, Register temp_reg, Register obj) {
 4609 #ifdef ASSERT
 4610   {
 4611     Label done_check;
 4612     test_klass_is_empty_inline_type(inline_klass, temp_reg, done_check);
 4613     stop("get_empty_value from non-empty inline klass");
 4614     bind(done_check);
 4615   }
 4616 #endif
 4617   get_default_value_oop(inline_klass, temp_reg, obj);
 4618 }
 4619 
 4620 
 4621 // Look up the method for a megamorphic invokeinterface call.
 4622 // The target method is determined by <intf_klass, itable_index>.
 4623 // The receiver klass is in recv_klass.
 4624 // On success, the result will be in method_result, and execution falls through.
 4625 // On failure, execution transfers to the given label.
 4626 void MacroAssembler::lookup_interface_method(Register recv_klass,
 4627                                              Register intf_klass,
 4628                                              RegisterOrConstant itable_index,
 4629                                              Register method_result,
 4630                                              Register scan_temp,
 4631                                              Label& L_no_such_interface,
 4632                                              bool return_method) {
 4633   assert_different_registers(recv_klass, intf_klass, scan_temp);
 4634   assert_different_registers(method_result, intf_klass, scan_temp);
 4635   assert(recv_klass != method_result || !return_method,
 4636          "recv_klass can be destroyed when method isn't needed");
 4637 
 4638   assert(itable_index.is_constant() || itable_index.as_register() == method_result,
 4639          "caller must use same register for non-constant itable index as for method");
 4640 

 5068   } else {
 5069     Label L;
 5070     jccb(negate_condition(cc), L);
 5071     movl(dst, src);
 5072     bind(L);
 5073   }
 5074 }
 5075 
 5076 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
 5077   if (VM_Version::supports_cmov()) {
 5078     cmovl(cc, dst, src);
 5079   } else {
 5080     Label L;
 5081     jccb(negate_condition(cc), L);
 5082     movl(dst, src);
 5083     bind(L);
 5084   }
 5085 }
 5086 
 5087 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
 5088   if (!VerifyOops || VerifyAdapterSharing) {
 5089     // Below address of the code string confuses VerifyAdapterSharing
 5090     // because it may differ between otherwise equivalent adapters.
 5091     return;
 5092   }
 5093 
 5094   BLOCK_COMMENT("verify_oop {");
 5095 #ifdef _LP64
 5096   push(rscratch1);
 5097 #endif
 5098   push(rax);                          // save rax
 5099   push(reg);                          // pass register argument
 5100 
 5101   // Pass register number to verify_oop_subroutine
 5102   const char* b = nullptr;
 5103   {
 5104     ResourceMark rm;
 5105     stringStream ss;
 5106     ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
 5107     b = code_string(ss.as_string());
 5108   }
 5109   ExternalAddress buffer((address) b);
 5110   pushptr(buffer.addr(), rscratch1);
 5111 
 5112   // call indirectly to solve generation ordering problem

 5134   // cf. TemplateTable::prepare_invoke(), if (load_receiver).
 5135   int stackElementSize = Interpreter::stackElementSize;
 5136   int offset = Interpreter::expr_offset_in_bytes(extra_slot_offset+0);
 5137 #ifdef ASSERT
 5138   int offset1 = Interpreter::expr_offset_in_bytes(extra_slot_offset+1);
 5139   assert(offset1 - offset == stackElementSize, "correct arithmetic");
 5140 #endif
 5141   Register             scale_reg    = noreg;
 5142   Address::ScaleFactor scale_factor = Address::no_scale;
 5143   if (arg_slot.is_constant()) {
 5144     offset += arg_slot.as_constant() * stackElementSize;
 5145   } else {
 5146     scale_reg    = arg_slot.as_register();
 5147     scale_factor = Address::times(stackElementSize);
 5148   }
 5149   offset += wordSize;           // return PC is on stack
 5150   return Address(rsp, scale_reg, scale_factor, offset);
 5151 }
 5152 
 5153 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
 5154   if (!VerifyOops || VerifyAdapterSharing) {
 5155     // Below address of the code string confuses VerifyAdapterSharing
 5156     // because it may differ between otherwise equivalent adapters.
 5157     return;
 5158   }
 5159 
 5160 #ifdef _LP64
 5161   push(rscratch1);
 5162 #endif
 5163   push(rax); // save rax,
 5164   // addr may contain rsp so we will have to adjust it based on the push
 5165   // we just did (and on 64 bit we do two pushes)
 5166   // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
 5167   // stores rax into addr which is backwards of what was intended.
 5168   if (addr.uses(rsp)) {
 5169     lea(rax, addr);
 5170     pushptr(Address(rax, LP64_ONLY(2 *) BytesPerWord));
 5171   } else {
 5172     pushptr(addr);
 5173   }
 5174 
 5175   // Pass register number to verify_oop_subroutine
 5176   const char* b = nullptr;
 5177   {
 5178     ResourceMark rm;

 5625 
 5626 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
 5627   // get mirror
 5628   const int mirror_offset = in_bytes(Klass::java_mirror_offset());
 5629   load_method_holder(mirror, method);
 5630   movptr(mirror, Address(mirror, mirror_offset));
 5631   resolve_oop_handle(mirror, tmp);
 5632 }
 5633 
 5634 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
 5635   load_method_holder(rresult, rmethod);
 5636   movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
 5637 }
 5638 
 5639 void MacroAssembler::load_method_holder(Register holder, Register method) {
 5640   movptr(holder, Address(method, Method::const_offset()));                      // ConstMethod*
 5641   movptr(holder, Address(holder, ConstMethod::constants_offset()));             // ConstantPool*
 5642   movptr(holder, Address(holder, ConstantPool::pool_holder_offset()));          // InstanceKlass*
 5643 }
 5644 
 5645 void MacroAssembler::load_metadata(Register dst, Register src) {
 5646   if (UseCompressedClassPointers) {
 5647     movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 5648   } else {
 5649     movptr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 5650   }
 5651 }
 5652 
 5653 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
 5654   assert_different_registers(src, tmp);
 5655   assert_different_registers(dst, tmp);
 5656 #ifdef _LP64
 5657   if (UseCompressedClassPointers) {
 5658     movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 5659     decode_klass_not_null(dst, tmp);
 5660   } else
 5661 #endif
 5662   movptr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 5663 }
 5664 
 5665 void MacroAssembler::load_prototype_header(Register dst, Register src, Register tmp) {
 5666   load_klass(dst, src, tmp);
 5667   movptr(dst, Address(dst, Klass::prototype_header_offset()));
 5668 }
 5669 
 5670 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
 5671   assert_different_registers(src, tmp);
 5672   assert_different_registers(dst, tmp);
 5673 #ifdef _LP64
 5674   if (UseCompressedClassPointers) {
 5675     encode_klass_not_null(src, tmp);
 5676     movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
 5677   } else
 5678 #endif
 5679     movptr(Address(dst, oopDesc::klass_offset_in_bytes()), src);
 5680 }
 5681 
 5682 void MacroAssembler::access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
 5683                                     Register tmp1, Register thread_tmp) {
 5684   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 5685   decorators = AccessInternal::decorator_fixup(decorators, type);
 5686   bool as_raw = (decorators & AS_RAW) != 0;
 5687   if (as_raw) {
 5688     bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, thread_tmp);
 5689   } else {
 5690     bs->load_at(this, decorators, type, dst, src, tmp1, thread_tmp);
 5691   }
 5692 }
 5693 
 5694 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
 5695                                      Register tmp1, Register tmp2, Register tmp3) {
 5696   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 5697   decorators = AccessInternal::decorator_fixup(decorators, type);
 5698   bool as_raw = (decorators & AS_RAW) != 0;
 5699   if (as_raw) {
 5700     bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
 5701   } else {
 5702     bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
 5703   }
 5704 }
 5705 
 5706 void MacroAssembler::access_value_copy(DecoratorSet decorators, Register src, Register dst,
 5707                                        Register inline_klass) {
 5708   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 5709   bs->value_copy(this, decorators, src, dst, inline_klass);
 5710 }
 5711 
 5712 void MacroAssembler::first_field_offset(Register inline_klass, Register offset) {
 5713   movptr(offset, Address(inline_klass, InstanceKlass::adr_inlineklass_fixed_block_offset()));
 5714   movl(offset, Address(offset, InlineKlass::first_field_offset_offset()));
 5715 }
 5716 
 5717 void MacroAssembler::data_for_oop(Register oop, Register data, Register inline_klass) {
 5718   // ((address) (void*) o) + vk->first_field_offset();
 5719   Register offset = (data == oop) ? rscratch1 : data;
 5720   first_field_offset(inline_klass, offset);
 5721   if (data == oop) {
 5722     addptr(data, offset);
 5723   } else {
 5724     lea(data, Address(oop, offset));
 5725   }
 5726 }
 5727 
 5728 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
 5729                                                 Register index, Register data) {
 5730   assert(index != rcx, "index needs to shift by rcx");
 5731   assert_different_registers(array, array_klass, index);
 5732   assert_different_registers(rcx, array, index);
 5733 
 5734   // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
 5735   movl(rcx, Address(array_klass, Klass::layout_helper_offset()));
 5736 
 5737   // Klass::layout_helper_log2_element_size(lh)
 5738   // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
 5739   shrl(rcx, Klass::_lh_log2_element_size_shift);
 5740   andl(rcx, Klass::_lh_log2_element_size_mask);
 5741   shlptr(index); // index << rcx
 5742 
 5743   lea(data, Address(array, index, Address::times_1, arrayOopDesc::base_offset_in_bytes(T_PRIMITIVE_OBJECT)));
 5744 }
 5745 
 5746 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
 5747                                    Register thread_tmp, DecoratorSet decorators) {
 5748   access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, thread_tmp);
 5749 }
 5750 
 5751 // Doesn't do verification, generates fixed size code
 5752 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
 5753                                             Register thread_tmp, DecoratorSet decorators) {
 5754   access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, thread_tmp);
 5755 }
 5756 
 5757 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
 5758                                     Register tmp2, Register tmp3, DecoratorSet decorators) {
 5759   access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
 5760 }
 5761 
 5762 // Used for storing nulls.
 5763 void MacroAssembler::store_heap_oop_null(Address dst) {
 5764   access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
 5765 }

 6065 
 6066 void MacroAssembler::reinit_heapbase() {
 6067   if (UseCompressedOops) {
 6068     if (Universe::heap() != nullptr) {
 6069       if (CompressedOops::base() == nullptr) {
 6070         MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
 6071       } else {
 6072         mov64(r12_heapbase, (int64_t)CompressedOops::ptrs_base());
 6073       }
 6074     } else {
 6075       movptr(r12_heapbase, ExternalAddress(CompressedOops::ptrs_base_addr()));
 6076     }
 6077   }
 6078 }
 6079 
 6080 #endif // _LP64
 6081 
 6082 #if COMPILER2_OR_JVMCI
 6083 
 6084 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
 6085 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp, KRegister mask) {
 6086   // cnt - number of qwords (8-byte words).
 6087   // base - start address, qword aligned.
 6088   Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
 6089   bool use64byteVector = (MaxVectorSize == 64) && (VM_Version::avx3_threshold() == 0);
 6090   if (use64byteVector) {
 6091     evpbroadcastq(xtmp, val, AVX_512bit);
 6092   } else if (MaxVectorSize >= 32) {
 6093     movdq(xtmp, val);
 6094     punpcklqdq(xtmp, xtmp);
 6095     vinserti128_high(xtmp, xtmp);
 6096   } else {
 6097     movdq(xtmp, val);
 6098     punpcklqdq(xtmp, xtmp);
 6099   }
 6100   jmp(L_zero_64_bytes);
 6101 
 6102   BIND(L_loop);
 6103   if (MaxVectorSize >= 32) {
 6104     fill64(base, 0, xtmp, use64byteVector);
 6105   } else {
 6106     movdqu(Address(base,  0), xtmp);
 6107     movdqu(Address(base, 16), xtmp);
 6108     movdqu(Address(base, 32), xtmp);
 6109     movdqu(Address(base, 48), xtmp);
 6110   }
 6111   addptr(base, 64);
 6112 
 6113   BIND(L_zero_64_bytes);
 6114   subptr(cnt, 8);
 6115   jccb(Assembler::greaterEqual, L_loop);
 6116 
 6117   // Copy trailing 64 bytes
 6118   if (use64byteVector) {
 6119     addptr(cnt, 8);
 6120     jccb(Assembler::equal, L_end);
 6121     fill64_masked(3, base, 0, xtmp, mask, cnt, val, true);
 6122     jmp(L_end);
 6123   } else {
 6124     addptr(cnt, 4);
 6125     jccb(Assembler::less, L_tail);
 6126     if (MaxVectorSize >= 32) {
 6127       vmovdqu(Address(base, 0), xtmp);
 6128     } else {
 6129       movdqu(Address(base,  0), xtmp);
 6130       movdqu(Address(base, 16), xtmp);
 6131     }
 6132   }
 6133   addptr(base, 32);
 6134   subptr(cnt, 4);
 6135 
 6136   BIND(L_tail);
 6137   addptr(cnt, 4);
 6138   jccb(Assembler::lessEqual, L_end);
 6139   if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
 6140     fill32_masked(3, base, 0, xtmp, mask, cnt, val);
 6141   } else {
 6142     decrement(cnt);
 6143 
 6144     BIND(L_sloop);
 6145     movq(Address(base, 0), xtmp);
 6146     addptr(base, 8);
 6147     decrement(cnt);
 6148     jccb(Assembler::greaterEqual, L_sloop);
 6149   }
 6150   BIND(L_end);
 6151 }
 6152 
 6153 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
 6154   assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
 6155   // An inline type might be returned. If fields are in registers we
 6156   // need to allocate an inline type instance and initialize it with
 6157   // the value of the fields.
 6158   Label skip;
 6159   // We only need a new buffered inline type if a new one is not returned
 6160   testptr(rax, 1);
 6161   jcc(Assembler::zero, skip);
 6162   int call_offset = -1;
 6163 
 6164 #ifdef _LP64
 6165   // The following code is similar to allocate_instance but has some slight differences,
 6166   // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
 6167   // allocating is not necessary if vk != nullptr, etc. allocate_instance is not aware of these.
 6168   Label slow_case;
 6169   // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
 6170   mov(rscratch1, rax); // save rax for slow_case since *_allocate may corrupt it when allocation failed
 6171   if (vk != nullptr) {
 6172     // Called from C1, where the return type is statically known.
 6173     movptr(rbx, (intptr_t)vk->get_InlineKlass());
 6174     jint obj_size = vk->layout_helper();
 6175     assert(obj_size != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
 6176     if (UseTLAB) {
 6177       tlab_allocate(r15_thread, rax, noreg, obj_size, r13, r14, slow_case);
 6178     } else {
 6179       jmp(slow_case);
 6180     }
 6181   } else {
 6182     // Call from interpreter. RAX contains ((the InlineKlass* of the return type) | 0x01)
 6183     mov(rbx, rax);
 6184     andptr(rbx, -2);
 6185     movl(r14, Address(rbx, Klass::layout_helper_offset()));
 6186     if (UseTLAB) {
 6187       tlab_allocate(r15_thread, rax, r14, 0, r13, r14, slow_case);
 6188     } else {
 6189       jmp(slow_case);
 6190     }
 6191   }
 6192   if (UseTLAB) {
 6193     // 2. Initialize buffered inline instance header
 6194     Register buffer_obj = rax;
 6195     movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes()), (intptr_t)markWord::inline_type_prototype().value());
 6196     xorl(r13, r13);
 6197     store_klass_gap(buffer_obj, r13);
 6198     if (vk == nullptr) {
 6199       // store_klass corrupts rbx(klass), so save it in r13 for later use (interpreter case only).
 6200       mov(r13, rbx);
 6201     }
 6202     store_klass(buffer_obj, rbx, rscratch1);
 6203     // 3. Initialize its fields with an inline class specific handler
 6204     if (vk != nullptr) {
 6205       call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
 6206     } else {
 6207       movptr(rbx, Address(r13, InstanceKlass::adr_inlineklass_fixed_block_offset()));
 6208       movptr(rbx, Address(rbx, InlineKlass::pack_handler_offset()));
 6209       call(rbx);
 6210     }
 6211     jmp(skip);
 6212   }
 6213   bind(slow_case);
 6214   // We failed to allocate a new inline type, fall back to a runtime
 6215   // call. Some oop field may be live in some registers but we can't
 6216   // tell. That runtime call will take care of preserving them
 6217   // across a GC if there's one.
 6218   mov(rax, rscratch1);
 6219 #endif
 6220 
 6221   if (from_interpreter) {
 6222     super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
 6223   } else {
 6224     call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
 6225     call_offset = offset();
 6226   }
 6227 
 6228   bind(skip);
 6229   return call_offset;
 6230 }
 6231 
 6232 // Move a value between registers/stack slots and update the reg_state
 6233 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
 6234   assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
 6235   if (reg_state[to->value()] == reg_written) {
 6236     return true; // Already written
 6237   }
 6238   if (from != to && bt != T_VOID) {
 6239     if (reg_state[to->value()] == reg_readonly) {
 6240       return false; // Not yet writable
 6241     }
 6242     if (from->is_reg()) {
 6243       if (to->is_reg()) {
 6244         if (from->is_XMMRegister()) {
 6245           if (bt == T_DOUBLE) {
 6246             movdbl(to->as_XMMRegister(), from->as_XMMRegister());
 6247           } else {
 6248             assert(bt == T_FLOAT, "must be float");
 6249             movflt(to->as_XMMRegister(), from->as_XMMRegister());
 6250           }
 6251         } else {
 6252           movq(to->as_Register(), from->as_Register());
 6253         }
 6254       } else {
 6255         int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6256         Address to_addr = Address(rsp, st_off);
 6257         if (from->is_XMMRegister()) {
 6258           if (bt == T_DOUBLE) {
 6259             movdbl(to_addr, from->as_XMMRegister());
 6260           } else {
 6261             assert(bt == T_FLOAT, "must be float");
 6262             movflt(to_addr, from->as_XMMRegister());
 6263           }
 6264         } else {
 6265           movq(to_addr, from->as_Register());
 6266         }
 6267       }
 6268     } else {
 6269       Address from_addr = Address(rsp, from->reg2stack() * VMRegImpl::stack_slot_size + wordSize);
 6270       if (to->is_reg()) {
 6271         if (to->is_XMMRegister()) {
 6272           if (bt == T_DOUBLE) {
 6273             movdbl(to->as_XMMRegister(), from_addr);
 6274           } else {
 6275             assert(bt == T_FLOAT, "must be float");
 6276             movflt(to->as_XMMRegister(), from_addr);
 6277           }
 6278         } else {
 6279           movq(to->as_Register(), from_addr);
 6280         }
 6281       } else {
 6282         int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6283         movq(r13, from_addr);
 6284         movq(Address(rsp, st_off), r13);
 6285       }
 6286     }
 6287   }
 6288   // Update register states
 6289   reg_state[from->value()] = reg_writable;
 6290   reg_state[to->value()] = reg_written;
 6291   return true;
 6292 }
 6293 
 6294 // Calculate the extra stack space required for packing or unpacking inline
 6295 // args and adjust the stack pointer
 6296 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
 6297   // Two additional slots to account for return address
 6298   int sp_inc = (args_on_stack + 2) * VMRegImpl::stack_slot_size;
 6299   sp_inc = align_up(sp_inc, StackAlignmentInBytes);
 6300   // Save the return address, adjust the stack (make sure it is properly
 6301   // 16-byte aligned) and copy the return address to the new top of the stack.
 6302   // The stack will be repaired on return (see MacroAssembler::remove_frame).
 6303   assert(sp_inc > 0, "sanity");
 6304   pop(r13);
 6305   subptr(rsp, sp_inc);
 6306   push(r13);
 6307   return sp_inc;
 6308 }
 6309 
 6310 // Read all fields from an inline type buffer and store the field values in registers/stack slots.
 6311 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
 6312                                           VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
 6313                                           RegState reg_state[]) {
 6314   assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
 6315   assert(from->is_valid(), "source must be valid");
 6316   bool progress = false;
 6317 #ifdef ASSERT
 6318   const int start_offset = offset();
 6319 #endif
 6320 
 6321   Label L_null, L_notNull;
 6322   // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
 6323   Register tmp1 = r10;
 6324   Register tmp2 = r13;
 6325   Register fromReg = noreg;
 6326   ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, -1);
 6327   bool done = true;
 6328   bool mark_done = true;
 6329   VMReg toReg;
 6330   BasicType bt;
 6331   // Check if argument requires a null check
 6332   bool null_check = false;
 6333   VMReg nullCheckReg;
 6334   while (stream.next(nullCheckReg, bt)) {
 6335     if (sig->at(stream.sig_index())._offset == -1) {
 6336       null_check = true;
 6337       break;
 6338     }
 6339   }
 6340   stream.reset(sig_index, to_index);
 6341   while (stream.next(toReg, bt)) {
 6342     assert(toReg->is_valid(), "destination must be valid");
 6343     int idx = (int)toReg->value();
 6344     if (reg_state[idx] == reg_readonly) {
 6345       if (idx != from->value()) {
 6346         mark_done = false;
 6347       }
 6348       done = false;
 6349       continue;
 6350     } else if (reg_state[idx] == reg_written) {
 6351       continue;
 6352     }
 6353     assert(reg_state[idx] == reg_writable, "must be writable");
 6354     reg_state[idx] = reg_written;
 6355     progress = true;
 6356 
 6357     if (fromReg == noreg) {
 6358       if (from->is_reg()) {
 6359         fromReg = from->as_Register();
 6360       } else {
 6361         int st_off = from->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6362         movq(tmp1, Address(rsp, st_off));
 6363         fromReg = tmp1;
 6364       }
 6365       if (null_check) {
 6366         // Nullable inline type argument, emit null check
 6367         testptr(fromReg, fromReg);
 6368         jcc(Assembler::zero, L_null);
 6369       }
 6370     }
 6371     int off = sig->at(stream.sig_index())._offset;
 6372     if (off == -1) {
 6373       assert(null_check, "Missing null check at");
 6374       if (toReg->is_stack()) {
 6375         int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6376         movq(Address(rsp, st_off), 1);
 6377       } else {
 6378         movq(toReg->as_Register(), 1);
 6379       }
 6380       continue;
 6381     }
 6382     assert(off > 0, "offset in object should be positive");
 6383     Address fromAddr = Address(fromReg, off);
 6384     if (!toReg->is_XMMRegister()) {
 6385       Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
 6386       if (is_reference_type(bt)) {
 6387         load_heap_oop(dst, fromAddr);
 6388       } else {
 6389         bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
 6390         load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
 6391       }
 6392       if (toReg->is_stack()) {
 6393         int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6394         movq(Address(rsp, st_off), dst);
 6395       }
 6396     } else if (bt == T_DOUBLE) {
 6397       movdbl(toReg->as_XMMRegister(), fromAddr);
 6398     } else {
 6399       assert(bt == T_FLOAT, "must be float");
 6400       movflt(toReg->as_XMMRegister(), fromAddr);
 6401     }
 6402   }
 6403   if (progress && null_check) {
 6404     if (done) {
 6405       jmp(L_notNull);
 6406       bind(L_null);
 6407       // Set IsInit field to zero to signal that the argument is null.
 6408       // Also set all oop fields to zero to make the GC happy.
 6409       stream.reset(sig_index, to_index);
 6410       while (stream.next(toReg, bt)) {
 6411         if (sig->at(stream.sig_index())._offset == -1 ||
 6412             bt == T_OBJECT || bt == T_ARRAY) {
 6413           if (toReg->is_stack()) {
 6414             int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6415             movq(Address(rsp, st_off), 0);
 6416           } else {
 6417             xorq(toReg->as_Register(), toReg->as_Register());
 6418           }
 6419         }
 6420       }
 6421       bind(L_notNull);
 6422     } else {
 6423       bind(L_null);
 6424     }
 6425   }
 6426 
 6427   sig_index = stream.sig_index();
 6428   to_index = stream.regs_index();
 6429 
 6430   if (mark_done && reg_state[from->value()] != reg_written) {
 6431     // This is okay because no one else will write to that slot
 6432     reg_state[from->value()] = reg_writable;
 6433   }
 6434   from_index--;
 6435   assert(progress || (start_offset == offset()), "should not emit code");
 6436   return done;
 6437 }
 6438 
 6439 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
 6440                                         VMRegPair* from, int from_count, int& from_index, VMReg to,
 6441                                         RegState reg_state[], Register val_array) {
 6442   assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
 6443   assert(to->is_valid(), "destination must be valid");
 6444 
 6445   if (reg_state[to->value()] == reg_written) {
 6446     skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
 6447     return true; // Already written
 6448   }
 6449 
 6450   // TODO 8284443 Isn't it an issue if below code uses r14 as tmp when it contains a spilled value?
 6451   // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
 6452   Register val_obj_tmp = r11;
 6453   Register from_reg_tmp = r14;
 6454   Register tmp1 = r10;
 6455   Register tmp2 = r13;
 6456   Register tmp3 = rbx;
 6457   Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
 6458 
 6459   assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
 6460 
 6461   if (reg_state[to->value()] == reg_readonly) {
 6462     if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
 6463       skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
 6464       return false; // Not yet writable
 6465     }
 6466     val_obj = val_obj_tmp;
 6467   }
 6468 
 6469   int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
 6470   load_heap_oop(val_obj, Address(val_array, index));
 6471 
 6472   ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
 6473   VMReg fromReg;
 6474   BasicType bt;
 6475   Label L_null;
 6476   while (stream.next(fromReg, bt)) {
 6477     assert(fromReg->is_valid(), "source must be valid");
 6478     reg_state[fromReg->value()] = reg_writable;
 6479 
 6480     int off = sig->at(stream.sig_index())._offset;
 6481     if (off == -1) {
 6482       // Nullable inline type argument, emit null check
 6483       Label L_notNull;
 6484       if (fromReg->is_stack()) {
 6485         int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6486         testb(Address(rsp, ld_off), 1);
 6487       } else {
 6488         testb(fromReg->as_Register(), 1);
 6489       }
 6490       jcc(Assembler::notZero, L_notNull);
 6491       movptr(val_obj, 0);
 6492       jmp(L_null);
 6493       bind(L_notNull);
 6494       continue;
 6495     }
 6496 
 6497     assert(off > 0, "offset in object should be positive");
 6498     size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
 6499 
 6500     Address dst(val_obj, off);
 6501     if (!fromReg->is_XMMRegister()) {
 6502       Register src;
 6503       if (fromReg->is_stack()) {
 6504         src = from_reg_tmp;
 6505         int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6506         load_sized_value(src, Address(rsp, ld_off), size_in_bytes, /* is_signed */ false);
 6507       } else {
 6508         src = fromReg->as_Register();
 6509       }
 6510       assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
 6511       if (is_reference_type(bt)) {
 6512         store_heap_oop(dst, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
 6513       } else {
 6514         store_sized_value(dst, src, size_in_bytes);
 6515       }
 6516     } else if (bt == T_DOUBLE) {
 6517       movdbl(dst, fromReg->as_XMMRegister());
 6518     } else {
 6519       assert(bt == T_FLOAT, "must be float");
 6520       movflt(dst, fromReg->as_XMMRegister());
 6521     }
 6522   }
 6523   bind(L_null);
 6524   sig_index = stream.sig_index();
 6525   from_index = stream.regs_index();
 6526 
 6527   assert(reg_state[to->value()] == reg_writable, "must have already been read");
 6528   bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
 6529   assert(success, "to register must be writeable");
 6530   return true;
 6531 }
 6532 
 6533 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
 6534   return reg->is_XMMRegister() ? xmm8->as_VMReg() : r14->as_VMReg();
 6535 }
 6536 
 6537 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
 6538   assert((initial_framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
 6539   if (needs_stack_repair) {
 6540     movq(rbp, Address(rsp, initial_framesize));
 6541     // The stack increment resides just below the saved rbp
 6542     addq(rsp, Address(rsp, initial_framesize - wordSize));
 6543   } else {
 6544     if (initial_framesize > 0) {
 6545       addq(rsp, initial_framesize);
 6546     }
 6547     pop(rbp);
 6548   }
 6549 }
 6550 
 6551 // Clearing constant sized memory using YMM/ZMM registers.
 6552 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
 6553   assert(UseAVX > 2 && VM_Version::supports_avx512vlbw(), "");
 6554   bool use64byteVector = (MaxVectorSize > 32) && (VM_Version::avx3_threshold() == 0);
 6555 
 6556   int vector64_count = (cnt & (~0x7)) >> 3;
 6557   cnt = cnt & 0x7;
 6558   const int fill64_per_loop = 4;
 6559   const int max_unrolled_fill64 = 8;
 6560 
 6561   // 64 byte initialization loop.
 6562   vpxor(xtmp, xtmp, xtmp, use64byteVector ? AVX_512bit : AVX_256bit);
 6563   int start64 = 0;
 6564   if (vector64_count > max_unrolled_fill64) {
 6565     Label LOOP;
 6566     Register index = rtmp;
 6567 
 6568     start64 = vector64_count - (vector64_count % fill64_per_loop);
 6569 
 6570     movl(index, 0);

 6620         break;
 6621       case 7:
 6622         if (use64byteVector) {
 6623           movl(rtmp, 0x7F);
 6624           kmovwl(mask, rtmp);
 6625           evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
 6626         } else {
 6627           evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
 6628           movl(rtmp, 0x7);
 6629           kmovwl(mask, rtmp);
 6630           evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
 6631         }
 6632         break;
 6633       default:
 6634         fatal("Unexpected length : %d\n",cnt);
 6635         break;
 6636     }
 6637   }
 6638 }
 6639 
 6640 void MacroAssembler::clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp,
 6641                                bool is_large, bool word_copy_only, KRegister mask) {
 6642   // cnt      - number of qwords (8-byte words).
 6643   // base     - start address, qword aligned.
 6644   // is_large - if optimizers know cnt is larger than InitArrayShortSize
 6645   assert(base==rdi, "base register must be edi for rep stos");
 6646   assert(val==rax,   "val register must be eax for rep stos");
 6647   assert(cnt==rcx,   "cnt register must be ecx for rep stos");
 6648   assert(InitArrayShortSize % BytesPerLong == 0,
 6649     "InitArrayShortSize should be the multiple of BytesPerLong");
 6650 
 6651   Label DONE;



 6652 
 6653   if (!is_large) {
 6654     Label LOOP, LONG;
 6655     cmpptr(cnt, InitArrayShortSize/BytesPerLong);
 6656     jccb(Assembler::greater, LONG);
 6657 
 6658     NOT_LP64(shlptr(cnt, 1);) // convert to number of 32-bit words for 32-bit VM
 6659 
 6660     decrement(cnt);
 6661     jccb(Assembler::negative, DONE); // Zero length
 6662 
 6663     // Use individual pointer-sized stores for small counts:
 6664     BIND(LOOP);
 6665     movptr(Address(base, cnt, Address::times_ptr), val);
 6666     decrement(cnt);
 6667     jccb(Assembler::greaterEqual, LOOP);
 6668     jmpb(DONE);
 6669 
 6670     BIND(LONG);
 6671   }
 6672 
 6673   // Use longer rep-prefixed ops for non-small counts:
 6674   if (UseFastStosb && !word_copy_only) {
 6675     shlptr(cnt, 3); // convert to number of bytes
 6676     rep_stosb();
 6677   } else if (UseXMMForObjInit) {
 6678     xmm_clear_mem(base, cnt, val, xtmp, mask);
 6679   } else {
 6680     NOT_LP64(shlptr(cnt, 1);) // convert to number of 32-bit words for 32-bit VM
 6681     rep_stos();
 6682   }
 6683 
 6684   BIND(DONE);
 6685 }
 6686 
 6687 #endif //COMPILER2_OR_JVMCI
 6688 
 6689 
 6690 void MacroAssembler::generate_fill(BasicType t, bool aligned,
 6691                                    Register to, Register value, Register count,
 6692                                    Register rtmp, XMMRegister xtmp) {
 6693   ShortBranchVerifier sbv(this);
 6694   assert_different_registers(to, value, count, rtmp);
 6695   Label L_exit;
 6696   Label L_fill_2_bytes, L_fill_4_bytes;
 6697 
 6698 #if defined(COMPILER2) && defined(_LP64)

10675 // hdr: the (pre-loaded) header of the object, must be rax
10676 // thread: the thread which attempts to lock obj
10677 // tmp: a temporary register
10678 void MacroAssembler::lightweight_lock(Register obj, Register hdr, Register thread, Register tmp, Label& slow) {
10679   assert(hdr == rax, "header must be in rax for cmpxchg");
10680   assert_different_registers(obj, hdr, thread, tmp);
10681 
10682   // First we need to check if the lock-stack has room for pushing the object reference.
10683   // Note: we subtract 1 from the end-offset so that we can do a 'greater' comparison, instead
10684   // of 'greaterEqual' below, which readily clears the ZF. This makes C2 code a little simpler and
10685   // avoids one branch.
10686   cmpl(Address(thread, JavaThread::lock_stack_top_offset()), LockStack::end_offset() - 1);
10687   jcc(Assembler::greater, slow);
10688 
10689   // Now we attempt to take the fast-lock.
10690   // Clear lock_mask bits (locked state).
10691   andptr(hdr, ~(int32_t)markWord::lock_mask_in_place);
10692   movptr(tmp, hdr);
10693   // Set unlocked_value bit.
10694   orptr(hdr, markWord::unlocked_value);
10695   if (EnableValhalla) {
10696     // Mask inline_type bit such that we go to the slow path if object is an inline type
10697     andptr(hdr, ~((int) markWord::inline_type_bit_in_place));
10698   }
10699   lock();
10700   cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
10701   jcc(Assembler::notEqual, slow);
10702 
10703   // If successful, push object to lock-stack.
10704   movl(tmp, Address(thread, JavaThread::lock_stack_top_offset()));
10705   movptr(Address(thread, tmp), obj);
10706   incrementl(tmp, oopSize);
10707   movl(Address(thread, JavaThread::lock_stack_top_offset()), tmp);
10708 }
10709 
10710 // Implements lightweight-unlocking.
10711 // Branches to slow upon failure, with ZF cleared.
10712 // Falls through upon success, with unspecified ZF.
10713 //
10714 // obj: the object to be unlocked
10715 // hdr: the (pre-loaded) header of the object, must be rax
10716 // tmp: a temporary register
10717 void MacroAssembler::lightweight_unlock(Register obj, Register hdr, Register tmp, Label& slow) {
10718   assert(hdr == rax, "header must be in rax for cmpxchg");
< prev index next >