11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/assembler.hpp"
26 #include "asm/assembler.inline.hpp"
27 #include "code/aotCodeCache.hpp"
28 #include "code/compiledIC.hpp"
29 #include "compiler/compiler_globals.hpp"
30 #include "compiler/disassembler.hpp"
31 #include "crc32c.h"
32 #include "gc/shared/barrierSet.hpp"
33 #include "gc/shared/barrierSetAssembler.hpp"
34 #include "gc/shared/collectedHeap.inline.hpp"
35 #include "gc/shared/tlab_globals.hpp"
36 #include "interpreter/bytecodeHistogram.hpp"
37 #include "interpreter/interpreter.hpp"
38 #include "interpreter/interpreterRuntime.hpp"
39 #include "jvm.h"
40 #include "memory/resourceArea.hpp"
41 #include "memory/universe.hpp"
42 #include "oops/accessDecorators.hpp"
43 #include "oops/compressedKlass.inline.hpp"
44 #include "oops/compressedOops.inline.hpp"
45 #include "oops/klass.inline.hpp"
46 #include "prims/methodHandles.hpp"
47 #include "runtime/continuation.hpp"
48 #include "runtime/interfaceSupport.inline.hpp"
49 #include "runtime/javaThread.hpp"
50 #include "runtime/jniHandles.hpp"
51 #include "runtime/objectMonitor.hpp"
52 #include "runtime/os.hpp"
53 #include "runtime/safepoint.hpp"
54 #include "runtime/safepointMechanism.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/checkedCast.hpp"
58 #include "utilities/globalDefinitions.hpp"
59 #include "utilities/macros.hpp"
60
61 #ifdef PRODUCT
62 #define BLOCK_COMMENT(str) /* nothing */
63 #define STOP(error) stop(error)
64 #else
65 #define BLOCK_COMMENT(str) block_comment(str)
66 #define STOP(error) block_comment(error); stop(error)
67 #endif
68
69 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
70
71 #ifdef ASSERT
72 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
73 #endif
74
75 static const Assembler::Condition reverse[] = {
76 Assembler::noOverflow /* overflow = 0x0 */ ,
77 Assembler::overflow /* noOverflow = 0x1 */ ,
78 Assembler::aboveEqual /* carrySet = 0x2, below = 0x2 */ ,
79 Assembler::below /* aboveEqual = 0x3, carryClear = 0x3 */ ,
1285 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1286 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1287 assert_different_registers(arg_1, c_rarg2);
1288 pass_arg2(this, arg_2);
1289 pass_arg1(this, arg_1);
1290 pass_arg0(this, arg_0);
1291 call_VM_leaf(entry_point, 3);
1292 }
1293
1294 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
1295 assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
1296 assert_different_registers(arg_1, c_rarg2, c_rarg3);
1297 assert_different_registers(arg_2, c_rarg3);
1298 pass_arg3(this, arg_3);
1299 pass_arg2(this, arg_2);
1300 pass_arg1(this, arg_1);
1301 pass_arg0(this, arg_0);
1302 call_VM_leaf(entry_point, 3);
1303 }
1304
1305 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
1306 pass_arg0(this, arg_0);
1307 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1308 }
1309
1310 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
1311 assert_different_registers(arg_0, c_rarg1);
1312 pass_arg1(this, arg_1);
1313 pass_arg0(this, arg_0);
1314 MacroAssembler::call_VM_leaf_base(entry_point, 2);
1315 }
1316
1317 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1318 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1319 assert_different_registers(arg_1, c_rarg2);
1320 pass_arg2(this, arg_2);
1321 pass_arg1(this, arg_1);
1322 pass_arg0(this, arg_0);
1323 MacroAssembler::call_VM_leaf_base(entry_point, 3);
1324 }
2356 lea(rscratch, src);
2357 Assembler::mulss(dst, Address(rscratch, 0));
2358 }
2359 }
2360
2361 void MacroAssembler::null_check(Register reg, int offset) {
2362 if (needs_explicit_null_check(offset)) {
2363 // provoke OS null exception if reg is null by
2364 // accessing M[reg] w/o changing any (non-CC) registers
2365 // NOTE: cmpl is plenty here to provoke a segv
2366 cmpptr(rax, Address(reg, 0));
2367 // Note: should probably use testl(rax, Address(reg, 0));
2368 // may be shorter code (however, this version of
2369 // testl needs to be implemented first)
2370 } else {
2371 // nothing to do, (later) access of M[reg + offset]
2372 // will provoke OS null exception if reg is null
2373 }
2374 }
2375
2376 void MacroAssembler::os_breakpoint() {
2377 // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
2378 // (e.g., MSVC can't call ps() otherwise)
2379 call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
2380 }
2381
2382 void MacroAssembler::unimplemented(const char* what) {
2383 const char* buf = nullptr;
2384 {
2385 ResourceMark rm;
2386 stringStream ss;
2387 ss.print("unimplemented: %s", what);
2388 buf = code_string(ss.as_string());
2389 }
2390 stop(buf);
2391 }
2392
2393 #define XSTATE_BV 0x200
2394
2395 void MacroAssembler::pop_CPU_state() {
3696 xorptr(temp, temp); // use _zero reg to clear memory (shorter code)
3697 if (UseIncDec) {
3698 shrptr(index, 3); // divide by 8/16 and set carry flag if bit 2 was set
3699 } else {
3700 shrptr(index, 2); // use 2 instructions to avoid partial flag stall
3701 shrptr(index, 1);
3702 }
3703
3704 // initialize remaining object fields: index is a multiple of 2 now
3705 {
3706 Label loop;
3707 bind(loop);
3708 movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
3709 decrement(index);
3710 jcc(Assembler::notZero, loop);
3711 }
3712
3713 bind(done);
3714 }
3715
3716 // Look up the method for a megamorphic invokeinterface call.
3717 // The target method is determined by <intf_klass, itable_index>.
3718 // The receiver klass is in recv_klass.
3719 // On success, the result will be in method_result, and execution falls through.
3720 // On failure, execution transfers to the given label.
3721 void MacroAssembler::lookup_interface_method(Register recv_klass,
3722 Register intf_klass,
3723 RegisterOrConstant itable_index,
3724 Register method_result,
3725 Register scan_temp,
3726 Label& L_no_such_interface,
3727 bool return_method) {
3728 assert_different_registers(recv_klass, intf_klass, scan_temp);
3729 assert_different_registers(method_result, intf_klass, scan_temp);
3730 assert(recv_klass != method_result || !return_method,
3731 "recv_klass can be destroyed when method isn't needed");
3732
3733 assert(itable_index.is_constant() || itable_index.as_register() == method_result,
3734 "caller must use same register for non-constant itable index as for method");
3735
4746 } else {
4747 Label L;
4748 jccb(negate_condition(cc), L);
4749 movl(dst, src);
4750 bind(L);
4751 }
4752 }
4753
4754 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
4755 if (VM_Version::supports_cmov()) {
4756 cmovl(cc, dst, src);
4757 } else {
4758 Label L;
4759 jccb(negate_condition(cc), L);
4760 movl(dst, src);
4761 bind(L);
4762 }
4763 }
4764
4765 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
4766 if (!VerifyOops) return;
4767
4768 BLOCK_COMMENT("verify_oop {");
4769 push(rscratch1);
4770 push(rax); // save rax
4771 push(reg); // pass register argument
4772
4773 // Pass register number to verify_oop_subroutine
4774 const char* b = nullptr;
4775 {
4776 ResourceMark rm;
4777 stringStream ss;
4778 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
4779 b = code_string(ss.as_string());
4780 }
4781 AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
4782 pushptr(buffer.addr(), rscratch1);
4783
4784 // call indirectly to solve generation ordering problem
4785 movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
4786 call(rax);
5002 // or something else. Since this is a slow path, we can optimize for code density,
5003 // and just restart the search from the beginning.
5004 jmpb(L_restart);
5005
5006 // Counter updates:
5007
5008 // Increment polymorphic counter instead of receiver slot.
5009 bind(L_polymorphic);
5010 movptr(offset, poly_count_offset);
5011 jmpb(L_count_update);
5012
5013 // Found a receiver, convert its slot offset to corresponding count offset.
5014 bind(L_found_recv);
5015 addptr(offset, receiver_to_count_step);
5016
5017 bind(L_count_update);
5018 addptr(Address(mdp, offset, Address::times_ptr), DataLayout::counter_increment);
5019 }
5020
5021 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
5022 if (!VerifyOops) return;
5023
5024 push(rscratch1);
5025 push(rax); // save rax,
5026 // addr may contain rsp so we will have to adjust it based on the push
5027 // we just did (and on 64 bit we do two pushes)
5028 // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
5029 // stores rax into addr which is backwards of what was intended.
5030 if (addr.uses(rsp)) {
5031 lea(rax, addr);
5032 pushptr(Address(rax, 2 * BytesPerWord));
5033 } else {
5034 pushptr(addr);
5035 }
5036
5037 // Pass register number to verify_oop_subroutine
5038 const char* b = nullptr;
5039 {
5040 ResourceMark rm;
5041 stringStream ss;
5042 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
5396
5397 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
5398 // get mirror
5399 const int mirror_offset = in_bytes(Klass::java_mirror_offset());
5400 load_method_holder(mirror, method);
5401 movptr(mirror, Address(mirror, mirror_offset));
5402 resolve_oop_handle(mirror, tmp);
5403 }
5404
5405 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5406 load_method_holder(rresult, rmethod);
5407 movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5408 }
5409
5410 void MacroAssembler::load_method_holder(Register holder, Register method) {
5411 movptr(holder, Address(method, Method::const_offset())); // ConstMethod*
5412 movptr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5413 movptr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5414 }
5415
5416 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5417 assert(UseCompactObjectHeaders, "expect compact object headers");
5418 movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5419 shrq(dst, markWord::klass_shift);
5420 }
5421
5422 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
5423 assert_different_registers(src, tmp);
5424 assert_different_registers(dst, tmp);
5425
5426 if (UseCompactObjectHeaders) {
5427 load_narrow_klass_compact(dst, src);
5428 decode_klass_not_null(dst, tmp);
5429 } else {
5430 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5431 decode_klass_not_null(dst, tmp);
5432 }
5433 }
5434
5435 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
5436 assert(!UseCompactObjectHeaders, "not with compact headers");
5437 assert_different_registers(src, tmp);
5438 assert_different_registers(dst, tmp);
5439 encode_klass_not_null(src, tmp);
5440 movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5441 }
5442
5443 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
5444 if (UseCompactObjectHeaders) {
5445 assert(tmp != noreg, "need tmp");
5446 assert_different_registers(klass, obj, tmp);
5447 load_narrow_klass_compact(tmp, obj);
5448 cmpl(klass, tmp);
5449 } else {
5450 cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
5451 }
5452 }
5453
5454 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5471 bool as_raw = (decorators & AS_RAW) != 0;
5472 if (as_raw) {
5473 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
5474 } else {
5475 bs->load_at(this, decorators, type, dst, src, tmp1);
5476 }
5477 }
5478
5479 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
5480 Register tmp1, Register tmp2, Register tmp3) {
5481 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5482 decorators = AccessInternal::decorator_fixup(decorators, type);
5483 bool as_raw = (decorators & AS_RAW) != 0;
5484 if (as_raw) {
5485 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5486 } else {
5487 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5488 }
5489 }
5490
5491 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5492 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
5493 }
5494
5495 // Doesn't do verification, generates fixed size code
5496 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5497 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
5498 }
5499
5500 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5501 Register tmp2, Register tmp3, DecoratorSet decorators) {
5502 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5503 }
5504
5505 // Used for storing nulls.
5506 void MacroAssembler::store_heap_oop_null(Address dst) {
5507 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5508 }
5509
5510 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5833 assert (oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5834 int klass_index = oop_recorder()->find_index(k);
5835 RelocationHolder rspec = metadata_Relocation::spec(klass_index);
5836 Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
5837 }
5838
5839 void MacroAssembler::reinit_heapbase() {
5840 if (UseCompressedOops) {
5841 if (Universe::heap() != nullptr && !AOTCodeCache::is_on_for_dump()) {
5842 if (CompressedOops::base() == nullptr) {
5843 MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
5844 } else {
5845 mov64(r12_heapbase, (int64_t)CompressedOops::base());
5846 }
5847 } else {
5848 movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
5849 }
5850 }
5851 }
5852
5853 #if COMPILER2_OR_JVMCI
5854
5855 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
5856 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
5857 // cnt - number of qwords (8-byte words).
5858 // base - start address, qword aligned.
5859 Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
5860 bool use64byteVector = (MaxVectorSize == 64) && (CopyAVX3Threshold == 0);
5861 if (use64byteVector) {
5862 vpxor(xtmp, xtmp, xtmp, AVX_512bit);
5863 } else if (MaxVectorSize >= 32) {
5864 vpxor(xtmp, xtmp, xtmp, AVX_256bit);
5865 } else {
5866 pxor(xtmp, xtmp);
5867 }
5868 jmp(L_zero_64_bytes);
5869
5870 BIND(L_loop);
5871 if (MaxVectorSize >= 32) {
5872 fill64(base, 0, xtmp, use64byteVector);
5873 } else {
5874 movdqu(Address(base, 0), xtmp);
5875 movdqu(Address(base, 16), xtmp);
5876 movdqu(Address(base, 32), xtmp);
5877 movdqu(Address(base, 48), xtmp);
5878 }
5879 addptr(base, 64);
5880
5881 BIND(L_zero_64_bytes);
5882 subptr(cnt, 8);
5883 jccb(Assembler::greaterEqual, L_loop);
5884
5885 // Copy trailing 64 bytes
5886 if (use64byteVector) {
5887 addptr(cnt, 8);
5888 jccb(Assembler::equal, L_end);
5889 fill64_masked(3, base, 0, xtmp, mask, cnt, rtmp, true);
5890 jmp(L_end);
5891 } else {
5892 addptr(cnt, 4);
5893 jccb(Assembler::less, L_tail);
5894 if (MaxVectorSize >= 32) {
5895 vmovdqu(Address(base, 0), xtmp);
5896 } else {
5897 movdqu(Address(base, 0), xtmp);
5898 movdqu(Address(base, 16), xtmp);
5899 }
5900 }
5901 addptr(base, 32);
5902 subptr(cnt, 4);
5903
5904 BIND(L_tail);
5905 addptr(cnt, 4);
5906 jccb(Assembler::lessEqual, L_end);
5907 if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
5908 fill32_masked(3, base, 0, xtmp, mask, cnt, rtmp);
5909 } else {
5910 decrement(cnt);
5911
5912 BIND(L_sloop);
5913 movq(Address(base, 0), xtmp);
5914 addptr(base, 8);
5915 decrement(cnt);
5916 jccb(Assembler::greaterEqual, L_sloop);
5917 }
5918 BIND(L_end);
5919 }
5920
5921 // Clearing constant sized memory using YMM/ZMM registers.
5922 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
5923 assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
5924 bool use64byteVector = (MaxVectorSize > 32) && (CopyAVX3Threshold == 0);
5925
5926 int vector64_count = (cnt & (~0x7)) >> 3;
5927 cnt = cnt & 0x7;
5928 const int fill64_per_loop = 4;
5990 break;
5991 case 7:
5992 if (use64byteVector) {
5993 movl(rtmp, 0x7F);
5994 kmovwl(mask, rtmp);
5995 evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
5996 } else {
5997 evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
5998 movl(rtmp, 0x7);
5999 kmovwl(mask, rtmp);
6000 evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
6001 }
6002 break;
6003 default:
6004 fatal("Unexpected length : %d\n",cnt);
6005 break;
6006 }
6007 }
6008 }
6009
6010 void MacroAssembler::clear_mem(Register base, Register cnt, Register tmp, XMMRegister xtmp,
6011 bool is_large, KRegister mask) {
6012 // cnt - number of qwords (8-byte words).
6013 // base - start address, qword aligned.
6014 // is_large - if optimizers know cnt is larger than InitArrayShortSize
6015 assert(base==rdi, "base register must be edi for rep stos");
6016 assert(tmp==rax, "tmp register must be eax for rep stos");
6017 assert(cnt==rcx, "cnt register must be ecx for rep stos");
6018 assert(InitArrayShortSize % BytesPerLong == 0,
6019 "InitArrayShortSize should be the multiple of BytesPerLong");
6020
6021 Label DONE;
6022 if (!is_large || !UseXMMForObjInit) {
6023 xorptr(tmp, tmp);
6024 }
6025
6026 if (!is_large) {
6027 Label LOOP, LONG;
6028 cmpptr(cnt, InitArrayShortSize/BytesPerLong);
6029 jccb(Assembler::greater, LONG);
6030
6031 decrement(cnt);
6032 jccb(Assembler::negative, DONE); // Zero length
6033
6034 // Use individual pointer-sized stores for small counts:
6035 BIND(LOOP);
6036 movptr(Address(base, cnt, Address::times_ptr), tmp);
6037 decrement(cnt);
6038 jccb(Assembler::greaterEqual, LOOP);
6039 jmpb(DONE);
6040
6041 BIND(LONG);
6042 }
6043
6044 // Use longer rep-prefixed ops for non-small counts:
6045 if (UseFastStosb) {
6046 shlptr(cnt, 3); // convert to number of bytes
6047 rep_stosb();
6048 } else if (UseXMMForObjInit) {
6049 xmm_clear_mem(base, cnt, tmp, xtmp, mask);
6050 } else {
6051 rep_stos();
6052 }
6053
6054 BIND(DONE);
6055 }
6056
6057 #endif //COMPILER2_OR_JVMCI
6058
6059
6060 void MacroAssembler::generate_fill(BasicType t, bool aligned,
6061 Register to, Register value, Register count,
6062 Register rtmp, XMMRegister xtmp) {
6063 ShortBranchVerifier sbv(this);
6064 assert_different_registers(to, value, count, rtmp);
6065 Label L_exit;
6066 Label L_fill_2_bytes, L_fill_4_bytes;
6067
6068 #if defined(COMPILER2)
6069 if(MaxVectorSize >=32 &&
9948
9949 // Load top.
9950 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
9951
9952 // Check if the lock-stack is full.
9953 cmpl(top, LockStack::end_offset());
9954 jcc(Assembler::greaterEqual, slow);
9955
9956 // Check for recursion.
9957 cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
9958 jcc(Assembler::equal, push);
9959
9960 // Check header for monitor (0b10).
9961 testptr(reg_rax, markWord::monitor_value);
9962 jcc(Assembler::notZero, slow);
9963
9964 // Try to lock. Transition lock bits 0b01 => 0b00
9965 movptr(tmp, reg_rax);
9966 andptr(tmp, ~(int32_t)markWord::unlocked_value);
9967 orptr(reg_rax, markWord::unlocked_value);
9968 lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
9969 jcc(Assembler::notEqual, slow);
9970
9971 // Restore top, CAS clobbers register.
9972 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
9973
9974 bind(push);
9975 // After successful lock, push object on lock-stack.
9976 movptr(Address(thread, top), obj);
9977 incrementl(top, oopSize);
9978 movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
9979 }
9980
9981 // Implements fast-unlocking.
9982 //
9983 // obj: the object to be unlocked
9984 // reg_rax: rax
9985 // thread: the thread
9986 // tmp: a temporary register
9987 void MacroAssembler::fast_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {
|
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/assembler.hpp"
26 #include "asm/assembler.inline.hpp"
27 #include "code/aotCodeCache.hpp"
28 #include "code/compiledIC.hpp"
29 #include "compiler/compiler_globals.hpp"
30 #include "compiler/disassembler.hpp"
31 #include "ci/ciInlineKlass.hpp"
32 #include "crc32c.h"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/collectedHeap.inline.hpp"
36 #include "gc/shared/tlab_globals.hpp"
37 #include "interpreter/bytecodeHistogram.hpp"
38 #include "interpreter/interpreter.hpp"
39 #include "interpreter/interpreterRuntime.hpp"
40 #include "jvm.h"
41 #include "memory/resourceArea.hpp"
42 #include "memory/universe.hpp"
43 #include "oops/accessDecorators.hpp"
44 #include "oops/compressedKlass.inline.hpp"
45 #include "oops/compressedOops.inline.hpp"
46 #include "oops/klass.inline.hpp"
47 #include "oops/resolvedFieldEntry.hpp"
48 #include "prims/methodHandles.hpp"
49 #include "runtime/arguments.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/interfaceSupport.inline.hpp"
52 #include "runtime/javaThread.hpp"
53 #include "runtime/jniHandles.hpp"
54 #include "runtime/objectMonitor.hpp"
55 #include "runtime/os.hpp"
56 #include "runtime/safepoint.hpp"
57 #include "runtime/safepointMechanism.hpp"
58 #include "runtime/sharedRuntime.hpp"
59 #include "runtime/signature_cc.hpp"
60 #include "runtime/stubRoutines.hpp"
61 #include "utilities/checkedCast.hpp"
62 #include "utilities/globalDefinitions.hpp"
63 #include "utilities/macros.hpp"
64 #include "vmreg_x86.inline.hpp"
65 #ifdef COMPILER2
66 #include "opto/output.hpp"
67 #endif
68
69 #ifdef PRODUCT
70 #define BLOCK_COMMENT(str) /* nothing */
71 #define STOP(error) stop(error)
72 #else
73 #define BLOCK_COMMENT(str) block_comment(str)
74 #define STOP(error) block_comment(error); stop(error)
75 #endif
76
77 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
78
79 #ifdef ASSERT
80 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
81 #endif
82
83 static const Assembler::Condition reverse[] = {
84 Assembler::noOverflow /* overflow = 0x0 */ ,
85 Assembler::overflow /* noOverflow = 0x1 */ ,
86 Assembler::aboveEqual /* carrySet = 0x2, below = 0x2 */ ,
87 Assembler::below /* aboveEqual = 0x3, carryClear = 0x3 */ ,
1293 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1294 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1295 assert_different_registers(arg_1, c_rarg2);
1296 pass_arg2(this, arg_2);
1297 pass_arg1(this, arg_1);
1298 pass_arg0(this, arg_0);
1299 call_VM_leaf(entry_point, 3);
1300 }
1301
1302 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
1303 assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
1304 assert_different_registers(arg_1, c_rarg2, c_rarg3);
1305 assert_different_registers(arg_2, c_rarg3);
1306 pass_arg3(this, arg_3);
1307 pass_arg2(this, arg_2);
1308 pass_arg1(this, arg_1);
1309 pass_arg0(this, arg_0);
1310 call_VM_leaf(entry_point, 3);
1311 }
1312
1313 void MacroAssembler::super_call_VM_leaf(address entry_point) {
1314 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1315 }
1316
1317 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
1318 pass_arg0(this, arg_0);
1319 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1320 }
1321
1322 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
1323 assert_different_registers(arg_0, c_rarg1);
1324 pass_arg1(this, arg_1);
1325 pass_arg0(this, arg_0);
1326 MacroAssembler::call_VM_leaf_base(entry_point, 2);
1327 }
1328
1329 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1330 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1331 assert_different_registers(arg_1, c_rarg2);
1332 pass_arg2(this, arg_2);
1333 pass_arg1(this, arg_1);
1334 pass_arg0(this, arg_0);
1335 MacroAssembler::call_VM_leaf_base(entry_point, 3);
1336 }
2368 lea(rscratch, src);
2369 Assembler::mulss(dst, Address(rscratch, 0));
2370 }
2371 }
2372
2373 void MacroAssembler::null_check(Register reg, int offset) {
2374 if (needs_explicit_null_check(offset)) {
2375 // provoke OS null exception if reg is null by
2376 // accessing M[reg] w/o changing any (non-CC) registers
2377 // NOTE: cmpl is plenty here to provoke a segv
2378 cmpptr(rax, Address(reg, 0));
2379 // Note: should probably use testl(rax, Address(reg, 0));
2380 // may be shorter code (however, this version of
2381 // testl needs to be implemented first)
2382 } else {
2383 // nothing to do, (later) access of M[reg + offset]
2384 // will provoke OS null exception if reg is null
2385 }
2386 }
2387
2388 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2389 andptr(markword, markWord::inline_type_pattern_mask);
2390 cmpptr(markword, markWord::inline_type_pattern);
2391 jcc(Assembler::equal, is_inline_type);
2392 }
2393
2394 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2395 if (can_be_null) {
2396 testptr(object, object);
2397 jcc(Assembler::zero, not_inline_type);
2398 }
2399 const int is_inline_type_mask = markWord::inline_type_pattern;
2400 movptr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2401 andptr(tmp, is_inline_type_mask);
2402 cmpptr(tmp, is_inline_type_mask);
2403 jcc(Assembler::notEqual, not_inline_type);
2404 }
2405
2406 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2407 movl(temp_reg, flags);
2408 testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
2409 jcc(Assembler::notEqual, is_null_free_inline_type);
2410 }
2411
2412 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2413 movl(temp_reg, flags);
2414 testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
2415 jcc(Assembler::equal, not_null_free_inline_type);
2416 }
2417
2418 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2419 movl(temp_reg, flags);
2420 testl(temp_reg, 1 << ResolvedFieldEntry::is_flat_shift);
2421 jcc(Assembler::notEqual, is_flat);
2422 }
2423
2424 void MacroAssembler::test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker) {
2425 movl(temp_reg, flags);
2426 testl(temp_reg, 1 << ResolvedFieldEntry::has_null_marker_shift);
2427 jcc(Assembler::notEqual, has_null_marker);
2428 }
2429
2430 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2431 Label test_mark_word;
2432 // load mark word
2433 movptr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2434 // check displaced
2435 testl(temp_reg, markWord::unlocked_value);
2436 jccb(Assembler::notZero, test_mark_word);
2437 // slow path use klass prototype
2438 push(rscratch1);
2439 load_prototype_header(temp_reg, oop, rscratch1);
2440 pop(rscratch1);
2441
2442 bind(test_mark_word);
2443 testl(temp_reg, test_bit);
2444 jcc((jmp_set) ? Assembler::notZero : Assembler::zero, jmp_label);
2445 }
2446
2447 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg,
2448 Label& is_flat_array) {
2449 #ifdef _LP64
2450 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2451 #else
2452 load_klass(temp_reg, oop, noreg);
2453 movl(temp_reg, Address(temp_reg, Klass::layout_helper_offset()));
2454 test_flat_array_layout(temp_reg, is_flat_array);
2455 #endif
2456 }
2457
2458 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2459 Label& is_non_flat_array) {
2460 #ifdef _LP64
2461 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2462 #else
2463 load_klass(temp_reg, oop, noreg);
2464 movl(temp_reg, Address(temp_reg, Klass::layout_helper_offset()));
2465 test_non_flat_array_layout(temp_reg, is_non_flat_array);
2466 #endif
2467 }
2468
2469 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label&is_null_free_array) {
2470 #ifdef _LP64
2471 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2472 #else
2473 Unimplemented();
2474 #endif
2475 }
2476
2477 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2478 #ifdef _LP64
2479 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2480 #else
2481 Unimplemented();
2482 #endif
2483 }
2484
2485 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2486 testl(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2487 jcc(Assembler::notZero, is_flat_array);
2488 }
2489
2490 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
2491 testl(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2492 jcc(Assembler::zero, is_non_flat_array);
2493 }
2494
2495 void MacroAssembler::os_breakpoint() {
2496 // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
2497 // (e.g., MSVC can't call ps() otherwise)
2498 call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
2499 }
2500
2501 void MacroAssembler::unimplemented(const char* what) {
2502 const char* buf = nullptr;
2503 {
2504 ResourceMark rm;
2505 stringStream ss;
2506 ss.print("unimplemented: %s", what);
2507 buf = code_string(ss.as_string());
2508 }
2509 stop(buf);
2510 }
2511
2512 #define XSTATE_BV 0x200
2513
2514 void MacroAssembler::pop_CPU_state() {
3815 xorptr(temp, temp); // use _zero reg to clear memory (shorter code)
3816 if (UseIncDec) {
3817 shrptr(index, 3); // divide by 8/16 and set carry flag if bit 2 was set
3818 } else {
3819 shrptr(index, 2); // use 2 instructions to avoid partial flag stall
3820 shrptr(index, 1);
3821 }
3822
3823 // initialize remaining object fields: index is a multiple of 2 now
3824 {
3825 Label loop;
3826 bind(loop);
3827 movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
3828 decrement(index);
3829 jcc(Assembler::notZero, loop);
3830 }
3831
3832 bind(done);
3833 }
3834
3835 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
3836 movptr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
3837 #ifdef ASSERT
3838 {
3839 Label done;
3840 cmpptr(layout_info, 0);
3841 jcc(Assembler::notEqual, done);
3842 stop("inline_layout_info_array is null");
3843 bind(done);
3844 }
3845 #endif
3846
3847 InlineLayoutInfo array[2];
3848 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
3849 if (is_power_of_2(size)) {
3850 shll(index, log2i_exact(size)); // Scale index by power of 2
3851 } else {
3852 imull(index, index, size); // Scale the index to be the entry index * array_element_size
3853 }
3854 lea(layout_info, Address(layout_info, index, Address::times_1, Array<InlineLayoutInfo>::base_offset_in_bytes()));
3855 }
3856
3857 // Look up the method for a megamorphic invokeinterface call.
3858 // The target method is determined by <intf_klass, itable_index>.
3859 // The receiver klass is in recv_klass.
3860 // On success, the result will be in method_result, and execution falls through.
3861 // On failure, execution transfers to the given label.
3862 void MacroAssembler::lookup_interface_method(Register recv_klass,
3863 Register intf_klass,
3864 RegisterOrConstant itable_index,
3865 Register method_result,
3866 Register scan_temp,
3867 Label& L_no_such_interface,
3868 bool return_method) {
3869 assert_different_registers(recv_klass, intf_klass, scan_temp);
3870 assert_different_registers(method_result, intf_klass, scan_temp);
3871 assert(recv_klass != method_result || !return_method,
3872 "recv_klass can be destroyed when method isn't needed");
3873
3874 assert(itable_index.is_constant() || itable_index.as_register() == method_result,
3875 "caller must use same register for non-constant itable index as for method");
3876
4887 } else {
4888 Label L;
4889 jccb(negate_condition(cc), L);
4890 movl(dst, src);
4891 bind(L);
4892 }
4893 }
4894
4895 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
4896 if (VM_Version::supports_cmov()) {
4897 cmovl(cc, dst, src);
4898 } else {
4899 Label L;
4900 jccb(negate_condition(cc), L);
4901 movl(dst, src);
4902 bind(L);
4903 }
4904 }
4905
4906 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
4907 if (!VerifyOops || VerifyAdapterSharing) {
4908 // Below address of the code string confuses VerifyAdapterSharing
4909 // because it may differ between otherwise equivalent adapters.
4910 return;
4911 }
4912
4913 BLOCK_COMMENT("verify_oop {");
4914 push(rscratch1);
4915 push(rax); // save rax
4916 push(reg); // pass register argument
4917
4918 // Pass register number to verify_oop_subroutine
4919 const char* b = nullptr;
4920 {
4921 ResourceMark rm;
4922 stringStream ss;
4923 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
4924 b = code_string(ss.as_string());
4925 }
4926 AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
4927 pushptr(buffer.addr(), rscratch1);
4928
4929 // call indirectly to solve generation ordering problem
4930 movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
4931 call(rax);
5147 // or something else. Since this is a slow path, we can optimize for code density,
5148 // and just restart the search from the beginning.
5149 jmpb(L_restart);
5150
5151 // Counter updates:
5152
5153 // Increment polymorphic counter instead of receiver slot.
5154 bind(L_polymorphic);
5155 movptr(offset, poly_count_offset);
5156 jmpb(L_count_update);
5157
5158 // Found a receiver, convert its slot offset to corresponding count offset.
5159 bind(L_found_recv);
5160 addptr(offset, receiver_to_count_step);
5161
5162 bind(L_count_update);
5163 addptr(Address(mdp, offset, Address::times_ptr), DataLayout::counter_increment);
5164 }
5165
5166 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
5167 if (!VerifyOops || VerifyAdapterSharing) {
5168 // Below address of the code string confuses VerifyAdapterSharing
5169 // because it may differ between otherwise equivalent adapters.
5170 return;
5171 }
5172
5173 push(rscratch1);
5174 push(rax); // save rax,
5175 // addr may contain rsp so we will have to adjust it based on the push
5176 // we just did (and on 64 bit we do two pushes)
5177 // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
5178 // stores rax into addr which is backwards of what was intended.
5179 if (addr.uses(rsp)) {
5180 lea(rax, addr);
5181 pushptr(Address(rax, 2 * BytesPerWord));
5182 } else {
5183 pushptr(addr);
5184 }
5185
5186 // Pass register number to verify_oop_subroutine
5187 const char* b = nullptr;
5188 {
5189 ResourceMark rm;
5190 stringStream ss;
5191 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
5545
5546 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
5547 // get mirror
5548 const int mirror_offset = in_bytes(Klass::java_mirror_offset());
5549 load_method_holder(mirror, method);
5550 movptr(mirror, Address(mirror, mirror_offset));
5551 resolve_oop_handle(mirror, tmp);
5552 }
5553
5554 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5555 load_method_holder(rresult, rmethod);
5556 movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5557 }
5558
5559 void MacroAssembler::load_method_holder(Register holder, Register method) {
5560 movptr(holder, Address(method, Method::const_offset())); // ConstMethod*
5561 movptr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5562 movptr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5563 }
5564
5565 void MacroAssembler::load_metadata(Register dst, Register src) {
5566 if (UseCompactObjectHeaders) {
5567 load_narrow_klass_compact(dst, src);
5568 } else {
5569 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5570 }
5571 }
5572
5573 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5574 assert(UseCompactObjectHeaders, "expect compact object headers");
5575 movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5576 shrq(dst, markWord::klass_shift);
5577 }
5578
5579 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
5580 assert_different_registers(src, tmp);
5581 assert_different_registers(dst, tmp);
5582
5583 if (UseCompactObjectHeaders) {
5584 load_narrow_klass_compact(dst, src);
5585 decode_klass_not_null(dst, tmp);
5586 } else {
5587 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5588 decode_klass_not_null(dst, tmp);
5589 }
5590 }
5591
5592 void MacroAssembler::load_prototype_header(Register dst, Register src, Register tmp) {
5593 load_klass(dst, src, tmp);
5594 movptr(dst, Address(dst, Klass::prototype_header_offset()));
5595 }
5596
5597 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
5598 assert(!UseCompactObjectHeaders, "not with compact headers");
5599 assert_different_registers(src, tmp);
5600 assert_different_registers(dst, tmp);
5601 encode_klass_not_null(src, tmp);
5602 movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5603 }
5604
5605 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
5606 if (UseCompactObjectHeaders) {
5607 assert(tmp != noreg, "need tmp");
5608 assert_different_registers(klass, obj, tmp);
5609 load_narrow_klass_compact(tmp, obj);
5610 cmpl(klass, tmp);
5611 } else {
5612 cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
5613 }
5614 }
5615
5616 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5633 bool as_raw = (decorators & AS_RAW) != 0;
5634 if (as_raw) {
5635 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
5636 } else {
5637 bs->load_at(this, decorators, type, dst, src, tmp1);
5638 }
5639 }
5640
5641 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
5642 Register tmp1, Register tmp2, Register tmp3) {
5643 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5644 decorators = AccessInternal::decorator_fixup(decorators, type);
5645 bool as_raw = (decorators & AS_RAW) != 0;
5646 if (as_raw) {
5647 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5648 } else {
5649 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5650 }
5651 }
5652
5653 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5654 Register inline_layout_info) {
5655 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5656 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5657 }
5658
5659 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5660 movptr(offset, Address(inline_klass, InlineKlass::adr_members_offset()));
5661 movl(offset, Address(offset, InlineKlass::payload_offset_offset()));
5662 }
5663
5664 void MacroAssembler::payload_addr(Register oop, Register data, Register inline_klass) {
5665 // ((address) (void*) o) + vk->payload_offset();
5666 Register offset = (data == oop) ? rscratch1 : data;
5667 payload_offset(inline_klass, offset);
5668 if (data == oop) {
5669 addptr(data, offset);
5670 } else {
5671 lea(data, Address(oop, offset));
5672 }
5673 }
5674
5675 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
5676 Register index, Register data) {
5677 assert(index != rcx, "index needs to shift by rcx");
5678 assert_different_registers(array, array_klass, index);
5679 assert_different_registers(rcx, array, index);
5680
5681 // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
5682 movl(rcx, Address(array_klass, Klass::layout_helper_offset()));
5683
5684 // Klass::layout_helper_log2_element_size(lh)
5685 // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
5686 shrl(rcx, Klass::_lh_log2_element_size_shift);
5687 andl(rcx, Klass::_lh_log2_element_size_mask);
5688 shlptr(index); // index << rcx
5689
5690 lea(data, Address(array, index, Address::times_1, arrayOopDesc::base_offset_in_bytes(T_FLAT_ELEMENT)));
5691 }
5692
5693 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5694 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
5695 }
5696
5697 // Doesn't do verification, generates fixed size code
5698 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5699 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
5700 }
5701
5702 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5703 Register tmp2, Register tmp3, DecoratorSet decorators) {
5704 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5705 }
5706
5707 // Used for storing nulls.
5708 void MacroAssembler::store_heap_oop_null(Address dst) {
5709 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5710 }
5711
5712 void MacroAssembler::store_klass_gap(Register dst, Register src) {
6035 assert (oop_recorder() != nullptr, "this assembler needs an OopRecorder");
6036 int klass_index = oop_recorder()->find_index(k);
6037 RelocationHolder rspec = metadata_Relocation::spec(klass_index);
6038 Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
6039 }
6040
6041 void MacroAssembler::reinit_heapbase() {
6042 if (UseCompressedOops) {
6043 if (Universe::heap() != nullptr && !AOTCodeCache::is_on_for_dump()) {
6044 if (CompressedOops::base() == nullptr) {
6045 MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
6046 } else {
6047 mov64(r12_heapbase, (int64_t)CompressedOops::base());
6048 }
6049 } else {
6050 movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
6051 }
6052 }
6053 }
6054
6055 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
6056 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
6057 // An inline type might be returned. If fields are in registers we
6058 // need to allocate an inline type instance and initialize it with
6059 // the value of the fields.
6060 Label skip;
6061 // We only need a new buffered inline type if a new one is not returned
6062 testptr(rax, 1);
6063 jcc(Assembler::zero, skip);
6064 int call_offset = -1;
6065
6066 #ifdef _LP64
6067 // The following code is similar to allocation code in TemplateTable::_new but has some slight differences,
6068 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
6069 // allocating is not necessary if vk != nullptr, etc.
6070 Label slow_case;
6071 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
6072 mov(rscratch1, rax); // save rax for slow_case since *_allocate may corrupt it when allocation failed
6073 if (vk != nullptr) {
6074 // Called from C1, where the return type is statically known.
6075 movptr(rbx, (intptr_t)vk->get_InlineKlass());
6076 jint lh = vk->layout_helper();
6077 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
6078 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
6079 tlab_allocate(rax, noreg, lh, r13, r14, slow_case);
6080 } else {
6081 jmp(slow_case);
6082 }
6083 } else {
6084 // Call from interpreter. RAX contains ((the InlineKlass* of the return type) | 0x01)
6085 mov(rbx, rax);
6086 andptr(rbx, -2);
6087 if (UseTLAB) {
6088 movl(r14, Address(rbx, Klass::layout_helper_offset()));
6089 testl(r14, Klass::_lh_instance_slow_path_bit);
6090 jcc(Assembler::notZero, slow_case);
6091 tlab_allocate(rax, r14, 0, r13, r14, slow_case);
6092 } else {
6093 jmp(slow_case);
6094 }
6095 }
6096 if (UseTLAB) {
6097 // 2. Initialize buffered inline instance header
6098 Register buffer_obj = rax;
6099 Register klass = rbx;
6100 if (UseCompactObjectHeaders) {
6101 Register mark_word = r13;
6102 movptr(mark_word, Address(klass, Klass::prototype_header_offset()));
6103 movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes()), mark_word);
6104 } else {
6105 movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes()), (intptr_t)markWord::inline_type_prototype().value());
6106 xorl(r13, r13);
6107 store_klass_gap(buffer_obj, r13);
6108 if (vk == nullptr) {
6109 // store_klass corrupts rbx(klass), so save it in r13 for later use (interpreter case only).
6110 mov(r13, klass);
6111 }
6112 store_klass(buffer_obj, klass, rscratch1);
6113 klass = r13;
6114 }
6115 // 3. Initialize its fields with an inline class specific handler
6116 if (vk != nullptr) {
6117 call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
6118 } else {
6119 movptr(rbx, Address(klass, InlineKlass::adr_members_offset()));
6120 movptr(rbx, Address(rbx, InlineKlass::pack_handler_offset()));
6121 call(rbx);
6122 }
6123 jmp(skip);
6124 }
6125 bind(slow_case);
6126 // We failed to allocate a new inline type, fall back to a runtime
6127 // call. Some oop field may be live in some registers but we can't
6128 // tell. That runtime call will take care of preserving them
6129 // across a GC if there's one.
6130 mov(rax, rscratch1);
6131 #endif
6132
6133 if (from_interpreter) {
6134 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
6135 } else {
6136 call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
6137 call_offset = offset();
6138 }
6139
6140 bind(skip);
6141 return call_offset;
6142 }
6143
6144 // Move a value between registers/stack slots and update the reg_state
6145 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
6146 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
6147 if (reg_state[to->value()] == reg_written) {
6148 return true; // Already written
6149 }
6150 if (from != to && bt != T_VOID) {
6151 if (reg_state[to->value()] == reg_readonly) {
6152 return false; // Not yet writable
6153 }
6154 if (from->is_reg()) {
6155 if (to->is_reg()) {
6156 if (from->is_XMMRegister()) {
6157 if (bt == T_DOUBLE) {
6158 movdbl(to->as_XMMRegister(), from->as_XMMRegister());
6159 } else {
6160 assert(bt == T_FLOAT, "must be float");
6161 movflt(to->as_XMMRegister(), from->as_XMMRegister());
6162 }
6163 } else {
6164 movq(to->as_Register(), from->as_Register());
6165 }
6166 } else {
6167 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6168 Address to_addr = Address(rsp, st_off);
6169 if (from->is_XMMRegister()) {
6170 if (bt == T_DOUBLE) {
6171 movdbl(to_addr, from->as_XMMRegister());
6172 } else {
6173 assert(bt == T_FLOAT, "must be float");
6174 movflt(to_addr, from->as_XMMRegister());
6175 }
6176 } else {
6177 movq(to_addr, from->as_Register());
6178 }
6179 }
6180 } else {
6181 Address from_addr = Address(rsp, from->reg2stack() * VMRegImpl::stack_slot_size + wordSize);
6182 if (to->is_reg()) {
6183 if (to->is_XMMRegister()) {
6184 if (bt == T_DOUBLE) {
6185 movdbl(to->as_XMMRegister(), from_addr);
6186 } else {
6187 assert(bt == T_FLOAT, "must be float");
6188 movflt(to->as_XMMRegister(), from_addr);
6189 }
6190 } else {
6191 movq(to->as_Register(), from_addr);
6192 }
6193 } else {
6194 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6195 movq(r13, from_addr);
6196 movq(Address(rsp, st_off), r13);
6197 }
6198 }
6199 }
6200 // Update register states
6201 reg_state[from->value()] = reg_writable;
6202 reg_state[to->value()] = reg_written;
6203 return true;
6204 }
6205
6206 // Calculate the extra stack space required for packing or unpacking inline
6207 // args and adjust the stack pointer (see MacroAssembler::remove_frame).
6208 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
6209 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
6210 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
6211 assert(sp_inc > 0, "sanity");
6212 // Two additional slots to account for return address
6213 sp_inc += 2 * VMRegImpl::stack_slot_size;
6214
6215 push(rbp);
6216 subptr(rsp, sp_inc);
6217 #ifdef ASSERT
6218 movl(Address(rsp, 0), badRegWordVal);
6219 movl(Address(rsp, VMRegImpl::stack_slot_size), badRegWordVal);
6220 #endif
6221 return sp_inc + wordSize; // account for rbp space
6222 }
6223
6224 // Read all fields from an inline type buffer and store the field values in registers/stack slots.
6225 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
6226 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
6227 RegState reg_state[]) {
6228 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
6229 assert(from->is_valid(), "source must be valid");
6230 bool progress = false;
6231 #ifdef ASSERT
6232 const int start_offset = offset();
6233 #endif
6234
6235 Label L_null, L_notNull;
6236 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
6237 Register tmp1 = r10;
6238 Register tmp2 = r13;
6239 Register fromReg = noreg;
6240 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
6241 bool done = true;
6242 bool mark_done = true;
6243 VMReg toReg;
6244 BasicType bt;
6245 // Check if argument requires a null check
6246 bool null_check = false;
6247 VMReg nullCheckReg;
6248 while (stream.next(nullCheckReg, bt)) {
6249 if (sig->at(stream.sig_index())._offset == -1) {
6250 null_check = true;
6251 break;
6252 }
6253 }
6254 stream.reset(sig_index, to_index);
6255 while (stream.next(toReg, bt)) {
6256 assert(toReg->is_valid(), "destination must be valid");
6257 int idx = (int)toReg->value();
6258 if (reg_state[idx] == reg_readonly) {
6259 if (idx != from->value()) {
6260 mark_done = false;
6261 }
6262 done = false;
6263 continue;
6264 } else if (reg_state[idx] == reg_written) {
6265 continue;
6266 }
6267 assert(reg_state[idx] == reg_writable, "must be writable");
6268 reg_state[idx] = reg_written;
6269 progress = true;
6270
6271 if (fromReg == noreg) {
6272 if (from->is_reg()) {
6273 fromReg = from->as_Register();
6274 } else {
6275 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6276 movq(tmp1, Address(rsp, st_off));
6277 fromReg = tmp1;
6278 }
6279 if (null_check) {
6280 // Nullable inline type argument, emit null check
6281 testptr(fromReg, fromReg);
6282 jcc(Assembler::zero, L_null);
6283 }
6284 }
6285 int off = sig->at(stream.sig_index())._offset;
6286 if (off == -1) {
6287 assert(null_check, "Missing null check at");
6288 if (toReg->is_stack()) {
6289 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6290 movq(Address(rsp, st_off), 1);
6291 } else {
6292 movq(toReg->as_Register(), 1);
6293 }
6294 continue;
6295 }
6296 if (sig->at(stream.sig_index())._vt_oop) {
6297 if (toReg->is_stack()) {
6298 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6299 movq(Address(rsp, st_off), fromReg);
6300 } else {
6301 movq(toReg->as_Register(), fromReg);
6302 }
6303 continue;
6304 }
6305 assert(off > 0, "offset in object should be positive");
6306 Address fromAddr = Address(fromReg, off);
6307 if (!toReg->is_XMMRegister()) {
6308 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
6309 if (is_reference_type(bt)) {
6310 load_heap_oop(dst, fromAddr);
6311 } else {
6312 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
6313 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
6314 }
6315 if (toReg->is_stack()) {
6316 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6317 movq(Address(rsp, st_off), dst);
6318 }
6319 } else if (bt == T_DOUBLE) {
6320 movdbl(toReg->as_XMMRegister(), fromAddr);
6321 } else {
6322 assert(bt == T_FLOAT, "must be float");
6323 movflt(toReg->as_XMMRegister(), fromAddr);
6324 }
6325 }
6326 if (progress && null_check) {
6327 if (done) {
6328 jmp(L_notNull);
6329 bind(L_null);
6330 // Set null marker to zero to signal that the argument is null.
6331 // Also set all fields to zero since the runtime requires a canonical
6332 // representation of a flat null.
6333 stream.reset(sig_index, to_index);
6334 while (stream.next(toReg, bt)) {
6335 if (toReg->is_stack()) {
6336 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6337 movq(Address(rsp, st_off), 0);
6338 } else if (toReg->is_XMMRegister()) {
6339 xorps(toReg->as_XMMRegister(), toReg->as_XMMRegister());
6340 } else {
6341 xorl(toReg->as_Register(), toReg->as_Register());
6342 }
6343 }
6344 bind(L_notNull);
6345 } else {
6346 bind(L_null);
6347 }
6348 }
6349
6350 sig_index = stream.sig_index();
6351 to_index = stream.regs_index();
6352
6353 if (mark_done && reg_state[from->value()] != reg_written) {
6354 // This is okay because no one else will write to that slot
6355 reg_state[from->value()] = reg_writable;
6356 }
6357 from_index--;
6358 assert(progress || (start_offset == offset()), "should not emit code");
6359 return done;
6360 }
6361
6362 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
6363 VMRegPair* from, int from_count, int& from_index, VMReg to,
6364 RegState reg_state[], Register val_array) {
6365 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
6366 assert(to->is_valid(), "destination must be valid");
6367
6368 if (reg_state[to->value()] == reg_written) {
6369 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
6370 return true; // Already written
6371 }
6372
6373 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
6374 Register val_obj_tmp = r11;
6375 Register from_reg_tmp = r14;
6376 Register tmp1 = r10;
6377 Register tmp2 = r13;
6378 Register tmp3 = rbx;
6379 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
6380
6381 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
6382
6383 if (reg_state[to->value()] == reg_readonly) {
6384 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
6385 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
6386 return false; // Not yet writable
6387 }
6388 val_obj = val_obj_tmp;
6389 }
6390
6391 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
6392 VMReg fromReg;
6393 BasicType bt;
6394 Label L_null;
6395 while (stream.next(fromReg, bt)) {
6396 assert(fromReg->is_valid(), "source must be valid");
6397 reg_state[fromReg->value()] = reg_writable;
6398
6399 int off = sig->at(stream.sig_index())._offset;
6400 if (off == -1) {
6401 // Nullable inline type argument, emit null check
6402 Label L_notNull;
6403 if (fromReg->is_stack()) {
6404 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6405 testb(Address(rsp, ld_off), 1);
6406 } else {
6407 testb(fromReg->as_Register(), 1);
6408 }
6409 jcc(Assembler::notZero, L_notNull);
6410 movptr(val_obj, 0);
6411 jmp(L_null);
6412 bind(L_notNull);
6413 continue;
6414 }
6415 if (sig->at(stream.sig_index())._vt_oop) {
6416 // buffer argument: use if non null
6417 if (fromReg->is_stack()) {
6418 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6419 movptr(val_obj, Address(rsp, ld_off));
6420 } else {
6421 movptr(val_obj, fromReg->as_Register());
6422 }
6423 testptr(val_obj, val_obj);
6424 jcc(Assembler::notEqual, L_null);
6425 // otherwise get the buffer from the just allocated pool of buffers
6426 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
6427 load_heap_oop(val_obj, Address(val_array, index));
6428 continue;
6429 }
6430
6431 assert(off > 0, "offset in object should be positive");
6432 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
6433
6434 // Pack the scalarized field into the value object.
6435 Address dst(val_obj, off);
6436 if (!fromReg->is_XMMRegister()) {
6437 Register src;
6438 if (fromReg->is_stack()) {
6439 src = from_reg_tmp;
6440 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6441 load_sized_value(src, Address(rsp, ld_off), size_in_bytes, /* is_signed */ false);
6442 } else {
6443 src = fromReg->as_Register();
6444 }
6445 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
6446 if (is_reference_type(bt)) {
6447 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep val_obj valid.
6448 mov(tmp3, val_obj);
6449 Address dst_with_tmp3(tmp3, off);
6450 store_heap_oop(dst_with_tmp3, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
6451 } else {
6452 store_sized_value(dst, src, size_in_bytes);
6453 }
6454 } else if (bt == T_DOUBLE) {
6455 movdbl(dst, fromReg->as_XMMRegister());
6456 } else {
6457 assert(bt == T_FLOAT, "must be float");
6458 movflt(dst, fromReg->as_XMMRegister());
6459 }
6460 }
6461 bind(L_null);
6462 sig_index = stream.sig_index();
6463 from_index = stream.regs_index();
6464
6465 assert(reg_state[to->value()] == reg_writable, "must have already been read");
6466 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
6467 assert(success, "to register must be writeable");
6468 return true;
6469 }
6470
6471 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
6472 return reg->is_XMMRegister() ? xmm8->as_VMReg() : r14->as_VMReg();
6473 }
6474
6475 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6476 assert((initial_framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6477 if (needs_stack_repair) {
6478 // The method has a scalarized entry point (where fields of value object arguments
6479 // are passed through registers and stack), and a non-scalarized entry point (where
6480 // value object arguments are given as oops). The non-scalarized entry point will
6481 // first load each field of value object arguments and store them in registers and on
6482 // the stack in a way compatible with the scalarized entry point. To do so, some extra
6483 // stack space might be reserved (if argument registers are not enough). On leaving the
6484 // method, this space must be freed.
6485 //
6486 // In case we used the non-scalarized entry point the stack looks like this:
6487 //
6488 // | Arguments from caller |
6489 // |---------------------------| <-- caller's SP
6490 // | Return address #1 |
6491 // | Saved RBP #1 |
6492 // |---------------------------|
6493 // | Extension space for |
6494 // | inline arg (un)packing |
6495 // |---------------------------| <-- start of this method's frame
6496 // | Return address #2 |
6497 // | Saved RBP #2 |
6498 // |---------------------------| <-- RBP (with -XX:+PreserveFramePointer)
6499 // | sp_inc |
6500 // | method locals |
6501 // |---------------------------| <-- SP
6502 //
6503 // Space for the return pc and saved rbp is reserved twice. But only the #1 copies
6504 // contain the real values of return pc and saved rbp. The #2 copies are not reliable
6505 // and should not be used. They are mostly needed to add space between the extension
6506 // space and the locals, as there would be between the real arguments and the locals
6507 // if we don't need to do unpacking (from the scalarized entry point).
6508 //
6509 // When leaving, one must load RBP #1 into RBP, and use the copy #1 of the return address,
6510 // while keeping in mind that from the scalarized entry point, there will be only one
6511 // copy. Indeed, in the case we used the scalarized calling convention, the stack looks like this:
6512 //
6513 // | Arguments from caller |
6514 // |---------------------------| <-- caller's SP
6515 // | Return address |
6516 // | Saved RBP |
6517 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6518 // | sp_inc |
6519 // | method locals |
6520 // |---------------------------| <-- SP
6521 //
6522 // The sp_inc stack slot holds the total size of the frame, including the extension
6523 // space and copies #2 of the return address and the saved RBP (but never the copies
6524 // #1 of the return address and saved RBP). That is how to find the copies #1 of the
6525 // return address and saved rbp. This size is expressed in bytes. Be careful when using
6526 // it from C++ in pointer arithmetic you might need to divide it by wordSize.
6527
6528 // The stack increment resides just below the saved rbp
6529 addq(rsp, Address(rsp, initial_framesize - wordSize));
6530 pop(rbp);
6531 } else {
6532 if (initial_framesize > 0) {
6533 addq(rsp, initial_framesize);
6534 }
6535 pop(rbp);
6536 }
6537 }
6538
6539 #if COMPILER2_OR_JVMCI
6540
6541 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
6542 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp, KRegister mask) {
6543 // cnt - number of qwords (8-byte words).
6544 // base - start address, qword aligned.
6545 Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
6546 bool use64byteVector = (MaxVectorSize == 64) && (CopyAVX3Threshold == 0);
6547 if (use64byteVector) {
6548 evpbroadcastq(xtmp, val, AVX_512bit);
6549 } else if (MaxVectorSize >= 32) {
6550 movdq(xtmp, val);
6551 punpcklqdq(xtmp, xtmp);
6552 vinserti128_high(xtmp, xtmp);
6553 } else {
6554 movdq(xtmp, val);
6555 punpcklqdq(xtmp, xtmp);
6556 }
6557 jmp(L_zero_64_bytes);
6558
6559 BIND(L_loop);
6560 if (MaxVectorSize >= 32) {
6561 fill64(base, 0, xtmp, use64byteVector);
6562 } else {
6563 movdqu(Address(base, 0), xtmp);
6564 movdqu(Address(base, 16), xtmp);
6565 movdqu(Address(base, 32), xtmp);
6566 movdqu(Address(base, 48), xtmp);
6567 }
6568 addptr(base, 64);
6569
6570 BIND(L_zero_64_bytes);
6571 subptr(cnt, 8);
6572 jccb(Assembler::greaterEqual, L_loop);
6573
6574 // Copy trailing 64 bytes
6575 if (use64byteVector) {
6576 addptr(cnt, 8);
6577 jccb(Assembler::equal, L_end);
6578 fill64_masked(3, base, 0, xtmp, mask, cnt, val, true);
6579 jmp(L_end);
6580 } else {
6581 addptr(cnt, 4);
6582 jccb(Assembler::less, L_tail);
6583 if (MaxVectorSize >= 32) {
6584 vmovdqu(Address(base, 0), xtmp);
6585 } else {
6586 movdqu(Address(base, 0), xtmp);
6587 movdqu(Address(base, 16), xtmp);
6588 }
6589 }
6590 addptr(base, 32);
6591 subptr(cnt, 4);
6592
6593 BIND(L_tail);
6594 addptr(cnt, 4);
6595 jccb(Assembler::lessEqual, L_end);
6596 if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
6597 fill32_masked(3, base, 0, xtmp, mask, cnt, val);
6598 } else {
6599 decrement(cnt);
6600
6601 BIND(L_sloop);
6602 movq(Address(base, 0), xtmp);
6603 addptr(base, 8);
6604 decrement(cnt);
6605 jccb(Assembler::greaterEqual, L_sloop);
6606 }
6607 BIND(L_end);
6608 }
6609
6610 // Clearing constant sized memory using YMM/ZMM registers.
6611 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
6612 assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
6613 bool use64byteVector = (MaxVectorSize > 32) && (CopyAVX3Threshold == 0);
6614
6615 int vector64_count = (cnt & (~0x7)) >> 3;
6616 cnt = cnt & 0x7;
6617 const int fill64_per_loop = 4;
6679 break;
6680 case 7:
6681 if (use64byteVector) {
6682 movl(rtmp, 0x7F);
6683 kmovwl(mask, rtmp);
6684 evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
6685 } else {
6686 evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
6687 movl(rtmp, 0x7);
6688 kmovwl(mask, rtmp);
6689 evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
6690 }
6691 break;
6692 default:
6693 fatal("Unexpected length : %d\n",cnt);
6694 break;
6695 }
6696 }
6697 }
6698
6699 void MacroAssembler::clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp,
6700 bool is_large, bool word_copy_only, KRegister mask) {
6701 // cnt - number of qwords (8-byte words).
6702 // base - start address, qword aligned.
6703 // is_large - if optimizers know cnt is larger than InitArrayShortSize
6704 assert(base==rdi, "base register must be edi for rep stos");
6705 assert(val==rax, "val register must be eax for rep stos");
6706 assert(cnt==rcx, "cnt register must be ecx for rep stos");
6707 assert(InitArrayShortSize % BytesPerLong == 0,
6708 "InitArrayShortSize should be the multiple of BytesPerLong");
6709
6710 Label DONE;
6711
6712 if (!is_large) {
6713 Label LOOP, LONG;
6714 cmpptr(cnt, InitArrayShortSize/BytesPerLong);
6715 jccb(Assembler::greater, LONG);
6716
6717 decrement(cnt);
6718 jccb(Assembler::negative, DONE); // Zero length
6719
6720 // Use individual pointer-sized stores for small counts:
6721 BIND(LOOP);
6722 movptr(Address(base, cnt, Address::times_ptr), val);
6723 decrement(cnt);
6724 jccb(Assembler::greaterEqual, LOOP);
6725 jmpb(DONE);
6726
6727 BIND(LONG);
6728 }
6729
6730 // Use longer rep-prefixed ops for non-small counts:
6731 if (UseFastStosb && !word_copy_only) {
6732 shlptr(cnt, 3); // convert to number of bytes
6733 rep_stosb();
6734 } else if (UseXMMForObjInit) {
6735 xmm_clear_mem(base, cnt, val, xtmp, mask);
6736 } else {
6737 rep_stos();
6738 }
6739
6740 BIND(DONE);
6741 }
6742
6743 #endif //COMPILER2_OR_JVMCI
6744
6745
6746 void MacroAssembler::generate_fill(BasicType t, bool aligned,
6747 Register to, Register value, Register count,
6748 Register rtmp, XMMRegister xtmp) {
6749 ShortBranchVerifier sbv(this);
6750 assert_different_registers(to, value, count, rtmp);
6751 Label L_exit;
6752 Label L_fill_2_bytes, L_fill_4_bytes;
6753
6754 #if defined(COMPILER2)
6755 if(MaxVectorSize >=32 &&
10634
10635 // Load top.
10636 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10637
10638 // Check if the lock-stack is full.
10639 cmpl(top, LockStack::end_offset());
10640 jcc(Assembler::greaterEqual, slow);
10641
10642 // Check for recursion.
10643 cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
10644 jcc(Assembler::equal, push);
10645
10646 // Check header for monitor (0b10).
10647 testptr(reg_rax, markWord::monitor_value);
10648 jcc(Assembler::notZero, slow);
10649
10650 // Try to lock. Transition lock bits 0b01 => 0b00
10651 movptr(tmp, reg_rax);
10652 andptr(tmp, ~(int32_t)markWord::unlocked_value);
10653 orptr(reg_rax, markWord::unlocked_value);
10654 // Mask inline_type bit such that we go to the slow path if object is an inline type
10655 andptr(reg_rax, ~((int) markWord::inline_type_bit_in_place));
10656
10657 lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
10658 jcc(Assembler::notEqual, slow);
10659
10660 // Restore top, CAS clobbers register.
10661 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10662
10663 bind(push);
10664 // After successful lock, push object on lock-stack.
10665 movptr(Address(thread, top), obj);
10666 incrementl(top, oopSize);
10667 movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
10668 }
10669
10670 // Implements fast-unlocking.
10671 //
10672 // obj: the object to be unlocked
10673 // reg_rax: rax
10674 // thread: the thread
10675 // tmp: a temporary register
10676 void MacroAssembler::fast_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {
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