11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/assembler.hpp"
26 #include "asm/assembler.inline.hpp"
27 #include "code/aotCodeCache.hpp"
28 #include "code/compiledIC.hpp"
29 #include "compiler/compiler_globals.hpp"
30 #include "compiler/disassembler.hpp"
31 #include "crc32c.h"
32 #include "gc/shared/barrierSet.hpp"
33 #include "gc/shared/barrierSetAssembler.hpp"
34 #include "gc/shared/collectedHeap.inline.hpp"
35 #include "gc/shared/tlab_globals.hpp"
36 #include "interpreter/bytecodeHistogram.hpp"
37 #include "interpreter/interpreter.hpp"
38 #include "interpreter/interpreterRuntime.hpp"
39 #include "jvm.h"
40 #include "memory/resourceArea.hpp"
41 #include "memory/universe.hpp"
42 #include "oops/accessDecorators.hpp"
43 #include "oops/compressedKlass.inline.hpp"
44 #include "oops/compressedOops.inline.hpp"
45 #include "oops/klass.inline.hpp"
46 #include "prims/methodHandles.hpp"
47 #include "runtime/continuation.hpp"
48 #include "runtime/interfaceSupport.inline.hpp"
49 #include "runtime/javaThread.hpp"
50 #include "runtime/jniHandles.hpp"
51 #include "runtime/objectMonitor.hpp"
52 #include "runtime/os.hpp"
53 #include "runtime/safepoint.hpp"
54 #include "runtime/safepointMechanism.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/checkedCast.hpp"
58 #include "utilities/macros.hpp"
59
60 #ifdef PRODUCT
61 #define BLOCK_COMMENT(str) /* nothing */
62 #define STOP(error) stop(error)
63 #else
64 #define BLOCK_COMMENT(str) block_comment(str)
65 #define STOP(error) block_comment(error); stop(error)
66 #endif
67
68 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
69
70 #ifdef ASSERT
71 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
72 #endif
73
74 static const Assembler::Condition reverse[] = {
75 Assembler::noOverflow /* overflow = 0x0 */ ,
76 Assembler::overflow /* noOverflow = 0x1 */ ,
77 Assembler::aboveEqual /* carrySet = 0x2, below = 0x2 */ ,
78 Assembler::below /* aboveEqual = 0x3, carryClear = 0x3 */ ,
1286 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1287 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1288 assert_different_registers(arg_1, c_rarg2);
1289 pass_arg2(this, arg_2);
1290 pass_arg1(this, arg_1);
1291 pass_arg0(this, arg_0);
1292 call_VM_leaf(entry_point, 3);
1293 }
1294
1295 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
1296 assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
1297 assert_different_registers(arg_1, c_rarg2, c_rarg3);
1298 assert_different_registers(arg_2, c_rarg3);
1299 pass_arg3(this, arg_3);
1300 pass_arg2(this, arg_2);
1301 pass_arg1(this, arg_1);
1302 pass_arg0(this, arg_0);
1303 call_VM_leaf(entry_point, 3);
1304 }
1305
1306 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
1307 pass_arg0(this, arg_0);
1308 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1309 }
1310
1311 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
1312 assert_different_registers(arg_0, c_rarg1);
1313 pass_arg1(this, arg_1);
1314 pass_arg0(this, arg_0);
1315 MacroAssembler::call_VM_leaf_base(entry_point, 2);
1316 }
1317
1318 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1319 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1320 assert_different_registers(arg_1, c_rarg2);
1321 pass_arg2(this, arg_2);
1322 pass_arg1(this, arg_1);
1323 pass_arg0(this, arg_0);
1324 MacroAssembler::call_VM_leaf_base(entry_point, 3);
1325 }
2347 lea(rscratch, src);
2348 Assembler::mulss(dst, Address(rscratch, 0));
2349 }
2350 }
2351
2352 void MacroAssembler::null_check(Register reg, int offset) {
2353 if (needs_explicit_null_check(offset)) {
2354 // provoke OS null exception if reg is null by
2355 // accessing M[reg] w/o changing any (non-CC) registers
2356 // NOTE: cmpl is plenty here to provoke a segv
2357 cmpptr(rax, Address(reg, 0));
2358 // Note: should probably use testl(rax, Address(reg, 0));
2359 // may be shorter code (however, this version of
2360 // testl needs to be implemented first)
2361 } else {
2362 // nothing to do, (later) access of M[reg + offset]
2363 // will provoke OS null exception if reg is null
2364 }
2365 }
2366
2367 void MacroAssembler::os_breakpoint() {
2368 // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
2369 // (e.g., MSVC can't call ps() otherwise)
2370 call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
2371 }
2372
2373 void MacroAssembler::unimplemented(const char* what) {
2374 const char* buf = nullptr;
2375 {
2376 ResourceMark rm;
2377 stringStream ss;
2378 ss.print("unimplemented: %s", what);
2379 buf = code_string(ss.as_string());
2380 }
2381 stop(buf);
2382 }
2383
2384 #define XSTATE_BV 0x200
2385
2386 void MacroAssembler::pop_CPU_state() {
3451 }
3452
3453 // C++ bool manipulation
3454 void MacroAssembler::testbool(Register dst) {
3455 if(sizeof(bool) == 1)
3456 testb(dst, 0xff);
3457 else if(sizeof(bool) == 2) {
3458 // testw implementation needed for two byte bools
3459 ShouldNotReachHere();
3460 } else if(sizeof(bool) == 4)
3461 testl(dst, dst);
3462 else
3463 // unsupported
3464 ShouldNotReachHere();
3465 }
3466
3467 void MacroAssembler::testptr(Register dst, Register src) {
3468 testq(dst, src);
3469 }
3470
3471 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
3472 void MacroAssembler::tlab_allocate(Register obj,
3473 Register var_size_in_bytes,
3474 int con_size_in_bytes,
3475 Register t1,
3476 Register t2,
3477 Label& slow_case) {
3478 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
3479 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
3480 }
3481
3482 RegSet MacroAssembler::call_clobbered_gp_registers() {
3483 RegSet regs;
3484 regs += RegSet::of(rax, rcx, rdx);
3485 #ifndef _WINDOWS
3486 regs += RegSet::of(rsi, rdi);
3487 #endif
3488 regs += RegSet::range(r8, r11);
3489 if (UseAPX) {
3490 regs += RegSet::range(r16, as_Register(Register::number_of_registers - 1));
3654 xorptr(temp, temp); // use _zero reg to clear memory (shorter code)
3655 if (UseIncDec) {
3656 shrptr(index, 3); // divide by 8/16 and set carry flag if bit 2 was set
3657 } else {
3658 shrptr(index, 2); // use 2 instructions to avoid partial flag stall
3659 shrptr(index, 1);
3660 }
3661
3662 // initialize remaining object fields: index is a multiple of 2 now
3663 {
3664 Label loop;
3665 bind(loop);
3666 movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
3667 decrement(index);
3668 jcc(Assembler::notZero, loop);
3669 }
3670
3671 bind(done);
3672 }
3673
3674 // Look up the method for a megamorphic invokeinterface call.
3675 // The target method is determined by <intf_klass, itable_index>.
3676 // The receiver klass is in recv_klass.
3677 // On success, the result will be in method_result, and execution falls through.
3678 // On failure, execution transfers to the given label.
3679 void MacroAssembler::lookup_interface_method(Register recv_klass,
3680 Register intf_klass,
3681 RegisterOrConstant itable_index,
3682 Register method_result,
3683 Register scan_temp,
3684 Label& L_no_such_interface,
3685 bool return_method) {
3686 assert_different_registers(recv_klass, intf_klass, scan_temp);
3687 assert_different_registers(method_result, intf_klass, scan_temp);
3688 assert(recv_klass != method_result || !return_method,
3689 "recv_klass can be destroyed when method isn't needed");
3690
3691 assert(itable_index.is_constant() || itable_index.as_register() == method_result,
3692 "caller must use same register for non-constant itable index as for method");
3693
4704 } else {
4705 Label L;
4706 jccb(negate_condition(cc), L);
4707 movl(dst, src);
4708 bind(L);
4709 }
4710 }
4711
4712 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
4713 if (VM_Version::supports_cmov()) {
4714 cmovl(cc, dst, src);
4715 } else {
4716 Label L;
4717 jccb(negate_condition(cc), L);
4718 movl(dst, src);
4719 bind(L);
4720 }
4721 }
4722
4723 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
4724 if (!VerifyOops) return;
4725
4726 BLOCK_COMMENT("verify_oop {");
4727 push(rscratch1);
4728 push(rax); // save rax
4729 push(reg); // pass register argument
4730
4731 // Pass register number to verify_oop_subroutine
4732 const char* b = nullptr;
4733 {
4734 ResourceMark rm;
4735 stringStream ss;
4736 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
4737 b = code_string(ss.as_string());
4738 }
4739 AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
4740 pushptr(buffer.addr(), rscratch1);
4741
4742 // call indirectly to solve generation ordering problem
4743 movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
4744 call(rax);
4960 // or something else. Since this is a slow path, we can optimize for code density,
4961 // and just restart the search from the beginning.
4962 jmpb(L_restart);
4963
4964 // Counter updates:
4965
4966 // Increment polymorphic counter instead of receiver slot.
4967 bind(L_polymorphic);
4968 movptr(offset, poly_count_offset);
4969 jmpb(L_count_update);
4970
4971 // Found a receiver, convert its slot offset to corresponding count offset.
4972 bind(L_found_recv);
4973 addptr(offset, receiver_to_count_step);
4974
4975 bind(L_count_update);
4976 addptr(Address(mdp, offset, Address::times_ptr), DataLayout::counter_increment);
4977 }
4978
4979 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
4980 if (!VerifyOops) return;
4981
4982 push(rscratch1);
4983 push(rax); // save rax,
4984 // addr may contain rsp so we will have to adjust it based on the push
4985 // we just did (and on 64 bit we do two pushes)
4986 // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
4987 // stores rax into addr which is backwards of what was intended.
4988 if (addr.uses(rsp)) {
4989 lea(rax, addr);
4990 pushptr(Address(rax, 2 * BytesPerWord));
4991 } else {
4992 pushptr(addr);
4993 }
4994
4995 // Pass register number to verify_oop_subroutine
4996 const char* b = nullptr;
4997 {
4998 ResourceMark rm;
4999 stringStream ss;
5000 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
5354
5355 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
5356 // get mirror
5357 const int mirror_offset = in_bytes(Klass::java_mirror_offset());
5358 load_method_holder(mirror, method);
5359 movptr(mirror, Address(mirror, mirror_offset));
5360 resolve_oop_handle(mirror, tmp);
5361 }
5362
5363 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5364 load_method_holder(rresult, rmethod);
5365 movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5366 }
5367
5368 void MacroAssembler::load_method_holder(Register holder, Register method) {
5369 movptr(holder, Address(method, Method::const_offset())); // ConstMethod*
5370 movptr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5371 movptr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5372 }
5373
5374 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5375 assert(UseCompactObjectHeaders, "expect compact object headers");
5376 movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5377 shrq(dst, markWord::klass_shift);
5378 }
5379
5380 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
5381 assert_different_registers(src, tmp);
5382 assert_different_registers(dst, tmp);
5383
5384 if (UseCompactObjectHeaders) {
5385 load_narrow_klass_compact(dst, src);
5386 decode_klass_not_null(dst, tmp);
5387 } else if (UseCompressedClassPointers) {
5388 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5389 decode_klass_not_null(dst, tmp);
5390 } else {
5391 movptr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5392 }
5393 }
5394
5395 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
5396 assert(!UseCompactObjectHeaders, "not with compact headers");
5397 assert_different_registers(src, tmp);
5398 assert_different_registers(dst, tmp);
5399 if (UseCompressedClassPointers) {
5400 encode_klass_not_null(src, tmp);
5401 movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5402 } else {
5403 movptr(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5404 }
5405 }
5406
5407 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
5408 if (UseCompactObjectHeaders) {
5409 assert(tmp != noreg, "need tmp");
5410 assert_different_registers(klass, obj, tmp);
5411 load_narrow_klass_compact(tmp, obj);
5412 cmpl(klass, tmp);
5413 } else if (UseCompressedClassPointers) {
5414 cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
5440 bool as_raw = (decorators & AS_RAW) != 0;
5441 if (as_raw) {
5442 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
5443 } else {
5444 bs->load_at(this, decorators, type, dst, src, tmp1);
5445 }
5446 }
5447
5448 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
5449 Register tmp1, Register tmp2, Register tmp3) {
5450 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5451 decorators = AccessInternal::decorator_fixup(decorators, type);
5452 bool as_raw = (decorators & AS_RAW) != 0;
5453 if (as_raw) {
5454 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5455 } else {
5456 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5457 }
5458 }
5459
5460 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5461 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
5462 }
5463
5464 // Doesn't do verification, generates fixed size code
5465 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5466 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
5467 }
5468
5469 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5470 Register tmp2, Register tmp3, DecoratorSet decorators) {
5471 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5472 }
5473
5474 // Used for storing nulls.
5475 void MacroAssembler::store_heap_oop_null(Address dst) {
5476 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5477 }
5478
5479 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5796 assert (oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5797 int klass_index = oop_recorder()->find_index(k);
5798 RelocationHolder rspec = metadata_Relocation::spec(klass_index);
5799 Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
5800 }
5801
5802 void MacroAssembler::reinit_heapbase() {
5803 if (UseCompressedOops) {
5804 if (Universe::heap() != nullptr) {
5805 if (CompressedOops::base() == nullptr) {
5806 MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
5807 } else {
5808 mov64(r12_heapbase, (int64_t)CompressedOops::base());
5809 }
5810 } else {
5811 movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
5812 }
5813 }
5814 }
5815
5816 #if COMPILER2_OR_JVMCI
5817
5818 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
5819 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
5820 // cnt - number of qwords (8-byte words).
5821 // base - start address, qword aligned.
5822 Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
5823 bool use64byteVector = (MaxVectorSize == 64) && (VM_Version::avx3_threshold() == 0);
5824 if (use64byteVector) {
5825 vpxor(xtmp, xtmp, xtmp, AVX_512bit);
5826 } else if (MaxVectorSize >= 32) {
5827 vpxor(xtmp, xtmp, xtmp, AVX_256bit);
5828 } else {
5829 pxor(xtmp, xtmp);
5830 }
5831 jmp(L_zero_64_bytes);
5832
5833 BIND(L_loop);
5834 if (MaxVectorSize >= 32) {
5835 fill64(base, 0, xtmp, use64byteVector);
5836 } else {
5837 movdqu(Address(base, 0), xtmp);
5838 movdqu(Address(base, 16), xtmp);
5839 movdqu(Address(base, 32), xtmp);
5840 movdqu(Address(base, 48), xtmp);
5841 }
5842 addptr(base, 64);
5843
5844 BIND(L_zero_64_bytes);
5845 subptr(cnt, 8);
5846 jccb(Assembler::greaterEqual, L_loop);
5847
5848 // Copy trailing 64 bytes
5849 if (use64byteVector) {
5850 addptr(cnt, 8);
5851 jccb(Assembler::equal, L_end);
5852 fill64_masked(3, base, 0, xtmp, mask, cnt, rtmp, true);
5853 jmp(L_end);
5854 } else {
5855 addptr(cnt, 4);
5856 jccb(Assembler::less, L_tail);
5857 if (MaxVectorSize >= 32) {
5858 vmovdqu(Address(base, 0), xtmp);
5859 } else {
5860 movdqu(Address(base, 0), xtmp);
5861 movdqu(Address(base, 16), xtmp);
5862 }
5863 }
5864 addptr(base, 32);
5865 subptr(cnt, 4);
5866
5867 BIND(L_tail);
5868 addptr(cnt, 4);
5869 jccb(Assembler::lessEqual, L_end);
5870 if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
5871 fill32_masked(3, base, 0, xtmp, mask, cnt, rtmp);
5872 } else {
5873 decrement(cnt);
5874
5875 BIND(L_sloop);
5876 movq(Address(base, 0), xtmp);
5877 addptr(base, 8);
5878 decrement(cnt);
5879 jccb(Assembler::greaterEqual, L_sloop);
5880 }
5881 BIND(L_end);
5882 }
5883
5884 // Clearing constant sized memory using YMM/ZMM registers.
5885 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
5886 assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
5887 bool use64byteVector = (MaxVectorSize > 32) && (VM_Version::avx3_threshold() == 0);
5888
5889 int vector64_count = (cnt & (~0x7)) >> 3;
5890 cnt = cnt & 0x7;
5891 const int fill64_per_loop = 4;
5953 break;
5954 case 7:
5955 if (use64byteVector) {
5956 movl(rtmp, 0x7F);
5957 kmovwl(mask, rtmp);
5958 evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
5959 } else {
5960 evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
5961 movl(rtmp, 0x7);
5962 kmovwl(mask, rtmp);
5963 evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
5964 }
5965 break;
5966 default:
5967 fatal("Unexpected length : %d\n",cnt);
5968 break;
5969 }
5970 }
5971 }
5972
5973 void MacroAssembler::clear_mem(Register base, Register cnt, Register tmp, XMMRegister xtmp,
5974 bool is_large, KRegister mask) {
5975 // cnt - number of qwords (8-byte words).
5976 // base - start address, qword aligned.
5977 // is_large - if optimizers know cnt is larger than InitArrayShortSize
5978 assert(base==rdi, "base register must be edi for rep stos");
5979 assert(tmp==rax, "tmp register must be eax for rep stos");
5980 assert(cnt==rcx, "cnt register must be ecx for rep stos");
5981 assert(InitArrayShortSize % BytesPerLong == 0,
5982 "InitArrayShortSize should be the multiple of BytesPerLong");
5983
5984 Label DONE;
5985 if (!is_large || !UseXMMForObjInit) {
5986 xorptr(tmp, tmp);
5987 }
5988
5989 if (!is_large) {
5990 Label LOOP, LONG;
5991 cmpptr(cnt, InitArrayShortSize/BytesPerLong);
5992 jccb(Assembler::greater, LONG);
5993
5994 decrement(cnt);
5995 jccb(Assembler::negative, DONE); // Zero length
5996
5997 // Use individual pointer-sized stores for small counts:
5998 BIND(LOOP);
5999 movptr(Address(base, cnt, Address::times_ptr), tmp);
6000 decrement(cnt);
6001 jccb(Assembler::greaterEqual, LOOP);
6002 jmpb(DONE);
6003
6004 BIND(LONG);
6005 }
6006
6007 // Use longer rep-prefixed ops for non-small counts:
6008 if (UseFastStosb) {
6009 shlptr(cnt, 3); // convert to number of bytes
6010 rep_stosb();
6011 } else if (UseXMMForObjInit) {
6012 xmm_clear_mem(base, cnt, tmp, xtmp, mask);
6013 } else {
6014 rep_stos();
6015 }
6016
6017 BIND(DONE);
6018 }
6019
6020 #endif //COMPILER2_OR_JVMCI
6021
6022
6023 void MacroAssembler::generate_fill(BasicType t, bool aligned,
6024 Register to, Register value, Register count,
6025 Register rtmp, XMMRegister xtmp) {
6026 ShortBranchVerifier sbv(this);
6027 assert_different_registers(to, value, count, rtmp);
6028 Label L_exit;
6029 Label L_fill_2_bytes, L_fill_4_bytes;
6030
6031 #if defined(COMPILER2)
6032 if(MaxVectorSize >=32 &&
9912
9913 // Load top.
9914 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
9915
9916 // Check if the lock-stack is full.
9917 cmpl(top, LockStack::end_offset());
9918 jcc(Assembler::greaterEqual, slow);
9919
9920 // Check for recursion.
9921 cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
9922 jcc(Assembler::equal, push);
9923
9924 // Check header for monitor (0b10).
9925 testptr(reg_rax, markWord::monitor_value);
9926 jcc(Assembler::notZero, slow);
9927
9928 // Try to lock. Transition lock bits 0b01 => 0b00
9929 movptr(tmp, reg_rax);
9930 andptr(tmp, ~(int32_t)markWord::unlocked_value);
9931 orptr(reg_rax, markWord::unlocked_value);
9932 lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
9933 jcc(Assembler::notEqual, slow);
9934
9935 // Restore top, CAS clobbers register.
9936 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
9937
9938 bind(push);
9939 // After successful lock, push object on lock-stack.
9940 movptr(Address(thread, top), obj);
9941 incrementl(top, oopSize);
9942 movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
9943 }
9944
9945 // Implements fast-unlocking.
9946 //
9947 // obj: the object to be unlocked
9948 // reg_rax: rax
9949 // thread: the thread
9950 // tmp: a temporary register
9951 void MacroAssembler::fast_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {
|
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/assembler.hpp"
26 #include "asm/assembler.inline.hpp"
27 #include "code/aotCodeCache.hpp"
28 #include "code/compiledIC.hpp"
29 #include "compiler/compiler_globals.hpp"
30 #include "compiler/disassembler.hpp"
31 #include "ci/ciInlineKlass.hpp"
32 #include "crc32c.h"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/collectedHeap.inline.hpp"
36 #include "gc/shared/tlab_globals.hpp"
37 #include "interpreter/bytecodeHistogram.hpp"
38 #include "interpreter/interpreter.hpp"
39 #include "interpreter/interpreterRuntime.hpp"
40 #include "jvm.h"
41 #include "memory/resourceArea.hpp"
42 #include "memory/universe.hpp"
43 #include "oops/accessDecorators.hpp"
44 #include "oops/compressedKlass.inline.hpp"
45 #include "oops/compressedOops.inline.hpp"
46 #include "oops/klass.inline.hpp"
47 #include "oops/resolvedFieldEntry.hpp"
48 #include "prims/methodHandles.hpp"
49 #include "runtime/arguments.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/interfaceSupport.inline.hpp"
52 #include "runtime/javaThread.hpp"
53 #include "runtime/jniHandles.hpp"
54 #include "runtime/objectMonitor.hpp"
55 #include "runtime/os.hpp"
56 #include "runtime/safepoint.hpp"
57 #include "runtime/safepointMechanism.hpp"
58 #include "runtime/sharedRuntime.hpp"
59 #include "runtime/signature_cc.hpp"
60 #include "runtime/stubRoutines.hpp"
61 #include "utilities/checkedCast.hpp"
62 #include "utilities/macros.hpp"
63 #include "vmreg_x86.inline.hpp"
64 #ifdef COMPILER2
65 #include "opto/output.hpp"
66 #endif
67
68 #ifdef PRODUCT
69 #define BLOCK_COMMENT(str) /* nothing */
70 #define STOP(error) stop(error)
71 #else
72 #define BLOCK_COMMENT(str) block_comment(str)
73 #define STOP(error) block_comment(error); stop(error)
74 #endif
75
76 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
77
78 #ifdef ASSERT
79 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
80 #endif
81
82 static const Assembler::Condition reverse[] = {
83 Assembler::noOverflow /* overflow = 0x0 */ ,
84 Assembler::overflow /* noOverflow = 0x1 */ ,
85 Assembler::aboveEqual /* carrySet = 0x2, below = 0x2 */ ,
86 Assembler::below /* aboveEqual = 0x3, carryClear = 0x3 */ ,
1294 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1295 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1296 assert_different_registers(arg_1, c_rarg2);
1297 pass_arg2(this, arg_2);
1298 pass_arg1(this, arg_1);
1299 pass_arg0(this, arg_0);
1300 call_VM_leaf(entry_point, 3);
1301 }
1302
1303 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
1304 assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
1305 assert_different_registers(arg_1, c_rarg2, c_rarg3);
1306 assert_different_registers(arg_2, c_rarg3);
1307 pass_arg3(this, arg_3);
1308 pass_arg2(this, arg_2);
1309 pass_arg1(this, arg_1);
1310 pass_arg0(this, arg_0);
1311 call_VM_leaf(entry_point, 3);
1312 }
1313
1314 void MacroAssembler::super_call_VM_leaf(address entry_point) {
1315 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1316 }
1317
1318 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
1319 pass_arg0(this, arg_0);
1320 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1321 }
1322
1323 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
1324 assert_different_registers(arg_0, c_rarg1);
1325 pass_arg1(this, arg_1);
1326 pass_arg0(this, arg_0);
1327 MacroAssembler::call_VM_leaf_base(entry_point, 2);
1328 }
1329
1330 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1331 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1332 assert_different_registers(arg_1, c_rarg2);
1333 pass_arg2(this, arg_2);
1334 pass_arg1(this, arg_1);
1335 pass_arg0(this, arg_0);
1336 MacroAssembler::call_VM_leaf_base(entry_point, 3);
1337 }
2359 lea(rscratch, src);
2360 Assembler::mulss(dst, Address(rscratch, 0));
2361 }
2362 }
2363
2364 void MacroAssembler::null_check(Register reg, int offset) {
2365 if (needs_explicit_null_check(offset)) {
2366 // provoke OS null exception if reg is null by
2367 // accessing M[reg] w/o changing any (non-CC) registers
2368 // NOTE: cmpl is plenty here to provoke a segv
2369 cmpptr(rax, Address(reg, 0));
2370 // Note: should probably use testl(rax, Address(reg, 0));
2371 // may be shorter code (however, this version of
2372 // testl needs to be implemented first)
2373 } else {
2374 // nothing to do, (later) access of M[reg + offset]
2375 // will provoke OS null exception if reg is null
2376 }
2377 }
2378
2379 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2380 andptr(markword, markWord::inline_type_mask_in_place);
2381 cmpptr(markword, markWord::inline_type_pattern);
2382 jcc(Assembler::equal, is_inline_type);
2383 }
2384
2385 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2386 if (can_be_null) {
2387 testptr(object, object);
2388 jcc(Assembler::zero, not_inline_type);
2389 }
2390 const int is_inline_type_mask = markWord::inline_type_pattern;
2391 movptr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2392 andptr(tmp, is_inline_type_mask);
2393 cmpptr(tmp, is_inline_type_mask);
2394 jcc(Assembler::notEqual, not_inline_type);
2395 }
2396
2397 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2398 movl(temp_reg, flags);
2399 testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
2400 jcc(Assembler::notEqual, is_null_free_inline_type);
2401 }
2402
2403 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2404 movl(temp_reg, flags);
2405 testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
2406 jcc(Assembler::equal, not_null_free_inline_type);
2407 }
2408
2409 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2410 movl(temp_reg, flags);
2411 testl(temp_reg, 1 << ResolvedFieldEntry::is_flat_shift);
2412 jcc(Assembler::notEqual, is_flat);
2413 }
2414
2415 void MacroAssembler::test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker) {
2416 movl(temp_reg, flags);
2417 testl(temp_reg, 1 << ResolvedFieldEntry::has_null_marker_shift);
2418 jcc(Assembler::notEqual, has_null_marker);
2419 }
2420
2421 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2422 Label test_mark_word;
2423 // load mark word
2424 movptr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2425 // check displaced
2426 testl(temp_reg, markWord::unlocked_value);
2427 jccb(Assembler::notZero, test_mark_word);
2428 // slow path use klass prototype
2429 push(rscratch1);
2430 load_prototype_header(temp_reg, oop, rscratch1);
2431 pop(rscratch1);
2432
2433 bind(test_mark_word);
2434 testl(temp_reg, test_bit);
2435 jcc((jmp_set) ? Assembler::notZero : Assembler::zero, jmp_label);
2436 }
2437
2438 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg,
2439 Label& is_flat_array) {
2440 #ifdef _LP64
2441 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2442 #else
2443 load_klass(temp_reg, oop, noreg);
2444 movl(temp_reg, Address(temp_reg, Klass::layout_helper_offset()));
2445 test_flat_array_layout(temp_reg, is_flat_array);
2446 #endif
2447 }
2448
2449 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2450 Label& is_non_flat_array) {
2451 #ifdef _LP64
2452 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2453 #else
2454 load_klass(temp_reg, oop, noreg);
2455 movl(temp_reg, Address(temp_reg, Klass::layout_helper_offset()));
2456 test_non_flat_array_layout(temp_reg, is_non_flat_array);
2457 #endif
2458 }
2459
2460 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label&is_null_free_array) {
2461 #ifdef _LP64
2462 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2463 #else
2464 Unimplemented();
2465 #endif
2466 }
2467
2468 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2469 #ifdef _LP64
2470 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2471 #else
2472 Unimplemented();
2473 #endif
2474 }
2475
2476 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2477 testl(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2478 jcc(Assembler::notZero, is_flat_array);
2479 }
2480
2481 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
2482 testl(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2483 jcc(Assembler::zero, is_non_flat_array);
2484 }
2485
2486 void MacroAssembler::os_breakpoint() {
2487 // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
2488 // (e.g., MSVC can't call ps() otherwise)
2489 call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
2490 }
2491
2492 void MacroAssembler::unimplemented(const char* what) {
2493 const char* buf = nullptr;
2494 {
2495 ResourceMark rm;
2496 stringStream ss;
2497 ss.print("unimplemented: %s", what);
2498 buf = code_string(ss.as_string());
2499 }
2500 stop(buf);
2501 }
2502
2503 #define XSTATE_BV 0x200
2504
2505 void MacroAssembler::pop_CPU_state() {
3570 }
3571
3572 // C++ bool manipulation
3573 void MacroAssembler::testbool(Register dst) {
3574 if(sizeof(bool) == 1)
3575 testb(dst, 0xff);
3576 else if(sizeof(bool) == 2) {
3577 // testw implementation needed for two byte bools
3578 ShouldNotReachHere();
3579 } else if(sizeof(bool) == 4)
3580 testl(dst, dst);
3581 else
3582 // unsupported
3583 ShouldNotReachHere();
3584 }
3585
3586 void MacroAssembler::testptr(Register dst, Register src) {
3587 testq(dst, src);
3588 }
3589
3590 // Object / value buffer allocation...
3591 //
3592 // Kills klass and rsi on LP64
3593 void MacroAssembler::allocate_instance(Register klass, Register new_obj,
3594 Register t1, Register t2,
3595 bool clear_fields, Label& alloc_failed)
3596 {
3597 Label done, initialize_header, initialize_object, slow_case, slow_case_no_pop;
3598 Register layout_size = t1;
3599 assert(new_obj == rax, "needs to be rax");
3600 assert_different_registers(klass, new_obj, t1, t2);
3601
3602 // get instance_size in InstanceKlass (scaled to a count of bytes)
3603 movl(layout_size, Address(klass, Klass::layout_helper_offset()));
3604 // test to see if it is malformed in some way
3605 testl(layout_size, Klass::_lh_instance_slow_path_bit);
3606 jcc(Assembler::notZero, slow_case_no_pop);
3607
3608 // Allocate the instance:
3609 // If TLAB is enabled:
3610 // Try to allocate in the TLAB.
3611 // If fails, go to the slow path.
3612 // Else If inline contiguous allocations are enabled:
3613 // Try to allocate in eden.
3614 // If fails due to heap end, go to slow path.
3615 //
3616 // If TLAB is enabled OR inline contiguous is enabled:
3617 // Initialize the allocation.
3618 // Exit.
3619 //
3620 // Go to slow path.
3621
3622 push(klass);
3623 if (UseTLAB) {
3624 tlab_allocate(new_obj, layout_size, 0, klass, t2, slow_case);
3625 if (ZeroTLAB || (!clear_fields)) {
3626 // the fields have been already cleared
3627 jmp(initialize_header);
3628 } else {
3629 // initialize both the header and fields
3630 jmp(initialize_object);
3631 }
3632 } else {
3633 jmp(slow_case);
3634 }
3635
3636 // If UseTLAB is true, the object is created above and there is an initialize need.
3637 // Otherwise, skip and go to the slow path.
3638 if (UseTLAB) {
3639 if (clear_fields) {
3640 // The object is initialized before the header. If the object size is
3641 // zero, go directly to the header initialization.
3642 bind(initialize_object);
3643 if (UseCompactObjectHeaders) {
3644 assert(is_aligned(oopDesc::base_offset_in_bytes(), BytesPerLong), "oop base offset must be 8-byte-aligned");
3645 decrement(layout_size, oopDesc::base_offset_in_bytes());
3646 } else {
3647 decrement(layout_size, sizeof(oopDesc));
3648 }
3649 jcc(Assembler::zero, initialize_header);
3650
3651 // Initialize topmost object field, divide size by 8, check if odd and
3652 // test if zero.
3653 Register zero = klass;
3654 xorl(zero, zero); // use zero reg to clear memory (shorter code)
3655 shrl(layout_size, LogBytesPerLong); // divide by 2*oopSize and set carry flag if odd
3656
3657 #ifdef ASSERT
3658 // make sure instance_size was multiple of 8
3659 Label L;
3660 // Ignore partial flag stall after shrl() since it is debug VM
3661 jcc(Assembler::carryClear, L);
3662 stop("object size is not multiple of 2 - adjust this code");
3663 bind(L);
3664 // must be > 0, no extra check needed here
3665 #endif
3666
3667 // initialize remaining object fields: instance_size was a multiple of 8
3668 {
3669 Label loop;
3670 bind(loop);
3671 int header_size_bytes = oopDesc::header_size() * HeapWordSize;
3672 assert(is_aligned(header_size_bytes, BytesPerLong), "oop header size must be 8-byte-aligned");
3673 movptr(Address(new_obj, layout_size, Address::times_8, header_size_bytes - 1*oopSize), zero);
3674 decrement(layout_size);
3675 jcc(Assembler::notZero, loop);
3676 }
3677 } // clear_fields
3678
3679 // initialize object header only.
3680 bind(initialize_header);
3681 if (UseCompactObjectHeaders || Arguments::is_valhalla_enabled()) {
3682 pop(klass);
3683 Register mark_word = t2;
3684 movptr(mark_word, Address(klass, Klass::prototype_header_offset()));
3685 movptr(Address(new_obj, oopDesc::mark_offset_in_bytes ()), mark_word);
3686 } else {
3687 movptr(Address(new_obj, oopDesc::mark_offset_in_bytes()),
3688 (intptr_t)markWord::prototype().value()); // header
3689 pop(klass); // get saved klass back in the register.
3690 }
3691 if (!UseCompactObjectHeaders) {
3692 xorl(rsi, rsi); // use zero reg to clear memory (shorter code)
3693 store_klass_gap(new_obj, rsi); // zero klass gap for compressed oops
3694 movptr(t2, klass); // preserve klass
3695 store_klass(new_obj, t2, rscratch1); // src klass reg is potentially compressed
3696 }
3697 jmp(done);
3698 }
3699
3700 bind(slow_case);
3701 pop(klass);
3702 bind(slow_case_no_pop);
3703 jmp(alloc_failed);
3704
3705 bind(done);
3706 }
3707
3708 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
3709 void MacroAssembler::tlab_allocate(Register obj,
3710 Register var_size_in_bytes,
3711 int con_size_in_bytes,
3712 Register t1,
3713 Register t2,
3714 Label& slow_case) {
3715 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
3716 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
3717 }
3718
3719 RegSet MacroAssembler::call_clobbered_gp_registers() {
3720 RegSet regs;
3721 regs += RegSet::of(rax, rcx, rdx);
3722 #ifndef _WINDOWS
3723 regs += RegSet::of(rsi, rdi);
3724 #endif
3725 regs += RegSet::range(r8, r11);
3726 if (UseAPX) {
3727 regs += RegSet::range(r16, as_Register(Register::number_of_registers - 1));
3891 xorptr(temp, temp); // use _zero reg to clear memory (shorter code)
3892 if (UseIncDec) {
3893 shrptr(index, 3); // divide by 8/16 and set carry flag if bit 2 was set
3894 } else {
3895 shrptr(index, 2); // use 2 instructions to avoid partial flag stall
3896 shrptr(index, 1);
3897 }
3898
3899 // initialize remaining object fields: index is a multiple of 2 now
3900 {
3901 Label loop;
3902 bind(loop);
3903 movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
3904 decrement(index);
3905 jcc(Assembler::notZero, loop);
3906 }
3907
3908 bind(done);
3909 }
3910
3911 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
3912 movptr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
3913 #ifdef ASSERT
3914 {
3915 Label done;
3916 cmpptr(layout_info, 0);
3917 jcc(Assembler::notEqual, done);
3918 stop("inline_layout_info_array is null");
3919 bind(done);
3920 }
3921 #endif
3922
3923 InlineLayoutInfo array[2];
3924 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
3925 if (is_power_of_2(size)) {
3926 shll(index, log2i_exact(size)); // Scale index by power of 2
3927 } else {
3928 imull(index, index, size); // Scale the index to be the entry index * array_element_size
3929 }
3930 lea(layout_info, Address(layout_info, index, Address::times_1, Array<InlineLayoutInfo>::base_offset_in_bytes()));
3931 }
3932
3933 // Look up the method for a megamorphic invokeinterface call.
3934 // The target method is determined by <intf_klass, itable_index>.
3935 // The receiver klass is in recv_klass.
3936 // On success, the result will be in method_result, and execution falls through.
3937 // On failure, execution transfers to the given label.
3938 void MacroAssembler::lookup_interface_method(Register recv_klass,
3939 Register intf_klass,
3940 RegisterOrConstant itable_index,
3941 Register method_result,
3942 Register scan_temp,
3943 Label& L_no_such_interface,
3944 bool return_method) {
3945 assert_different_registers(recv_klass, intf_klass, scan_temp);
3946 assert_different_registers(method_result, intf_klass, scan_temp);
3947 assert(recv_klass != method_result || !return_method,
3948 "recv_klass can be destroyed when method isn't needed");
3949
3950 assert(itable_index.is_constant() || itable_index.as_register() == method_result,
3951 "caller must use same register for non-constant itable index as for method");
3952
4963 } else {
4964 Label L;
4965 jccb(negate_condition(cc), L);
4966 movl(dst, src);
4967 bind(L);
4968 }
4969 }
4970
4971 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
4972 if (VM_Version::supports_cmov()) {
4973 cmovl(cc, dst, src);
4974 } else {
4975 Label L;
4976 jccb(negate_condition(cc), L);
4977 movl(dst, src);
4978 bind(L);
4979 }
4980 }
4981
4982 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
4983 if (!VerifyOops || VerifyAdapterSharing) {
4984 // Below address of the code string confuses VerifyAdapterSharing
4985 // because it may differ between otherwise equivalent adapters.
4986 return;
4987 }
4988
4989 BLOCK_COMMENT("verify_oop {");
4990 push(rscratch1);
4991 push(rax); // save rax
4992 push(reg); // pass register argument
4993
4994 // Pass register number to verify_oop_subroutine
4995 const char* b = nullptr;
4996 {
4997 ResourceMark rm;
4998 stringStream ss;
4999 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
5000 b = code_string(ss.as_string());
5001 }
5002 AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
5003 pushptr(buffer.addr(), rscratch1);
5004
5005 // call indirectly to solve generation ordering problem
5006 movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
5007 call(rax);
5223 // or something else. Since this is a slow path, we can optimize for code density,
5224 // and just restart the search from the beginning.
5225 jmpb(L_restart);
5226
5227 // Counter updates:
5228
5229 // Increment polymorphic counter instead of receiver slot.
5230 bind(L_polymorphic);
5231 movptr(offset, poly_count_offset);
5232 jmpb(L_count_update);
5233
5234 // Found a receiver, convert its slot offset to corresponding count offset.
5235 bind(L_found_recv);
5236 addptr(offset, receiver_to_count_step);
5237
5238 bind(L_count_update);
5239 addptr(Address(mdp, offset, Address::times_ptr), DataLayout::counter_increment);
5240 }
5241
5242 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
5243 if (!VerifyOops || VerifyAdapterSharing) {
5244 // Below address of the code string confuses VerifyAdapterSharing
5245 // because it may differ between otherwise equivalent adapters.
5246 return;
5247 }
5248
5249 push(rscratch1);
5250 push(rax); // save rax,
5251 // addr may contain rsp so we will have to adjust it based on the push
5252 // we just did (and on 64 bit we do two pushes)
5253 // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
5254 // stores rax into addr which is backwards of what was intended.
5255 if (addr.uses(rsp)) {
5256 lea(rax, addr);
5257 pushptr(Address(rax, 2 * BytesPerWord));
5258 } else {
5259 pushptr(addr);
5260 }
5261
5262 // Pass register number to verify_oop_subroutine
5263 const char* b = nullptr;
5264 {
5265 ResourceMark rm;
5266 stringStream ss;
5267 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
5621
5622 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
5623 // get mirror
5624 const int mirror_offset = in_bytes(Klass::java_mirror_offset());
5625 load_method_holder(mirror, method);
5626 movptr(mirror, Address(mirror, mirror_offset));
5627 resolve_oop_handle(mirror, tmp);
5628 }
5629
5630 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5631 load_method_holder(rresult, rmethod);
5632 movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5633 }
5634
5635 void MacroAssembler::load_method_holder(Register holder, Register method) {
5636 movptr(holder, Address(method, Method::const_offset())); // ConstMethod*
5637 movptr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5638 movptr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5639 }
5640
5641 void MacroAssembler::load_metadata(Register dst, Register src) {
5642 if (UseCompactObjectHeaders) {
5643 load_narrow_klass_compact(dst, src);
5644 } else if (UseCompressedClassPointers) {
5645 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5646 } else {
5647 movptr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5648 }
5649 }
5650
5651 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5652 assert(UseCompactObjectHeaders, "expect compact object headers");
5653 movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5654 shrq(dst, markWord::klass_shift);
5655 }
5656
5657 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
5658 assert_different_registers(src, tmp);
5659 assert_different_registers(dst, tmp);
5660
5661 if (UseCompactObjectHeaders) {
5662 load_narrow_klass_compact(dst, src);
5663 decode_klass_not_null(dst, tmp);
5664 } else if (UseCompressedClassPointers) {
5665 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5666 decode_klass_not_null(dst, tmp);
5667 } else {
5668 movptr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5669 }
5670 }
5671
5672 void MacroAssembler::load_prototype_header(Register dst, Register src, Register tmp) {
5673 load_klass(dst, src, tmp);
5674 movptr(dst, Address(dst, Klass::prototype_header_offset()));
5675 }
5676
5677 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
5678 assert(!UseCompactObjectHeaders, "not with compact headers");
5679 assert_different_registers(src, tmp);
5680 assert_different_registers(dst, tmp);
5681 if (UseCompressedClassPointers) {
5682 encode_klass_not_null(src, tmp);
5683 movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5684 } else {
5685 movptr(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5686 }
5687 }
5688
5689 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
5690 if (UseCompactObjectHeaders) {
5691 assert(tmp != noreg, "need tmp");
5692 assert_different_registers(klass, obj, tmp);
5693 load_narrow_klass_compact(tmp, obj);
5694 cmpl(klass, tmp);
5695 } else if (UseCompressedClassPointers) {
5696 cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
5722 bool as_raw = (decorators & AS_RAW) != 0;
5723 if (as_raw) {
5724 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
5725 } else {
5726 bs->load_at(this, decorators, type, dst, src, tmp1);
5727 }
5728 }
5729
5730 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
5731 Register tmp1, Register tmp2, Register tmp3) {
5732 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5733 decorators = AccessInternal::decorator_fixup(decorators, type);
5734 bool as_raw = (decorators & AS_RAW) != 0;
5735 if (as_raw) {
5736 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5737 } else {
5738 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5739 }
5740 }
5741
5742 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5743 Register inline_layout_info) {
5744 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5745 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5746 }
5747
5748 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5749 movptr(offset, Address(inline_klass, InlineKlass::adr_members_offset()));
5750 movl(offset, Address(offset, InlineKlass::payload_offset_offset()));
5751 }
5752
5753 void MacroAssembler::payload_addr(Register oop, Register data, Register inline_klass) {
5754 // ((address) (void*) o) + vk->payload_offset();
5755 Register offset = (data == oop) ? rscratch1 : data;
5756 payload_offset(inline_klass, offset);
5757 if (data == oop) {
5758 addptr(data, offset);
5759 } else {
5760 lea(data, Address(oop, offset));
5761 }
5762 }
5763
5764 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
5765 Register index, Register data) {
5766 assert(index != rcx, "index needs to shift by rcx");
5767 assert_different_registers(array, array_klass, index);
5768 assert_different_registers(rcx, array, index);
5769
5770 // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
5771 movl(rcx, Address(array_klass, Klass::layout_helper_offset()));
5772
5773 // Klass::layout_helper_log2_element_size(lh)
5774 // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
5775 shrl(rcx, Klass::_lh_log2_element_size_shift);
5776 andl(rcx, Klass::_lh_log2_element_size_mask);
5777 shlptr(index); // index << rcx
5778
5779 lea(data, Address(array, index, Address::times_1, arrayOopDesc::base_offset_in_bytes(T_FLAT_ELEMENT)));
5780 }
5781
5782 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5783 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
5784 }
5785
5786 // Doesn't do verification, generates fixed size code
5787 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5788 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
5789 }
5790
5791 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5792 Register tmp2, Register tmp3, DecoratorSet decorators) {
5793 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5794 }
5795
5796 // Used for storing nulls.
5797 void MacroAssembler::store_heap_oop_null(Address dst) {
5798 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5799 }
5800
5801 void MacroAssembler::store_klass_gap(Register dst, Register src) {
6118 assert (oop_recorder() != nullptr, "this assembler needs an OopRecorder");
6119 int klass_index = oop_recorder()->find_index(k);
6120 RelocationHolder rspec = metadata_Relocation::spec(klass_index);
6121 Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
6122 }
6123
6124 void MacroAssembler::reinit_heapbase() {
6125 if (UseCompressedOops) {
6126 if (Universe::heap() != nullptr) {
6127 if (CompressedOops::base() == nullptr) {
6128 MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
6129 } else {
6130 mov64(r12_heapbase, (int64_t)CompressedOops::base());
6131 }
6132 } else {
6133 movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
6134 }
6135 }
6136 }
6137
6138 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
6139 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
6140 // An inline type might be returned. If fields are in registers we
6141 // need to allocate an inline type instance and initialize it with
6142 // the value of the fields.
6143 Label skip;
6144 // We only need a new buffered inline type if a new one is not returned
6145 testptr(rax, 1);
6146 jcc(Assembler::zero, skip);
6147 int call_offset = -1;
6148
6149 #ifdef _LP64
6150 // The following code is similar to allocate_instance but has some slight differences,
6151 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
6152 // allocating is not necessary if vk != nullptr, etc. allocate_instance is not aware of these.
6153 Label slow_case;
6154 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
6155 mov(rscratch1, rax); // save rax for slow_case since *_allocate may corrupt it when allocation failed
6156 if (vk != nullptr) {
6157 // Called from C1, where the return type is statically known.
6158 movptr(rbx, (intptr_t)vk->get_InlineKlass());
6159 jint lh = vk->layout_helper();
6160 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
6161 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
6162 tlab_allocate(rax, noreg, lh, r13, r14, slow_case);
6163 } else {
6164 jmp(slow_case);
6165 }
6166 } else {
6167 // Call from interpreter. RAX contains ((the InlineKlass* of the return type) | 0x01)
6168 mov(rbx, rax);
6169 andptr(rbx, -2);
6170 if (UseTLAB) {
6171 movl(r14, Address(rbx, Klass::layout_helper_offset()));
6172 testl(r14, Klass::_lh_instance_slow_path_bit);
6173 jcc(Assembler::notZero, slow_case);
6174 tlab_allocate(rax, r14, 0, r13, r14, slow_case);
6175 } else {
6176 jmp(slow_case);
6177 }
6178 }
6179 if (UseTLAB) {
6180 // 2. Initialize buffered inline instance header
6181 Register buffer_obj = rax;
6182 Register klass = rbx;
6183 if (UseCompactObjectHeaders) {
6184 Register mark_word = r13;
6185 movptr(mark_word, Address(klass, Klass::prototype_header_offset()));
6186 movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes()), mark_word);
6187 } else {
6188 movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes()), (intptr_t)markWord::inline_type_prototype().value());
6189 xorl(r13, r13);
6190 store_klass_gap(buffer_obj, r13);
6191 if (vk == nullptr) {
6192 // store_klass corrupts rbx(klass), so save it in r13 for later use (interpreter case only).
6193 mov(r13, klass);
6194 }
6195 store_klass(buffer_obj, klass, rscratch1);
6196 klass = r13;
6197 }
6198 // 3. Initialize its fields with an inline class specific handler
6199 if (vk != nullptr) {
6200 call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
6201 } else {
6202 movptr(rbx, Address(klass, InlineKlass::adr_members_offset()));
6203 movptr(rbx, Address(rbx, InlineKlass::pack_handler_offset()));
6204 call(rbx);
6205 }
6206 jmp(skip);
6207 }
6208 bind(slow_case);
6209 // We failed to allocate a new inline type, fall back to a runtime
6210 // call. Some oop field may be live in some registers but we can't
6211 // tell. That runtime call will take care of preserving them
6212 // across a GC if there's one.
6213 mov(rax, rscratch1);
6214 #endif
6215
6216 if (from_interpreter) {
6217 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
6218 } else {
6219 call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
6220 call_offset = offset();
6221 }
6222
6223 bind(skip);
6224 return call_offset;
6225 }
6226
6227 // Move a value between registers/stack slots and update the reg_state
6228 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
6229 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
6230 if (reg_state[to->value()] == reg_written) {
6231 return true; // Already written
6232 }
6233 if (from != to && bt != T_VOID) {
6234 if (reg_state[to->value()] == reg_readonly) {
6235 return false; // Not yet writable
6236 }
6237 if (from->is_reg()) {
6238 if (to->is_reg()) {
6239 if (from->is_XMMRegister()) {
6240 if (bt == T_DOUBLE) {
6241 movdbl(to->as_XMMRegister(), from->as_XMMRegister());
6242 } else {
6243 assert(bt == T_FLOAT, "must be float");
6244 movflt(to->as_XMMRegister(), from->as_XMMRegister());
6245 }
6246 } else {
6247 movq(to->as_Register(), from->as_Register());
6248 }
6249 } else {
6250 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6251 Address to_addr = Address(rsp, st_off);
6252 if (from->is_XMMRegister()) {
6253 if (bt == T_DOUBLE) {
6254 movdbl(to_addr, from->as_XMMRegister());
6255 } else {
6256 assert(bt == T_FLOAT, "must be float");
6257 movflt(to_addr, from->as_XMMRegister());
6258 }
6259 } else {
6260 movq(to_addr, from->as_Register());
6261 }
6262 }
6263 } else {
6264 Address from_addr = Address(rsp, from->reg2stack() * VMRegImpl::stack_slot_size + wordSize);
6265 if (to->is_reg()) {
6266 if (to->is_XMMRegister()) {
6267 if (bt == T_DOUBLE) {
6268 movdbl(to->as_XMMRegister(), from_addr);
6269 } else {
6270 assert(bt == T_FLOAT, "must be float");
6271 movflt(to->as_XMMRegister(), from_addr);
6272 }
6273 } else {
6274 movq(to->as_Register(), from_addr);
6275 }
6276 } else {
6277 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6278 movq(r13, from_addr);
6279 movq(Address(rsp, st_off), r13);
6280 }
6281 }
6282 }
6283 // Update register states
6284 reg_state[from->value()] = reg_writable;
6285 reg_state[to->value()] = reg_written;
6286 return true;
6287 }
6288
6289 // Calculate the extra stack space required for packing or unpacking inline
6290 // args and adjust the stack pointer (see MacroAssembler::remove_frame).
6291 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
6292 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
6293 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
6294 assert(sp_inc > 0, "sanity");
6295 // Two additional slots to account for return address
6296 sp_inc += 2 * VMRegImpl::stack_slot_size;
6297
6298 push(rbp);
6299 subptr(rsp, sp_inc);
6300 #ifdef ASSERT
6301 movl(Address(rsp, 0), badRegWordVal);
6302 movl(Address(rsp, VMRegImpl::stack_slot_size), badRegWordVal);
6303 #endif
6304 return sp_inc + wordSize; // account for rbp space
6305 }
6306
6307 // Read all fields from an inline type buffer and store the field values in registers/stack slots.
6308 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
6309 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
6310 RegState reg_state[]) {
6311 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
6312 assert(from->is_valid(), "source must be valid");
6313 bool progress = false;
6314 #ifdef ASSERT
6315 const int start_offset = offset();
6316 #endif
6317
6318 Label L_null, L_notNull;
6319 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
6320 Register tmp1 = r10;
6321 Register tmp2 = r13;
6322 Register fromReg = noreg;
6323 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
6324 bool done = true;
6325 bool mark_done = true;
6326 VMReg toReg;
6327 BasicType bt;
6328 // Check if argument requires a null check
6329 bool null_check = false;
6330 VMReg nullCheckReg;
6331 while (stream.next(nullCheckReg, bt)) {
6332 if (sig->at(stream.sig_index())._offset == -1) {
6333 null_check = true;
6334 break;
6335 }
6336 }
6337 stream.reset(sig_index, to_index);
6338 while (stream.next(toReg, bt)) {
6339 assert(toReg->is_valid(), "destination must be valid");
6340 int idx = (int)toReg->value();
6341 if (reg_state[idx] == reg_readonly) {
6342 if (idx != from->value()) {
6343 mark_done = false;
6344 }
6345 done = false;
6346 continue;
6347 } else if (reg_state[idx] == reg_written) {
6348 continue;
6349 }
6350 assert(reg_state[idx] == reg_writable, "must be writable");
6351 reg_state[idx] = reg_written;
6352 progress = true;
6353
6354 if (fromReg == noreg) {
6355 if (from->is_reg()) {
6356 fromReg = from->as_Register();
6357 } else {
6358 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6359 movq(tmp1, Address(rsp, st_off));
6360 fromReg = tmp1;
6361 }
6362 if (null_check) {
6363 // Nullable inline type argument, emit null check
6364 testptr(fromReg, fromReg);
6365 jcc(Assembler::zero, L_null);
6366 }
6367 }
6368 int off = sig->at(stream.sig_index())._offset;
6369 if (off == -1) {
6370 assert(null_check, "Missing null check at");
6371 if (toReg->is_stack()) {
6372 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6373 movq(Address(rsp, st_off), 1);
6374 } else {
6375 movq(toReg->as_Register(), 1);
6376 }
6377 continue;
6378 }
6379 assert(off > 0, "offset in object should be positive");
6380 Address fromAddr = Address(fromReg, off);
6381 if (!toReg->is_XMMRegister()) {
6382 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
6383 if (is_reference_type(bt)) {
6384 load_heap_oop(dst, fromAddr);
6385 } else {
6386 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
6387 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
6388 }
6389 if (toReg->is_stack()) {
6390 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6391 movq(Address(rsp, st_off), dst);
6392 }
6393 } else if (bt == T_DOUBLE) {
6394 movdbl(toReg->as_XMMRegister(), fromAddr);
6395 } else {
6396 assert(bt == T_FLOAT, "must be float");
6397 movflt(toReg->as_XMMRegister(), fromAddr);
6398 }
6399 }
6400 if (progress && null_check) {
6401 if (done) {
6402 jmp(L_notNull);
6403 bind(L_null);
6404 // Set null marker to zero to signal that the argument is null.
6405 // Also set all fields to zero since the runtime requires a canonical
6406 // representation of a flat null.
6407 stream.reset(sig_index, to_index);
6408 while (stream.next(toReg, bt)) {
6409 if (toReg->is_stack()) {
6410 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6411 movq(Address(rsp, st_off), 0);
6412 } else if (toReg->is_XMMRegister()) {
6413 xorps(toReg->as_XMMRegister(), toReg->as_XMMRegister());
6414 } else {
6415 xorl(toReg->as_Register(), toReg->as_Register());
6416 }
6417 }
6418 bind(L_notNull);
6419 } else {
6420 bind(L_null);
6421 }
6422 }
6423
6424 sig_index = stream.sig_index();
6425 to_index = stream.regs_index();
6426
6427 if (mark_done && reg_state[from->value()] != reg_written) {
6428 // This is okay because no one else will write to that slot
6429 reg_state[from->value()] = reg_writable;
6430 }
6431 from_index--;
6432 assert(progress || (start_offset == offset()), "should not emit code");
6433 return done;
6434 }
6435
6436 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
6437 VMRegPair* from, int from_count, int& from_index, VMReg to,
6438 RegState reg_state[], Register val_array) {
6439 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
6440 assert(to->is_valid(), "destination must be valid");
6441
6442 if (reg_state[to->value()] == reg_written) {
6443 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
6444 return true; // Already written
6445 }
6446
6447 // TODO 8284443 Isn't it an issue if below code uses r14 as tmp when it contains a spilled value?
6448 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
6449 Register val_obj_tmp = r11;
6450 Register from_reg_tmp = r14;
6451 Register tmp1 = r10;
6452 Register tmp2 = r13;
6453 Register tmp3 = rbx;
6454 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
6455
6456 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
6457
6458 if (reg_state[to->value()] == reg_readonly) {
6459 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
6460 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
6461 return false; // Not yet writable
6462 }
6463 val_obj = val_obj_tmp;
6464 }
6465
6466 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
6467 load_heap_oop(val_obj, Address(val_array, index));
6468
6469 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
6470 VMReg fromReg;
6471 BasicType bt;
6472 Label L_null;
6473 while (stream.next(fromReg, bt)) {
6474 assert(fromReg->is_valid(), "source must be valid");
6475 reg_state[fromReg->value()] = reg_writable;
6476
6477 int off = sig->at(stream.sig_index())._offset;
6478 if (off == -1) {
6479 // Nullable inline type argument, emit null check
6480 Label L_notNull;
6481 if (fromReg->is_stack()) {
6482 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6483 testb(Address(rsp, ld_off), 1);
6484 } else {
6485 testb(fromReg->as_Register(), 1);
6486 }
6487 jcc(Assembler::notZero, L_notNull);
6488 movptr(val_obj, 0);
6489 jmp(L_null);
6490 bind(L_notNull);
6491 continue;
6492 }
6493
6494 assert(off > 0, "offset in object should be positive");
6495 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
6496
6497 // Pack the scalarized field into the value object.
6498 Address dst(val_obj, off);
6499 if (!fromReg->is_XMMRegister()) {
6500 Register src;
6501 if (fromReg->is_stack()) {
6502 src = from_reg_tmp;
6503 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6504 load_sized_value(src, Address(rsp, ld_off), size_in_bytes, /* is_signed */ false);
6505 } else {
6506 src = fromReg->as_Register();
6507 }
6508 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
6509 if (is_reference_type(bt)) {
6510 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep val_obj valid.
6511 mov(tmp3, val_obj);
6512 Address dst_with_tmp3(tmp3, off);
6513 store_heap_oop(dst_with_tmp3, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
6514 } else {
6515 store_sized_value(dst, src, size_in_bytes);
6516 }
6517 } else if (bt == T_DOUBLE) {
6518 movdbl(dst, fromReg->as_XMMRegister());
6519 } else {
6520 assert(bt == T_FLOAT, "must be float");
6521 movflt(dst, fromReg->as_XMMRegister());
6522 }
6523 }
6524 bind(L_null);
6525 sig_index = stream.sig_index();
6526 from_index = stream.regs_index();
6527
6528 assert(reg_state[to->value()] == reg_writable, "must have already been read");
6529 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
6530 assert(success, "to register must be writeable");
6531 return true;
6532 }
6533
6534 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
6535 return reg->is_XMMRegister() ? xmm8->as_VMReg() : r14->as_VMReg();
6536 }
6537
6538 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6539 assert((initial_framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6540 if (needs_stack_repair) {
6541 // The method has a scalarized entry point (where fields of value object arguments
6542 // are passed through registers and stack), and a non-scalarized entry point (where
6543 // value object arguments are given as oops). The non-scalarized entry point will
6544 // first load each field of value object arguments and store them in registers and on
6545 // the stack in a way compatible with the scalarized entry point. To do so, some extra
6546 // stack space might be reserved (if argument registers are not enough). On leaving the
6547 // method, this space must be freed.
6548 //
6549 // In case we used the non-scalarized entry point the stack looks like this:
6550 //
6551 // | Arguments from caller |
6552 // |---------------------------| <-- caller's SP
6553 // | Return address #1 |
6554 // | Saved RBP #1 |
6555 // |---------------------------|
6556 // | Extension space for |
6557 // | inline arg (un)packing |
6558 // |---------------------------| <-- start of this method's frame
6559 // | Return address #2 |
6560 // | Saved RBP #2 |
6561 // |---------------------------| <-- RBP (with -XX:+PreserveFramePointer)
6562 // | sp_inc |
6563 // | method locals |
6564 // |---------------------------| <-- SP
6565 //
6566 // Space for the return pc and saved rbp is reserved twice. But only the #1 copies
6567 // contain the real values of return pc and saved rbp. The #2 copies are not reliable
6568 // and should not be used. They are mostly needed to add space between the extension
6569 // space and the locals, as there would be between the real arguments and the locals
6570 // if we don't need to do unpacking (from the scalarized entry point).
6571 //
6572 // When leaving, one must load RBP #1 into RBP, and use the copy #1 of the return address,
6573 // while keeping in mind that from the scalarized entry point, there will be only one
6574 // copy. Indeed, in the case we used the scalarized calling convention, the stack looks like this:
6575 //
6576 // | Arguments from caller |
6577 // |---------------------------| <-- caller's SP
6578 // | Return address |
6579 // | Saved RBP |
6580 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6581 // | sp_inc |
6582 // | method locals |
6583 // |---------------------------| <-- SP
6584 //
6585 // The sp_inc stack slot holds the total size of the frame, including the extension
6586 // space and copies #2 of the return address and the saved RBP (but never the copies
6587 // #1 of the return address and saved RBP). That is how to find the copies #1 of the
6588 // return address and saved rbp. This size is expressed in bytes. Be careful when using
6589 // it from C++ in pointer arithmetic you might need to divide it by wordSize.
6590
6591 // The stack increment resides just below the saved rbp
6592 addq(rsp, Address(rsp, initial_framesize - wordSize));
6593 pop(rbp);
6594 } else {
6595 if (initial_framesize > 0) {
6596 addq(rsp, initial_framesize);
6597 }
6598 pop(rbp);
6599 }
6600 }
6601
6602 #if COMPILER2_OR_JVMCI
6603
6604 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
6605 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp, KRegister mask) {
6606 // cnt - number of qwords (8-byte words).
6607 // base - start address, qword aligned.
6608 Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
6609 bool use64byteVector = (MaxVectorSize == 64) && (VM_Version::avx3_threshold() == 0);
6610 if (use64byteVector) {
6611 evpbroadcastq(xtmp, val, AVX_512bit);
6612 } else if (MaxVectorSize >= 32) {
6613 movdq(xtmp, val);
6614 punpcklqdq(xtmp, xtmp);
6615 vinserti128_high(xtmp, xtmp);
6616 } else {
6617 movdq(xtmp, val);
6618 punpcklqdq(xtmp, xtmp);
6619 }
6620 jmp(L_zero_64_bytes);
6621
6622 BIND(L_loop);
6623 if (MaxVectorSize >= 32) {
6624 fill64(base, 0, xtmp, use64byteVector);
6625 } else {
6626 movdqu(Address(base, 0), xtmp);
6627 movdqu(Address(base, 16), xtmp);
6628 movdqu(Address(base, 32), xtmp);
6629 movdqu(Address(base, 48), xtmp);
6630 }
6631 addptr(base, 64);
6632
6633 BIND(L_zero_64_bytes);
6634 subptr(cnt, 8);
6635 jccb(Assembler::greaterEqual, L_loop);
6636
6637 // Copy trailing 64 bytes
6638 if (use64byteVector) {
6639 addptr(cnt, 8);
6640 jccb(Assembler::equal, L_end);
6641 fill64_masked(3, base, 0, xtmp, mask, cnt, val, true);
6642 jmp(L_end);
6643 } else {
6644 addptr(cnt, 4);
6645 jccb(Assembler::less, L_tail);
6646 if (MaxVectorSize >= 32) {
6647 vmovdqu(Address(base, 0), xtmp);
6648 } else {
6649 movdqu(Address(base, 0), xtmp);
6650 movdqu(Address(base, 16), xtmp);
6651 }
6652 }
6653 addptr(base, 32);
6654 subptr(cnt, 4);
6655
6656 BIND(L_tail);
6657 addptr(cnt, 4);
6658 jccb(Assembler::lessEqual, L_end);
6659 if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
6660 fill32_masked(3, base, 0, xtmp, mask, cnt, val);
6661 } else {
6662 decrement(cnt);
6663
6664 BIND(L_sloop);
6665 movq(Address(base, 0), xtmp);
6666 addptr(base, 8);
6667 decrement(cnt);
6668 jccb(Assembler::greaterEqual, L_sloop);
6669 }
6670 BIND(L_end);
6671 }
6672
6673 // Clearing constant sized memory using YMM/ZMM registers.
6674 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
6675 assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
6676 bool use64byteVector = (MaxVectorSize > 32) && (VM_Version::avx3_threshold() == 0);
6677
6678 int vector64_count = (cnt & (~0x7)) >> 3;
6679 cnt = cnt & 0x7;
6680 const int fill64_per_loop = 4;
6742 break;
6743 case 7:
6744 if (use64byteVector) {
6745 movl(rtmp, 0x7F);
6746 kmovwl(mask, rtmp);
6747 evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
6748 } else {
6749 evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
6750 movl(rtmp, 0x7);
6751 kmovwl(mask, rtmp);
6752 evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
6753 }
6754 break;
6755 default:
6756 fatal("Unexpected length : %d\n",cnt);
6757 break;
6758 }
6759 }
6760 }
6761
6762 void MacroAssembler::clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp,
6763 bool is_large, bool word_copy_only, KRegister mask) {
6764 // cnt - number of qwords (8-byte words).
6765 // base - start address, qword aligned.
6766 // is_large - if optimizers know cnt is larger than InitArrayShortSize
6767 assert(base==rdi, "base register must be edi for rep stos");
6768 assert(val==rax, "val register must be eax for rep stos");
6769 assert(cnt==rcx, "cnt register must be ecx for rep stos");
6770 assert(InitArrayShortSize % BytesPerLong == 0,
6771 "InitArrayShortSize should be the multiple of BytesPerLong");
6772
6773 Label DONE;
6774
6775 if (!is_large) {
6776 Label LOOP, LONG;
6777 cmpptr(cnt, InitArrayShortSize/BytesPerLong);
6778 jccb(Assembler::greater, LONG);
6779
6780 decrement(cnt);
6781 jccb(Assembler::negative, DONE); // Zero length
6782
6783 // Use individual pointer-sized stores for small counts:
6784 BIND(LOOP);
6785 movptr(Address(base, cnt, Address::times_ptr), val);
6786 decrement(cnt);
6787 jccb(Assembler::greaterEqual, LOOP);
6788 jmpb(DONE);
6789
6790 BIND(LONG);
6791 }
6792
6793 // Use longer rep-prefixed ops for non-small counts:
6794 if (UseFastStosb && !word_copy_only) {
6795 shlptr(cnt, 3); // convert to number of bytes
6796 rep_stosb();
6797 } else if (UseXMMForObjInit) {
6798 xmm_clear_mem(base, cnt, val, xtmp, mask);
6799 } else {
6800 rep_stos();
6801 }
6802
6803 BIND(DONE);
6804 }
6805
6806 #endif //COMPILER2_OR_JVMCI
6807
6808
6809 void MacroAssembler::generate_fill(BasicType t, bool aligned,
6810 Register to, Register value, Register count,
6811 Register rtmp, XMMRegister xtmp) {
6812 ShortBranchVerifier sbv(this);
6813 assert_different_registers(to, value, count, rtmp);
6814 Label L_exit;
6815 Label L_fill_2_bytes, L_fill_4_bytes;
6816
6817 #if defined(COMPILER2)
6818 if(MaxVectorSize >=32 &&
10698
10699 // Load top.
10700 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10701
10702 // Check if the lock-stack is full.
10703 cmpl(top, LockStack::end_offset());
10704 jcc(Assembler::greaterEqual, slow);
10705
10706 // Check for recursion.
10707 cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
10708 jcc(Assembler::equal, push);
10709
10710 // Check header for monitor (0b10).
10711 testptr(reg_rax, markWord::monitor_value);
10712 jcc(Assembler::notZero, slow);
10713
10714 // Try to lock. Transition lock bits 0b01 => 0b00
10715 movptr(tmp, reg_rax);
10716 andptr(tmp, ~(int32_t)markWord::unlocked_value);
10717 orptr(reg_rax, markWord::unlocked_value);
10718 // Mask inline_type bit such that we go to the slow path if object is an inline type
10719 andptr(reg_rax, ~((int) markWord::inline_type_bit_in_place));
10720
10721 lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
10722 jcc(Assembler::notEqual, slow);
10723
10724 // Restore top, CAS clobbers register.
10725 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10726
10727 bind(push);
10728 // After successful lock, push object on lock-stack.
10729 movptr(Address(thread, top), obj);
10730 incrementl(top, oopSize);
10731 movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
10732 }
10733
10734 // Implements fast-unlocking.
10735 //
10736 // obj: the object to be unlocked
10737 // reg_rax: rax
10738 // thread: the thread
10739 // tmp: a temporary register
10740 void MacroAssembler::fast_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {
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