11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/assembler.hpp"
26 #include "asm/assembler.inline.hpp"
27 #include "code/aotCodeCache.hpp"
28 #include "code/compiledIC.hpp"
29 #include "compiler/compiler_globals.hpp"
30 #include "compiler/disassembler.hpp"
31 #include "crc32c.h"
32 #include "gc/shared/barrierSet.hpp"
33 #include "gc/shared/barrierSetAssembler.hpp"
34 #include "gc/shared/collectedHeap.inline.hpp"
35 #include "gc/shared/tlab_globals.hpp"
36 #include "interpreter/bytecodeHistogram.hpp"
37 #include "interpreter/interpreter.hpp"
38 #include "interpreter/interpreterRuntime.hpp"
39 #include "jvm.h"
40 #include "memory/resourceArea.hpp"
41 #include "memory/universe.hpp"
42 #include "oops/accessDecorators.hpp"
43 #include "oops/compressedKlass.inline.hpp"
44 #include "oops/compressedOops.inline.hpp"
45 #include "oops/klass.inline.hpp"
46 #include "prims/methodHandles.hpp"
47 #include "runtime/continuation.hpp"
48 #include "runtime/interfaceSupport.inline.hpp"
49 #include "runtime/javaThread.hpp"
50 #include "runtime/jniHandles.hpp"
51 #include "runtime/objectMonitor.hpp"
52 #include "runtime/os.hpp"
53 #include "runtime/safepoint.hpp"
54 #include "runtime/safepointMechanism.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/checkedCast.hpp"
58 #include "utilities/globalDefinitions.hpp"
59 #include "utilities/macros.hpp"
60
61 #ifdef PRODUCT
62 #define BLOCK_COMMENT(str) /* nothing */
63 #define STOP(error) stop(error)
64 #else
65 #define BLOCK_COMMENT(str) block_comment(str)
66 #define STOP(error) block_comment(error); stop(error)
67 #endif
68
69 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
70
71 #ifdef ASSERT
72 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
73 #endif
74
75 static const Assembler::Condition reverse[] = {
76 Assembler::noOverflow /* overflow = 0x0 */ ,
77 Assembler::overflow /* noOverflow = 0x1 */ ,
78 Assembler::aboveEqual /* carrySet = 0x2, below = 0x2 */ ,
79 Assembler::below /* aboveEqual = 0x3, carryClear = 0x3 */ ,
1285 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1286 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1287 assert_different_registers(arg_1, c_rarg2);
1288 pass_arg2(this, arg_2);
1289 pass_arg1(this, arg_1);
1290 pass_arg0(this, arg_0);
1291 call_VM_leaf(entry_point, 3);
1292 }
1293
1294 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
1295 assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
1296 assert_different_registers(arg_1, c_rarg2, c_rarg3);
1297 assert_different_registers(arg_2, c_rarg3);
1298 pass_arg3(this, arg_3);
1299 pass_arg2(this, arg_2);
1300 pass_arg1(this, arg_1);
1301 pass_arg0(this, arg_0);
1302 call_VM_leaf(entry_point, 3);
1303 }
1304
1305 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
1306 pass_arg0(this, arg_0);
1307 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1308 }
1309
1310 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
1311 assert_different_registers(arg_0, c_rarg1);
1312 pass_arg1(this, arg_1);
1313 pass_arg0(this, arg_0);
1314 MacroAssembler::call_VM_leaf_base(entry_point, 2);
1315 }
1316
1317 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1318 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1319 assert_different_registers(arg_1, c_rarg2);
1320 pass_arg2(this, arg_2);
1321 pass_arg1(this, arg_1);
1322 pass_arg0(this, arg_0);
1323 MacroAssembler::call_VM_leaf_base(entry_point, 3);
1324 }
2356 lea(rscratch, src);
2357 Assembler::mulss(dst, Address(rscratch, 0));
2358 }
2359 }
2360
2361 void MacroAssembler::null_check(Register reg, int offset) {
2362 if (needs_explicit_null_check(offset)) {
2363 // provoke OS null exception if reg is null by
2364 // accessing M[reg] w/o changing any (non-CC) registers
2365 // NOTE: cmpl is plenty here to provoke a segv
2366 cmpptr(rax, Address(reg, 0));
2367 // Note: should probably use testl(rax, Address(reg, 0));
2368 // may be shorter code (however, this version of
2369 // testl needs to be implemented first)
2370 } else {
2371 // nothing to do, (later) access of M[reg + offset]
2372 // will provoke OS null exception if reg is null
2373 }
2374 }
2375
2376 void MacroAssembler::os_breakpoint() {
2377 // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
2378 // (e.g., MSVC can't call ps() otherwise)
2379 call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
2380 }
2381
2382 void MacroAssembler::unimplemented(const char* what) {
2383 const char* buf = nullptr;
2384 {
2385 ResourceMark rm;
2386 stringStream ss;
2387 ss.print("unimplemented: %s", what);
2388 buf = code_string(ss.as_string());
2389 }
2390 stop(buf);
2391 }
2392
2393 #define XSTATE_BV 0x200
2394
2395 void MacroAssembler::pop_CPU_state() {
3696 xorptr(temp, temp); // use _zero reg to clear memory (shorter code)
3697 if (UseIncDec) {
3698 shrptr(index, 3); // divide by 8/16 and set carry flag if bit 2 was set
3699 } else {
3700 shrptr(index, 2); // use 2 instructions to avoid partial flag stall
3701 shrptr(index, 1);
3702 }
3703
3704 // initialize remaining object fields: index is a multiple of 2 now
3705 {
3706 Label loop;
3707 bind(loop);
3708 movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
3709 decrement(index);
3710 jcc(Assembler::notZero, loop);
3711 }
3712
3713 bind(done);
3714 }
3715
3716 // Look up the method for a megamorphic invokeinterface call.
3717 // The target method is determined by <intf_klass, itable_index>.
3718 // The receiver klass is in recv_klass.
3719 // On success, the result will be in method_result, and execution falls through.
3720 // On failure, execution transfers to the given label.
3721 void MacroAssembler::lookup_interface_method(Register recv_klass,
3722 Register intf_klass,
3723 RegisterOrConstant itable_index,
3724 Register method_result,
3725 Register scan_temp,
3726 Label& L_no_such_interface,
3727 bool return_method) {
3728 assert_different_registers(recv_klass, intf_klass, scan_temp);
3729 assert_different_registers(method_result, intf_klass, scan_temp);
3730 assert(recv_klass != method_result || !return_method,
3731 "recv_klass can be destroyed when method isn't needed");
3732
3733 assert(itable_index.is_constant() || itable_index.as_register() == method_result,
3734 "caller must use same register for non-constant itable index as for method");
3735
4746 } else {
4747 Label L;
4748 jccb(negate_condition(cc), L);
4749 movl(dst, src);
4750 bind(L);
4751 }
4752 }
4753
4754 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
4755 if (VM_Version::supports_cmov()) {
4756 cmovl(cc, dst, src);
4757 } else {
4758 Label L;
4759 jccb(negate_condition(cc), L);
4760 movl(dst, src);
4761 bind(L);
4762 }
4763 }
4764
4765 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
4766 if (!VerifyOops) return;
4767
4768 BLOCK_COMMENT("verify_oop {");
4769 push(rscratch1);
4770 push(rax); // save rax
4771 push(reg); // pass register argument
4772
4773 // Pass register number to verify_oop_subroutine
4774 const char* b = nullptr;
4775 {
4776 ResourceMark rm;
4777 stringStream ss;
4778 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
4779 b = code_string(ss.as_string());
4780 }
4781 AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
4782 pushptr(buffer.addr(), rscratch1);
4783
4784 // call indirectly to solve generation ordering problem
4785 movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
4786 call(rax);
5002 // or something else. Since this is a slow path, we can optimize for code density,
5003 // and just restart the search from the beginning.
5004 jmpb(L_restart);
5005
5006 // Counter updates:
5007
5008 // Increment polymorphic counter instead of receiver slot.
5009 bind(L_polymorphic);
5010 movptr(offset, poly_count_offset);
5011 jmpb(L_count_update);
5012
5013 // Found a receiver, convert its slot offset to corresponding count offset.
5014 bind(L_found_recv);
5015 addptr(offset, receiver_to_count_step);
5016
5017 bind(L_count_update);
5018 addptr(Address(mdp, offset, Address::times_ptr), DataLayout::counter_increment);
5019 }
5020
5021 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
5022 if (!VerifyOops) return;
5023
5024 push(rscratch1);
5025 push(rax); // save rax,
5026 // addr may contain rsp so we will have to adjust it based on the push
5027 // we just did (and on 64 bit we do two pushes)
5028 // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
5029 // stores rax into addr which is backwards of what was intended.
5030 if (addr.uses(rsp)) {
5031 lea(rax, addr);
5032 pushptr(Address(rax, 2 * BytesPerWord));
5033 } else {
5034 pushptr(addr);
5035 }
5036
5037 // Pass register number to verify_oop_subroutine
5038 const char* b = nullptr;
5039 {
5040 ResourceMark rm;
5041 stringStream ss;
5042 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
5394
5395 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
5396 // get mirror
5397 const int mirror_offset = in_bytes(Klass::java_mirror_offset());
5398 load_method_holder(mirror, method);
5399 movptr(mirror, Address(mirror, mirror_offset));
5400 resolve_oop_handle(mirror, tmp);
5401 }
5402
5403 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5404 load_method_holder(rresult, rmethod);
5405 movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5406 }
5407
5408 void MacroAssembler::load_method_holder(Register holder, Register method) {
5409 movptr(holder, Address(method, Method::const_offset())); // ConstMethod*
5410 movptr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5411 movptr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5412 }
5413
5414 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5415 assert(UseCompactObjectHeaders, "expect compact object headers");
5416 movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5417 shrq(dst, markWord::klass_shift);
5418 }
5419
5420 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
5421 assert_different_registers(src, tmp);
5422 assert_different_registers(dst, tmp);
5423
5424 if (UseCompactObjectHeaders) {
5425 load_narrow_klass_compact(dst, src);
5426 decode_klass_not_null(dst, tmp);
5427 } else {
5428 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5429 decode_klass_not_null(dst, tmp);
5430 }
5431 }
5432
5433 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
5434 assert(!UseCompactObjectHeaders, "not with compact headers");
5435 assert_different_registers(src, tmp);
5436 assert_different_registers(dst, tmp);
5437 encode_klass_not_null(src, tmp);
5438 movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5439 }
5440
5441 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
5442 if (UseCompactObjectHeaders) {
5443 assert(tmp != noreg, "need tmp");
5444 assert_different_registers(klass, obj, tmp);
5445 load_narrow_klass_compact(tmp, obj);
5446 cmpl(klass, tmp);
5447 } else {
5448 cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
5449 }
5450 }
5451
5452 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5469 bool as_raw = (decorators & AS_RAW) != 0;
5470 if (as_raw) {
5471 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
5472 } else {
5473 bs->load_at(this, decorators, type, dst, src, tmp1);
5474 }
5475 }
5476
5477 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
5478 Register tmp1, Register tmp2, Register tmp3) {
5479 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5480 decorators = AccessInternal::decorator_fixup(decorators, type);
5481 bool as_raw = (decorators & AS_RAW) != 0;
5482 if (as_raw) {
5483 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5484 } else {
5485 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5486 }
5487 }
5488
5489 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5490 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
5491 }
5492
5493 // Doesn't do verification, generates fixed size code
5494 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5495 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
5496 }
5497
5498 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5499 Register tmp2, Register tmp3, DecoratorSet decorators) {
5500 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5501 }
5502
5503 // Used for storing nulls.
5504 void MacroAssembler::store_heap_oop_null(Address dst) {
5505 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5506 }
5507
5508 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5831 assert (oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5832 int klass_index = oop_recorder()->find_index(k);
5833 RelocationHolder rspec = metadata_Relocation::spec(klass_index);
5834 Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
5835 }
5836
5837 void MacroAssembler::reinit_heapbase() {
5838 if (UseCompressedOops) {
5839 if (Universe::heap() != nullptr && !AOTCodeCache::is_on_for_dump()) {
5840 if (CompressedOops::base() == nullptr) {
5841 MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
5842 } else {
5843 mov64(r12_heapbase, (int64_t)CompressedOops::base());
5844 }
5845 } else {
5846 movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
5847 }
5848 }
5849 }
5850
5851 #if COMPILER2_OR_JVMCI
5852
5853 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
5854 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
5855 // cnt - number of qwords (8-byte words).
5856 // base - start address, qword aligned.
5857 Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
5858 bool use64byteVector = (MaxVectorSize == 64) && (CopyAVX3Threshold == 0);
5859 if (use64byteVector) {
5860 vpxor(xtmp, xtmp, xtmp, AVX_512bit);
5861 } else if (MaxVectorSize >= 32) {
5862 vpxor(xtmp, xtmp, xtmp, AVX_256bit);
5863 } else {
5864 pxor(xtmp, xtmp);
5865 }
5866 jmp(L_zero_64_bytes);
5867
5868 BIND(L_loop);
5869 if (MaxVectorSize >= 32) {
5870 fill64(base, 0, xtmp, use64byteVector);
5871 } else {
5872 movdqu(Address(base, 0), xtmp);
5873 movdqu(Address(base, 16), xtmp);
5874 movdqu(Address(base, 32), xtmp);
5875 movdqu(Address(base, 48), xtmp);
5876 }
5877 addptr(base, 64);
5878
5879 BIND(L_zero_64_bytes);
5880 subptr(cnt, 8);
5881 jccb(Assembler::greaterEqual, L_loop);
5882
5883 // Copy trailing 64 bytes
5884 if (use64byteVector) {
5885 addptr(cnt, 8);
5886 jccb(Assembler::equal, L_end);
5887 fill64_masked(3, base, 0, xtmp, mask, cnt, rtmp, true);
5888 jmp(L_end);
5889 } else {
5890 addptr(cnt, 4);
5891 jccb(Assembler::less, L_tail);
5892 if (MaxVectorSize >= 32) {
5893 vmovdqu(Address(base, 0), xtmp);
5894 } else {
5895 movdqu(Address(base, 0), xtmp);
5896 movdqu(Address(base, 16), xtmp);
5897 }
5898 }
5899 addptr(base, 32);
5900 subptr(cnt, 4);
5901
5902 BIND(L_tail);
5903 addptr(cnt, 4);
5904 jccb(Assembler::lessEqual, L_end);
5905 if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
5906 fill32_masked(3, base, 0, xtmp, mask, cnt, rtmp);
5907 } else {
5908 decrement(cnt);
5909
5910 BIND(L_sloop);
5911 movq(Address(base, 0), xtmp);
5912 addptr(base, 8);
5913 decrement(cnt);
5914 jccb(Assembler::greaterEqual, L_sloop);
5915 }
5916 BIND(L_end);
5917 }
5918
5919 // Clearing constant sized memory using YMM/ZMM registers.
5920 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
5921 assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
5922 bool use64byteVector = (MaxVectorSize > 32) && (CopyAVX3Threshold == 0);
5923
5924 int vector64_count = (cnt & (~0x7)) >> 3;
5925 cnt = cnt & 0x7;
5926 const int fill64_per_loop = 4;
5988 break;
5989 case 7:
5990 if (use64byteVector) {
5991 movl(rtmp, 0x7F);
5992 kmovwl(mask, rtmp);
5993 evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
5994 } else {
5995 evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
5996 movl(rtmp, 0x7);
5997 kmovwl(mask, rtmp);
5998 evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
5999 }
6000 break;
6001 default:
6002 fatal("Unexpected length : %d\n",cnt);
6003 break;
6004 }
6005 }
6006 }
6007
6008 void MacroAssembler::clear_mem(Register base, Register cnt, Register tmp, XMMRegister xtmp,
6009 bool is_large, KRegister mask) {
6010 // cnt - number of qwords (8-byte words).
6011 // base - start address, qword aligned.
6012 // is_large - if optimizers know cnt is larger than InitArrayShortSize
6013 assert(base==rdi, "base register must be edi for rep stos");
6014 assert(tmp==rax, "tmp register must be eax for rep stos");
6015 assert(cnt==rcx, "cnt register must be ecx for rep stos");
6016 assert(InitArrayShortSize % BytesPerLong == 0,
6017 "InitArrayShortSize should be the multiple of BytesPerLong");
6018
6019 Label DONE;
6020 if (!is_large || !UseXMMForObjInit) {
6021 xorptr(tmp, tmp);
6022 }
6023
6024 if (!is_large) {
6025 Label LOOP, LONG;
6026 cmpptr(cnt, InitArrayShortSize/BytesPerLong);
6027 jccb(Assembler::greater, LONG);
6028
6029 decrement(cnt);
6030 jccb(Assembler::negative, DONE); // Zero length
6031
6032 // Use individual pointer-sized stores for small counts:
6033 BIND(LOOP);
6034 movptr(Address(base, cnt, Address::times_ptr), tmp);
6035 decrement(cnt);
6036 jccb(Assembler::greaterEqual, LOOP);
6037 jmpb(DONE);
6038
6039 BIND(LONG);
6040 }
6041
6042 // Use longer rep-prefixed ops for non-small counts:
6043 if (UseFastStosb) {
6044 shlptr(cnt, 3); // convert to number of bytes
6045 rep_stosb();
6046 } else if (UseXMMForObjInit) {
6047 xmm_clear_mem(base, cnt, tmp, xtmp, mask);
6048 } else {
6049 rep_stos();
6050 }
6051
6052 BIND(DONE);
6053 }
6054
6055 #endif //COMPILER2_OR_JVMCI
6056
6057
6058 void MacroAssembler::generate_fill(BasicType t, bool aligned,
6059 Register to, Register value, Register count,
6060 Register rtmp, XMMRegister xtmp) {
6061 ShortBranchVerifier sbv(this);
6062 assert_different_registers(to, value, count, rtmp);
6063 Label L_exit;
6064 Label L_fill_2_bytes, L_fill_4_bytes;
6065
6066 #if defined(COMPILER2)
6067 if(MaxVectorSize >=32 &&
9944
9945 // Load top.
9946 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
9947
9948 // Check if the lock-stack is full.
9949 cmpl(top, LockStack::end_offset());
9950 jcc(Assembler::greaterEqual, slow);
9951
9952 // Check for recursion.
9953 cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
9954 jcc(Assembler::equal, push);
9955
9956 // Check header for monitor (0b10).
9957 testptr(reg_rax, markWord::monitor_value);
9958 jcc(Assembler::notZero, slow);
9959
9960 // Try to lock. Transition lock bits 0b01 => 0b00
9961 movptr(tmp, reg_rax);
9962 andptr(tmp, ~(int32_t)markWord::unlocked_value);
9963 orptr(reg_rax, markWord::unlocked_value);
9964 lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
9965 jcc(Assembler::notEqual, slow);
9966
9967 // Restore top, CAS clobbers register.
9968 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
9969
9970 bind(push);
9971 // After successful lock, push object on lock-stack.
9972 movptr(Address(thread, top), obj);
9973 incrementl(top, oopSize);
9974 movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
9975 }
9976
9977 // Implements fast-unlocking.
9978 //
9979 // obj: the object to be unlocked
9980 // reg_rax: rax
9981 // thread: the thread
9982 // tmp: a temporary register
9983 void MacroAssembler::fast_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {
|
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/assembler.hpp"
26 #include "asm/assembler.inline.hpp"
27 #include "code/aotCodeCache.hpp"
28 #include "code/compiledIC.hpp"
29 #include "compiler/compiler_globals.hpp"
30 #include "compiler/disassembler.hpp"
31 #include "ci/ciInlineKlass.hpp"
32 #include "crc32c.h"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/collectedHeap.inline.hpp"
36 #include "gc/shared/tlab_globals.hpp"
37 #include "interpreter/bytecodeHistogram.hpp"
38 #include "interpreter/interpreter.hpp"
39 #include "interpreter/interpreterRuntime.hpp"
40 #include "jvm.h"
41 #include "memory/resourceArea.hpp"
42 #include "memory/universe.hpp"
43 #include "oops/accessDecorators.hpp"
44 #include "oops/compressedKlass.inline.hpp"
45 #include "oops/compressedOops.inline.hpp"
46 #include "oops/klass.inline.hpp"
47 #include "oops/resolvedFieldEntry.hpp"
48 #include "prims/methodHandles.hpp"
49 #include "runtime/arguments.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/interfaceSupport.inline.hpp"
52 #include "runtime/javaThread.hpp"
53 #include "runtime/jniHandles.hpp"
54 #include "runtime/objectMonitor.hpp"
55 #include "runtime/os.hpp"
56 #include "runtime/safepoint.hpp"
57 #include "runtime/safepointMechanism.hpp"
58 #include "runtime/sharedRuntime.hpp"
59 #include "runtime/signature_cc.hpp"
60 #include "runtime/stubRoutines.hpp"
61 #include "utilities/checkedCast.hpp"
62 #include "utilities/globalDefinitions.hpp"
63 #include "utilities/macros.hpp"
64 #include "vmreg_x86.inline.hpp"
65 #ifdef COMPILER2
66 #include "opto/output.hpp"
67 #endif
68
69 #ifdef PRODUCT
70 #define BLOCK_COMMENT(str) /* nothing */
71 #define STOP(error) stop(error)
72 #else
73 #define BLOCK_COMMENT(str) block_comment(str)
74 #define STOP(error) block_comment(error); stop(error)
75 #endif
76
77 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
78
79 #ifdef ASSERT
80 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
81 #endif
82
83 static const Assembler::Condition reverse[] = {
84 Assembler::noOverflow /* overflow = 0x0 */ ,
85 Assembler::overflow /* noOverflow = 0x1 */ ,
86 Assembler::aboveEqual /* carrySet = 0x2, below = 0x2 */ ,
87 Assembler::below /* aboveEqual = 0x3, carryClear = 0x3 */ ,
1293 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1294 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1295 assert_different_registers(arg_1, c_rarg2);
1296 pass_arg2(this, arg_2);
1297 pass_arg1(this, arg_1);
1298 pass_arg0(this, arg_0);
1299 call_VM_leaf(entry_point, 3);
1300 }
1301
1302 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
1303 assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
1304 assert_different_registers(arg_1, c_rarg2, c_rarg3);
1305 assert_different_registers(arg_2, c_rarg3);
1306 pass_arg3(this, arg_3);
1307 pass_arg2(this, arg_2);
1308 pass_arg1(this, arg_1);
1309 pass_arg0(this, arg_0);
1310 call_VM_leaf(entry_point, 3);
1311 }
1312
1313 void MacroAssembler::super_call_VM_leaf(address entry_point) {
1314 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1315 }
1316
1317 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
1318 pass_arg0(this, arg_0);
1319 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1320 }
1321
1322 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
1323 assert_different_registers(arg_0, c_rarg1);
1324 pass_arg1(this, arg_1);
1325 pass_arg0(this, arg_0);
1326 MacroAssembler::call_VM_leaf_base(entry_point, 2);
1327 }
1328
1329 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1330 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1331 assert_different_registers(arg_1, c_rarg2);
1332 pass_arg2(this, arg_2);
1333 pass_arg1(this, arg_1);
1334 pass_arg0(this, arg_0);
1335 MacroAssembler::call_VM_leaf_base(entry_point, 3);
1336 }
2368 lea(rscratch, src);
2369 Assembler::mulss(dst, Address(rscratch, 0));
2370 }
2371 }
2372
2373 void MacroAssembler::null_check(Register reg, int offset) {
2374 if (needs_explicit_null_check(offset)) {
2375 // provoke OS null exception if reg is null by
2376 // accessing M[reg] w/o changing any (non-CC) registers
2377 // NOTE: cmpl is plenty here to provoke a segv
2378 cmpptr(rax, Address(reg, 0));
2379 // Note: should probably use testl(rax, Address(reg, 0));
2380 // may be shorter code (however, this version of
2381 // testl needs to be implemented first)
2382 } else {
2383 // nothing to do, (later) access of M[reg + offset]
2384 // will provoke OS null exception if reg is null
2385 }
2386 }
2387
2388 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2389 andptr(markword, markWord::inline_type_pattern_mask);
2390 cmpptr(markword, markWord::inline_type_pattern);
2391 jcc(Assembler::equal, is_inline_type);
2392 }
2393
2394 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2395 if (can_be_null) {
2396 testptr(object, object);
2397 jcc(Assembler::zero, not_inline_type);
2398 }
2399 const int is_inline_type_mask = markWord::inline_type_pattern;
2400 movptr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2401 andptr(tmp, is_inline_type_mask);
2402 cmpptr(tmp, is_inline_type_mask);
2403 jcc(Assembler::notEqual, not_inline_type);
2404 }
2405
2406 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2407 movl(temp_reg, flags);
2408 testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
2409 jcc(Assembler::notEqual, is_null_free_inline_type);
2410 }
2411
2412 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2413 movl(temp_reg, flags);
2414 testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
2415 jcc(Assembler::equal, not_null_free_inline_type);
2416 }
2417
2418 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2419 movl(temp_reg, flags);
2420 testl(temp_reg, 1 << ResolvedFieldEntry::is_flat_shift);
2421 jcc(Assembler::notEqual, is_flat);
2422 }
2423
2424 void MacroAssembler::test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker) {
2425 movl(temp_reg, flags);
2426 testl(temp_reg, 1 << ResolvedFieldEntry::has_null_marker_shift);
2427 jcc(Assembler::notEqual, has_null_marker);
2428 }
2429
2430 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2431 Label test_mark_word;
2432 // load mark word
2433 movptr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2434 // check displaced
2435 testl(temp_reg, markWord::unlocked_value);
2436 jccb(Assembler::notZero, test_mark_word);
2437 // slow path use klass prototype
2438 push(rscratch1);
2439 load_prototype_header(temp_reg, oop, rscratch1);
2440 pop(rscratch1);
2441
2442 bind(test_mark_word);
2443 testl(temp_reg, test_bit);
2444 jcc((jmp_set) ? Assembler::notZero : Assembler::zero, jmp_label);
2445 }
2446
2447 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg,
2448 Label& is_flat_array) {
2449 #ifdef _LP64
2450 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2451 #else
2452 load_klass(temp_reg, oop, noreg);
2453 movl(temp_reg, Address(temp_reg, Klass::layout_helper_offset()));
2454 test_flat_array_layout(temp_reg, is_flat_array);
2455 #endif
2456 }
2457
2458 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2459 Label& is_non_flat_array) {
2460 #ifdef _LP64
2461 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2462 #else
2463 load_klass(temp_reg, oop, noreg);
2464 movl(temp_reg, Address(temp_reg, Klass::layout_helper_offset()));
2465 test_non_flat_array_layout(temp_reg, is_non_flat_array);
2466 #endif
2467 }
2468
2469 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label&is_null_free_array) {
2470 #ifdef _LP64
2471 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2472 #else
2473 Unimplemented();
2474 #endif
2475 }
2476
2477 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2478 #ifdef _LP64
2479 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2480 #else
2481 Unimplemented();
2482 #endif
2483 }
2484
2485 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2486 testl(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2487 jcc(Assembler::notZero, is_flat_array);
2488 }
2489
2490 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
2491 testl(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2492 jcc(Assembler::zero, is_non_flat_array);
2493 }
2494
2495 void MacroAssembler::os_breakpoint() {
2496 // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
2497 // (e.g., MSVC can't call ps() otherwise)
2498 call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
2499 }
2500
2501 void MacroAssembler::unimplemented(const char* what) {
2502 const char* buf = nullptr;
2503 {
2504 ResourceMark rm;
2505 stringStream ss;
2506 ss.print("unimplemented: %s", what);
2507 buf = code_string(ss.as_string());
2508 }
2509 stop(buf);
2510 }
2511
2512 #define XSTATE_BV 0x200
2513
2514 void MacroAssembler::pop_CPU_state() {
3815 xorptr(temp, temp); // use _zero reg to clear memory (shorter code)
3816 if (UseIncDec) {
3817 shrptr(index, 3); // divide by 8/16 and set carry flag if bit 2 was set
3818 } else {
3819 shrptr(index, 2); // use 2 instructions to avoid partial flag stall
3820 shrptr(index, 1);
3821 }
3822
3823 // initialize remaining object fields: index is a multiple of 2 now
3824 {
3825 Label loop;
3826 bind(loop);
3827 movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
3828 decrement(index);
3829 jcc(Assembler::notZero, loop);
3830 }
3831
3832 bind(done);
3833 }
3834
3835 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
3836 movptr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
3837 #ifdef ASSERT
3838 {
3839 Label done;
3840 cmpptr(layout_info, 0);
3841 jcc(Assembler::notEqual, done);
3842 stop("inline_layout_info_array is null");
3843 bind(done);
3844 }
3845 #endif
3846
3847 InlineLayoutInfo array[2];
3848 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
3849 if (is_power_of_2(size)) {
3850 shll(index, log2i_exact(size)); // Scale index by power of 2
3851 } else {
3852 imull(index, index, size); // Scale the index to be the entry index * array_element_size
3853 }
3854 lea(layout_info, Address(layout_info, index, Address::times_1, Array<InlineLayoutInfo>::base_offset_in_bytes()));
3855 }
3856
3857 // Look up the method for a megamorphic invokeinterface call.
3858 // The target method is determined by <intf_klass, itable_index>.
3859 // The receiver klass is in recv_klass.
3860 // On success, the result will be in method_result, and execution falls through.
3861 // On failure, execution transfers to the given label.
3862 void MacroAssembler::lookup_interface_method(Register recv_klass,
3863 Register intf_klass,
3864 RegisterOrConstant itable_index,
3865 Register method_result,
3866 Register scan_temp,
3867 Label& L_no_such_interface,
3868 bool return_method) {
3869 assert_different_registers(recv_klass, intf_klass, scan_temp);
3870 assert_different_registers(method_result, intf_klass, scan_temp);
3871 assert(recv_klass != method_result || !return_method,
3872 "recv_klass can be destroyed when method isn't needed");
3873
3874 assert(itable_index.is_constant() || itable_index.as_register() == method_result,
3875 "caller must use same register for non-constant itable index as for method");
3876
4887 } else {
4888 Label L;
4889 jccb(negate_condition(cc), L);
4890 movl(dst, src);
4891 bind(L);
4892 }
4893 }
4894
4895 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
4896 if (VM_Version::supports_cmov()) {
4897 cmovl(cc, dst, src);
4898 } else {
4899 Label L;
4900 jccb(negate_condition(cc), L);
4901 movl(dst, src);
4902 bind(L);
4903 }
4904 }
4905
4906 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
4907 if (!VerifyOops || VerifyAdapterSharing) {
4908 // Below address of the code string confuses VerifyAdapterSharing
4909 // because it may differ between otherwise equivalent adapters.
4910 return;
4911 }
4912
4913 BLOCK_COMMENT("verify_oop {");
4914 push(rscratch1);
4915 push(rax); // save rax
4916 push(reg); // pass register argument
4917
4918 // Pass register number to verify_oop_subroutine
4919 const char* b = nullptr;
4920 {
4921 ResourceMark rm;
4922 stringStream ss;
4923 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
4924 b = code_string(ss.as_string());
4925 }
4926 AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
4927 pushptr(buffer.addr(), rscratch1);
4928
4929 // call indirectly to solve generation ordering problem
4930 movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
4931 call(rax);
5147 // or something else. Since this is a slow path, we can optimize for code density,
5148 // and just restart the search from the beginning.
5149 jmpb(L_restart);
5150
5151 // Counter updates:
5152
5153 // Increment polymorphic counter instead of receiver slot.
5154 bind(L_polymorphic);
5155 movptr(offset, poly_count_offset);
5156 jmpb(L_count_update);
5157
5158 // Found a receiver, convert its slot offset to corresponding count offset.
5159 bind(L_found_recv);
5160 addptr(offset, receiver_to_count_step);
5161
5162 bind(L_count_update);
5163 addptr(Address(mdp, offset, Address::times_ptr), DataLayout::counter_increment);
5164 }
5165
5166 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
5167 if (!VerifyOops || VerifyAdapterSharing) {
5168 // Below address of the code string confuses VerifyAdapterSharing
5169 // because it may differ between otherwise equivalent adapters.
5170 return;
5171 }
5172
5173 push(rscratch1);
5174 push(rax); // save rax,
5175 // addr may contain rsp so we will have to adjust it based on the push
5176 // we just did (and on 64 bit we do two pushes)
5177 // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
5178 // stores rax into addr which is backwards of what was intended.
5179 if (addr.uses(rsp)) {
5180 lea(rax, addr);
5181 pushptr(Address(rax, 2 * BytesPerWord));
5182 } else {
5183 pushptr(addr);
5184 }
5185
5186 // Pass register number to verify_oop_subroutine
5187 const char* b = nullptr;
5188 {
5189 ResourceMark rm;
5190 stringStream ss;
5191 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
5543
5544 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
5545 // get mirror
5546 const int mirror_offset = in_bytes(Klass::java_mirror_offset());
5547 load_method_holder(mirror, method);
5548 movptr(mirror, Address(mirror, mirror_offset));
5549 resolve_oop_handle(mirror, tmp);
5550 }
5551
5552 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5553 load_method_holder(rresult, rmethod);
5554 movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5555 }
5556
5557 void MacroAssembler::load_method_holder(Register holder, Register method) {
5558 movptr(holder, Address(method, Method::const_offset())); // ConstMethod*
5559 movptr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5560 movptr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5561 }
5562
5563 void MacroAssembler::load_metadata(Register dst, Register src) {
5564 if (UseCompactObjectHeaders) {
5565 load_narrow_klass_compact(dst, src);
5566 } else {
5567 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5568 }
5569 }
5570
5571 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5572 assert(UseCompactObjectHeaders, "expect compact object headers");
5573 movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5574 shrq(dst, markWord::klass_shift);
5575 }
5576
5577 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
5578 assert_different_registers(src, tmp);
5579 assert_different_registers(dst, tmp);
5580
5581 if (UseCompactObjectHeaders) {
5582 load_narrow_klass_compact(dst, src);
5583 decode_klass_not_null(dst, tmp);
5584 } else {
5585 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5586 decode_klass_not_null(dst, tmp);
5587 }
5588 }
5589
5590 void MacroAssembler::load_prototype_header(Register dst, Register src, Register tmp) {
5591 load_klass(dst, src, tmp);
5592 movptr(dst, Address(dst, Klass::prototype_header_offset()));
5593 }
5594
5595 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
5596 assert(!UseCompactObjectHeaders, "not with compact headers");
5597 assert_different_registers(src, tmp);
5598 assert_different_registers(dst, tmp);
5599 encode_klass_not_null(src, tmp);
5600 movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5601 }
5602
5603 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
5604 if (UseCompactObjectHeaders) {
5605 assert(tmp != noreg, "need tmp");
5606 assert_different_registers(klass, obj, tmp);
5607 load_narrow_klass_compact(tmp, obj);
5608 cmpl(klass, tmp);
5609 } else {
5610 cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
5611 }
5612 }
5613
5614 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5631 bool as_raw = (decorators & AS_RAW) != 0;
5632 if (as_raw) {
5633 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
5634 } else {
5635 bs->load_at(this, decorators, type, dst, src, tmp1);
5636 }
5637 }
5638
5639 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
5640 Register tmp1, Register tmp2, Register tmp3) {
5641 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5642 decorators = AccessInternal::decorator_fixup(decorators, type);
5643 bool as_raw = (decorators & AS_RAW) != 0;
5644 if (as_raw) {
5645 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5646 } else {
5647 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5648 }
5649 }
5650
5651 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5652 Register inline_layout_info) {
5653 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5654 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5655 }
5656
5657 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5658 movptr(offset, Address(inline_klass, InlineKlass::adr_members_offset()));
5659 movl(offset, Address(offset, InlineKlass::payload_offset_offset()));
5660 }
5661
5662 void MacroAssembler::payload_addr(Register oop, Register data, Register inline_klass) {
5663 // ((address) (void*) o) + vk->payload_offset();
5664 Register offset = (data == oop) ? rscratch1 : data;
5665 payload_offset(inline_klass, offset);
5666 if (data == oop) {
5667 addptr(data, offset);
5668 } else {
5669 lea(data, Address(oop, offset));
5670 }
5671 }
5672
5673 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
5674 Register index, Register data) {
5675 assert(index != rcx, "index needs to shift by rcx");
5676 assert_different_registers(array, array_klass, index);
5677 assert_different_registers(rcx, array, index);
5678
5679 // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
5680 movl(rcx, Address(array_klass, Klass::layout_helper_offset()));
5681
5682 // Klass::layout_helper_log2_element_size(lh)
5683 // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
5684 shrl(rcx, Klass::_lh_log2_element_size_shift);
5685 andl(rcx, Klass::_lh_log2_element_size_mask);
5686 shlptr(index); // index << rcx
5687
5688 lea(data, Address(array, index, Address::times_1, arrayOopDesc::base_offset_in_bytes(T_FLAT_ELEMENT)));
5689 }
5690
5691 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5692 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
5693 }
5694
5695 // Doesn't do verification, generates fixed size code
5696 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5697 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
5698 }
5699
5700 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5701 Register tmp2, Register tmp3, DecoratorSet decorators) {
5702 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5703 }
5704
5705 // Used for storing nulls.
5706 void MacroAssembler::store_heap_oop_null(Address dst) {
5707 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5708 }
5709
5710 void MacroAssembler::store_klass_gap(Register dst, Register src) {
6033 assert (oop_recorder() != nullptr, "this assembler needs an OopRecorder");
6034 int klass_index = oop_recorder()->find_index(k);
6035 RelocationHolder rspec = metadata_Relocation::spec(klass_index);
6036 Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
6037 }
6038
6039 void MacroAssembler::reinit_heapbase() {
6040 if (UseCompressedOops) {
6041 if (Universe::heap() != nullptr && !AOTCodeCache::is_on_for_dump()) {
6042 if (CompressedOops::base() == nullptr) {
6043 MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
6044 } else {
6045 mov64(r12_heapbase, (int64_t)CompressedOops::base());
6046 }
6047 } else {
6048 movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
6049 }
6050 }
6051 }
6052
6053 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
6054 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
6055 // An inline type might be returned. If fields are in registers we
6056 // need to allocate an inline type instance and initialize it with
6057 // the value of the fields.
6058 Label skip;
6059 // We only need a new buffered inline type if a new one is not returned
6060 testptr(rax, 1);
6061 jcc(Assembler::zero, skip);
6062 int call_offset = -1;
6063
6064 #ifdef _LP64
6065 // The following code is similar to allocation code in TemplateTable::_new but has some slight differences,
6066 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
6067 // allocating is not necessary if vk != nullptr, etc.
6068 Label slow_case;
6069 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
6070 mov(rscratch1, rax); // save rax for slow_case since *_allocate may corrupt it when allocation failed
6071 if (vk != nullptr) {
6072 // Called from C1, where the return type is statically known.
6073 movptr(rbx, (intptr_t)vk->get_InlineKlass());
6074 jint lh = vk->layout_helper();
6075 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
6076 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
6077 tlab_allocate(rax, noreg, lh, r13, r14, slow_case);
6078 } else {
6079 jmp(slow_case);
6080 }
6081 } else {
6082 // Call from interpreter. RAX contains ((the InlineKlass* of the return type) | 0x01)
6083 mov(rbx, rax);
6084 andptr(rbx, -2);
6085 if (UseTLAB) {
6086 movl(r14, Address(rbx, Klass::layout_helper_offset()));
6087 testl(r14, Klass::_lh_instance_slow_path_bit);
6088 jcc(Assembler::notZero, slow_case);
6089 tlab_allocate(rax, r14, 0, r13, r14, slow_case);
6090 } else {
6091 jmp(slow_case);
6092 }
6093 }
6094 if (UseTLAB) {
6095 // 2. Initialize buffered inline instance header
6096 Register buffer_obj = rax;
6097 Register klass = rbx;
6098 if (UseCompactObjectHeaders) {
6099 Register mark_word = r13;
6100 movptr(mark_word, Address(klass, Klass::prototype_header_offset()));
6101 movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes()), mark_word);
6102 } else {
6103 movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes()), (intptr_t)markWord::inline_type_prototype().value());
6104 xorl(r13, r13);
6105 store_klass_gap(buffer_obj, r13);
6106 if (vk == nullptr) {
6107 // store_klass corrupts rbx(klass), so save it in r13 for later use (interpreter case only).
6108 mov(r13, klass);
6109 }
6110 store_klass(buffer_obj, klass, rscratch1);
6111 klass = r13;
6112 }
6113 // 3. Initialize its fields with an inline class specific handler
6114 if (vk != nullptr) {
6115 call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
6116 } else {
6117 movptr(rbx, Address(klass, InlineKlass::adr_members_offset()));
6118 movptr(rbx, Address(rbx, InlineKlass::pack_handler_offset()));
6119 call(rbx);
6120 }
6121 jmp(skip);
6122 }
6123 bind(slow_case);
6124 // We failed to allocate a new inline type, fall back to a runtime
6125 // call. Some oop field may be live in some registers but we can't
6126 // tell. That runtime call will take care of preserving them
6127 // across a GC if there's one.
6128 mov(rax, rscratch1);
6129 #endif
6130
6131 if (from_interpreter) {
6132 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
6133 } else {
6134 call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
6135 call_offset = offset();
6136 }
6137
6138 bind(skip);
6139 return call_offset;
6140 }
6141
6142 // Move a value between registers/stack slots and update the reg_state
6143 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
6144 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
6145 if (reg_state[to->value()] == reg_written) {
6146 return true; // Already written
6147 }
6148 if (from != to && bt != T_VOID) {
6149 if (reg_state[to->value()] == reg_readonly) {
6150 return false; // Not yet writable
6151 }
6152 if (from->is_reg()) {
6153 if (to->is_reg()) {
6154 if (from->is_XMMRegister()) {
6155 if (bt == T_DOUBLE) {
6156 movdbl(to->as_XMMRegister(), from->as_XMMRegister());
6157 } else {
6158 assert(bt == T_FLOAT, "must be float");
6159 movflt(to->as_XMMRegister(), from->as_XMMRegister());
6160 }
6161 } else {
6162 movq(to->as_Register(), from->as_Register());
6163 }
6164 } else {
6165 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6166 Address to_addr = Address(rsp, st_off);
6167 if (from->is_XMMRegister()) {
6168 if (bt == T_DOUBLE) {
6169 movdbl(to_addr, from->as_XMMRegister());
6170 } else {
6171 assert(bt == T_FLOAT, "must be float");
6172 movflt(to_addr, from->as_XMMRegister());
6173 }
6174 } else {
6175 movq(to_addr, from->as_Register());
6176 }
6177 }
6178 } else {
6179 Address from_addr = Address(rsp, from->reg2stack() * VMRegImpl::stack_slot_size + wordSize);
6180 if (to->is_reg()) {
6181 if (to->is_XMMRegister()) {
6182 if (bt == T_DOUBLE) {
6183 movdbl(to->as_XMMRegister(), from_addr);
6184 } else {
6185 assert(bt == T_FLOAT, "must be float");
6186 movflt(to->as_XMMRegister(), from_addr);
6187 }
6188 } else {
6189 movq(to->as_Register(), from_addr);
6190 }
6191 } else {
6192 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6193 movq(r13, from_addr);
6194 movq(Address(rsp, st_off), r13);
6195 }
6196 }
6197 }
6198 // Update register states
6199 reg_state[from->value()] = reg_writable;
6200 reg_state[to->value()] = reg_written;
6201 return true;
6202 }
6203
6204 // Calculate the extra stack space required for packing or unpacking inline
6205 // args and adjust the stack pointer (see MacroAssembler::remove_frame).
6206 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
6207 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
6208 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
6209 assert(sp_inc > 0, "sanity");
6210 // Two additional slots to account for return address
6211 sp_inc += 2 * VMRegImpl::stack_slot_size;
6212
6213 push(rbp);
6214 subptr(rsp, sp_inc);
6215 #ifdef ASSERT
6216 movl(Address(rsp, 0), badRegWordVal);
6217 movl(Address(rsp, VMRegImpl::stack_slot_size), badRegWordVal);
6218 #endif
6219 return sp_inc + wordSize; // account for rbp space
6220 }
6221
6222 // Read all fields from an inline type buffer and store the field values in registers/stack slots.
6223 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
6224 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
6225 RegState reg_state[]) {
6226 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
6227 assert(from->is_valid(), "source must be valid");
6228 bool progress = false;
6229 #ifdef ASSERT
6230 const int start_offset = offset();
6231 #endif
6232
6233 Label L_null, L_notNull;
6234 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
6235 Register tmp1 = r10;
6236 Register tmp2 = r13;
6237 Register fromReg = noreg;
6238 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
6239 bool done = true;
6240 bool mark_done = true;
6241 VMReg toReg;
6242 BasicType bt;
6243 // Check if argument requires a null check
6244 bool null_check = false;
6245 VMReg nullCheckReg;
6246 while (stream.next(nullCheckReg, bt)) {
6247 if (sig->at(stream.sig_index())._offset == -1) {
6248 null_check = true;
6249 break;
6250 }
6251 }
6252 stream.reset(sig_index, to_index);
6253 while (stream.next(toReg, bt)) {
6254 assert(toReg->is_valid(), "destination must be valid");
6255 int idx = (int)toReg->value();
6256 if (reg_state[idx] == reg_readonly) {
6257 if (idx != from->value()) {
6258 mark_done = false;
6259 }
6260 done = false;
6261 continue;
6262 } else if (reg_state[idx] == reg_written) {
6263 continue;
6264 }
6265 assert(reg_state[idx] == reg_writable, "must be writable");
6266 reg_state[idx] = reg_written;
6267 progress = true;
6268
6269 if (fromReg == noreg) {
6270 if (from->is_reg()) {
6271 fromReg = from->as_Register();
6272 } else {
6273 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6274 movq(tmp1, Address(rsp, st_off));
6275 fromReg = tmp1;
6276 }
6277 if (null_check) {
6278 // Nullable inline type argument, emit null check
6279 testptr(fromReg, fromReg);
6280 jcc(Assembler::zero, L_null);
6281 }
6282 }
6283 int off = sig->at(stream.sig_index())._offset;
6284 if (off == -1) {
6285 assert(null_check, "Missing null check at");
6286 if (toReg->is_stack()) {
6287 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6288 movq(Address(rsp, st_off), 1);
6289 } else {
6290 movq(toReg->as_Register(), 1);
6291 }
6292 continue;
6293 }
6294 if (sig->at(stream.sig_index())._vt_oop) {
6295 if (toReg->is_stack()) {
6296 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6297 movq(Address(rsp, st_off), fromReg);
6298 } else {
6299 movq(toReg->as_Register(), fromReg);
6300 }
6301 continue;
6302 }
6303 assert(off > 0, "offset in object should be positive");
6304 Address fromAddr = Address(fromReg, off);
6305 if (!toReg->is_XMMRegister()) {
6306 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
6307 if (is_reference_type(bt)) {
6308 load_heap_oop(dst, fromAddr);
6309 } else {
6310 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
6311 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
6312 }
6313 if (toReg->is_stack()) {
6314 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6315 movq(Address(rsp, st_off), dst);
6316 }
6317 } else if (bt == T_DOUBLE) {
6318 movdbl(toReg->as_XMMRegister(), fromAddr);
6319 } else {
6320 assert(bt == T_FLOAT, "must be float");
6321 movflt(toReg->as_XMMRegister(), fromAddr);
6322 }
6323 }
6324 if (progress && null_check) {
6325 if (done) {
6326 jmp(L_notNull);
6327 bind(L_null);
6328 // Set null marker to zero to signal that the argument is null.
6329 // Also set all fields to zero since the runtime requires a canonical
6330 // representation of a flat null.
6331 stream.reset(sig_index, to_index);
6332 while (stream.next(toReg, bt)) {
6333 if (toReg->is_stack()) {
6334 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6335 movq(Address(rsp, st_off), 0);
6336 } else if (toReg->is_XMMRegister()) {
6337 xorps(toReg->as_XMMRegister(), toReg->as_XMMRegister());
6338 } else {
6339 xorl(toReg->as_Register(), toReg->as_Register());
6340 }
6341 }
6342 bind(L_notNull);
6343 } else {
6344 bind(L_null);
6345 }
6346 }
6347
6348 sig_index = stream.sig_index();
6349 to_index = stream.regs_index();
6350
6351 if (mark_done && reg_state[from->value()] != reg_written) {
6352 // This is okay because no one else will write to that slot
6353 reg_state[from->value()] = reg_writable;
6354 }
6355 from_index--;
6356 assert(progress || (start_offset == offset()), "should not emit code");
6357 return done;
6358 }
6359
6360 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
6361 VMRegPair* from, int from_count, int& from_index, VMReg to,
6362 RegState reg_state[], Register val_array) {
6363 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
6364 assert(to->is_valid(), "destination must be valid");
6365
6366 if (reg_state[to->value()] == reg_written) {
6367 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
6368 return true; // Already written
6369 }
6370
6371 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
6372 Register val_obj_tmp = r11;
6373 Register from_reg_tmp = r14;
6374 Register tmp1 = r10;
6375 Register tmp2 = r13;
6376 Register tmp3 = rbx;
6377 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
6378
6379 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
6380
6381 if (reg_state[to->value()] == reg_readonly) {
6382 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
6383 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
6384 return false; // Not yet writable
6385 }
6386 val_obj = val_obj_tmp;
6387 }
6388
6389 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
6390 VMReg fromReg;
6391 BasicType bt;
6392 Label L_null;
6393 while (stream.next(fromReg, bt)) {
6394 assert(fromReg->is_valid(), "source must be valid");
6395 reg_state[fromReg->value()] = reg_writable;
6396
6397 int off = sig->at(stream.sig_index())._offset;
6398 if (off == -1) {
6399 // Nullable inline type argument, emit null check
6400 Label L_notNull;
6401 if (fromReg->is_stack()) {
6402 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6403 testb(Address(rsp, ld_off), 1);
6404 } else {
6405 testb(fromReg->as_Register(), 1);
6406 }
6407 jcc(Assembler::notZero, L_notNull);
6408 movptr(val_obj, 0);
6409 jmp(L_null);
6410 bind(L_notNull);
6411 continue;
6412 }
6413 if (sig->at(stream.sig_index())._vt_oop) {
6414 // buffer argument: use if non null
6415 if (fromReg->is_stack()) {
6416 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6417 movptr(val_obj, Address(rsp, ld_off));
6418 } else {
6419 movptr(val_obj, fromReg->as_Register());
6420 }
6421 testptr(val_obj, val_obj);
6422 jcc(Assembler::notEqual, L_null);
6423 // otherwise get the buffer from the just allocated pool of buffers
6424 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
6425 load_heap_oop(val_obj, Address(val_array, index));
6426 continue;
6427 }
6428
6429 assert(off > 0, "offset in object should be positive");
6430 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
6431
6432 // Pack the scalarized field into the value object.
6433 Address dst(val_obj, off);
6434 if (!fromReg->is_XMMRegister()) {
6435 Register src;
6436 if (fromReg->is_stack()) {
6437 src = from_reg_tmp;
6438 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6439 load_sized_value(src, Address(rsp, ld_off), size_in_bytes, /* is_signed */ false);
6440 } else {
6441 src = fromReg->as_Register();
6442 }
6443 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
6444 if (is_reference_type(bt)) {
6445 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep val_obj valid.
6446 mov(tmp3, val_obj);
6447 Address dst_with_tmp3(tmp3, off);
6448 store_heap_oop(dst_with_tmp3, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
6449 } else {
6450 store_sized_value(dst, src, size_in_bytes);
6451 }
6452 } else if (bt == T_DOUBLE) {
6453 movdbl(dst, fromReg->as_XMMRegister());
6454 } else {
6455 assert(bt == T_FLOAT, "must be float");
6456 movflt(dst, fromReg->as_XMMRegister());
6457 }
6458 }
6459 bind(L_null);
6460 sig_index = stream.sig_index();
6461 from_index = stream.regs_index();
6462
6463 assert(reg_state[to->value()] == reg_writable, "must have already been read");
6464 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
6465 assert(success, "to register must be writeable");
6466 return true;
6467 }
6468
6469 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
6470 return reg->is_XMMRegister() ? xmm8->as_VMReg() : r14->as_VMReg();
6471 }
6472
6473 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6474 assert((initial_framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6475 if (needs_stack_repair) {
6476 // The method has a scalarized entry point (where fields of value object arguments
6477 // are passed through registers and stack), and a non-scalarized entry point (where
6478 // value object arguments are given as oops). The non-scalarized entry point will
6479 // first load each field of value object arguments and store them in registers and on
6480 // the stack in a way compatible with the scalarized entry point. To do so, some extra
6481 // stack space might be reserved (if argument registers are not enough). On leaving the
6482 // method, this space must be freed.
6483 //
6484 // In case we used the non-scalarized entry point the stack looks like this:
6485 //
6486 // | Arguments from caller |
6487 // |---------------------------| <-- caller's SP
6488 // | Return address #1 |
6489 // | Saved RBP #1 |
6490 // |---------------------------|
6491 // | Extension space for |
6492 // | inline arg (un)packing |
6493 // |---------------------------| <-- start of this method's frame
6494 // | Return address #2 |
6495 // | Saved RBP #2 |
6496 // |---------------------------| <-- RBP (with -XX:+PreserveFramePointer)
6497 // | sp_inc |
6498 // | method locals |
6499 // |---------------------------| <-- SP
6500 //
6501 // Space for the return pc and saved rbp is reserved twice. But only the #1 copies
6502 // contain the real values of return pc and saved rbp. The #2 copies are not reliable
6503 // and should not be used. They are mostly needed to add space between the extension
6504 // space and the locals, as there would be between the real arguments and the locals
6505 // if we don't need to do unpacking (from the scalarized entry point).
6506 //
6507 // When leaving, one must load RBP #1 into RBP, and use the copy #1 of the return address,
6508 // while keeping in mind that from the scalarized entry point, there will be only one
6509 // copy. Indeed, in the case we used the scalarized calling convention, the stack looks like this:
6510 //
6511 // | Arguments from caller |
6512 // |---------------------------| <-- caller's SP
6513 // | Return address |
6514 // | Saved RBP |
6515 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6516 // | sp_inc |
6517 // | method locals |
6518 // |---------------------------| <-- SP
6519 //
6520 // The sp_inc stack slot holds the total size of the frame, including the extension
6521 // space and copies #2 of the return address and the saved RBP (but never the copies
6522 // #1 of the return address and saved RBP). That is how to find the copies #1 of the
6523 // return address and saved rbp. This size is expressed in bytes. Be careful when using
6524 // it from C++ in pointer arithmetic you might need to divide it by wordSize.
6525
6526 // The stack increment resides just below the saved rbp
6527 addq(rsp, Address(rsp, initial_framesize - wordSize));
6528 pop(rbp);
6529 } else {
6530 if (initial_framesize > 0) {
6531 addq(rsp, initial_framesize);
6532 }
6533 pop(rbp);
6534 }
6535 }
6536
6537 #if COMPILER2_OR_JVMCI
6538
6539 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
6540 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp, KRegister mask) {
6541 // cnt - number of qwords (8-byte words).
6542 // base - start address, qword aligned.
6543 Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
6544 bool use64byteVector = (MaxVectorSize == 64) && (CopyAVX3Threshold == 0);
6545 if (use64byteVector) {
6546 evpbroadcastq(xtmp, val, AVX_512bit);
6547 } else if (MaxVectorSize >= 32) {
6548 movdq(xtmp, val);
6549 punpcklqdq(xtmp, xtmp);
6550 vinserti128_high(xtmp, xtmp);
6551 } else {
6552 movdq(xtmp, val);
6553 punpcklqdq(xtmp, xtmp);
6554 }
6555 jmp(L_zero_64_bytes);
6556
6557 BIND(L_loop);
6558 if (MaxVectorSize >= 32) {
6559 fill64(base, 0, xtmp, use64byteVector);
6560 } else {
6561 movdqu(Address(base, 0), xtmp);
6562 movdqu(Address(base, 16), xtmp);
6563 movdqu(Address(base, 32), xtmp);
6564 movdqu(Address(base, 48), xtmp);
6565 }
6566 addptr(base, 64);
6567
6568 BIND(L_zero_64_bytes);
6569 subptr(cnt, 8);
6570 jccb(Assembler::greaterEqual, L_loop);
6571
6572 // Copy trailing 64 bytes
6573 if (use64byteVector) {
6574 addptr(cnt, 8);
6575 jccb(Assembler::equal, L_end);
6576 fill64_masked(3, base, 0, xtmp, mask, cnt, val, true);
6577 jmp(L_end);
6578 } else {
6579 addptr(cnt, 4);
6580 jccb(Assembler::less, L_tail);
6581 if (MaxVectorSize >= 32) {
6582 vmovdqu(Address(base, 0), xtmp);
6583 } else {
6584 movdqu(Address(base, 0), xtmp);
6585 movdqu(Address(base, 16), xtmp);
6586 }
6587 }
6588 addptr(base, 32);
6589 subptr(cnt, 4);
6590
6591 BIND(L_tail);
6592 addptr(cnt, 4);
6593 jccb(Assembler::lessEqual, L_end);
6594 if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
6595 fill32_masked(3, base, 0, xtmp, mask, cnt, val);
6596 } else {
6597 decrement(cnt);
6598
6599 BIND(L_sloop);
6600 movq(Address(base, 0), xtmp);
6601 addptr(base, 8);
6602 decrement(cnt);
6603 jccb(Assembler::greaterEqual, L_sloop);
6604 }
6605 BIND(L_end);
6606 }
6607
6608 // Clearing constant sized memory using YMM/ZMM registers.
6609 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
6610 assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
6611 bool use64byteVector = (MaxVectorSize > 32) && (CopyAVX3Threshold == 0);
6612
6613 int vector64_count = (cnt & (~0x7)) >> 3;
6614 cnt = cnt & 0x7;
6615 const int fill64_per_loop = 4;
6677 break;
6678 case 7:
6679 if (use64byteVector) {
6680 movl(rtmp, 0x7F);
6681 kmovwl(mask, rtmp);
6682 evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
6683 } else {
6684 evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
6685 movl(rtmp, 0x7);
6686 kmovwl(mask, rtmp);
6687 evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
6688 }
6689 break;
6690 default:
6691 fatal("Unexpected length : %d\n",cnt);
6692 break;
6693 }
6694 }
6695 }
6696
6697 void MacroAssembler::clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp,
6698 bool is_large, bool word_copy_only, KRegister mask) {
6699 // cnt - number of qwords (8-byte words).
6700 // base - start address, qword aligned.
6701 // is_large - if optimizers know cnt is larger than InitArrayShortSize
6702 assert(base==rdi, "base register must be edi for rep stos");
6703 assert(val==rax, "val register must be eax for rep stos");
6704 assert(cnt==rcx, "cnt register must be ecx for rep stos");
6705 assert(InitArrayShortSize % BytesPerLong == 0,
6706 "InitArrayShortSize should be the multiple of BytesPerLong");
6707
6708 Label DONE;
6709
6710 if (!is_large) {
6711 Label LOOP, LONG;
6712 cmpptr(cnt, InitArrayShortSize/BytesPerLong);
6713 jccb(Assembler::greater, LONG);
6714
6715 decrement(cnt);
6716 jccb(Assembler::negative, DONE); // Zero length
6717
6718 // Use individual pointer-sized stores for small counts:
6719 BIND(LOOP);
6720 movptr(Address(base, cnt, Address::times_ptr), val);
6721 decrement(cnt);
6722 jccb(Assembler::greaterEqual, LOOP);
6723 jmpb(DONE);
6724
6725 BIND(LONG);
6726 }
6727
6728 // Use longer rep-prefixed ops for non-small counts:
6729 if (UseFastStosb && !word_copy_only) {
6730 shlptr(cnt, 3); // convert to number of bytes
6731 rep_stosb();
6732 } else if (UseXMMForObjInit) {
6733 xmm_clear_mem(base, cnt, val, xtmp, mask);
6734 } else {
6735 rep_stos();
6736 }
6737
6738 BIND(DONE);
6739 }
6740
6741 #endif //COMPILER2_OR_JVMCI
6742
6743
6744 void MacroAssembler::generate_fill(BasicType t, bool aligned,
6745 Register to, Register value, Register count,
6746 Register rtmp, XMMRegister xtmp) {
6747 ShortBranchVerifier sbv(this);
6748 assert_different_registers(to, value, count, rtmp);
6749 Label L_exit;
6750 Label L_fill_2_bytes, L_fill_4_bytes;
6751
6752 #if defined(COMPILER2)
6753 if(MaxVectorSize >=32 &&
10630
10631 // Load top.
10632 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10633
10634 // Check if the lock-stack is full.
10635 cmpl(top, LockStack::end_offset());
10636 jcc(Assembler::greaterEqual, slow);
10637
10638 // Check for recursion.
10639 cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
10640 jcc(Assembler::equal, push);
10641
10642 // Check header for monitor (0b10).
10643 testptr(reg_rax, markWord::monitor_value);
10644 jcc(Assembler::notZero, slow);
10645
10646 // Try to lock. Transition lock bits 0b01 => 0b00
10647 movptr(tmp, reg_rax);
10648 andptr(tmp, ~(int32_t)markWord::unlocked_value);
10649 orptr(reg_rax, markWord::unlocked_value);
10650 // Mask inline_type bit such that we go to the slow path if object is an inline type
10651 andptr(reg_rax, ~((int) markWord::inline_type_bit_in_place));
10652
10653 lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
10654 jcc(Assembler::notEqual, slow);
10655
10656 // Restore top, CAS clobbers register.
10657 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10658
10659 bind(push);
10660 // After successful lock, push object on lock-stack.
10661 movptr(Address(thread, top), obj);
10662 incrementl(top, oopSize);
10663 movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
10664 }
10665
10666 // Implements fast-unlocking.
10667 //
10668 // obj: the object to be unlocked
10669 // reg_rax: rax
10670 // thread: the thread
10671 // tmp: a temporary register
10672 void MacroAssembler::fast_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {
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