10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/assembler.hpp"
26 #include "asm/assembler.inline.hpp"
27 #include "code/compiledIC.hpp"
28 #include "compiler/compiler_globals.hpp"
29 #include "compiler/disassembler.hpp"
30 #include "crc32c.h"
31 #include "gc/shared/barrierSet.hpp"
32 #include "gc/shared/barrierSetAssembler.hpp"
33 #include "gc/shared/collectedHeap.inline.hpp"
34 #include "gc/shared/tlab_globals.hpp"
35 #include "interpreter/bytecodeHistogram.hpp"
36 #include "interpreter/interpreter.hpp"
37 #include "interpreter/interpreterRuntime.hpp"
38 #include "jvm.h"
39 #include "memory/resourceArea.hpp"
40 #include "memory/universe.hpp"
41 #include "oops/accessDecorators.hpp"
42 #include "oops/compressedKlass.inline.hpp"
43 #include "oops/compressedOops.inline.hpp"
44 #include "oops/klass.inline.hpp"
45 #include "prims/methodHandles.hpp"
46 #include "runtime/continuation.hpp"
47 #include "runtime/interfaceSupport.inline.hpp"
48 #include "runtime/javaThread.hpp"
49 #include "runtime/jniHandles.hpp"
50 #include "runtime/objectMonitor.hpp"
51 #include "runtime/os.hpp"
52 #include "runtime/safepoint.hpp"
53 #include "runtime/safepointMechanism.hpp"
54 #include "runtime/sharedRuntime.hpp"
55 #include "runtime/stubRoutines.hpp"
56 #include "utilities/checkedCast.hpp"
57 #include "utilities/macros.hpp"
58
59 #ifdef PRODUCT
60 #define BLOCK_COMMENT(str) /* nothing */
61 #define STOP(error) stop(error)
62 #else
63 #define BLOCK_COMMENT(str) block_comment(str)
64 #define STOP(error) block_comment(error); stop(error)
65 #endif
66
67 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
68
69 #ifdef ASSERT
70 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
71 #endif
72
73 static const Assembler::Condition reverse[] = {
74 Assembler::noOverflow /* overflow = 0x0 */ ,
75 Assembler::overflow /* noOverflow = 0x1 */ ,
76 Assembler::aboveEqual /* carrySet = 0x2, below = 0x2 */ ,
77 Assembler::below /* aboveEqual = 0x3, carryClear = 0x3 */ ,
1267 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1268 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1269 assert_different_registers(arg_1, c_rarg2);
1270 pass_arg2(this, arg_2);
1271 pass_arg1(this, arg_1);
1272 pass_arg0(this, arg_0);
1273 call_VM_leaf(entry_point, 3);
1274 }
1275
1276 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
1277 assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
1278 assert_different_registers(arg_1, c_rarg2, c_rarg3);
1279 assert_different_registers(arg_2, c_rarg3);
1280 pass_arg3(this, arg_3);
1281 pass_arg2(this, arg_2);
1282 pass_arg1(this, arg_1);
1283 pass_arg0(this, arg_0);
1284 call_VM_leaf(entry_point, 3);
1285 }
1286
1287 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
1288 pass_arg0(this, arg_0);
1289 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1290 }
1291
1292 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
1293 assert_different_registers(arg_0, c_rarg1);
1294 pass_arg1(this, arg_1);
1295 pass_arg0(this, arg_0);
1296 MacroAssembler::call_VM_leaf_base(entry_point, 2);
1297 }
1298
1299 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1300 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1301 assert_different_registers(arg_1, c_rarg2);
1302 pass_arg2(this, arg_2);
1303 pass_arg1(this, arg_1);
1304 pass_arg0(this, arg_0);
1305 MacroAssembler::call_VM_leaf_base(entry_point, 3);
1306 }
2323 lea(rscratch, src);
2324 Assembler::mulss(dst, Address(rscratch, 0));
2325 }
2326 }
2327
2328 void MacroAssembler::null_check(Register reg, int offset) {
2329 if (needs_explicit_null_check(offset)) {
2330 // provoke OS null exception if reg is null by
2331 // accessing M[reg] w/o changing any (non-CC) registers
2332 // NOTE: cmpl is plenty here to provoke a segv
2333 cmpptr(rax, Address(reg, 0));
2334 // Note: should probably use testl(rax, Address(reg, 0));
2335 // may be shorter code (however, this version of
2336 // testl needs to be implemented first)
2337 } else {
2338 // nothing to do, (later) access of M[reg + offset]
2339 // will provoke OS null exception if reg is null
2340 }
2341 }
2342
2343 void MacroAssembler::os_breakpoint() {
2344 // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
2345 // (e.g., MSVC can't call ps() otherwise)
2346 call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
2347 }
2348
2349 void MacroAssembler::unimplemented(const char* what) {
2350 const char* buf = nullptr;
2351 {
2352 ResourceMark rm;
2353 stringStream ss;
2354 ss.print("unimplemented: %s", what);
2355 buf = code_string(ss.as_string());
2356 }
2357 stop(buf);
2358 }
2359
2360 #define XSTATE_BV 0x200
2361
2362 void MacroAssembler::pop_CPU_state() {
3411 }
3412
3413 // C++ bool manipulation
3414 void MacroAssembler::testbool(Register dst) {
3415 if(sizeof(bool) == 1)
3416 testb(dst, 0xff);
3417 else if(sizeof(bool) == 2) {
3418 // testw implementation needed for two byte bools
3419 ShouldNotReachHere();
3420 } else if(sizeof(bool) == 4)
3421 testl(dst, dst);
3422 else
3423 // unsupported
3424 ShouldNotReachHere();
3425 }
3426
3427 void MacroAssembler::testptr(Register dst, Register src) {
3428 testq(dst, src);
3429 }
3430
3431 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
3432 void MacroAssembler::tlab_allocate(Register obj,
3433 Register var_size_in_bytes,
3434 int con_size_in_bytes,
3435 Register t1,
3436 Register t2,
3437 Label& slow_case) {
3438 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
3439 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
3440 }
3441
3442 RegSet MacroAssembler::call_clobbered_gp_registers() {
3443 RegSet regs;
3444 regs += RegSet::of(rax, rcx, rdx);
3445 #ifndef _WINDOWS
3446 regs += RegSet::of(rsi, rdi);
3447 #endif
3448 regs += RegSet::range(r8, r11);
3449 if (UseAPX) {
3450 regs += RegSet::range(r16, as_Register(Register::number_of_registers - 1));
3614 xorptr(temp, temp); // use _zero reg to clear memory (shorter code)
3615 if (UseIncDec) {
3616 shrptr(index, 3); // divide by 8/16 and set carry flag if bit 2 was set
3617 } else {
3618 shrptr(index, 2); // use 2 instructions to avoid partial flag stall
3619 shrptr(index, 1);
3620 }
3621
3622 // initialize remaining object fields: index is a multiple of 2 now
3623 {
3624 Label loop;
3625 bind(loop);
3626 movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
3627 decrement(index);
3628 jcc(Assembler::notZero, loop);
3629 }
3630
3631 bind(done);
3632 }
3633
3634 // Look up the method for a megamorphic invokeinterface call.
3635 // The target method is determined by <intf_klass, itable_index>.
3636 // The receiver klass is in recv_klass.
3637 // On success, the result will be in method_result, and execution falls through.
3638 // On failure, execution transfers to the given label.
3639 void MacroAssembler::lookup_interface_method(Register recv_klass,
3640 Register intf_klass,
3641 RegisterOrConstant itable_index,
3642 Register method_result,
3643 Register scan_temp,
3644 Label& L_no_such_interface,
3645 bool return_method) {
3646 assert_different_registers(recv_klass, intf_klass, scan_temp);
3647 assert_different_registers(method_result, intf_klass, scan_temp);
3648 assert(recv_klass != method_result || !return_method,
3649 "recv_klass can be destroyed when method isn't needed");
3650
3651 assert(itable_index.is_constant() || itable_index.as_register() == method_result,
3652 "caller must use same register for non-constant itable index as for method");
3653
4664 } else {
4665 Label L;
4666 jccb(negate_condition(cc), L);
4667 movl(dst, src);
4668 bind(L);
4669 }
4670 }
4671
4672 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
4673 if (VM_Version::supports_cmov()) {
4674 cmovl(cc, dst, src);
4675 } else {
4676 Label L;
4677 jccb(negate_condition(cc), L);
4678 movl(dst, src);
4679 bind(L);
4680 }
4681 }
4682
4683 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
4684 if (!VerifyOops) return;
4685
4686 BLOCK_COMMENT("verify_oop {");
4687 push(rscratch1);
4688 push(rax); // save rax
4689 push(reg); // pass register argument
4690
4691 // Pass register number to verify_oop_subroutine
4692 const char* b = nullptr;
4693 {
4694 ResourceMark rm;
4695 stringStream ss;
4696 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
4697 b = code_string(ss.as_string());
4698 }
4699 AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
4700 pushptr(buffer.addr(), rscratch1);
4701
4702 // call indirectly to solve generation ordering problem
4703 movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
4704 call(rax);
4723 // cf. TemplateTable::prepare_invoke(), if (load_receiver).
4724 int stackElementSize = Interpreter::stackElementSize;
4725 int offset = Interpreter::expr_offset_in_bytes(extra_slot_offset+0);
4726 #ifdef ASSERT
4727 int offset1 = Interpreter::expr_offset_in_bytes(extra_slot_offset+1);
4728 assert(offset1 - offset == stackElementSize, "correct arithmetic");
4729 #endif
4730 Register scale_reg = noreg;
4731 Address::ScaleFactor scale_factor = Address::no_scale;
4732 if (arg_slot.is_constant()) {
4733 offset += arg_slot.as_constant() * stackElementSize;
4734 } else {
4735 scale_reg = arg_slot.as_register();
4736 scale_factor = Address::times(stackElementSize);
4737 }
4738 offset += wordSize; // return PC is on stack
4739 return Address(rsp, scale_reg, scale_factor, offset);
4740 }
4741
4742 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
4743 if (!VerifyOops) return;
4744
4745 push(rscratch1);
4746 push(rax); // save rax,
4747 // addr may contain rsp so we will have to adjust it based on the push
4748 // we just did (and on 64 bit we do two pushes)
4749 // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
4750 // stores rax into addr which is backwards of what was intended.
4751 if (addr.uses(rsp)) {
4752 lea(rax, addr);
4753 pushptr(Address(rax, 2 * BytesPerWord));
4754 } else {
4755 pushptr(addr);
4756 }
4757
4758 // Pass register number to verify_oop_subroutine
4759 const char* b = nullptr;
4760 {
4761 ResourceMark rm;
4762 stringStream ss;
4763 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
5117
5118 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
5119 // get mirror
5120 const int mirror_offset = in_bytes(Klass::java_mirror_offset());
5121 load_method_holder(mirror, method);
5122 movptr(mirror, Address(mirror, mirror_offset));
5123 resolve_oop_handle(mirror, tmp);
5124 }
5125
5126 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5127 load_method_holder(rresult, rmethod);
5128 movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5129 }
5130
5131 void MacroAssembler::load_method_holder(Register holder, Register method) {
5132 movptr(holder, Address(method, Method::const_offset())); // ConstMethod*
5133 movptr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5134 movptr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5135 }
5136
5137 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5138 assert(UseCompactObjectHeaders, "expect compact object headers");
5139 movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5140 shrq(dst, markWord::klass_shift);
5141 }
5142
5143 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
5144 assert_different_registers(src, tmp);
5145 assert_different_registers(dst, tmp);
5146
5147 if (UseCompactObjectHeaders) {
5148 load_narrow_klass_compact(dst, src);
5149 decode_klass_not_null(dst, tmp);
5150 } else if (UseCompressedClassPointers) {
5151 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5152 decode_klass_not_null(dst, tmp);
5153 } else {
5154 movptr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5155 }
5156 }
5157
5158 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
5159 assert(!UseCompactObjectHeaders, "not with compact headers");
5160 assert_different_registers(src, tmp);
5161 assert_different_registers(dst, tmp);
5162 if (UseCompressedClassPointers) {
5163 encode_klass_not_null(src, tmp);
5164 movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5165 } else {
5166 movptr(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5167 }
5168 }
5169
5170 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
5171 if (UseCompactObjectHeaders) {
5172 assert(tmp != noreg, "need tmp");
5173 assert_different_registers(klass, obj, tmp);
5174 load_narrow_klass_compact(tmp, obj);
5175 cmpl(klass, tmp);
5176 } else if (UseCompressedClassPointers) {
5177 cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
5203 bool as_raw = (decorators & AS_RAW) != 0;
5204 if (as_raw) {
5205 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
5206 } else {
5207 bs->load_at(this, decorators, type, dst, src, tmp1);
5208 }
5209 }
5210
5211 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
5212 Register tmp1, Register tmp2, Register tmp3) {
5213 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5214 decorators = AccessInternal::decorator_fixup(decorators, type);
5215 bool as_raw = (decorators & AS_RAW) != 0;
5216 if (as_raw) {
5217 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5218 } else {
5219 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5220 }
5221 }
5222
5223 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5224 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
5225 }
5226
5227 // Doesn't do verification, generates fixed size code
5228 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5229 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
5230 }
5231
5232 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5233 Register tmp2, Register tmp3, DecoratorSet decorators) {
5234 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5235 }
5236
5237 // Used for storing nulls.
5238 void MacroAssembler::store_heap_oop_null(Address dst) {
5239 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5240 }
5241
5242 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5546 Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
5547 }
5548
5549 void MacroAssembler::reinit_heapbase() {
5550 if (UseCompressedOops) {
5551 if (Universe::heap() != nullptr) {
5552 if (CompressedOops::base() == nullptr) {
5553 MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
5554 } else {
5555 mov64(r12_heapbase, (int64_t)CompressedOops::base());
5556 }
5557 } else {
5558 movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
5559 }
5560 }
5561 }
5562
5563 #if COMPILER2_OR_JVMCI
5564
5565 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
5566 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
5567 // cnt - number of qwords (8-byte words).
5568 // base - start address, qword aligned.
5569 Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
5570 bool use64byteVector = (MaxVectorSize == 64) && (VM_Version::avx3_threshold() == 0);
5571 if (use64byteVector) {
5572 vpxor(xtmp, xtmp, xtmp, AVX_512bit);
5573 } else if (MaxVectorSize >= 32) {
5574 vpxor(xtmp, xtmp, xtmp, AVX_256bit);
5575 } else {
5576 pxor(xtmp, xtmp);
5577 }
5578 jmp(L_zero_64_bytes);
5579
5580 BIND(L_loop);
5581 if (MaxVectorSize >= 32) {
5582 fill64(base, 0, xtmp, use64byteVector);
5583 } else {
5584 movdqu(Address(base, 0), xtmp);
5585 movdqu(Address(base, 16), xtmp);
5586 movdqu(Address(base, 32), xtmp);
5587 movdqu(Address(base, 48), xtmp);
5588 }
5589 addptr(base, 64);
5590
5591 BIND(L_zero_64_bytes);
5592 subptr(cnt, 8);
5593 jccb(Assembler::greaterEqual, L_loop);
5594
5595 // Copy trailing 64 bytes
5596 if (use64byteVector) {
5597 addptr(cnt, 8);
5598 jccb(Assembler::equal, L_end);
5599 fill64_masked(3, base, 0, xtmp, mask, cnt, rtmp, true);
5600 jmp(L_end);
5601 } else {
5602 addptr(cnt, 4);
5603 jccb(Assembler::less, L_tail);
5604 if (MaxVectorSize >= 32) {
5605 vmovdqu(Address(base, 0), xtmp);
5606 } else {
5607 movdqu(Address(base, 0), xtmp);
5608 movdqu(Address(base, 16), xtmp);
5609 }
5610 }
5611 addptr(base, 32);
5612 subptr(cnt, 4);
5613
5614 BIND(L_tail);
5615 addptr(cnt, 4);
5616 jccb(Assembler::lessEqual, L_end);
5617 if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
5618 fill32_masked(3, base, 0, xtmp, mask, cnt, rtmp);
5619 } else {
5620 decrement(cnt);
5621
5622 BIND(L_sloop);
5623 movq(Address(base, 0), xtmp);
5624 addptr(base, 8);
5625 decrement(cnt);
5626 jccb(Assembler::greaterEqual, L_sloop);
5627 }
5628 BIND(L_end);
5629 }
5630
5631 // Clearing constant sized memory using YMM/ZMM registers.
5632 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
5633 assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
5634 bool use64byteVector = (MaxVectorSize > 32) && (VM_Version::avx3_threshold() == 0);
5635
5636 int vector64_count = (cnt & (~0x7)) >> 3;
5637 cnt = cnt & 0x7;
5638 const int fill64_per_loop = 4;
5639 const int max_unrolled_fill64 = 8;
5640
5641 // 64 byte initialization loop.
5642 vpxor(xtmp, xtmp, xtmp, use64byteVector ? AVX_512bit : AVX_256bit);
5643 int start64 = 0;
5644 if (vector64_count > max_unrolled_fill64) {
5645 Label LOOP;
5646 Register index = rtmp;
5647
5648 start64 = vector64_count - (vector64_count % fill64_per_loop);
5649
5650 movl(index, 0);
5700 break;
5701 case 7:
5702 if (use64byteVector) {
5703 movl(rtmp, 0x7F);
5704 kmovwl(mask, rtmp);
5705 evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
5706 } else {
5707 evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
5708 movl(rtmp, 0x7);
5709 kmovwl(mask, rtmp);
5710 evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
5711 }
5712 break;
5713 default:
5714 fatal("Unexpected length : %d\n",cnt);
5715 break;
5716 }
5717 }
5718 }
5719
5720 void MacroAssembler::clear_mem(Register base, Register cnt, Register tmp, XMMRegister xtmp,
5721 bool is_large, KRegister mask) {
5722 // cnt - number of qwords (8-byte words).
5723 // base - start address, qword aligned.
5724 // is_large - if optimizers know cnt is larger than InitArrayShortSize
5725 assert(base==rdi, "base register must be edi for rep stos");
5726 assert(tmp==rax, "tmp register must be eax for rep stos");
5727 assert(cnt==rcx, "cnt register must be ecx for rep stos");
5728 assert(InitArrayShortSize % BytesPerLong == 0,
5729 "InitArrayShortSize should be the multiple of BytesPerLong");
5730
5731 Label DONE;
5732 if (!is_large || !UseXMMForObjInit) {
5733 xorptr(tmp, tmp);
5734 }
5735
5736 if (!is_large) {
5737 Label LOOP, LONG;
5738 cmpptr(cnt, InitArrayShortSize/BytesPerLong);
5739 jccb(Assembler::greater, LONG);
5740
5741 decrement(cnt);
5742 jccb(Assembler::negative, DONE); // Zero length
5743
5744 // Use individual pointer-sized stores for small counts:
5745 BIND(LOOP);
5746 movptr(Address(base, cnt, Address::times_ptr), tmp);
5747 decrement(cnt);
5748 jccb(Assembler::greaterEqual, LOOP);
5749 jmpb(DONE);
5750
5751 BIND(LONG);
5752 }
5753
5754 // Use longer rep-prefixed ops for non-small counts:
5755 if (UseFastStosb) {
5756 shlptr(cnt, 3); // convert to number of bytes
5757 rep_stosb();
5758 } else if (UseXMMForObjInit) {
5759 xmm_clear_mem(base, cnt, tmp, xtmp, mask);
5760 } else {
5761 rep_stos();
5762 }
5763
5764 BIND(DONE);
5765 }
5766
5767 #endif //COMPILER2_OR_JVMCI
5768
5769
5770 void MacroAssembler::generate_fill(BasicType t, bool aligned,
5771 Register to, Register value, Register count,
5772 Register rtmp, XMMRegister xtmp) {
5773 ShortBranchVerifier sbv(this);
5774 assert_different_registers(to, value, count, rtmp);
5775 Label L_exit;
5776 Label L_fill_2_bytes, L_fill_4_bytes;
5777
5778 #if defined(COMPILER2)
5779 if(MaxVectorSize >=32 &&
9596
9597 // Load top.
9598 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
9599
9600 // Check if the lock-stack is full.
9601 cmpl(top, LockStack::end_offset());
9602 jcc(Assembler::greaterEqual, slow);
9603
9604 // Check for recursion.
9605 cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
9606 jcc(Assembler::equal, push);
9607
9608 // Check header for monitor (0b10).
9609 testptr(reg_rax, markWord::monitor_value);
9610 jcc(Assembler::notZero, slow);
9611
9612 // Try to lock. Transition lock bits 0b01 => 0b00
9613 movptr(tmp, reg_rax);
9614 andptr(tmp, ~(int32_t)markWord::unlocked_value);
9615 orptr(reg_rax, markWord::unlocked_value);
9616 lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
9617 jcc(Assembler::notEqual, slow);
9618
9619 // Restore top, CAS clobbers register.
9620 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
9621
9622 bind(push);
9623 // After successful lock, push object on lock-stack.
9624 movptr(Address(thread, top), obj);
9625 incrementl(top, oopSize);
9626 movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
9627 }
9628
9629 // Implements lightweight-unlocking.
9630 //
9631 // obj: the object to be unlocked
9632 // reg_rax: rax
9633 // thread: the thread
9634 // tmp: a temporary register
9635 void MacroAssembler::lightweight_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {
|
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/assembler.hpp"
26 #include "asm/assembler.inline.hpp"
27 #include "code/compiledIC.hpp"
28 #include "compiler/compiler_globals.hpp"
29 #include "compiler/disassembler.hpp"
30 #include "ci/ciInlineKlass.hpp"
31 #include "crc32c.h"
32 #include "gc/shared/barrierSet.hpp"
33 #include "gc/shared/barrierSetAssembler.hpp"
34 #include "gc/shared/collectedHeap.inline.hpp"
35 #include "gc/shared/tlab_globals.hpp"
36 #include "interpreter/bytecodeHistogram.hpp"
37 #include "interpreter/interpreter.hpp"
38 #include "interpreter/interpreterRuntime.hpp"
39 #include "jvm.h"
40 #include "memory/resourceArea.hpp"
41 #include "memory/universe.hpp"
42 #include "oops/accessDecorators.hpp"
43 #include "oops/compressedKlass.inline.hpp"
44 #include "oops/compressedOops.inline.hpp"
45 #include "oops/klass.inline.hpp"
46 #include "oops/resolvedFieldEntry.hpp"
47 #include "prims/methodHandles.hpp"
48 #include "runtime/continuation.hpp"
49 #include "runtime/interfaceSupport.inline.hpp"
50 #include "runtime/javaThread.hpp"
51 #include "runtime/jniHandles.hpp"
52 #include "runtime/objectMonitor.hpp"
53 #include "runtime/os.hpp"
54 #include "runtime/safepoint.hpp"
55 #include "runtime/safepointMechanism.hpp"
56 #include "runtime/sharedRuntime.hpp"
57 #include "runtime/signature_cc.hpp"
58 #include "runtime/stubRoutines.hpp"
59 #include "utilities/checkedCast.hpp"
60 #include "utilities/macros.hpp"
61 #include "vmreg_x86.inline.hpp"
62 #ifdef COMPILER2
63 #include "opto/output.hpp"
64 #endif
65
66 #ifdef PRODUCT
67 #define BLOCK_COMMENT(str) /* nothing */
68 #define STOP(error) stop(error)
69 #else
70 #define BLOCK_COMMENT(str) block_comment(str)
71 #define STOP(error) block_comment(error); stop(error)
72 #endif
73
74 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
75
76 #ifdef ASSERT
77 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
78 #endif
79
80 static const Assembler::Condition reverse[] = {
81 Assembler::noOverflow /* overflow = 0x0 */ ,
82 Assembler::overflow /* noOverflow = 0x1 */ ,
83 Assembler::aboveEqual /* carrySet = 0x2, below = 0x2 */ ,
84 Assembler::below /* aboveEqual = 0x3, carryClear = 0x3 */ ,
1274 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1275 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1276 assert_different_registers(arg_1, c_rarg2);
1277 pass_arg2(this, arg_2);
1278 pass_arg1(this, arg_1);
1279 pass_arg0(this, arg_0);
1280 call_VM_leaf(entry_point, 3);
1281 }
1282
1283 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
1284 assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
1285 assert_different_registers(arg_1, c_rarg2, c_rarg3);
1286 assert_different_registers(arg_2, c_rarg3);
1287 pass_arg3(this, arg_3);
1288 pass_arg2(this, arg_2);
1289 pass_arg1(this, arg_1);
1290 pass_arg0(this, arg_0);
1291 call_VM_leaf(entry_point, 3);
1292 }
1293
1294 void MacroAssembler::super_call_VM_leaf(address entry_point) {
1295 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1296 }
1297
1298 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
1299 pass_arg0(this, arg_0);
1300 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1301 }
1302
1303 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
1304 assert_different_registers(arg_0, c_rarg1);
1305 pass_arg1(this, arg_1);
1306 pass_arg0(this, arg_0);
1307 MacroAssembler::call_VM_leaf_base(entry_point, 2);
1308 }
1309
1310 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1311 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1312 assert_different_registers(arg_1, c_rarg2);
1313 pass_arg2(this, arg_2);
1314 pass_arg1(this, arg_1);
1315 pass_arg0(this, arg_0);
1316 MacroAssembler::call_VM_leaf_base(entry_point, 3);
1317 }
2334 lea(rscratch, src);
2335 Assembler::mulss(dst, Address(rscratch, 0));
2336 }
2337 }
2338
2339 void MacroAssembler::null_check(Register reg, int offset) {
2340 if (needs_explicit_null_check(offset)) {
2341 // provoke OS null exception if reg is null by
2342 // accessing M[reg] w/o changing any (non-CC) registers
2343 // NOTE: cmpl is plenty here to provoke a segv
2344 cmpptr(rax, Address(reg, 0));
2345 // Note: should probably use testl(rax, Address(reg, 0));
2346 // may be shorter code (however, this version of
2347 // testl needs to be implemented first)
2348 } else {
2349 // nothing to do, (later) access of M[reg + offset]
2350 // will provoke OS null exception if reg is null
2351 }
2352 }
2353
2354 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2355 andptr(markword, markWord::inline_type_mask_in_place);
2356 cmpptr(markword, markWord::inline_type_pattern);
2357 jcc(Assembler::equal, is_inline_type);
2358 }
2359
2360 void MacroAssembler::test_klass_is_inline_type(Register klass, Register temp_reg, Label& is_inline_type) {
2361 load_unsigned_short(temp_reg, Address(klass, Klass::access_flags_offset()));
2362 testl(temp_reg, JVM_ACC_IDENTITY);
2363 jcc(Assembler::zero, is_inline_type);
2364 }
2365
2366 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type) {
2367 testptr(object, object);
2368 jcc(Assembler::zero, not_inline_type);
2369 const int is_inline_type_mask = markWord::inline_type_pattern;
2370 movptr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2371 andptr(tmp, is_inline_type_mask);
2372 cmpptr(tmp, is_inline_type_mask);
2373 jcc(Assembler::notEqual, not_inline_type);
2374 }
2375
2376 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2377 movl(temp_reg, flags);
2378 testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
2379 jcc(Assembler::notEqual, is_null_free_inline_type);
2380 }
2381
2382 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2383 movl(temp_reg, flags);
2384 testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
2385 jcc(Assembler::equal, not_null_free_inline_type);
2386 }
2387
2388 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2389 movl(temp_reg, flags);
2390 testl(temp_reg, 1 << ResolvedFieldEntry::is_flat_shift);
2391 jcc(Assembler::notEqual, is_flat);
2392 }
2393
2394 void MacroAssembler::test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker) {
2395 movl(temp_reg, flags);
2396 testl(temp_reg, 1 << ResolvedFieldEntry::has_null_marker_shift);
2397 jcc(Assembler::notEqual, has_null_marker);
2398 }
2399
2400 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2401 Label test_mark_word;
2402 // load mark word
2403 movptr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2404 // check displaced
2405 testl(temp_reg, markWord::unlocked_value);
2406 jccb(Assembler::notZero, test_mark_word);
2407 // slow path use klass prototype
2408 push(rscratch1);
2409 load_prototype_header(temp_reg, oop, rscratch1);
2410 pop(rscratch1);
2411
2412 bind(test_mark_word);
2413 testl(temp_reg, test_bit);
2414 jcc((jmp_set) ? Assembler::notZero : Assembler::zero, jmp_label);
2415 }
2416
2417 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg,
2418 Label& is_flat_array) {
2419 #ifdef _LP64
2420 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2421 #else
2422 load_klass(temp_reg, oop, noreg);
2423 movl(temp_reg, Address(temp_reg, Klass::layout_helper_offset()));
2424 test_flat_array_layout(temp_reg, is_flat_array);
2425 #endif
2426 }
2427
2428 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2429 Label& is_non_flat_array) {
2430 #ifdef _LP64
2431 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2432 #else
2433 load_klass(temp_reg, oop, noreg);
2434 movl(temp_reg, Address(temp_reg, Klass::layout_helper_offset()));
2435 test_non_flat_array_layout(temp_reg, is_non_flat_array);
2436 #endif
2437 }
2438
2439 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label&is_null_free_array) {
2440 #ifdef _LP64
2441 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2442 #else
2443 Unimplemented();
2444 #endif
2445 }
2446
2447 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2448 #ifdef _LP64
2449 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2450 #else
2451 Unimplemented();
2452 #endif
2453 }
2454
2455 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2456 testl(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2457 jcc(Assembler::notZero, is_flat_array);
2458 }
2459
2460 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
2461 testl(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2462 jcc(Assembler::zero, is_non_flat_array);
2463 }
2464
2465 void MacroAssembler::os_breakpoint() {
2466 // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
2467 // (e.g., MSVC can't call ps() otherwise)
2468 call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
2469 }
2470
2471 void MacroAssembler::unimplemented(const char* what) {
2472 const char* buf = nullptr;
2473 {
2474 ResourceMark rm;
2475 stringStream ss;
2476 ss.print("unimplemented: %s", what);
2477 buf = code_string(ss.as_string());
2478 }
2479 stop(buf);
2480 }
2481
2482 #define XSTATE_BV 0x200
2483
2484 void MacroAssembler::pop_CPU_state() {
3533 }
3534
3535 // C++ bool manipulation
3536 void MacroAssembler::testbool(Register dst) {
3537 if(sizeof(bool) == 1)
3538 testb(dst, 0xff);
3539 else if(sizeof(bool) == 2) {
3540 // testw implementation needed for two byte bools
3541 ShouldNotReachHere();
3542 } else if(sizeof(bool) == 4)
3543 testl(dst, dst);
3544 else
3545 // unsupported
3546 ShouldNotReachHere();
3547 }
3548
3549 void MacroAssembler::testptr(Register dst, Register src) {
3550 testq(dst, src);
3551 }
3552
3553 // Object / value buffer allocation...
3554 //
3555 // Kills klass and rsi on LP64
3556 void MacroAssembler::allocate_instance(Register klass, Register new_obj,
3557 Register t1, Register t2,
3558 bool clear_fields, Label& alloc_failed)
3559 {
3560 Label done, initialize_header, initialize_object, slow_case, slow_case_no_pop;
3561 Register layout_size = t1;
3562 assert(new_obj == rax, "needs to be rax");
3563 assert_different_registers(klass, new_obj, t1, t2);
3564
3565 // get instance_size in InstanceKlass (scaled to a count of bytes)
3566 movl(layout_size, Address(klass, Klass::layout_helper_offset()));
3567 // test to see if it is malformed in some way
3568 testl(layout_size, Klass::_lh_instance_slow_path_bit);
3569 jcc(Assembler::notZero, slow_case_no_pop);
3570
3571 // Allocate the instance:
3572 // If TLAB is enabled:
3573 // Try to allocate in the TLAB.
3574 // If fails, go to the slow path.
3575 // Else If inline contiguous allocations are enabled:
3576 // Try to allocate in eden.
3577 // If fails due to heap end, go to slow path.
3578 //
3579 // If TLAB is enabled OR inline contiguous is enabled:
3580 // Initialize the allocation.
3581 // Exit.
3582 //
3583 // Go to slow path.
3584
3585 push(klass);
3586 if (UseTLAB) {
3587 tlab_allocate(new_obj, layout_size, 0, klass, t2, slow_case);
3588 if (ZeroTLAB || (!clear_fields)) {
3589 // the fields have been already cleared
3590 jmp(initialize_header);
3591 } else {
3592 // initialize both the header and fields
3593 jmp(initialize_object);
3594 }
3595 } else {
3596 jmp(slow_case);
3597 }
3598
3599 // If UseTLAB is true, the object is created above and there is an initialize need.
3600 // Otherwise, skip and go to the slow path.
3601 if (UseTLAB) {
3602 if (clear_fields) {
3603 // The object is initialized before the header. If the object size is
3604 // zero, go directly to the header initialization.
3605 bind(initialize_object);
3606 if (UseCompactObjectHeaders) {
3607 assert(is_aligned(oopDesc::base_offset_in_bytes(), BytesPerLong), "oop base offset must be 8-byte-aligned");
3608 decrement(layout_size, oopDesc::base_offset_in_bytes());
3609 } else {
3610 decrement(layout_size, sizeof(oopDesc));
3611 }
3612 jcc(Assembler::zero, initialize_header);
3613
3614 // Initialize topmost object field, divide size by 8, check if odd and
3615 // test if zero.
3616 Register zero = klass;
3617 xorl(zero, zero); // use zero reg to clear memory (shorter code)
3618 shrl(layout_size, LogBytesPerLong); // divide by 2*oopSize and set carry flag if odd
3619
3620 #ifdef ASSERT
3621 // make sure instance_size was multiple of 8
3622 Label L;
3623 // Ignore partial flag stall after shrl() since it is debug VM
3624 jcc(Assembler::carryClear, L);
3625 stop("object size is not multiple of 2 - adjust this code");
3626 bind(L);
3627 // must be > 0, no extra check needed here
3628 #endif
3629
3630 // initialize remaining object fields: instance_size was a multiple of 8
3631 {
3632 Label loop;
3633 bind(loop);
3634 int header_size_bytes = oopDesc::header_size() * HeapWordSize;
3635 assert(is_aligned(header_size_bytes, BytesPerLong), "oop header size must be 8-byte-aligned");
3636 movptr(Address(new_obj, layout_size, Address::times_8, header_size_bytes - 1*oopSize), zero);
3637 decrement(layout_size);
3638 jcc(Assembler::notZero, loop);
3639 }
3640 } // clear_fields
3641
3642 // initialize object header only.
3643 bind(initialize_header);
3644 if (UseCompactObjectHeaders || EnableValhalla) {
3645 pop(klass);
3646 Register mark_word = t2;
3647 movptr(mark_word, Address(klass, Klass::prototype_header_offset()));
3648 movptr(Address(new_obj, oopDesc::mark_offset_in_bytes ()), mark_word);
3649 } else {
3650 movptr(Address(new_obj, oopDesc::mark_offset_in_bytes()),
3651 (intptr_t)markWord::prototype().value()); // header
3652 pop(klass); // get saved klass back in the register.
3653 }
3654 if (!UseCompactObjectHeaders) {
3655 xorl(rsi, rsi); // use zero reg to clear memory (shorter code)
3656 store_klass_gap(new_obj, rsi); // zero klass gap for compressed oops
3657 movptr(t2, klass); // preserve klass
3658 store_klass(new_obj, t2, rscratch1); // src klass reg is potentially compressed
3659 }
3660 jmp(done);
3661 }
3662
3663 bind(slow_case);
3664 pop(klass);
3665 bind(slow_case_no_pop);
3666 jmp(alloc_failed);
3667
3668 bind(done);
3669 }
3670
3671 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
3672 void MacroAssembler::tlab_allocate(Register obj,
3673 Register var_size_in_bytes,
3674 int con_size_in_bytes,
3675 Register t1,
3676 Register t2,
3677 Label& slow_case) {
3678 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
3679 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
3680 }
3681
3682 RegSet MacroAssembler::call_clobbered_gp_registers() {
3683 RegSet regs;
3684 regs += RegSet::of(rax, rcx, rdx);
3685 #ifndef _WINDOWS
3686 regs += RegSet::of(rsi, rdi);
3687 #endif
3688 regs += RegSet::range(r8, r11);
3689 if (UseAPX) {
3690 regs += RegSet::range(r16, as_Register(Register::number_of_registers - 1));
3854 xorptr(temp, temp); // use _zero reg to clear memory (shorter code)
3855 if (UseIncDec) {
3856 shrptr(index, 3); // divide by 8/16 and set carry flag if bit 2 was set
3857 } else {
3858 shrptr(index, 2); // use 2 instructions to avoid partial flag stall
3859 shrptr(index, 1);
3860 }
3861
3862 // initialize remaining object fields: index is a multiple of 2 now
3863 {
3864 Label loop;
3865 bind(loop);
3866 movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
3867 decrement(index);
3868 jcc(Assembler::notZero, loop);
3869 }
3870
3871 bind(done);
3872 }
3873
3874 void MacroAssembler::get_inline_type_field_klass(Register holder_klass, Register index, Register inline_klass) {
3875 inline_layout_info(holder_klass, index, inline_klass);
3876 movptr(inline_klass, Address(inline_klass, InlineLayoutInfo::klass_offset()));
3877 }
3878
3879 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
3880 movptr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
3881 #ifdef ASSERT
3882 {
3883 Label done;
3884 cmpptr(layout_info, 0);
3885 jcc(Assembler::notEqual, done);
3886 stop("inline_layout_info_array is null");
3887 bind(done);
3888 }
3889 #endif
3890
3891 InlineLayoutInfo array[2];
3892 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
3893 if (is_power_of_2(size)) {
3894 shll(index, log2i_exact(size)); // Scale index by power of 2
3895 } else {
3896 imull(index, index, size); // Scale the index to be the entry index * array_element_size
3897 }
3898 lea(layout_info, Address(layout_info, index, Address::times_1, Array<InlineLayoutInfo>::base_offset_in_bytes()));
3899 }
3900
3901 // Look up the method for a megamorphic invokeinterface call.
3902 // The target method is determined by <intf_klass, itable_index>.
3903 // The receiver klass is in recv_klass.
3904 // On success, the result will be in method_result, and execution falls through.
3905 // On failure, execution transfers to the given label.
3906 void MacroAssembler::lookup_interface_method(Register recv_klass,
3907 Register intf_klass,
3908 RegisterOrConstant itable_index,
3909 Register method_result,
3910 Register scan_temp,
3911 Label& L_no_such_interface,
3912 bool return_method) {
3913 assert_different_registers(recv_klass, intf_klass, scan_temp);
3914 assert_different_registers(method_result, intf_klass, scan_temp);
3915 assert(recv_klass != method_result || !return_method,
3916 "recv_klass can be destroyed when method isn't needed");
3917
3918 assert(itable_index.is_constant() || itable_index.as_register() == method_result,
3919 "caller must use same register for non-constant itable index as for method");
3920
4931 } else {
4932 Label L;
4933 jccb(negate_condition(cc), L);
4934 movl(dst, src);
4935 bind(L);
4936 }
4937 }
4938
4939 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
4940 if (VM_Version::supports_cmov()) {
4941 cmovl(cc, dst, src);
4942 } else {
4943 Label L;
4944 jccb(negate_condition(cc), L);
4945 movl(dst, src);
4946 bind(L);
4947 }
4948 }
4949
4950 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
4951 if (!VerifyOops || VerifyAdapterSharing) {
4952 // Below address of the code string confuses VerifyAdapterSharing
4953 // because it may differ between otherwise equivalent adapters.
4954 return;
4955 }
4956
4957 BLOCK_COMMENT("verify_oop {");
4958 push(rscratch1);
4959 push(rax); // save rax
4960 push(reg); // pass register argument
4961
4962 // Pass register number to verify_oop_subroutine
4963 const char* b = nullptr;
4964 {
4965 ResourceMark rm;
4966 stringStream ss;
4967 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
4968 b = code_string(ss.as_string());
4969 }
4970 AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
4971 pushptr(buffer.addr(), rscratch1);
4972
4973 // call indirectly to solve generation ordering problem
4974 movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
4975 call(rax);
4994 // cf. TemplateTable::prepare_invoke(), if (load_receiver).
4995 int stackElementSize = Interpreter::stackElementSize;
4996 int offset = Interpreter::expr_offset_in_bytes(extra_slot_offset+0);
4997 #ifdef ASSERT
4998 int offset1 = Interpreter::expr_offset_in_bytes(extra_slot_offset+1);
4999 assert(offset1 - offset == stackElementSize, "correct arithmetic");
5000 #endif
5001 Register scale_reg = noreg;
5002 Address::ScaleFactor scale_factor = Address::no_scale;
5003 if (arg_slot.is_constant()) {
5004 offset += arg_slot.as_constant() * stackElementSize;
5005 } else {
5006 scale_reg = arg_slot.as_register();
5007 scale_factor = Address::times(stackElementSize);
5008 }
5009 offset += wordSize; // return PC is on stack
5010 return Address(rsp, scale_reg, scale_factor, offset);
5011 }
5012
5013 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
5014 if (!VerifyOops || VerifyAdapterSharing) {
5015 // Below address of the code string confuses VerifyAdapterSharing
5016 // because it may differ between otherwise equivalent adapters.
5017 return;
5018 }
5019
5020 push(rscratch1);
5021 push(rax); // save rax,
5022 // addr may contain rsp so we will have to adjust it based on the push
5023 // we just did (and on 64 bit we do two pushes)
5024 // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
5025 // stores rax into addr which is backwards of what was intended.
5026 if (addr.uses(rsp)) {
5027 lea(rax, addr);
5028 pushptr(Address(rax, 2 * BytesPerWord));
5029 } else {
5030 pushptr(addr);
5031 }
5032
5033 // Pass register number to verify_oop_subroutine
5034 const char* b = nullptr;
5035 {
5036 ResourceMark rm;
5037 stringStream ss;
5038 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
5392
5393 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
5394 // get mirror
5395 const int mirror_offset = in_bytes(Klass::java_mirror_offset());
5396 load_method_holder(mirror, method);
5397 movptr(mirror, Address(mirror, mirror_offset));
5398 resolve_oop_handle(mirror, tmp);
5399 }
5400
5401 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5402 load_method_holder(rresult, rmethod);
5403 movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5404 }
5405
5406 void MacroAssembler::load_method_holder(Register holder, Register method) {
5407 movptr(holder, Address(method, Method::const_offset())); // ConstMethod*
5408 movptr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5409 movptr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5410 }
5411
5412 void MacroAssembler::load_metadata(Register dst, Register src) {
5413 if (UseCompactObjectHeaders) {
5414 load_narrow_klass_compact(dst, src);
5415 } else if (UseCompressedClassPointers) {
5416 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5417 } else {
5418 movptr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5419 }
5420 }
5421
5422 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5423 assert(UseCompactObjectHeaders, "expect compact object headers");
5424 movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5425 shrq(dst, markWord::klass_shift);
5426 }
5427
5428 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
5429 assert_different_registers(src, tmp);
5430 assert_different_registers(dst, tmp);
5431
5432 if (UseCompactObjectHeaders) {
5433 load_narrow_klass_compact(dst, src);
5434 decode_klass_not_null(dst, tmp);
5435 } else if (UseCompressedClassPointers) {
5436 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5437 decode_klass_not_null(dst, tmp);
5438 } else {
5439 movptr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5440 }
5441 }
5442
5443 void MacroAssembler::load_prototype_header(Register dst, Register src, Register tmp) {
5444 load_klass(dst, src, tmp);
5445 movptr(dst, Address(dst, Klass::prototype_header_offset()));
5446 }
5447
5448 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
5449 assert(!UseCompactObjectHeaders, "not with compact headers");
5450 assert_different_registers(src, tmp);
5451 assert_different_registers(dst, tmp);
5452 if (UseCompressedClassPointers) {
5453 encode_klass_not_null(src, tmp);
5454 movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5455 } else {
5456 movptr(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5457 }
5458 }
5459
5460 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
5461 if (UseCompactObjectHeaders) {
5462 assert(tmp != noreg, "need tmp");
5463 assert_different_registers(klass, obj, tmp);
5464 load_narrow_klass_compact(tmp, obj);
5465 cmpl(klass, tmp);
5466 } else if (UseCompressedClassPointers) {
5467 cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
5493 bool as_raw = (decorators & AS_RAW) != 0;
5494 if (as_raw) {
5495 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
5496 } else {
5497 bs->load_at(this, decorators, type, dst, src, tmp1);
5498 }
5499 }
5500
5501 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
5502 Register tmp1, Register tmp2, Register tmp3) {
5503 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5504 decorators = AccessInternal::decorator_fixup(decorators, type);
5505 bool as_raw = (decorators & AS_RAW) != 0;
5506 if (as_raw) {
5507 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5508 } else {
5509 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5510 }
5511 }
5512
5513 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5514 Register inline_layout_info) {
5515 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5516 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5517 }
5518
5519 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5520 movptr(offset, Address(inline_klass, InstanceKlass::adr_inlineklass_fixed_block_offset()));
5521 movl(offset, Address(offset, InlineKlass::payload_offset_offset()));
5522 }
5523
5524 void MacroAssembler::payload_addr(Register oop, Register data, Register inline_klass) {
5525 // ((address) (void*) o) + vk->payload_offset();
5526 Register offset = (data == oop) ? rscratch1 : data;
5527 payload_offset(inline_klass, offset);
5528 if (data == oop) {
5529 addptr(data, offset);
5530 } else {
5531 lea(data, Address(oop, offset));
5532 }
5533 }
5534
5535 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
5536 Register index, Register data) {
5537 assert(index != rcx, "index needs to shift by rcx");
5538 assert_different_registers(array, array_klass, index);
5539 assert_different_registers(rcx, array, index);
5540
5541 // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
5542 movl(rcx, Address(array_klass, Klass::layout_helper_offset()));
5543
5544 // Klass::layout_helper_log2_element_size(lh)
5545 // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
5546 shrl(rcx, Klass::_lh_log2_element_size_shift);
5547 andl(rcx, Klass::_lh_log2_element_size_mask);
5548 shlptr(index); // index << rcx
5549
5550 lea(data, Address(array, index, Address::times_1, arrayOopDesc::base_offset_in_bytes(T_FLAT_ELEMENT)));
5551 }
5552
5553 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5554 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
5555 }
5556
5557 // Doesn't do verification, generates fixed size code
5558 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5559 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
5560 }
5561
5562 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5563 Register tmp2, Register tmp3, DecoratorSet decorators) {
5564 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5565 }
5566
5567 // Used for storing nulls.
5568 void MacroAssembler::store_heap_oop_null(Address dst) {
5569 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5570 }
5571
5572 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5876 Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
5877 }
5878
5879 void MacroAssembler::reinit_heapbase() {
5880 if (UseCompressedOops) {
5881 if (Universe::heap() != nullptr) {
5882 if (CompressedOops::base() == nullptr) {
5883 MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
5884 } else {
5885 mov64(r12_heapbase, (int64_t)CompressedOops::base());
5886 }
5887 } else {
5888 movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
5889 }
5890 }
5891 }
5892
5893 #if COMPILER2_OR_JVMCI
5894
5895 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
5896 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp, KRegister mask) {
5897 // cnt - number of qwords (8-byte words).
5898 // base - start address, qword aligned.
5899 Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
5900 bool use64byteVector = (MaxVectorSize == 64) && (VM_Version::avx3_threshold() == 0);
5901 if (use64byteVector) {
5902 evpbroadcastq(xtmp, val, AVX_512bit);
5903 } else if (MaxVectorSize >= 32) {
5904 movdq(xtmp, val);
5905 punpcklqdq(xtmp, xtmp);
5906 vinserti128_high(xtmp, xtmp);
5907 } else {
5908 movdq(xtmp, val);
5909 punpcklqdq(xtmp, xtmp);
5910 }
5911 jmp(L_zero_64_bytes);
5912
5913 BIND(L_loop);
5914 if (MaxVectorSize >= 32) {
5915 fill64(base, 0, xtmp, use64byteVector);
5916 } else {
5917 movdqu(Address(base, 0), xtmp);
5918 movdqu(Address(base, 16), xtmp);
5919 movdqu(Address(base, 32), xtmp);
5920 movdqu(Address(base, 48), xtmp);
5921 }
5922 addptr(base, 64);
5923
5924 BIND(L_zero_64_bytes);
5925 subptr(cnt, 8);
5926 jccb(Assembler::greaterEqual, L_loop);
5927
5928 // Copy trailing 64 bytes
5929 if (use64byteVector) {
5930 addptr(cnt, 8);
5931 jccb(Assembler::equal, L_end);
5932 fill64_masked(3, base, 0, xtmp, mask, cnt, val, true);
5933 jmp(L_end);
5934 } else {
5935 addptr(cnt, 4);
5936 jccb(Assembler::less, L_tail);
5937 if (MaxVectorSize >= 32) {
5938 vmovdqu(Address(base, 0), xtmp);
5939 } else {
5940 movdqu(Address(base, 0), xtmp);
5941 movdqu(Address(base, 16), xtmp);
5942 }
5943 }
5944 addptr(base, 32);
5945 subptr(cnt, 4);
5946
5947 BIND(L_tail);
5948 addptr(cnt, 4);
5949 jccb(Assembler::lessEqual, L_end);
5950 if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
5951 fill32_masked(3, base, 0, xtmp, mask, cnt, val);
5952 } else {
5953 decrement(cnt);
5954
5955 BIND(L_sloop);
5956 movq(Address(base, 0), xtmp);
5957 addptr(base, 8);
5958 decrement(cnt);
5959 jccb(Assembler::greaterEqual, L_sloop);
5960 }
5961 BIND(L_end);
5962 }
5963
5964 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
5965 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
5966 // An inline type might be returned. If fields are in registers we
5967 // need to allocate an inline type instance and initialize it with
5968 // the value of the fields.
5969 Label skip;
5970 // We only need a new buffered inline type if a new one is not returned
5971 testptr(rax, 1);
5972 jcc(Assembler::zero, skip);
5973 int call_offset = -1;
5974
5975 #ifdef _LP64
5976 // The following code is similar to allocate_instance but has some slight differences,
5977 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
5978 // allocating is not necessary if vk != nullptr, etc. allocate_instance is not aware of these.
5979 Label slow_case;
5980 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
5981 mov(rscratch1, rax); // save rax for slow_case since *_allocate may corrupt it when allocation failed
5982 if (vk != nullptr) {
5983 // Called from C1, where the return type is statically known.
5984 movptr(rbx, (intptr_t)vk->get_InlineKlass());
5985 jint lh = vk->layout_helper();
5986 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
5987 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
5988 tlab_allocate(rax, noreg, lh, r13, r14, slow_case);
5989 } else {
5990 jmp(slow_case);
5991 }
5992 } else {
5993 // Call from interpreter. RAX contains ((the InlineKlass* of the return type) | 0x01)
5994 mov(rbx, rax);
5995 andptr(rbx, -2);
5996 if (UseTLAB) {
5997 movl(r14, Address(rbx, Klass::layout_helper_offset()));
5998 testl(r14, Klass::_lh_instance_slow_path_bit);
5999 jcc(Assembler::notZero, slow_case);
6000 tlab_allocate(rax, r14, 0, r13, r14, slow_case);
6001 } else {
6002 jmp(slow_case);
6003 }
6004 }
6005 if (UseTLAB) {
6006 // 2. Initialize buffered inline instance header
6007 Register buffer_obj = rax;
6008 if (UseCompactObjectHeaders) {
6009 Register mark_word = r13;
6010 movptr(mark_word, Address(rbx, Klass::prototype_header_offset()));
6011 movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes ()), mark_word);
6012 } else {
6013 movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes()), (intptr_t)markWord::inline_type_prototype().value());
6014 xorl(r13, r13);
6015 store_klass_gap(buffer_obj, r13);
6016 if (vk == nullptr) {
6017 // store_klass corrupts rbx(klass), so save it in r13 for later use (interpreter case only).
6018 mov(r13, rbx);
6019 }
6020 store_klass(buffer_obj, rbx, rscratch1);
6021 }
6022 // 3. Initialize its fields with an inline class specific handler
6023 if (vk != nullptr) {
6024 call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
6025 } else {
6026 movptr(rbx, Address(r13, InstanceKlass::adr_inlineklass_fixed_block_offset()));
6027 movptr(rbx, Address(rbx, InlineKlass::pack_handler_offset()));
6028 call(rbx);
6029 }
6030 jmp(skip);
6031 }
6032 bind(slow_case);
6033 // We failed to allocate a new inline type, fall back to a runtime
6034 // call. Some oop field may be live in some registers but we can't
6035 // tell. That runtime call will take care of preserving them
6036 // across a GC if there's one.
6037 mov(rax, rscratch1);
6038 #endif
6039
6040 if (from_interpreter) {
6041 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
6042 } else {
6043 call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
6044 call_offset = offset();
6045 }
6046
6047 bind(skip);
6048 return call_offset;
6049 }
6050
6051 // Move a value between registers/stack slots and update the reg_state
6052 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
6053 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
6054 if (reg_state[to->value()] == reg_written) {
6055 return true; // Already written
6056 }
6057 if (from != to && bt != T_VOID) {
6058 if (reg_state[to->value()] == reg_readonly) {
6059 return false; // Not yet writable
6060 }
6061 if (from->is_reg()) {
6062 if (to->is_reg()) {
6063 if (from->is_XMMRegister()) {
6064 if (bt == T_DOUBLE) {
6065 movdbl(to->as_XMMRegister(), from->as_XMMRegister());
6066 } else {
6067 assert(bt == T_FLOAT, "must be float");
6068 movflt(to->as_XMMRegister(), from->as_XMMRegister());
6069 }
6070 } else {
6071 movq(to->as_Register(), from->as_Register());
6072 }
6073 } else {
6074 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6075 Address to_addr = Address(rsp, st_off);
6076 if (from->is_XMMRegister()) {
6077 if (bt == T_DOUBLE) {
6078 movdbl(to_addr, from->as_XMMRegister());
6079 } else {
6080 assert(bt == T_FLOAT, "must be float");
6081 movflt(to_addr, from->as_XMMRegister());
6082 }
6083 } else {
6084 movq(to_addr, from->as_Register());
6085 }
6086 }
6087 } else {
6088 Address from_addr = Address(rsp, from->reg2stack() * VMRegImpl::stack_slot_size + wordSize);
6089 if (to->is_reg()) {
6090 if (to->is_XMMRegister()) {
6091 if (bt == T_DOUBLE) {
6092 movdbl(to->as_XMMRegister(), from_addr);
6093 } else {
6094 assert(bt == T_FLOAT, "must be float");
6095 movflt(to->as_XMMRegister(), from_addr);
6096 }
6097 } else {
6098 movq(to->as_Register(), from_addr);
6099 }
6100 } else {
6101 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6102 movq(r13, from_addr);
6103 movq(Address(rsp, st_off), r13);
6104 }
6105 }
6106 }
6107 // Update register states
6108 reg_state[from->value()] = reg_writable;
6109 reg_state[to->value()] = reg_written;
6110 return true;
6111 }
6112
6113 // Calculate the extra stack space required for packing or unpacking inline
6114 // args and adjust the stack pointer
6115 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
6116 // Two additional slots to account for return address
6117 int sp_inc = (args_on_stack + 2) * VMRegImpl::stack_slot_size;
6118 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
6119 // Save the return address, adjust the stack (make sure it is properly
6120 // 16-byte aligned) and copy the return address to the new top of the stack.
6121 // The stack will be repaired on return (see MacroAssembler::remove_frame).
6122 assert(sp_inc > 0, "sanity");
6123 pop(r13);
6124 subptr(rsp, sp_inc);
6125 push(r13);
6126 return sp_inc;
6127 }
6128
6129 // Read all fields from an inline type buffer and store the field values in registers/stack slots.
6130 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
6131 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
6132 RegState reg_state[]) {
6133 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
6134 assert(from->is_valid(), "source must be valid");
6135 bool progress = false;
6136 #ifdef ASSERT
6137 const int start_offset = offset();
6138 #endif
6139
6140 Label L_null, L_notNull;
6141 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
6142 Register tmp1 = r10;
6143 Register tmp2 = r13;
6144 Register fromReg = noreg;
6145 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, -1);
6146 bool done = true;
6147 bool mark_done = true;
6148 VMReg toReg;
6149 BasicType bt;
6150 // Check if argument requires a null check
6151 bool null_check = false;
6152 VMReg nullCheckReg;
6153 while (stream.next(nullCheckReg, bt)) {
6154 if (sig->at(stream.sig_index())._offset == -1) {
6155 null_check = true;
6156 break;
6157 }
6158 }
6159 stream.reset(sig_index, to_index);
6160 while (stream.next(toReg, bt)) {
6161 assert(toReg->is_valid(), "destination must be valid");
6162 int idx = (int)toReg->value();
6163 if (reg_state[idx] == reg_readonly) {
6164 if (idx != from->value()) {
6165 mark_done = false;
6166 }
6167 done = false;
6168 continue;
6169 } else if (reg_state[idx] == reg_written) {
6170 continue;
6171 }
6172 assert(reg_state[idx] == reg_writable, "must be writable");
6173 reg_state[idx] = reg_written;
6174 progress = true;
6175
6176 if (fromReg == noreg) {
6177 if (from->is_reg()) {
6178 fromReg = from->as_Register();
6179 } else {
6180 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6181 movq(tmp1, Address(rsp, st_off));
6182 fromReg = tmp1;
6183 }
6184 if (null_check) {
6185 // Nullable inline type argument, emit null check
6186 testptr(fromReg, fromReg);
6187 jcc(Assembler::zero, L_null);
6188 }
6189 }
6190 int off = sig->at(stream.sig_index())._offset;
6191 if (off == -1) {
6192 assert(null_check, "Missing null check at");
6193 if (toReg->is_stack()) {
6194 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6195 movq(Address(rsp, st_off), 1);
6196 } else {
6197 movq(toReg->as_Register(), 1);
6198 }
6199 continue;
6200 }
6201 assert(off > 0, "offset in object should be positive");
6202 Address fromAddr = Address(fromReg, off);
6203 if (!toReg->is_XMMRegister()) {
6204 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
6205 if (is_reference_type(bt)) {
6206 load_heap_oop(dst, fromAddr);
6207 } else {
6208 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
6209 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
6210 }
6211 if (toReg->is_stack()) {
6212 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6213 movq(Address(rsp, st_off), dst);
6214 }
6215 } else if (bt == T_DOUBLE) {
6216 movdbl(toReg->as_XMMRegister(), fromAddr);
6217 } else {
6218 assert(bt == T_FLOAT, "must be float");
6219 movflt(toReg->as_XMMRegister(), fromAddr);
6220 }
6221 }
6222 if (progress && null_check) {
6223 if (done) {
6224 jmp(L_notNull);
6225 bind(L_null);
6226 // Set null marker to zero to signal that the argument is null.
6227 // Also set all oop fields to zero to make the GC happy.
6228 stream.reset(sig_index, to_index);
6229 while (stream.next(toReg, bt)) {
6230 if (sig->at(stream.sig_index())._offset == -1 ||
6231 bt == T_OBJECT || bt == T_ARRAY) {
6232 if (toReg->is_stack()) {
6233 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6234 movq(Address(rsp, st_off), 0);
6235 } else {
6236 xorq(toReg->as_Register(), toReg->as_Register());
6237 }
6238 }
6239 }
6240 bind(L_notNull);
6241 } else {
6242 bind(L_null);
6243 }
6244 }
6245
6246 sig_index = stream.sig_index();
6247 to_index = stream.regs_index();
6248
6249 if (mark_done && reg_state[from->value()] != reg_written) {
6250 // This is okay because no one else will write to that slot
6251 reg_state[from->value()] = reg_writable;
6252 }
6253 from_index--;
6254 assert(progress || (start_offset == offset()), "should not emit code");
6255 return done;
6256 }
6257
6258 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
6259 VMRegPair* from, int from_count, int& from_index, VMReg to,
6260 RegState reg_state[], Register val_array) {
6261 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
6262 assert(to->is_valid(), "destination must be valid");
6263
6264 if (reg_state[to->value()] == reg_written) {
6265 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
6266 return true; // Already written
6267 }
6268
6269 // TODO 8284443 Isn't it an issue if below code uses r14 as tmp when it contains a spilled value?
6270 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
6271 Register val_obj_tmp = r11;
6272 Register from_reg_tmp = r14;
6273 Register tmp1 = r10;
6274 Register tmp2 = r13;
6275 Register tmp3 = rbx;
6276 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
6277
6278 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
6279
6280 if (reg_state[to->value()] == reg_readonly) {
6281 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
6282 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
6283 return false; // Not yet writable
6284 }
6285 val_obj = val_obj_tmp;
6286 }
6287
6288 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
6289 load_heap_oop(val_obj, Address(val_array, index));
6290
6291 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
6292 VMReg fromReg;
6293 BasicType bt;
6294 Label L_null;
6295 while (stream.next(fromReg, bt)) {
6296 assert(fromReg->is_valid(), "source must be valid");
6297 reg_state[fromReg->value()] = reg_writable;
6298
6299 int off = sig->at(stream.sig_index())._offset;
6300 if (off == -1) {
6301 // Nullable inline type argument, emit null check
6302 Label L_notNull;
6303 if (fromReg->is_stack()) {
6304 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6305 testb(Address(rsp, ld_off), 1);
6306 } else {
6307 testb(fromReg->as_Register(), 1);
6308 }
6309 jcc(Assembler::notZero, L_notNull);
6310 movptr(val_obj, 0);
6311 jmp(L_null);
6312 bind(L_notNull);
6313 continue;
6314 }
6315
6316 assert(off > 0, "offset in object should be positive");
6317 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
6318
6319 Address dst(val_obj, off);
6320 if (!fromReg->is_XMMRegister()) {
6321 Register src;
6322 if (fromReg->is_stack()) {
6323 src = from_reg_tmp;
6324 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6325 load_sized_value(src, Address(rsp, ld_off), size_in_bytes, /* is_signed */ false);
6326 } else {
6327 src = fromReg->as_Register();
6328 }
6329 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
6330 if (is_reference_type(bt)) {
6331 store_heap_oop(dst, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
6332 } else {
6333 store_sized_value(dst, src, size_in_bytes);
6334 }
6335 } else if (bt == T_DOUBLE) {
6336 movdbl(dst, fromReg->as_XMMRegister());
6337 } else {
6338 assert(bt == T_FLOAT, "must be float");
6339 movflt(dst, fromReg->as_XMMRegister());
6340 }
6341 }
6342 bind(L_null);
6343 sig_index = stream.sig_index();
6344 from_index = stream.regs_index();
6345
6346 assert(reg_state[to->value()] == reg_writable, "must have already been read");
6347 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
6348 assert(success, "to register must be writeable");
6349 return true;
6350 }
6351
6352 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
6353 return reg->is_XMMRegister() ? xmm8->as_VMReg() : r14->as_VMReg();
6354 }
6355
6356 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6357 assert((initial_framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6358 if (needs_stack_repair) {
6359 movq(rbp, Address(rsp, initial_framesize));
6360 // The stack increment resides just below the saved rbp
6361 addq(rsp, Address(rsp, initial_framesize - wordSize));
6362 } else {
6363 if (initial_framesize > 0) {
6364 addq(rsp, initial_framesize);
6365 }
6366 pop(rbp);
6367 }
6368 }
6369
6370 // Clearing constant sized memory using YMM/ZMM registers.
6371 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
6372 assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
6373 bool use64byteVector = (MaxVectorSize > 32) && (VM_Version::avx3_threshold() == 0);
6374
6375 int vector64_count = (cnt & (~0x7)) >> 3;
6376 cnt = cnt & 0x7;
6377 const int fill64_per_loop = 4;
6378 const int max_unrolled_fill64 = 8;
6379
6380 // 64 byte initialization loop.
6381 vpxor(xtmp, xtmp, xtmp, use64byteVector ? AVX_512bit : AVX_256bit);
6382 int start64 = 0;
6383 if (vector64_count > max_unrolled_fill64) {
6384 Label LOOP;
6385 Register index = rtmp;
6386
6387 start64 = vector64_count - (vector64_count % fill64_per_loop);
6388
6389 movl(index, 0);
6439 break;
6440 case 7:
6441 if (use64byteVector) {
6442 movl(rtmp, 0x7F);
6443 kmovwl(mask, rtmp);
6444 evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
6445 } else {
6446 evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
6447 movl(rtmp, 0x7);
6448 kmovwl(mask, rtmp);
6449 evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
6450 }
6451 break;
6452 default:
6453 fatal("Unexpected length : %d\n",cnt);
6454 break;
6455 }
6456 }
6457 }
6458
6459 void MacroAssembler::clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp,
6460 bool is_large, bool word_copy_only, KRegister mask) {
6461 // cnt - number of qwords (8-byte words).
6462 // base - start address, qword aligned.
6463 // is_large - if optimizers know cnt is larger than InitArrayShortSize
6464 assert(base==rdi, "base register must be edi for rep stos");
6465 assert(val==rax, "val register must be eax for rep stos");
6466 assert(cnt==rcx, "cnt register must be ecx for rep stos");
6467 assert(InitArrayShortSize % BytesPerLong == 0,
6468 "InitArrayShortSize should be the multiple of BytesPerLong");
6469
6470 Label DONE;
6471
6472 if (!is_large) {
6473 Label LOOP, LONG;
6474 cmpptr(cnt, InitArrayShortSize/BytesPerLong);
6475 jccb(Assembler::greater, LONG);
6476
6477 decrement(cnt);
6478 jccb(Assembler::negative, DONE); // Zero length
6479
6480 // Use individual pointer-sized stores for small counts:
6481 BIND(LOOP);
6482 movptr(Address(base, cnt, Address::times_ptr), val);
6483 decrement(cnt);
6484 jccb(Assembler::greaterEqual, LOOP);
6485 jmpb(DONE);
6486
6487 BIND(LONG);
6488 }
6489
6490 // Use longer rep-prefixed ops for non-small counts:
6491 if (UseFastStosb && !word_copy_only) {
6492 shlptr(cnt, 3); // convert to number of bytes
6493 rep_stosb();
6494 } else if (UseXMMForObjInit) {
6495 xmm_clear_mem(base, cnt, val, xtmp, mask);
6496 } else {
6497 rep_stos();
6498 }
6499
6500 BIND(DONE);
6501 }
6502
6503 #endif //COMPILER2_OR_JVMCI
6504
6505
6506 void MacroAssembler::generate_fill(BasicType t, bool aligned,
6507 Register to, Register value, Register count,
6508 Register rtmp, XMMRegister xtmp) {
6509 ShortBranchVerifier sbv(this);
6510 assert_different_registers(to, value, count, rtmp);
6511 Label L_exit;
6512 Label L_fill_2_bytes, L_fill_4_bytes;
6513
6514 #if defined(COMPILER2)
6515 if(MaxVectorSize >=32 &&
10332
10333 // Load top.
10334 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10335
10336 // Check if the lock-stack is full.
10337 cmpl(top, LockStack::end_offset());
10338 jcc(Assembler::greaterEqual, slow);
10339
10340 // Check for recursion.
10341 cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
10342 jcc(Assembler::equal, push);
10343
10344 // Check header for monitor (0b10).
10345 testptr(reg_rax, markWord::monitor_value);
10346 jcc(Assembler::notZero, slow);
10347
10348 // Try to lock. Transition lock bits 0b01 => 0b00
10349 movptr(tmp, reg_rax);
10350 andptr(tmp, ~(int32_t)markWord::unlocked_value);
10351 orptr(reg_rax, markWord::unlocked_value);
10352 if (EnableValhalla) {
10353 // Mask inline_type bit such that we go to the slow path if object is an inline type
10354 andptr(reg_rax, ~((int) markWord::inline_type_bit_in_place));
10355 }
10356 lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
10357 jcc(Assembler::notEqual, slow);
10358
10359 // Restore top, CAS clobbers register.
10360 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10361
10362 bind(push);
10363 // After successful lock, push object on lock-stack.
10364 movptr(Address(thread, top), obj);
10365 incrementl(top, oopSize);
10366 movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
10367 }
10368
10369 // Implements lightweight-unlocking.
10370 //
10371 // obj: the object to be unlocked
10372 // reg_rax: rax
10373 // thread: the thread
10374 // tmp: a temporary register
10375 void MacroAssembler::lightweight_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {
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