11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/assembler.hpp"
26 #include "asm/assembler.inline.hpp"
27 #include "code/aotCodeCache.hpp"
28 #include "code/compiledIC.hpp"
29 #include "compiler/compiler_globals.hpp"
30 #include "compiler/disassembler.hpp"
31 #include "crc32c.h"
32 #include "gc/shared/barrierSet.hpp"
33 #include "gc/shared/barrierSetAssembler.hpp"
34 #include "gc/shared/collectedHeap.inline.hpp"
35 #include "gc/shared/tlab_globals.hpp"
36 #include "interpreter/bytecodeHistogram.hpp"
37 #include "interpreter/interpreter.hpp"
38 #include "interpreter/interpreterRuntime.hpp"
39 #include "jvm.h"
40 #include "memory/resourceArea.hpp"
41 #include "memory/universe.hpp"
42 #include "oops/accessDecorators.hpp"
43 #include "oops/compressedKlass.inline.hpp"
44 #include "oops/compressedOops.inline.hpp"
45 #include "oops/klass.inline.hpp"
46 #include "prims/methodHandles.hpp"
47 #include "runtime/continuation.hpp"
48 #include "runtime/interfaceSupport.inline.hpp"
49 #include "runtime/javaThread.hpp"
50 #include "runtime/jniHandles.hpp"
51 #include "runtime/objectMonitor.hpp"
52 #include "runtime/os.hpp"
53 #include "runtime/safepoint.hpp"
54 #include "runtime/safepointMechanism.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/checkedCast.hpp"
58 #include "utilities/macros.hpp"
59
60 #ifdef PRODUCT
61 #define BLOCK_COMMENT(str) /* nothing */
62 #define STOP(error) stop(error)
63 #else
64 #define BLOCK_COMMENT(str) block_comment(str)
65 #define STOP(error) block_comment(error); stop(error)
66 #endif
67
68 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
69
70 #ifdef ASSERT
71 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
72 #endif
73
74 static const Assembler::Condition reverse[] = {
75 Assembler::noOverflow /* overflow = 0x0 */ ,
76 Assembler::overflow /* noOverflow = 0x1 */ ,
77 Assembler::aboveEqual /* carrySet = 0x2, below = 0x2 */ ,
78 Assembler::below /* aboveEqual = 0x3, carryClear = 0x3 */ ,
1286 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1287 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1288 assert_different_registers(arg_1, c_rarg2);
1289 pass_arg2(this, arg_2);
1290 pass_arg1(this, arg_1);
1291 pass_arg0(this, arg_0);
1292 call_VM_leaf(entry_point, 3);
1293 }
1294
1295 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
1296 assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
1297 assert_different_registers(arg_1, c_rarg2, c_rarg3);
1298 assert_different_registers(arg_2, c_rarg3);
1299 pass_arg3(this, arg_3);
1300 pass_arg2(this, arg_2);
1301 pass_arg1(this, arg_1);
1302 pass_arg0(this, arg_0);
1303 call_VM_leaf(entry_point, 3);
1304 }
1305
1306 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
1307 pass_arg0(this, arg_0);
1308 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1309 }
1310
1311 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
1312 assert_different_registers(arg_0, c_rarg1);
1313 pass_arg1(this, arg_1);
1314 pass_arg0(this, arg_0);
1315 MacroAssembler::call_VM_leaf_base(entry_point, 2);
1316 }
1317
1318 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1319 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1320 assert_different_registers(arg_1, c_rarg2);
1321 pass_arg2(this, arg_2);
1322 pass_arg1(this, arg_1);
1323 pass_arg0(this, arg_0);
1324 MacroAssembler::call_VM_leaf_base(entry_point, 3);
1325 }
2339 lea(rscratch, src);
2340 Assembler::mulss(dst, Address(rscratch, 0));
2341 }
2342 }
2343
2344 void MacroAssembler::null_check(Register reg, int offset) {
2345 if (needs_explicit_null_check(offset)) {
2346 // provoke OS null exception if reg is null by
2347 // accessing M[reg] w/o changing any (non-CC) registers
2348 // NOTE: cmpl is plenty here to provoke a segv
2349 cmpptr(rax, Address(reg, 0));
2350 // Note: should probably use testl(rax, Address(reg, 0));
2351 // may be shorter code (however, this version of
2352 // testl needs to be implemented first)
2353 } else {
2354 // nothing to do, (later) access of M[reg + offset]
2355 // will provoke OS null exception if reg is null
2356 }
2357 }
2358
2359 void MacroAssembler::os_breakpoint() {
2360 // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
2361 // (e.g., MSVC can't call ps() otherwise)
2362 call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
2363 }
2364
2365 void MacroAssembler::unimplemented(const char* what) {
2366 const char* buf = nullptr;
2367 {
2368 ResourceMark rm;
2369 stringStream ss;
2370 ss.print("unimplemented: %s", what);
2371 buf = code_string(ss.as_string());
2372 }
2373 stop(buf);
2374 }
2375
2376 #define XSTATE_BV 0x200
2377
2378 void MacroAssembler::pop_CPU_state() {
3443 }
3444
3445 // C++ bool manipulation
3446 void MacroAssembler::testbool(Register dst) {
3447 if(sizeof(bool) == 1)
3448 testb(dst, 0xff);
3449 else if(sizeof(bool) == 2) {
3450 // testw implementation needed for two byte bools
3451 ShouldNotReachHere();
3452 } else if(sizeof(bool) == 4)
3453 testl(dst, dst);
3454 else
3455 // unsupported
3456 ShouldNotReachHere();
3457 }
3458
3459 void MacroAssembler::testptr(Register dst, Register src) {
3460 testq(dst, src);
3461 }
3462
3463 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
3464 void MacroAssembler::tlab_allocate(Register obj,
3465 Register var_size_in_bytes,
3466 int con_size_in_bytes,
3467 Register t1,
3468 Register t2,
3469 Label& slow_case) {
3470 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
3471 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
3472 }
3473
3474 RegSet MacroAssembler::call_clobbered_gp_registers() {
3475 RegSet regs;
3476 regs += RegSet::of(rax, rcx, rdx);
3477 #ifndef _WINDOWS
3478 regs += RegSet::of(rsi, rdi);
3479 #endif
3480 regs += RegSet::range(r8, r11);
3481 if (UseAPX) {
3482 regs += RegSet::range(r16, as_Register(Register::number_of_registers - 1));
3646 xorptr(temp, temp); // use _zero reg to clear memory (shorter code)
3647 if (UseIncDec) {
3648 shrptr(index, 3); // divide by 8/16 and set carry flag if bit 2 was set
3649 } else {
3650 shrptr(index, 2); // use 2 instructions to avoid partial flag stall
3651 shrptr(index, 1);
3652 }
3653
3654 // initialize remaining object fields: index is a multiple of 2 now
3655 {
3656 Label loop;
3657 bind(loop);
3658 movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
3659 decrement(index);
3660 jcc(Assembler::notZero, loop);
3661 }
3662
3663 bind(done);
3664 }
3665
3666 // Look up the method for a megamorphic invokeinterface call.
3667 // The target method is determined by <intf_klass, itable_index>.
3668 // The receiver klass is in recv_klass.
3669 // On success, the result will be in method_result, and execution falls through.
3670 // On failure, execution transfers to the given label.
3671 void MacroAssembler::lookup_interface_method(Register recv_klass,
3672 Register intf_klass,
3673 RegisterOrConstant itable_index,
3674 Register method_result,
3675 Register scan_temp,
3676 Label& L_no_such_interface,
3677 bool return_method) {
3678 assert_different_registers(recv_klass, intf_klass, scan_temp);
3679 assert_different_registers(method_result, intf_klass, scan_temp);
3680 assert(recv_klass != method_result || !return_method,
3681 "recv_klass can be destroyed when method isn't needed");
3682
3683 assert(itable_index.is_constant() || itable_index.as_register() == method_result,
3684 "caller must use same register for non-constant itable index as for method");
3685
4696 } else {
4697 Label L;
4698 jccb(negate_condition(cc), L);
4699 movl(dst, src);
4700 bind(L);
4701 }
4702 }
4703
4704 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
4705 if (VM_Version::supports_cmov()) {
4706 cmovl(cc, dst, src);
4707 } else {
4708 Label L;
4709 jccb(negate_condition(cc), L);
4710 movl(dst, src);
4711 bind(L);
4712 }
4713 }
4714
4715 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
4716 if (!VerifyOops) return;
4717
4718 BLOCK_COMMENT("verify_oop {");
4719 push(rscratch1);
4720 push(rax); // save rax
4721 push(reg); // pass register argument
4722
4723 // Pass register number to verify_oop_subroutine
4724 const char* b = nullptr;
4725 {
4726 ResourceMark rm;
4727 stringStream ss;
4728 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
4729 b = code_string(ss.as_string());
4730 }
4731 AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
4732 pushptr(buffer.addr(), rscratch1);
4733
4734 // call indirectly to solve generation ordering problem
4735 movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
4736 call(rax);
4952 // or something else. Since this is a slow path, we can optimize for code density,
4953 // and just restart the search from the beginning.
4954 jmpb(L_restart);
4955
4956 // Counter updates:
4957
4958 // Increment polymorphic counter instead of receiver slot.
4959 bind(L_polymorphic);
4960 movptr(offset, poly_count_offset);
4961 jmpb(L_count_update);
4962
4963 // Found a receiver, convert its slot offset to corresponding count offset.
4964 bind(L_found_recv);
4965 addptr(offset, receiver_to_count_step);
4966
4967 bind(L_count_update);
4968 addptr(Address(mdp, offset, Address::times_ptr), DataLayout::counter_increment);
4969 }
4970
4971 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
4972 if (!VerifyOops) return;
4973
4974 push(rscratch1);
4975 push(rax); // save rax,
4976 // addr may contain rsp so we will have to adjust it based on the push
4977 // we just did (and on 64 bit we do two pushes)
4978 // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
4979 // stores rax into addr which is backwards of what was intended.
4980 if (addr.uses(rsp)) {
4981 lea(rax, addr);
4982 pushptr(Address(rax, 2 * BytesPerWord));
4983 } else {
4984 pushptr(addr);
4985 }
4986
4987 // Pass register number to verify_oop_subroutine
4988 const char* b = nullptr;
4989 {
4990 ResourceMark rm;
4991 stringStream ss;
4992 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
5346
5347 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
5348 // get mirror
5349 const int mirror_offset = in_bytes(Klass::java_mirror_offset());
5350 load_method_holder(mirror, method);
5351 movptr(mirror, Address(mirror, mirror_offset));
5352 resolve_oop_handle(mirror, tmp);
5353 }
5354
5355 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5356 load_method_holder(rresult, rmethod);
5357 movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5358 }
5359
5360 void MacroAssembler::load_method_holder(Register holder, Register method) {
5361 movptr(holder, Address(method, Method::const_offset())); // ConstMethod*
5362 movptr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5363 movptr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5364 }
5365
5366 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5367 assert(UseCompactObjectHeaders, "expect compact object headers");
5368 movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5369 shrq(dst, markWord::klass_shift);
5370 }
5371
5372 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
5373 assert_different_registers(src, tmp);
5374 assert_different_registers(dst, tmp);
5375
5376 if (UseCompactObjectHeaders) {
5377 load_narrow_klass_compact(dst, src);
5378 decode_klass_not_null(dst, tmp);
5379 } else if (UseCompressedClassPointers) {
5380 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5381 decode_klass_not_null(dst, tmp);
5382 } else {
5383 movptr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5384 }
5385 }
5386
5387 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
5388 assert(!UseCompactObjectHeaders, "not with compact headers");
5389 assert_different_registers(src, tmp);
5390 assert_different_registers(dst, tmp);
5391 if (UseCompressedClassPointers) {
5392 encode_klass_not_null(src, tmp);
5393 movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5394 } else {
5395 movptr(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5396 }
5397 }
5398
5399 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
5400 if (UseCompactObjectHeaders) {
5401 assert(tmp != noreg, "need tmp");
5402 assert_different_registers(klass, obj, tmp);
5403 load_narrow_klass_compact(tmp, obj);
5404 cmpl(klass, tmp);
5405 } else if (UseCompressedClassPointers) {
5406 cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
5432 bool as_raw = (decorators & AS_RAW) != 0;
5433 if (as_raw) {
5434 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
5435 } else {
5436 bs->load_at(this, decorators, type, dst, src, tmp1);
5437 }
5438 }
5439
5440 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
5441 Register tmp1, Register tmp2, Register tmp3) {
5442 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5443 decorators = AccessInternal::decorator_fixup(decorators, type);
5444 bool as_raw = (decorators & AS_RAW) != 0;
5445 if (as_raw) {
5446 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5447 } else {
5448 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5449 }
5450 }
5451
5452 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5453 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
5454 }
5455
5456 // Doesn't do verification, generates fixed size code
5457 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5458 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
5459 }
5460
5461 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5462 Register tmp2, Register tmp3, DecoratorSet decorators) {
5463 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5464 }
5465
5466 // Used for storing nulls.
5467 void MacroAssembler::store_heap_oop_null(Address dst) {
5468 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5469 }
5470
5471 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5788 assert (oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5789 int klass_index = oop_recorder()->find_index(k);
5790 RelocationHolder rspec = metadata_Relocation::spec(klass_index);
5791 Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
5792 }
5793
5794 void MacroAssembler::reinit_heapbase() {
5795 if (UseCompressedOops) {
5796 if (Universe::heap() != nullptr) {
5797 if (CompressedOops::base() == nullptr) {
5798 MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
5799 } else {
5800 mov64(r12_heapbase, (int64_t)CompressedOops::base());
5801 }
5802 } else {
5803 movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
5804 }
5805 }
5806 }
5807
5808 #if COMPILER2_OR_JVMCI
5809
5810 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
5811 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
5812 // cnt - number of qwords (8-byte words).
5813 // base - start address, qword aligned.
5814 Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
5815 bool use64byteVector = (MaxVectorSize == 64) && (VM_Version::avx3_threshold() == 0);
5816 if (use64byteVector) {
5817 vpxor(xtmp, xtmp, xtmp, AVX_512bit);
5818 } else if (MaxVectorSize >= 32) {
5819 vpxor(xtmp, xtmp, xtmp, AVX_256bit);
5820 } else {
5821 pxor(xtmp, xtmp);
5822 }
5823 jmp(L_zero_64_bytes);
5824
5825 BIND(L_loop);
5826 if (MaxVectorSize >= 32) {
5827 fill64(base, 0, xtmp, use64byteVector);
5828 } else {
5829 movdqu(Address(base, 0), xtmp);
5830 movdqu(Address(base, 16), xtmp);
5831 movdqu(Address(base, 32), xtmp);
5832 movdqu(Address(base, 48), xtmp);
5833 }
5834 addptr(base, 64);
5835
5836 BIND(L_zero_64_bytes);
5837 subptr(cnt, 8);
5838 jccb(Assembler::greaterEqual, L_loop);
5839
5840 // Copy trailing 64 bytes
5841 if (use64byteVector) {
5842 addptr(cnt, 8);
5843 jccb(Assembler::equal, L_end);
5844 fill64_masked(3, base, 0, xtmp, mask, cnt, rtmp, true);
5845 jmp(L_end);
5846 } else {
5847 addptr(cnt, 4);
5848 jccb(Assembler::less, L_tail);
5849 if (MaxVectorSize >= 32) {
5850 vmovdqu(Address(base, 0), xtmp);
5851 } else {
5852 movdqu(Address(base, 0), xtmp);
5853 movdqu(Address(base, 16), xtmp);
5854 }
5855 }
5856 addptr(base, 32);
5857 subptr(cnt, 4);
5858
5859 BIND(L_tail);
5860 addptr(cnt, 4);
5861 jccb(Assembler::lessEqual, L_end);
5862 if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
5863 fill32_masked(3, base, 0, xtmp, mask, cnt, rtmp);
5864 } else {
5865 decrement(cnt);
5866
5867 BIND(L_sloop);
5868 movq(Address(base, 0), xtmp);
5869 addptr(base, 8);
5870 decrement(cnt);
5871 jccb(Assembler::greaterEqual, L_sloop);
5872 }
5873 BIND(L_end);
5874 }
5875
5876 // Clearing constant sized memory using YMM/ZMM registers.
5877 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
5878 assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
5879 bool use64byteVector = (MaxVectorSize > 32) && (VM_Version::avx3_threshold() == 0);
5880
5881 int vector64_count = (cnt & (~0x7)) >> 3;
5882 cnt = cnt & 0x7;
5883 const int fill64_per_loop = 4;
5945 break;
5946 case 7:
5947 if (use64byteVector) {
5948 movl(rtmp, 0x7F);
5949 kmovwl(mask, rtmp);
5950 evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
5951 } else {
5952 evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
5953 movl(rtmp, 0x7);
5954 kmovwl(mask, rtmp);
5955 evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
5956 }
5957 break;
5958 default:
5959 fatal("Unexpected length : %d\n",cnt);
5960 break;
5961 }
5962 }
5963 }
5964
5965 void MacroAssembler::clear_mem(Register base, Register cnt, Register tmp, XMMRegister xtmp,
5966 bool is_large, KRegister mask) {
5967 // cnt - number of qwords (8-byte words).
5968 // base - start address, qword aligned.
5969 // is_large - if optimizers know cnt is larger than InitArrayShortSize
5970 assert(base==rdi, "base register must be edi for rep stos");
5971 assert(tmp==rax, "tmp register must be eax for rep stos");
5972 assert(cnt==rcx, "cnt register must be ecx for rep stos");
5973 assert(InitArrayShortSize % BytesPerLong == 0,
5974 "InitArrayShortSize should be the multiple of BytesPerLong");
5975
5976 Label DONE;
5977 if (!is_large || !UseXMMForObjInit) {
5978 xorptr(tmp, tmp);
5979 }
5980
5981 if (!is_large) {
5982 Label LOOP, LONG;
5983 cmpptr(cnt, InitArrayShortSize/BytesPerLong);
5984 jccb(Assembler::greater, LONG);
5985
5986 decrement(cnt);
5987 jccb(Assembler::negative, DONE); // Zero length
5988
5989 // Use individual pointer-sized stores for small counts:
5990 BIND(LOOP);
5991 movptr(Address(base, cnt, Address::times_ptr), tmp);
5992 decrement(cnt);
5993 jccb(Assembler::greaterEqual, LOOP);
5994 jmpb(DONE);
5995
5996 BIND(LONG);
5997 }
5998
5999 // Use longer rep-prefixed ops for non-small counts:
6000 if (UseFastStosb) {
6001 shlptr(cnt, 3); // convert to number of bytes
6002 rep_stosb();
6003 } else if (UseXMMForObjInit) {
6004 xmm_clear_mem(base, cnt, tmp, xtmp, mask);
6005 } else {
6006 rep_stos();
6007 }
6008
6009 BIND(DONE);
6010 }
6011
6012 #endif //COMPILER2_OR_JVMCI
6013
6014
6015 void MacroAssembler::generate_fill(BasicType t, bool aligned,
6016 Register to, Register value, Register count,
6017 Register rtmp, XMMRegister xtmp) {
6018 ShortBranchVerifier sbv(this);
6019 assert_different_registers(to, value, count, rtmp);
6020 Label L_exit;
6021 Label L_fill_2_bytes, L_fill_4_bytes;
6022
6023 #if defined(COMPILER2)
6024 if(MaxVectorSize >=32 &&
9904
9905 // Load top.
9906 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
9907
9908 // Check if the lock-stack is full.
9909 cmpl(top, LockStack::end_offset());
9910 jcc(Assembler::greaterEqual, slow);
9911
9912 // Check for recursion.
9913 cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
9914 jcc(Assembler::equal, push);
9915
9916 // Check header for monitor (0b10).
9917 testptr(reg_rax, markWord::monitor_value);
9918 jcc(Assembler::notZero, slow);
9919
9920 // Try to lock. Transition lock bits 0b01 => 0b00
9921 movptr(tmp, reg_rax);
9922 andptr(tmp, ~(int32_t)markWord::unlocked_value);
9923 orptr(reg_rax, markWord::unlocked_value);
9924 lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
9925 jcc(Assembler::notEqual, slow);
9926
9927 // Restore top, CAS clobbers register.
9928 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
9929
9930 bind(push);
9931 // After successful lock, push object on lock-stack.
9932 movptr(Address(thread, top), obj);
9933 incrementl(top, oopSize);
9934 movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
9935 }
9936
9937 // Implements fast-unlocking.
9938 //
9939 // obj: the object to be unlocked
9940 // reg_rax: rax
9941 // thread: the thread
9942 // tmp: a temporary register
9943 void MacroAssembler::fast_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {
|
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/assembler.hpp"
26 #include "asm/assembler.inline.hpp"
27 #include "code/aotCodeCache.hpp"
28 #include "code/compiledIC.hpp"
29 #include "compiler/compiler_globals.hpp"
30 #include "compiler/disassembler.hpp"
31 #include "ci/ciInlineKlass.hpp"
32 #include "crc32c.h"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/collectedHeap.inline.hpp"
36 #include "gc/shared/tlab_globals.hpp"
37 #include "interpreter/bytecodeHistogram.hpp"
38 #include "interpreter/interpreter.hpp"
39 #include "interpreter/interpreterRuntime.hpp"
40 #include "jvm.h"
41 #include "memory/resourceArea.hpp"
42 #include "memory/universe.hpp"
43 #include "oops/accessDecorators.hpp"
44 #include "oops/compressedKlass.inline.hpp"
45 #include "oops/compressedOops.inline.hpp"
46 #include "oops/klass.inline.hpp"
47 #include "oops/resolvedFieldEntry.hpp"
48 #include "prims/methodHandles.hpp"
49 #include "runtime/arguments.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/interfaceSupport.inline.hpp"
52 #include "runtime/javaThread.hpp"
53 #include "runtime/jniHandles.hpp"
54 #include "runtime/objectMonitor.hpp"
55 #include "runtime/os.hpp"
56 #include "runtime/safepoint.hpp"
57 #include "runtime/safepointMechanism.hpp"
58 #include "runtime/sharedRuntime.hpp"
59 #include "runtime/signature_cc.hpp"
60 #include "runtime/stubRoutines.hpp"
61 #include "utilities/checkedCast.hpp"
62 #include "utilities/macros.hpp"
63 #include "vmreg_x86.inline.hpp"
64 #ifdef COMPILER2
65 #include "opto/output.hpp"
66 #endif
67
68 #ifdef PRODUCT
69 #define BLOCK_COMMENT(str) /* nothing */
70 #define STOP(error) stop(error)
71 #else
72 #define BLOCK_COMMENT(str) block_comment(str)
73 #define STOP(error) block_comment(error); stop(error)
74 #endif
75
76 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
77
78 #ifdef ASSERT
79 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
80 #endif
81
82 static const Assembler::Condition reverse[] = {
83 Assembler::noOverflow /* overflow = 0x0 */ ,
84 Assembler::overflow /* noOverflow = 0x1 */ ,
85 Assembler::aboveEqual /* carrySet = 0x2, below = 0x2 */ ,
86 Assembler::below /* aboveEqual = 0x3, carryClear = 0x3 */ ,
1294 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1295 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1296 assert_different_registers(arg_1, c_rarg2);
1297 pass_arg2(this, arg_2);
1298 pass_arg1(this, arg_1);
1299 pass_arg0(this, arg_0);
1300 call_VM_leaf(entry_point, 3);
1301 }
1302
1303 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
1304 assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
1305 assert_different_registers(arg_1, c_rarg2, c_rarg3);
1306 assert_different_registers(arg_2, c_rarg3);
1307 pass_arg3(this, arg_3);
1308 pass_arg2(this, arg_2);
1309 pass_arg1(this, arg_1);
1310 pass_arg0(this, arg_0);
1311 call_VM_leaf(entry_point, 3);
1312 }
1313
1314 void MacroAssembler::super_call_VM_leaf(address entry_point) {
1315 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1316 }
1317
1318 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
1319 pass_arg0(this, arg_0);
1320 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1321 }
1322
1323 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
1324 assert_different_registers(arg_0, c_rarg1);
1325 pass_arg1(this, arg_1);
1326 pass_arg0(this, arg_0);
1327 MacroAssembler::call_VM_leaf_base(entry_point, 2);
1328 }
1329
1330 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1331 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1332 assert_different_registers(arg_1, c_rarg2);
1333 pass_arg2(this, arg_2);
1334 pass_arg1(this, arg_1);
1335 pass_arg0(this, arg_0);
1336 MacroAssembler::call_VM_leaf_base(entry_point, 3);
1337 }
2351 lea(rscratch, src);
2352 Assembler::mulss(dst, Address(rscratch, 0));
2353 }
2354 }
2355
2356 void MacroAssembler::null_check(Register reg, int offset) {
2357 if (needs_explicit_null_check(offset)) {
2358 // provoke OS null exception if reg is null by
2359 // accessing M[reg] w/o changing any (non-CC) registers
2360 // NOTE: cmpl is plenty here to provoke a segv
2361 cmpptr(rax, Address(reg, 0));
2362 // Note: should probably use testl(rax, Address(reg, 0));
2363 // may be shorter code (however, this version of
2364 // testl needs to be implemented first)
2365 } else {
2366 // nothing to do, (later) access of M[reg + offset]
2367 // will provoke OS null exception if reg is null
2368 }
2369 }
2370
2371 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2372 andptr(markword, markWord::inline_type_mask_in_place);
2373 cmpptr(markword, markWord::inline_type_pattern);
2374 jcc(Assembler::equal, is_inline_type);
2375 }
2376
2377 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2378 if (can_be_null) {
2379 testptr(object, object);
2380 jcc(Assembler::zero, not_inline_type);
2381 }
2382 const int is_inline_type_mask = markWord::inline_type_pattern;
2383 movptr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2384 andptr(tmp, is_inline_type_mask);
2385 cmpptr(tmp, is_inline_type_mask);
2386 jcc(Assembler::notEqual, not_inline_type);
2387 }
2388
2389 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2390 movl(temp_reg, flags);
2391 testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
2392 jcc(Assembler::notEqual, is_null_free_inline_type);
2393 }
2394
2395 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2396 movl(temp_reg, flags);
2397 testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
2398 jcc(Assembler::equal, not_null_free_inline_type);
2399 }
2400
2401 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2402 movl(temp_reg, flags);
2403 testl(temp_reg, 1 << ResolvedFieldEntry::is_flat_shift);
2404 jcc(Assembler::notEqual, is_flat);
2405 }
2406
2407 void MacroAssembler::test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker) {
2408 movl(temp_reg, flags);
2409 testl(temp_reg, 1 << ResolvedFieldEntry::has_null_marker_shift);
2410 jcc(Assembler::notEqual, has_null_marker);
2411 }
2412
2413 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2414 Label test_mark_word;
2415 // load mark word
2416 movptr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2417 // check displaced
2418 testl(temp_reg, markWord::unlocked_value);
2419 jccb(Assembler::notZero, test_mark_word);
2420 // slow path use klass prototype
2421 push(rscratch1);
2422 load_prototype_header(temp_reg, oop, rscratch1);
2423 pop(rscratch1);
2424
2425 bind(test_mark_word);
2426 testl(temp_reg, test_bit);
2427 jcc((jmp_set) ? Assembler::notZero : Assembler::zero, jmp_label);
2428 }
2429
2430 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg,
2431 Label& is_flat_array) {
2432 #ifdef _LP64
2433 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2434 #else
2435 load_klass(temp_reg, oop, noreg);
2436 movl(temp_reg, Address(temp_reg, Klass::layout_helper_offset()));
2437 test_flat_array_layout(temp_reg, is_flat_array);
2438 #endif
2439 }
2440
2441 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2442 Label& is_non_flat_array) {
2443 #ifdef _LP64
2444 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2445 #else
2446 load_klass(temp_reg, oop, noreg);
2447 movl(temp_reg, Address(temp_reg, Klass::layout_helper_offset()));
2448 test_non_flat_array_layout(temp_reg, is_non_flat_array);
2449 #endif
2450 }
2451
2452 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label&is_null_free_array) {
2453 #ifdef _LP64
2454 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2455 #else
2456 Unimplemented();
2457 #endif
2458 }
2459
2460 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2461 #ifdef _LP64
2462 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2463 #else
2464 Unimplemented();
2465 #endif
2466 }
2467
2468 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2469 testl(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2470 jcc(Assembler::notZero, is_flat_array);
2471 }
2472
2473 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
2474 testl(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2475 jcc(Assembler::zero, is_non_flat_array);
2476 }
2477
2478 void MacroAssembler::os_breakpoint() {
2479 // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
2480 // (e.g., MSVC can't call ps() otherwise)
2481 call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
2482 }
2483
2484 void MacroAssembler::unimplemented(const char* what) {
2485 const char* buf = nullptr;
2486 {
2487 ResourceMark rm;
2488 stringStream ss;
2489 ss.print("unimplemented: %s", what);
2490 buf = code_string(ss.as_string());
2491 }
2492 stop(buf);
2493 }
2494
2495 #define XSTATE_BV 0x200
2496
2497 void MacroAssembler::pop_CPU_state() {
3562 }
3563
3564 // C++ bool manipulation
3565 void MacroAssembler::testbool(Register dst) {
3566 if(sizeof(bool) == 1)
3567 testb(dst, 0xff);
3568 else if(sizeof(bool) == 2) {
3569 // testw implementation needed for two byte bools
3570 ShouldNotReachHere();
3571 } else if(sizeof(bool) == 4)
3572 testl(dst, dst);
3573 else
3574 // unsupported
3575 ShouldNotReachHere();
3576 }
3577
3578 void MacroAssembler::testptr(Register dst, Register src) {
3579 testq(dst, src);
3580 }
3581
3582 // Object / value buffer allocation...
3583 //
3584 // Kills klass and rsi on LP64
3585 void MacroAssembler::allocate_instance(Register klass, Register new_obj,
3586 Register t1, Register t2,
3587 bool clear_fields, Label& alloc_failed)
3588 {
3589 Label done, initialize_header, initialize_object, slow_case, slow_case_no_pop;
3590 Register layout_size = t1;
3591 assert(new_obj == rax, "needs to be rax");
3592 assert_different_registers(klass, new_obj, t1, t2);
3593
3594 // get instance_size in InstanceKlass (scaled to a count of bytes)
3595 movl(layout_size, Address(klass, Klass::layout_helper_offset()));
3596 // test to see if it is malformed in some way
3597 testl(layout_size, Klass::_lh_instance_slow_path_bit);
3598 jcc(Assembler::notZero, slow_case_no_pop);
3599
3600 // Allocate the instance:
3601 // If TLAB is enabled:
3602 // Try to allocate in the TLAB.
3603 // If fails, go to the slow path.
3604 // Else If inline contiguous allocations are enabled:
3605 // Try to allocate in eden.
3606 // If fails due to heap end, go to slow path.
3607 //
3608 // If TLAB is enabled OR inline contiguous is enabled:
3609 // Initialize the allocation.
3610 // Exit.
3611 //
3612 // Go to slow path.
3613
3614 push(klass);
3615 if (UseTLAB) {
3616 tlab_allocate(new_obj, layout_size, 0, klass, t2, slow_case);
3617 if (ZeroTLAB || (!clear_fields)) {
3618 // the fields have been already cleared
3619 jmp(initialize_header);
3620 } else {
3621 // initialize both the header and fields
3622 jmp(initialize_object);
3623 }
3624 } else {
3625 jmp(slow_case);
3626 }
3627
3628 // If UseTLAB is true, the object is created above and there is an initialize need.
3629 // Otherwise, skip and go to the slow path.
3630 if (UseTLAB) {
3631 if (clear_fields) {
3632 // The object is initialized before the header. If the object size is
3633 // zero, go directly to the header initialization.
3634 bind(initialize_object);
3635 if (UseCompactObjectHeaders) {
3636 assert(is_aligned(oopDesc::base_offset_in_bytes(), BytesPerLong), "oop base offset must be 8-byte-aligned");
3637 decrement(layout_size, oopDesc::base_offset_in_bytes());
3638 } else {
3639 decrement(layout_size, sizeof(oopDesc));
3640 }
3641 jcc(Assembler::zero, initialize_header);
3642
3643 // Initialize topmost object field, divide size by 8, check if odd and
3644 // test if zero.
3645 Register zero = klass;
3646 xorl(zero, zero); // use zero reg to clear memory (shorter code)
3647 shrl(layout_size, LogBytesPerLong); // divide by 2*oopSize and set carry flag if odd
3648
3649 #ifdef ASSERT
3650 // make sure instance_size was multiple of 8
3651 Label L;
3652 // Ignore partial flag stall after shrl() since it is debug VM
3653 jcc(Assembler::carryClear, L);
3654 stop("object size is not multiple of 2 - adjust this code");
3655 bind(L);
3656 // must be > 0, no extra check needed here
3657 #endif
3658
3659 // initialize remaining object fields: instance_size was a multiple of 8
3660 {
3661 Label loop;
3662 bind(loop);
3663 int header_size_bytes = oopDesc::header_size() * HeapWordSize;
3664 assert(is_aligned(header_size_bytes, BytesPerLong), "oop header size must be 8-byte-aligned");
3665 movptr(Address(new_obj, layout_size, Address::times_8, header_size_bytes - 1*oopSize), zero);
3666 decrement(layout_size);
3667 jcc(Assembler::notZero, loop);
3668 }
3669 } // clear_fields
3670
3671 // initialize object header only.
3672 bind(initialize_header);
3673 if (UseCompactObjectHeaders || Arguments::is_valhalla_enabled()) {
3674 pop(klass);
3675 Register mark_word = t2;
3676 movptr(mark_word, Address(klass, Klass::prototype_header_offset()));
3677 movptr(Address(new_obj, oopDesc::mark_offset_in_bytes ()), mark_word);
3678 } else {
3679 movptr(Address(new_obj, oopDesc::mark_offset_in_bytes()),
3680 (intptr_t)markWord::prototype().value()); // header
3681 pop(klass); // get saved klass back in the register.
3682 }
3683 if (!UseCompactObjectHeaders) {
3684 xorl(rsi, rsi); // use zero reg to clear memory (shorter code)
3685 store_klass_gap(new_obj, rsi); // zero klass gap for compressed oops
3686 movptr(t2, klass); // preserve klass
3687 store_klass(new_obj, t2, rscratch1); // src klass reg is potentially compressed
3688 }
3689 jmp(done);
3690 }
3691
3692 bind(slow_case);
3693 pop(klass);
3694 bind(slow_case_no_pop);
3695 jmp(alloc_failed);
3696
3697 bind(done);
3698 }
3699
3700 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
3701 void MacroAssembler::tlab_allocate(Register obj,
3702 Register var_size_in_bytes,
3703 int con_size_in_bytes,
3704 Register t1,
3705 Register t2,
3706 Label& slow_case) {
3707 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
3708 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
3709 }
3710
3711 RegSet MacroAssembler::call_clobbered_gp_registers() {
3712 RegSet regs;
3713 regs += RegSet::of(rax, rcx, rdx);
3714 #ifndef _WINDOWS
3715 regs += RegSet::of(rsi, rdi);
3716 #endif
3717 regs += RegSet::range(r8, r11);
3718 if (UseAPX) {
3719 regs += RegSet::range(r16, as_Register(Register::number_of_registers - 1));
3883 xorptr(temp, temp); // use _zero reg to clear memory (shorter code)
3884 if (UseIncDec) {
3885 shrptr(index, 3); // divide by 8/16 and set carry flag if bit 2 was set
3886 } else {
3887 shrptr(index, 2); // use 2 instructions to avoid partial flag stall
3888 shrptr(index, 1);
3889 }
3890
3891 // initialize remaining object fields: index is a multiple of 2 now
3892 {
3893 Label loop;
3894 bind(loop);
3895 movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
3896 decrement(index);
3897 jcc(Assembler::notZero, loop);
3898 }
3899
3900 bind(done);
3901 }
3902
3903 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
3904 movptr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
3905 #ifdef ASSERT
3906 {
3907 Label done;
3908 cmpptr(layout_info, 0);
3909 jcc(Assembler::notEqual, done);
3910 stop("inline_layout_info_array is null");
3911 bind(done);
3912 }
3913 #endif
3914
3915 InlineLayoutInfo array[2];
3916 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
3917 if (is_power_of_2(size)) {
3918 shll(index, log2i_exact(size)); // Scale index by power of 2
3919 } else {
3920 imull(index, index, size); // Scale the index to be the entry index * array_element_size
3921 }
3922 lea(layout_info, Address(layout_info, index, Address::times_1, Array<InlineLayoutInfo>::base_offset_in_bytes()));
3923 }
3924
3925 // Look up the method for a megamorphic invokeinterface call.
3926 // The target method is determined by <intf_klass, itable_index>.
3927 // The receiver klass is in recv_klass.
3928 // On success, the result will be in method_result, and execution falls through.
3929 // On failure, execution transfers to the given label.
3930 void MacroAssembler::lookup_interface_method(Register recv_klass,
3931 Register intf_klass,
3932 RegisterOrConstant itable_index,
3933 Register method_result,
3934 Register scan_temp,
3935 Label& L_no_such_interface,
3936 bool return_method) {
3937 assert_different_registers(recv_klass, intf_klass, scan_temp);
3938 assert_different_registers(method_result, intf_klass, scan_temp);
3939 assert(recv_klass != method_result || !return_method,
3940 "recv_klass can be destroyed when method isn't needed");
3941
3942 assert(itable_index.is_constant() || itable_index.as_register() == method_result,
3943 "caller must use same register for non-constant itable index as for method");
3944
4955 } else {
4956 Label L;
4957 jccb(negate_condition(cc), L);
4958 movl(dst, src);
4959 bind(L);
4960 }
4961 }
4962
4963 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
4964 if (VM_Version::supports_cmov()) {
4965 cmovl(cc, dst, src);
4966 } else {
4967 Label L;
4968 jccb(negate_condition(cc), L);
4969 movl(dst, src);
4970 bind(L);
4971 }
4972 }
4973
4974 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
4975 if (!VerifyOops || VerifyAdapterSharing) {
4976 // Below address of the code string confuses VerifyAdapterSharing
4977 // because it may differ between otherwise equivalent adapters.
4978 return;
4979 }
4980
4981 BLOCK_COMMENT("verify_oop {");
4982 push(rscratch1);
4983 push(rax); // save rax
4984 push(reg); // pass register argument
4985
4986 // Pass register number to verify_oop_subroutine
4987 const char* b = nullptr;
4988 {
4989 ResourceMark rm;
4990 stringStream ss;
4991 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
4992 b = code_string(ss.as_string());
4993 }
4994 AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
4995 pushptr(buffer.addr(), rscratch1);
4996
4997 // call indirectly to solve generation ordering problem
4998 movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
4999 call(rax);
5215 // or something else. Since this is a slow path, we can optimize for code density,
5216 // and just restart the search from the beginning.
5217 jmpb(L_restart);
5218
5219 // Counter updates:
5220
5221 // Increment polymorphic counter instead of receiver slot.
5222 bind(L_polymorphic);
5223 movptr(offset, poly_count_offset);
5224 jmpb(L_count_update);
5225
5226 // Found a receiver, convert its slot offset to corresponding count offset.
5227 bind(L_found_recv);
5228 addptr(offset, receiver_to_count_step);
5229
5230 bind(L_count_update);
5231 addptr(Address(mdp, offset, Address::times_ptr), DataLayout::counter_increment);
5232 }
5233
5234 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
5235 if (!VerifyOops || VerifyAdapterSharing) {
5236 // Below address of the code string confuses VerifyAdapterSharing
5237 // because it may differ between otherwise equivalent adapters.
5238 return;
5239 }
5240
5241 push(rscratch1);
5242 push(rax); // save rax,
5243 // addr may contain rsp so we will have to adjust it based on the push
5244 // we just did (and on 64 bit we do two pushes)
5245 // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
5246 // stores rax into addr which is backwards of what was intended.
5247 if (addr.uses(rsp)) {
5248 lea(rax, addr);
5249 pushptr(Address(rax, 2 * BytesPerWord));
5250 } else {
5251 pushptr(addr);
5252 }
5253
5254 // Pass register number to verify_oop_subroutine
5255 const char* b = nullptr;
5256 {
5257 ResourceMark rm;
5258 stringStream ss;
5259 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
5613
5614 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
5615 // get mirror
5616 const int mirror_offset = in_bytes(Klass::java_mirror_offset());
5617 load_method_holder(mirror, method);
5618 movptr(mirror, Address(mirror, mirror_offset));
5619 resolve_oop_handle(mirror, tmp);
5620 }
5621
5622 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5623 load_method_holder(rresult, rmethod);
5624 movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5625 }
5626
5627 void MacroAssembler::load_method_holder(Register holder, Register method) {
5628 movptr(holder, Address(method, Method::const_offset())); // ConstMethod*
5629 movptr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5630 movptr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5631 }
5632
5633 void MacroAssembler::load_metadata(Register dst, Register src) {
5634 if (UseCompactObjectHeaders) {
5635 load_narrow_klass_compact(dst, src);
5636 } else if (UseCompressedClassPointers) {
5637 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5638 } else {
5639 movptr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5640 }
5641 }
5642
5643 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5644 assert(UseCompactObjectHeaders, "expect compact object headers");
5645 movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5646 shrq(dst, markWord::klass_shift);
5647 }
5648
5649 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
5650 assert_different_registers(src, tmp);
5651 assert_different_registers(dst, tmp);
5652
5653 if (UseCompactObjectHeaders) {
5654 load_narrow_klass_compact(dst, src);
5655 decode_klass_not_null(dst, tmp);
5656 } else if (UseCompressedClassPointers) {
5657 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5658 decode_klass_not_null(dst, tmp);
5659 } else {
5660 movptr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5661 }
5662 }
5663
5664 void MacroAssembler::load_prototype_header(Register dst, Register src, Register tmp) {
5665 load_klass(dst, src, tmp);
5666 movptr(dst, Address(dst, Klass::prototype_header_offset()));
5667 }
5668
5669 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
5670 assert(!UseCompactObjectHeaders, "not with compact headers");
5671 assert_different_registers(src, tmp);
5672 assert_different_registers(dst, tmp);
5673 if (UseCompressedClassPointers) {
5674 encode_klass_not_null(src, tmp);
5675 movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5676 } else {
5677 movptr(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5678 }
5679 }
5680
5681 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
5682 if (UseCompactObjectHeaders) {
5683 assert(tmp != noreg, "need tmp");
5684 assert_different_registers(klass, obj, tmp);
5685 load_narrow_klass_compact(tmp, obj);
5686 cmpl(klass, tmp);
5687 } else if (UseCompressedClassPointers) {
5688 cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
5714 bool as_raw = (decorators & AS_RAW) != 0;
5715 if (as_raw) {
5716 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
5717 } else {
5718 bs->load_at(this, decorators, type, dst, src, tmp1);
5719 }
5720 }
5721
5722 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
5723 Register tmp1, Register tmp2, Register tmp3) {
5724 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5725 decorators = AccessInternal::decorator_fixup(decorators, type);
5726 bool as_raw = (decorators & AS_RAW) != 0;
5727 if (as_raw) {
5728 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5729 } else {
5730 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5731 }
5732 }
5733
5734 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5735 Register inline_layout_info) {
5736 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5737 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5738 }
5739
5740 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5741 movptr(offset, Address(inline_klass, InlineKlass::adr_members_offset()));
5742 movl(offset, Address(offset, InlineKlass::payload_offset_offset()));
5743 }
5744
5745 void MacroAssembler::payload_addr(Register oop, Register data, Register inline_klass) {
5746 // ((address) (void*) o) + vk->payload_offset();
5747 Register offset = (data == oop) ? rscratch1 : data;
5748 payload_offset(inline_klass, offset);
5749 if (data == oop) {
5750 addptr(data, offset);
5751 } else {
5752 lea(data, Address(oop, offset));
5753 }
5754 }
5755
5756 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
5757 Register index, Register data) {
5758 assert(index != rcx, "index needs to shift by rcx");
5759 assert_different_registers(array, array_klass, index);
5760 assert_different_registers(rcx, array, index);
5761
5762 // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
5763 movl(rcx, Address(array_klass, Klass::layout_helper_offset()));
5764
5765 // Klass::layout_helper_log2_element_size(lh)
5766 // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
5767 shrl(rcx, Klass::_lh_log2_element_size_shift);
5768 andl(rcx, Klass::_lh_log2_element_size_mask);
5769 shlptr(index); // index << rcx
5770
5771 lea(data, Address(array, index, Address::times_1, arrayOopDesc::base_offset_in_bytes(T_FLAT_ELEMENT)));
5772 }
5773
5774 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5775 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
5776 }
5777
5778 // Doesn't do verification, generates fixed size code
5779 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5780 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
5781 }
5782
5783 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5784 Register tmp2, Register tmp3, DecoratorSet decorators) {
5785 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5786 }
5787
5788 // Used for storing nulls.
5789 void MacroAssembler::store_heap_oop_null(Address dst) {
5790 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5791 }
5792
5793 void MacroAssembler::store_klass_gap(Register dst, Register src) {
6110 assert (oop_recorder() != nullptr, "this assembler needs an OopRecorder");
6111 int klass_index = oop_recorder()->find_index(k);
6112 RelocationHolder rspec = metadata_Relocation::spec(klass_index);
6113 Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
6114 }
6115
6116 void MacroAssembler::reinit_heapbase() {
6117 if (UseCompressedOops) {
6118 if (Universe::heap() != nullptr) {
6119 if (CompressedOops::base() == nullptr) {
6120 MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
6121 } else {
6122 mov64(r12_heapbase, (int64_t)CompressedOops::base());
6123 }
6124 } else {
6125 movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
6126 }
6127 }
6128 }
6129
6130 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
6131 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
6132 // An inline type might be returned. If fields are in registers we
6133 // need to allocate an inline type instance and initialize it with
6134 // the value of the fields.
6135 Label skip;
6136 // We only need a new buffered inline type if a new one is not returned
6137 testptr(rax, 1);
6138 jcc(Assembler::zero, skip);
6139 int call_offset = -1;
6140
6141 #ifdef _LP64
6142 // The following code is similar to allocate_instance but has some slight differences,
6143 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
6144 // allocating is not necessary if vk != nullptr, etc. allocate_instance is not aware of these.
6145 Label slow_case;
6146 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
6147 mov(rscratch1, rax); // save rax for slow_case since *_allocate may corrupt it when allocation failed
6148 if (vk != nullptr) {
6149 // Called from C1, where the return type is statically known.
6150 movptr(rbx, (intptr_t)vk->get_InlineKlass());
6151 jint lh = vk->layout_helper();
6152 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
6153 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
6154 tlab_allocate(rax, noreg, lh, r13, r14, slow_case);
6155 } else {
6156 jmp(slow_case);
6157 }
6158 } else {
6159 // Call from interpreter. RAX contains ((the InlineKlass* of the return type) | 0x01)
6160 mov(rbx, rax);
6161 andptr(rbx, -2);
6162 if (UseTLAB) {
6163 movl(r14, Address(rbx, Klass::layout_helper_offset()));
6164 testl(r14, Klass::_lh_instance_slow_path_bit);
6165 jcc(Assembler::notZero, slow_case);
6166 tlab_allocate(rax, r14, 0, r13, r14, slow_case);
6167 } else {
6168 jmp(slow_case);
6169 }
6170 }
6171 if (UseTLAB) {
6172 // 2. Initialize buffered inline instance header
6173 Register buffer_obj = rax;
6174 Register klass = rbx;
6175 if (UseCompactObjectHeaders) {
6176 Register mark_word = r13;
6177 movptr(mark_word, Address(klass, Klass::prototype_header_offset()));
6178 movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes()), mark_word);
6179 } else {
6180 movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes()), (intptr_t)markWord::inline_type_prototype().value());
6181 xorl(r13, r13);
6182 store_klass_gap(buffer_obj, r13);
6183 if (vk == nullptr) {
6184 // store_klass corrupts rbx(klass), so save it in r13 for later use (interpreter case only).
6185 mov(r13, klass);
6186 }
6187 store_klass(buffer_obj, klass, rscratch1);
6188 klass = r13;
6189 }
6190 // 3. Initialize its fields with an inline class specific handler
6191 if (vk != nullptr) {
6192 call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
6193 } else {
6194 movptr(rbx, Address(klass, InlineKlass::adr_members_offset()));
6195 movptr(rbx, Address(rbx, InlineKlass::pack_handler_offset()));
6196 call(rbx);
6197 }
6198 jmp(skip);
6199 }
6200 bind(slow_case);
6201 // We failed to allocate a new inline type, fall back to a runtime
6202 // call. Some oop field may be live in some registers but we can't
6203 // tell. That runtime call will take care of preserving them
6204 // across a GC if there's one.
6205 mov(rax, rscratch1);
6206 #endif
6207
6208 if (from_interpreter) {
6209 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
6210 } else {
6211 call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
6212 call_offset = offset();
6213 }
6214
6215 bind(skip);
6216 return call_offset;
6217 }
6218
6219 // Move a value between registers/stack slots and update the reg_state
6220 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
6221 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
6222 if (reg_state[to->value()] == reg_written) {
6223 return true; // Already written
6224 }
6225 if (from != to && bt != T_VOID) {
6226 if (reg_state[to->value()] == reg_readonly) {
6227 return false; // Not yet writable
6228 }
6229 if (from->is_reg()) {
6230 if (to->is_reg()) {
6231 if (from->is_XMMRegister()) {
6232 if (bt == T_DOUBLE) {
6233 movdbl(to->as_XMMRegister(), from->as_XMMRegister());
6234 } else {
6235 assert(bt == T_FLOAT, "must be float");
6236 movflt(to->as_XMMRegister(), from->as_XMMRegister());
6237 }
6238 } else {
6239 movq(to->as_Register(), from->as_Register());
6240 }
6241 } else {
6242 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6243 Address to_addr = Address(rsp, st_off);
6244 if (from->is_XMMRegister()) {
6245 if (bt == T_DOUBLE) {
6246 movdbl(to_addr, from->as_XMMRegister());
6247 } else {
6248 assert(bt == T_FLOAT, "must be float");
6249 movflt(to_addr, from->as_XMMRegister());
6250 }
6251 } else {
6252 movq(to_addr, from->as_Register());
6253 }
6254 }
6255 } else {
6256 Address from_addr = Address(rsp, from->reg2stack() * VMRegImpl::stack_slot_size + wordSize);
6257 if (to->is_reg()) {
6258 if (to->is_XMMRegister()) {
6259 if (bt == T_DOUBLE) {
6260 movdbl(to->as_XMMRegister(), from_addr);
6261 } else {
6262 assert(bt == T_FLOAT, "must be float");
6263 movflt(to->as_XMMRegister(), from_addr);
6264 }
6265 } else {
6266 movq(to->as_Register(), from_addr);
6267 }
6268 } else {
6269 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6270 movq(r13, from_addr);
6271 movq(Address(rsp, st_off), r13);
6272 }
6273 }
6274 }
6275 // Update register states
6276 reg_state[from->value()] = reg_writable;
6277 reg_state[to->value()] = reg_written;
6278 return true;
6279 }
6280
6281 // Calculate the extra stack space required for packing or unpacking inline
6282 // args and adjust the stack pointer (see MacroAssembler::remove_frame).
6283 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
6284 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
6285 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
6286 assert(sp_inc > 0, "sanity");
6287 // Two additional slots to account for return address
6288 sp_inc += 2 * VMRegImpl::stack_slot_size;
6289
6290 push(rbp);
6291 subptr(rsp, sp_inc);
6292 #ifdef ASSERT
6293 movl(Address(rsp, 0), badRegWordVal);
6294 movl(Address(rsp, VMRegImpl::stack_slot_size), badRegWordVal);
6295 #endif
6296 return sp_inc + wordSize; // account for rbp space
6297 }
6298
6299 // Read all fields from an inline type buffer and store the field values in registers/stack slots.
6300 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
6301 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
6302 RegState reg_state[]) {
6303 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
6304 assert(from->is_valid(), "source must be valid");
6305 bool progress = false;
6306 #ifdef ASSERT
6307 const int start_offset = offset();
6308 #endif
6309
6310 Label L_null, L_notNull;
6311 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
6312 Register tmp1 = r10;
6313 Register tmp2 = r13;
6314 Register fromReg = noreg;
6315 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
6316 bool done = true;
6317 bool mark_done = true;
6318 VMReg toReg;
6319 BasicType bt;
6320 // Check if argument requires a null check
6321 bool null_check = false;
6322 VMReg nullCheckReg;
6323 while (stream.next(nullCheckReg, bt)) {
6324 if (sig->at(stream.sig_index())._offset == -1) {
6325 null_check = true;
6326 break;
6327 }
6328 }
6329 stream.reset(sig_index, to_index);
6330 while (stream.next(toReg, bt)) {
6331 assert(toReg->is_valid(), "destination must be valid");
6332 int idx = (int)toReg->value();
6333 if (reg_state[idx] == reg_readonly) {
6334 if (idx != from->value()) {
6335 mark_done = false;
6336 }
6337 done = false;
6338 continue;
6339 } else if (reg_state[idx] == reg_written) {
6340 continue;
6341 }
6342 assert(reg_state[idx] == reg_writable, "must be writable");
6343 reg_state[idx] = reg_written;
6344 progress = true;
6345
6346 if (fromReg == noreg) {
6347 if (from->is_reg()) {
6348 fromReg = from->as_Register();
6349 } else {
6350 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6351 movq(tmp1, Address(rsp, st_off));
6352 fromReg = tmp1;
6353 }
6354 if (null_check) {
6355 // Nullable inline type argument, emit null check
6356 testptr(fromReg, fromReg);
6357 jcc(Assembler::zero, L_null);
6358 }
6359 }
6360 int off = sig->at(stream.sig_index())._offset;
6361 if (off == -1) {
6362 assert(null_check, "Missing null check at");
6363 if (toReg->is_stack()) {
6364 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6365 movq(Address(rsp, st_off), 1);
6366 } else {
6367 movq(toReg->as_Register(), 1);
6368 }
6369 continue;
6370 }
6371 assert(off > 0, "offset in object should be positive");
6372 Address fromAddr = Address(fromReg, off);
6373 if (!toReg->is_XMMRegister()) {
6374 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
6375 if (is_reference_type(bt)) {
6376 load_heap_oop(dst, fromAddr);
6377 } else {
6378 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
6379 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
6380 }
6381 if (toReg->is_stack()) {
6382 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6383 movq(Address(rsp, st_off), dst);
6384 }
6385 } else if (bt == T_DOUBLE) {
6386 movdbl(toReg->as_XMMRegister(), fromAddr);
6387 } else {
6388 assert(bt == T_FLOAT, "must be float");
6389 movflt(toReg->as_XMMRegister(), fromAddr);
6390 }
6391 }
6392 if (progress && null_check) {
6393 if (done) {
6394 jmp(L_notNull);
6395 bind(L_null);
6396 // Set null marker to zero to signal that the argument is null.
6397 // Also set all fields to zero since the runtime requires a canonical
6398 // representation of a flat null.
6399 stream.reset(sig_index, to_index);
6400 while (stream.next(toReg, bt)) {
6401 if (toReg->is_stack()) {
6402 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6403 movq(Address(rsp, st_off), 0);
6404 } else if (toReg->is_XMMRegister()) {
6405 xorps(toReg->as_XMMRegister(), toReg->as_XMMRegister());
6406 } else {
6407 xorl(toReg->as_Register(), toReg->as_Register());
6408 }
6409 }
6410 bind(L_notNull);
6411 } else {
6412 bind(L_null);
6413 }
6414 }
6415
6416 sig_index = stream.sig_index();
6417 to_index = stream.regs_index();
6418
6419 if (mark_done && reg_state[from->value()] != reg_written) {
6420 // This is okay because no one else will write to that slot
6421 reg_state[from->value()] = reg_writable;
6422 }
6423 from_index--;
6424 assert(progress || (start_offset == offset()), "should not emit code");
6425 return done;
6426 }
6427
6428 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
6429 VMRegPair* from, int from_count, int& from_index, VMReg to,
6430 RegState reg_state[], Register val_array) {
6431 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
6432 assert(to->is_valid(), "destination must be valid");
6433
6434 if (reg_state[to->value()] == reg_written) {
6435 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
6436 return true; // Already written
6437 }
6438
6439 // TODO 8284443 Isn't it an issue if below code uses r14 as tmp when it contains a spilled value?
6440 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
6441 Register val_obj_tmp = r11;
6442 Register from_reg_tmp = r14;
6443 Register tmp1 = r10;
6444 Register tmp2 = r13;
6445 Register tmp3 = rbx;
6446 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
6447
6448 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
6449
6450 if (reg_state[to->value()] == reg_readonly) {
6451 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
6452 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
6453 return false; // Not yet writable
6454 }
6455 val_obj = val_obj_tmp;
6456 }
6457
6458 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
6459 load_heap_oop(val_obj, Address(val_array, index));
6460
6461 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
6462 VMReg fromReg;
6463 BasicType bt;
6464 Label L_null;
6465 while (stream.next(fromReg, bt)) {
6466 assert(fromReg->is_valid(), "source must be valid");
6467 reg_state[fromReg->value()] = reg_writable;
6468
6469 int off = sig->at(stream.sig_index())._offset;
6470 if (off == -1) {
6471 // Nullable inline type argument, emit null check
6472 Label L_notNull;
6473 if (fromReg->is_stack()) {
6474 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6475 testb(Address(rsp, ld_off), 1);
6476 } else {
6477 testb(fromReg->as_Register(), 1);
6478 }
6479 jcc(Assembler::notZero, L_notNull);
6480 movptr(val_obj, 0);
6481 jmp(L_null);
6482 bind(L_notNull);
6483 continue;
6484 }
6485
6486 assert(off > 0, "offset in object should be positive");
6487 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
6488
6489 // Pack the scalarized field into the value object.
6490 Address dst(val_obj, off);
6491 if (!fromReg->is_XMMRegister()) {
6492 Register src;
6493 if (fromReg->is_stack()) {
6494 src = from_reg_tmp;
6495 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6496 load_sized_value(src, Address(rsp, ld_off), size_in_bytes, /* is_signed */ false);
6497 } else {
6498 src = fromReg->as_Register();
6499 }
6500 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
6501 if (is_reference_type(bt)) {
6502 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep val_obj valid.
6503 mov(tmp3, val_obj);
6504 Address dst_with_tmp3(tmp3, off);
6505 store_heap_oop(dst_with_tmp3, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
6506 } else {
6507 store_sized_value(dst, src, size_in_bytes);
6508 }
6509 } else if (bt == T_DOUBLE) {
6510 movdbl(dst, fromReg->as_XMMRegister());
6511 } else {
6512 assert(bt == T_FLOAT, "must be float");
6513 movflt(dst, fromReg->as_XMMRegister());
6514 }
6515 }
6516 bind(L_null);
6517 sig_index = stream.sig_index();
6518 from_index = stream.regs_index();
6519
6520 assert(reg_state[to->value()] == reg_writable, "must have already been read");
6521 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
6522 assert(success, "to register must be writeable");
6523 return true;
6524 }
6525
6526 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
6527 return reg->is_XMMRegister() ? xmm8->as_VMReg() : r14->as_VMReg();
6528 }
6529
6530 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6531 assert((initial_framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6532 if (needs_stack_repair) {
6533 // The method has a scalarized entry point (where fields of value object arguments
6534 // are passed through registers and stack), and a non-scalarized entry point (where
6535 // value object arguments are given as oops). The non-scalarized entry point will
6536 // first load each field of value object arguments and store them in registers and on
6537 // the stack in a way compatible with the scalarized entry point. To do so, some extra
6538 // stack space might be reserved (if argument registers are not enough). On leaving the
6539 // method, this space must be freed.
6540 //
6541 // In case we used the non-scalarized entry point the stack looks like this:
6542 //
6543 // | Arguments from caller |
6544 // |---------------------------| <-- caller's SP
6545 // | Return address #1 |
6546 // | Saved RBP #1 |
6547 // |---------------------------|
6548 // | Extension space for |
6549 // | inline arg (un)packing |
6550 // |---------------------------| <-- start of this method's frame
6551 // | Return address #2 |
6552 // | Saved RBP #2 |
6553 // |---------------------------| <-- RBP (with -XX:+PreserveFramePointer)
6554 // | sp_inc |
6555 // | method locals |
6556 // |---------------------------| <-- SP
6557 //
6558 // Space for the return pc and saved rbp is reserved twice. But only the #1 copies
6559 // contain the real values of return pc and saved rbp. The #2 copies are not reliable
6560 // and should not be used. They are mostly needed to add space between the extension
6561 // space and the locals, as there would be between the real arguments and the locals
6562 // if we don't need to do unpacking (from the scalarized entry point).
6563 //
6564 // When leaving, one must load RBP #1 into RBP, and use the copy #1 of the return address,
6565 // while keeping in mind that from the scalarized entry point, there will be only one
6566 // copy. Indeed, in the case we used the scalarized calling convention, the stack looks like this:
6567 //
6568 // | Arguments from caller |
6569 // |---------------------------| <-- caller's SP
6570 // | Return address |
6571 // | Saved RBP |
6572 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6573 // | sp_inc |
6574 // | method locals |
6575 // |---------------------------| <-- SP
6576 //
6577 // The sp_inc stack slot holds the total size of the frame, including the extension
6578 // space and copies #2 of the return address and the saved RBP (but never the copies
6579 // #1 of the return address and saved RBP). That is how to find the copies #1 of the
6580 // return address and saved rbp. This size is expressed in bytes. Be careful when using
6581 // it from C++ in pointer arithmetic you might need to divide it by wordSize.
6582
6583 // The stack increment resides just below the saved rbp
6584 addq(rsp, Address(rsp, initial_framesize - wordSize));
6585 pop(rbp);
6586 } else {
6587 if (initial_framesize > 0) {
6588 addq(rsp, initial_framesize);
6589 }
6590 pop(rbp);
6591 }
6592 }
6593
6594 #if COMPILER2_OR_JVMCI
6595
6596 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
6597 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp, KRegister mask) {
6598 // cnt - number of qwords (8-byte words).
6599 // base - start address, qword aligned.
6600 Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
6601 bool use64byteVector = (MaxVectorSize == 64) && (VM_Version::avx3_threshold() == 0);
6602 if (use64byteVector) {
6603 evpbroadcastq(xtmp, val, AVX_512bit);
6604 } else if (MaxVectorSize >= 32) {
6605 movdq(xtmp, val);
6606 punpcklqdq(xtmp, xtmp);
6607 vinserti128_high(xtmp, xtmp);
6608 } else {
6609 movdq(xtmp, val);
6610 punpcklqdq(xtmp, xtmp);
6611 }
6612 jmp(L_zero_64_bytes);
6613
6614 BIND(L_loop);
6615 if (MaxVectorSize >= 32) {
6616 fill64(base, 0, xtmp, use64byteVector);
6617 } else {
6618 movdqu(Address(base, 0), xtmp);
6619 movdqu(Address(base, 16), xtmp);
6620 movdqu(Address(base, 32), xtmp);
6621 movdqu(Address(base, 48), xtmp);
6622 }
6623 addptr(base, 64);
6624
6625 BIND(L_zero_64_bytes);
6626 subptr(cnt, 8);
6627 jccb(Assembler::greaterEqual, L_loop);
6628
6629 // Copy trailing 64 bytes
6630 if (use64byteVector) {
6631 addptr(cnt, 8);
6632 jccb(Assembler::equal, L_end);
6633 fill64_masked(3, base, 0, xtmp, mask, cnt, val, true);
6634 jmp(L_end);
6635 } else {
6636 addptr(cnt, 4);
6637 jccb(Assembler::less, L_tail);
6638 if (MaxVectorSize >= 32) {
6639 vmovdqu(Address(base, 0), xtmp);
6640 } else {
6641 movdqu(Address(base, 0), xtmp);
6642 movdqu(Address(base, 16), xtmp);
6643 }
6644 }
6645 addptr(base, 32);
6646 subptr(cnt, 4);
6647
6648 BIND(L_tail);
6649 addptr(cnt, 4);
6650 jccb(Assembler::lessEqual, L_end);
6651 if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
6652 fill32_masked(3, base, 0, xtmp, mask, cnt, val);
6653 } else {
6654 decrement(cnt);
6655
6656 BIND(L_sloop);
6657 movq(Address(base, 0), xtmp);
6658 addptr(base, 8);
6659 decrement(cnt);
6660 jccb(Assembler::greaterEqual, L_sloop);
6661 }
6662 BIND(L_end);
6663 }
6664
6665 // Clearing constant sized memory using YMM/ZMM registers.
6666 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
6667 assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
6668 bool use64byteVector = (MaxVectorSize > 32) && (VM_Version::avx3_threshold() == 0);
6669
6670 int vector64_count = (cnt & (~0x7)) >> 3;
6671 cnt = cnt & 0x7;
6672 const int fill64_per_loop = 4;
6734 break;
6735 case 7:
6736 if (use64byteVector) {
6737 movl(rtmp, 0x7F);
6738 kmovwl(mask, rtmp);
6739 evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
6740 } else {
6741 evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
6742 movl(rtmp, 0x7);
6743 kmovwl(mask, rtmp);
6744 evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
6745 }
6746 break;
6747 default:
6748 fatal("Unexpected length : %d\n",cnt);
6749 break;
6750 }
6751 }
6752 }
6753
6754 void MacroAssembler::clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp,
6755 bool is_large, bool word_copy_only, KRegister mask) {
6756 // cnt - number of qwords (8-byte words).
6757 // base - start address, qword aligned.
6758 // is_large - if optimizers know cnt is larger than InitArrayShortSize
6759 assert(base==rdi, "base register must be edi for rep stos");
6760 assert(val==rax, "val register must be eax for rep stos");
6761 assert(cnt==rcx, "cnt register must be ecx for rep stos");
6762 assert(InitArrayShortSize % BytesPerLong == 0,
6763 "InitArrayShortSize should be the multiple of BytesPerLong");
6764
6765 Label DONE;
6766
6767 if (!is_large) {
6768 Label LOOP, LONG;
6769 cmpptr(cnt, InitArrayShortSize/BytesPerLong);
6770 jccb(Assembler::greater, LONG);
6771
6772 decrement(cnt);
6773 jccb(Assembler::negative, DONE); // Zero length
6774
6775 // Use individual pointer-sized stores for small counts:
6776 BIND(LOOP);
6777 movptr(Address(base, cnt, Address::times_ptr), val);
6778 decrement(cnt);
6779 jccb(Assembler::greaterEqual, LOOP);
6780 jmpb(DONE);
6781
6782 BIND(LONG);
6783 }
6784
6785 // Use longer rep-prefixed ops for non-small counts:
6786 if (UseFastStosb && !word_copy_only) {
6787 shlptr(cnt, 3); // convert to number of bytes
6788 rep_stosb();
6789 } else if (UseXMMForObjInit) {
6790 xmm_clear_mem(base, cnt, val, xtmp, mask);
6791 } else {
6792 rep_stos();
6793 }
6794
6795 BIND(DONE);
6796 }
6797
6798 #endif //COMPILER2_OR_JVMCI
6799
6800
6801 void MacroAssembler::generate_fill(BasicType t, bool aligned,
6802 Register to, Register value, Register count,
6803 Register rtmp, XMMRegister xtmp) {
6804 ShortBranchVerifier sbv(this);
6805 assert_different_registers(to, value, count, rtmp);
6806 Label L_exit;
6807 Label L_fill_2_bytes, L_fill_4_bytes;
6808
6809 #if defined(COMPILER2)
6810 if(MaxVectorSize >=32 &&
10690
10691 // Load top.
10692 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10693
10694 // Check if the lock-stack is full.
10695 cmpl(top, LockStack::end_offset());
10696 jcc(Assembler::greaterEqual, slow);
10697
10698 // Check for recursion.
10699 cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
10700 jcc(Assembler::equal, push);
10701
10702 // Check header for monitor (0b10).
10703 testptr(reg_rax, markWord::monitor_value);
10704 jcc(Assembler::notZero, slow);
10705
10706 // Try to lock. Transition lock bits 0b01 => 0b00
10707 movptr(tmp, reg_rax);
10708 andptr(tmp, ~(int32_t)markWord::unlocked_value);
10709 orptr(reg_rax, markWord::unlocked_value);
10710 // Mask inline_type bit such that we go to the slow path if object is an inline type
10711 andptr(reg_rax, ~((int) markWord::inline_type_bit_in_place));
10712
10713 lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
10714 jcc(Assembler::notEqual, slow);
10715
10716 // Restore top, CAS clobbers register.
10717 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10718
10719 bind(push);
10720 // After successful lock, push object on lock-stack.
10721 movptr(Address(thread, top), obj);
10722 incrementl(top, oopSize);
10723 movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
10724 }
10725
10726 // Implements fast-unlocking.
10727 //
10728 // obj: the object to be unlocked
10729 // reg_rax: rax
10730 // thread: the thread
10731 // tmp: a temporary register
10732 void MacroAssembler::fast_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {
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