11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/assembler.hpp"
26 #include "asm/assembler.inline.hpp"
27 #include "code/aotCodeCache.hpp"
28 #include "code/compiledIC.hpp"
29 #include "compiler/compiler_globals.hpp"
30 #include "compiler/disassembler.hpp"
31 #include "crc32c.h"
32 #include "gc/shared/barrierSet.hpp"
33 #include "gc/shared/barrierSetAssembler.hpp"
34 #include "gc/shared/collectedHeap.inline.hpp"
35 #include "gc/shared/tlab_globals.hpp"
36 #include "interpreter/bytecodeHistogram.hpp"
37 #include "interpreter/interpreter.hpp"
38 #include "interpreter/interpreterRuntime.hpp"
39 #include "jvm.h"
40 #include "memory/resourceArea.hpp"
41 #include "memory/universe.hpp"
42 #include "oops/accessDecorators.hpp"
43 #include "oops/compressedKlass.inline.hpp"
44 #include "oops/compressedOops.inline.hpp"
45 #include "oops/klass.inline.hpp"
46 #include "prims/methodHandles.hpp"
47 #include "runtime/continuation.hpp"
48 #include "runtime/interfaceSupport.inline.hpp"
49 #include "runtime/javaThread.hpp"
50 #include "runtime/jniHandles.hpp"
51 #include "runtime/objectMonitor.hpp"
52 #include "runtime/os.hpp"
53 #include "runtime/safepoint.hpp"
54 #include "runtime/safepointMechanism.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/checkedCast.hpp"
58 #include "utilities/globalDefinitions.hpp"
59 #include "utilities/macros.hpp"
60
61 #ifdef PRODUCT
62 #define BLOCK_COMMENT(str) /* nothing */
63 #define STOP(error) stop(error)
64 #else
65 #define BLOCK_COMMENT(str) block_comment(str)
66 #define STOP(error) block_comment(error); stop(error)
67 #endif
68
69 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
70
71 #ifdef ASSERT
72 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
73 #endif
74
75 static const Assembler::Condition reverse[] = {
76 Assembler::noOverflow /* overflow = 0x0 */ ,
77 Assembler::overflow /* noOverflow = 0x1 */ ,
78 Assembler::aboveEqual /* carrySet = 0x2, below = 0x2 */ ,
79 Assembler::below /* aboveEqual = 0x3, carryClear = 0x3 */ ,
1285 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1286 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1287 assert_different_registers(arg_1, c_rarg2);
1288 pass_arg2(this, arg_2);
1289 pass_arg1(this, arg_1);
1290 pass_arg0(this, arg_0);
1291 call_VM_leaf(entry_point, 3);
1292 }
1293
1294 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
1295 assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
1296 assert_different_registers(arg_1, c_rarg2, c_rarg3);
1297 assert_different_registers(arg_2, c_rarg3);
1298 pass_arg3(this, arg_3);
1299 pass_arg2(this, arg_2);
1300 pass_arg1(this, arg_1);
1301 pass_arg0(this, arg_0);
1302 call_VM_leaf(entry_point, 3);
1303 }
1304
1305 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
1306 pass_arg0(this, arg_0);
1307 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1308 }
1309
1310 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
1311 assert_different_registers(arg_0, c_rarg1);
1312 pass_arg1(this, arg_1);
1313 pass_arg0(this, arg_0);
1314 MacroAssembler::call_VM_leaf_base(entry_point, 2);
1315 }
1316
1317 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1318 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1319 assert_different_registers(arg_1, c_rarg2);
1320 pass_arg2(this, arg_2);
1321 pass_arg1(this, arg_1);
1322 pass_arg0(this, arg_0);
1323 MacroAssembler::call_VM_leaf_base(entry_point, 3);
1324 }
2376 lea(rscratch, src);
2377 Assembler::mulss(dst, Address(rscratch, 0));
2378 }
2379 }
2380
2381 void MacroAssembler::null_check(Register reg, int offset) {
2382 if (needs_explicit_null_check(offset)) {
2383 // provoke OS null exception if reg is null by
2384 // accessing M[reg] w/o changing any (non-CC) registers
2385 // NOTE: cmpl is plenty here to provoke a segv
2386 cmpptr(rax, Address(reg, 0));
2387 // Note: should probably use testl(rax, Address(reg, 0));
2388 // may be shorter code (however, this version of
2389 // testl needs to be implemented first)
2390 } else {
2391 // nothing to do, (later) access of M[reg + offset]
2392 // will provoke OS null exception if reg is null
2393 }
2394 }
2395
2396 void MacroAssembler::os_breakpoint() {
2397 // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
2398 // (e.g., MSVC can't call ps() otherwise)
2399 call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
2400 }
2401
2402 void MacroAssembler::unimplemented(const char* what) {
2403 const char* buf = nullptr;
2404 {
2405 ResourceMark rm;
2406 stringStream ss;
2407 ss.print("unimplemented: %s", what);
2408 buf = code_string(ss.as_string());
2409 }
2410 stop(buf);
2411 }
2412
2413 #define XSTATE_BV 0x200
2414
2415 void MacroAssembler::pop_CPU_state() {
3716 xorptr(temp, temp); // use _zero reg to clear memory (shorter code)
3717 if (UseIncDec) {
3718 shrptr(index, 3); // divide by 8/16 and set carry flag if bit 2 was set
3719 } else {
3720 shrptr(index, 2); // use 2 instructions to avoid partial flag stall
3721 shrptr(index, 1);
3722 }
3723
3724 // initialize remaining object fields: index is a multiple of 2 now
3725 {
3726 Label loop;
3727 bind(loop);
3728 movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
3729 decrement(index);
3730 jcc(Assembler::notZero, loop);
3731 }
3732
3733 bind(done);
3734 }
3735
3736 // Look up the method for a megamorphic invokeinterface call.
3737 // The target method is determined by <intf_klass, itable_index>.
3738 // The receiver klass is in recv_klass.
3739 // On success, the result will be in method_result, and execution falls through.
3740 // On failure, execution transfers to the given label.
3741 void MacroAssembler::lookup_interface_method(Register recv_klass,
3742 Register intf_klass,
3743 RegisterOrConstant itable_index,
3744 Register method_result,
3745 Register scan_temp,
3746 Label& L_no_such_interface,
3747 bool return_method) {
3748 assert_different_registers(recv_klass, intf_klass, scan_temp);
3749 assert_different_registers(method_result, intf_klass, scan_temp);
3750 assert(recv_klass != method_result || !return_method,
3751 "recv_klass can be destroyed when method isn't needed");
3752
3753 assert(itable_index.is_constant() || itable_index.as_register() == method_result,
3754 "caller must use same register for non-constant itable index as for method");
3755
4766 } else {
4767 Label L;
4768 jccb(negate_condition(cc), L);
4769 movl(dst, src);
4770 bind(L);
4771 }
4772 }
4773
4774 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
4775 if (VM_Version::supports_cmov()) {
4776 cmovl(cc, dst, src);
4777 } else {
4778 Label L;
4779 jccb(negate_condition(cc), L);
4780 movl(dst, src);
4781 bind(L);
4782 }
4783 }
4784
4785 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
4786 if (!VerifyOops) return;
4787
4788 BLOCK_COMMENT("verify_oop {");
4789 push(rscratch1);
4790 push(rax); // save rax
4791 push(reg); // pass register argument
4792
4793 // Pass register number to verify_oop_subroutine
4794 const char* b = nullptr;
4795 {
4796 ResourceMark rm;
4797 stringStream ss;
4798 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
4799 b = code_string(ss.as_string());
4800 }
4801 AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
4802 pushptr(buffer.addr(), rscratch1);
4803
4804 // call indirectly to solve generation ordering problem
4805 movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
4806 call(rax);
5019 } else {
5020 pop(rax);
5021 }
5022
5023 // CAS success means the slot now has the receiver we want. CAS failure means
5024 // something had claimed the slot concurrently: it can be the same receiver we want,
5025 // or something else. Since this is a slow path, we can optimize for code density,
5026 // and just restart the search from the beginning.
5027 jmpb(L_restart);
5028
5029 // Found a receiver, convert its slot offset to corresponding count offset.
5030 bind(L_found_recv);
5031 addptr(offset, receiver_to_count_step);
5032
5033 // Finally, update the counter
5034 bind(L_count_update);
5035 addptr(Address(mdp, offset, Address::times_ptr), DataLayout::counter_increment);
5036 }
5037
5038 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
5039 if (!VerifyOops) return;
5040
5041 push(rscratch1);
5042 push(rax); // save rax,
5043 // addr may contain rsp so we will have to adjust it based on the push
5044 // we just did (and on 64 bit we do two pushes)
5045 // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
5046 // stores rax into addr which is backwards of what was intended.
5047 if (addr.uses(rsp)) {
5048 lea(rax, addr);
5049 pushptr(Address(rax, 2 * BytesPerWord));
5050 } else {
5051 pushptr(addr);
5052 }
5053
5054 // Pass register number to verify_oop_subroutine
5055 const char* b = nullptr;
5056 {
5057 ResourceMark rm;
5058 stringStream ss;
5059 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
5411
5412 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
5413 // get mirror
5414 const int mirror_offset = in_bytes(Klass::java_mirror_offset());
5415 load_method_holder(mirror, method);
5416 movptr(mirror, Address(mirror, mirror_offset));
5417 resolve_oop_handle(mirror, tmp);
5418 }
5419
5420 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5421 load_method_holder(rresult, rmethod);
5422 movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5423 }
5424
5425 void MacroAssembler::load_method_holder(Register holder, Register method) {
5426 movptr(holder, Address(method, Method::const_offset())); // ConstMethod*
5427 movptr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5428 movptr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5429 }
5430
5431 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5432 assert(UseCompactObjectHeaders, "expect compact object headers");
5433 movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5434 shrq(dst, markWord::klass_shift);
5435 }
5436
5437 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
5438 assert_different_registers(src, tmp);
5439 assert_different_registers(dst, tmp);
5440
5441 if (UseCompactObjectHeaders) {
5442 load_narrow_klass_compact(dst, src);
5443 decode_klass_not_null(dst, tmp);
5444 } else {
5445 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5446 decode_klass_not_null(dst, tmp);
5447 }
5448 }
5449
5450 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
5451 assert(!UseCompactObjectHeaders, "not with compact headers");
5452 assert_different_registers(src, tmp);
5453 assert_different_registers(dst, tmp);
5454 encode_klass_not_null(src, tmp);
5455 movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5456 }
5457
5458 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
5459 if (UseCompactObjectHeaders) {
5460 assert(tmp != noreg, "need tmp");
5461 assert_different_registers(klass, obj, tmp);
5462 load_narrow_klass_compact(tmp, obj);
5463 cmpl(klass, tmp);
5464 } else {
5465 cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
5466 }
5467 }
5468
5469 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5486 bool as_raw = (decorators & AS_RAW) != 0;
5487 if (as_raw) {
5488 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
5489 } else {
5490 bs->load_at(this, decorators, type, dst, src, tmp1);
5491 }
5492 }
5493
5494 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
5495 Register tmp1, Register tmp2, Register tmp3) {
5496 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5497 decorators = AccessInternal::decorator_fixup(decorators, type);
5498 bool as_raw = (decorators & AS_RAW) != 0;
5499 if (as_raw) {
5500 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5501 } else {
5502 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5503 }
5504 }
5505
5506 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5507 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
5508 }
5509
5510 // Doesn't do verification, generates fixed size code
5511 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5512 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
5513 }
5514
5515 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5516 Register tmp2, Register tmp3, DecoratorSet decorators) {
5517 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5518 }
5519
5520 // Used for storing nulls.
5521 void MacroAssembler::store_heap_oop_null(Address dst) {
5522 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5523 }
5524
5525 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5848 assert (oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5849 int klass_index = oop_recorder()->find_index(k);
5850 RelocationHolder rspec = metadata_Relocation::spec(klass_index);
5851 Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
5852 }
5853
5854 void MacroAssembler::reinit_heapbase() {
5855 if (UseCompressedOops) {
5856 if (Universe::heap() != nullptr && !AOTCodeCache::is_on_for_dump()) {
5857 if (CompressedOops::base() == nullptr) {
5858 MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
5859 } else {
5860 mov64(r12_heapbase, (int64_t)CompressedOops::base());
5861 }
5862 } else {
5863 movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
5864 }
5865 }
5866 }
5867
5868 #ifdef COMPILER2
5869
5870 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
5871 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
5872 // cnt - number of qwords (8-byte words).
5873 // base - start address, qword aligned.
5874 Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
5875 bool use64byteVector = (MaxVectorSize == 64) && (CopyAVX3Threshold == 0);
5876 if (use64byteVector) {
5877 vpxor(xtmp, xtmp, xtmp, AVX_512bit);
5878 } else if (MaxVectorSize >= 32) {
5879 vpxor(xtmp, xtmp, xtmp, AVX_256bit);
5880 } else {
5881 pxor(xtmp, xtmp);
5882 }
5883 jmp(L_zero_64_bytes);
5884
5885 BIND(L_loop);
5886 if (MaxVectorSize >= 32) {
5887 fill64(base, 0, xtmp, use64byteVector);
5888 } else {
5889 movdqu(Address(base, 0), xtmp);
5890 movdqu(Address(base, 16), xtmp);
5891 movdqu(Address(base, 32), xtmp);
5892 movdqu(Address(base, 48), xtmp);
5893 }
5894 addptr(base, 64);
5895
5896 BIND(L_zero_64_bytes);
5897 subptr(cnt, 8);
5898 jccb(Assembler::greaterEqual, L_loop);
5899
5900 // Copy trailing 64 bytes
5901 if (use64byteVector) {
5902 addptr(cnt, 8);
5903 jccb(Assembler::equal, L_end);
5904 fill64_masked(3, base, 0, xtmp, mask, cnt, rtmp, true);
5905 jmp(L_end);
5906 } else {
5907 addptr(cnt, 4);
5908 jccb(Assembler::less, L_tail);
5909 if (MaxVectorSize >= 32) {
5910 vmovdqu(Address(base, 0), xtmp);
5911 } else {
5912 movdqu(Address(base, 0), xtmp);
5913 movdqu(Address(base, 16), xtmp);
5914 }
5915 }
5916 addptr(base, 32);
5917 subptr(cnt, 4);
5918
5919 BIND(L_tail);
5920 addptr(cnt, 4);
5921 jccb(Assembler::lessEqual, L_end);
5922 if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
5923 fill32_masked(3, base, 0, xtmp, mask, cnt, rtmp);
5924 } else {
5925 decrement(cnt);
5926
5927 BIND(L_sloop);
5928 movq(Address(base, 0), xtmp);
5929 addptr(base, 8);
5930 decrement(cnt);
5931 jccb(Assembler::greaterEqual, L_sloop);
5932 }
5933 BIND(L_end);
5934 }
5935
5936 // Clearing constant sized memory using YMM/ZMM registers.
5937 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
5938 assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
5939 bool use64byteVector = (MaxVectorSize > 32) && (CopyAVX3Threshold == 0);
5940
5941 int vector64_count = (cnt & (~0x7)) >> 3;
5942 cnt = cnt & 0x7;
5943 const int fill64_per_loop = 4;
6005 break;
6006 case 7:
6007 if (use64byteVector) {
6008 movl(rtmp, 0x7F);
6009 kmovwl(mask, rtmp);
6010 evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
6011 } else {
6012 evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
6013 movl(rtmp, 0x7);
6014 kmovwl(mask, rtmp);
6015 evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
6016 }
6017 break;
6018 default:
6019 fatal("Unexpected length : %d\n",cnt);
6020 break;
6021 }
6022 }
6023 }
6024
6025 void MacroAssembler::clear_mem(Register base, Register cnt, Register tmp, XMMRegister xtmp,
6026 bool is_large, KRegister mask) {
6027 // cnt - number of qwords (8-byte words).
6028 // base - start address, qword aligned.
6029 // is_large - if optimizers know cnt is larger than InitArrayShortSize
6030 assert(base==rdi, "base register must be edi for rep stos");
6031 assert(tmp==rax, "tmp register must be eax for rep stos");
6032 assert(cnt==rcx, "cnt register must be ecx for rep stos");
6033 assert(InitArrayShortSize % BytesPerLong == 0,
6034 "InitArrayShortSize should be the multiple of BytesPerLong");
6035
6036 Label DONE;
6037 if (!is_large || !UseXMMForObjInit) {
6038 xorptr(tmp, tmp);
6039 }
6040
6041 if (!is_large) {
6042 Label LOOP, LONG;
6043 cmpptr(cnt, InitArrayShortSize/BytesPerLong);
6044 jccb(Assembler::greater, LONG);
6045
6046 decrement(cnt);
6047 jccb(Assembler::negative, DONE); // Zero length
6048
6049 // Use individual pointer-sized stores for small counts:
6050 BIND(LOOP);
6051 movptr(Address(base, cnt, Address::times_ptr), tmp);
6052 decrement(cnt);
6053 jccb(Assembler::greaterEqual, LOOP);
6054 jmpb(DONE);
6055
6056 BIND(LONG);
6057 }
6058
6059 // Use longer rep-prefixed ops for non-small counts:
6060 if (UseFastStosb) {
6061 shlptr(cnt, 3); // convert to number of bytes
6062 rep_stosb();
6063 } else if (UseXMMForObjInit) {
6064 xmm_clear_mem(base, cnt, tmp, xtmp, mask);
6065 } else {
6066 rep_stos();
6067 }
6068
6069 BIND(DONE);
6070 }
6071
6072 #endif //COMPILER2
6073
6074
6075 void MacroAssembler::generate_fill(BasicType t, bool aligned,
6076 Register to, Register value, Register count,
6077 Register rtmp, XMMRegister xtmp) {
6078 ShortBranchVerifier sbv(this);
6079 assert_different_registers(to, value, count, rtmp);
6080 Label L_exit;
6081 Label L_fill_2_bytes, L_fill_4_bytes;
6082
6083 #if defined(COMPILER2)
6084 if(MaxVectorSize >=32 &&
9961
9962 // Load top.
9963 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
9964
9965 // Check if the lock-stack is full.
9966 cmpl(top, LockStack::end_offset());
9967 jcc(Assembler::greaterEqual, slow);
9968
9969 // Check for recursion.
9970 cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
9971 jcc(Assembler::equal, push);
9972
9973 // Check header for monitor (0b10).
9974 testptr(reg_rax, markWord::monitor_value);
9975 jcc(Assembler::notZero, slow);
9976
9977 // Try to lock. Transition lock bits 0b01 => 0b00
9978 movptr(tmp, reg_rax);
9979 andptr(tmp, ~(int32_t)markWord::unlocked_value);
9980 orptr(reg_rax, markWord::unlocked_value);
9981 lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
9982 jcc(Assembler::notEqual, slow);
9983
9984 // Restore top, CAS clobbers register.
9985 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
9986
9987 bind(push);
9988 // After successful lock, push object on lock-stack.
9989 movptr(Address(thread, top), obj);
9990 incrementl(top, oopSize);
9991 movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
9992 }
9993
9994 // Implements fast-unlocking.
9995 //
9996 // obj: the object to be unlocked
9997 // reg_rax: rax
9998 // thread: the thread
9999 // tmp: a temporary register
10000 void MacroAssembler::fast_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {
|
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/assembler.hpp"
26 #include "asm/assembler.inline.hpp"
27 #include "code/aotCodeCache.hpp"
28 #include "code/compiledIC.hpp"
29 #include "compiler/compiler_globals.hpp"
30 #include "compiler/disassembler.hpp"
31 #include "ci/ciInlineKlass.hpp"
32 #include "crc32c.h"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/collectedHeap.inline.hpp"
36 #include "gc/shared/tlab_globals.hpp"
37 #include "interpreter/bytecodeHistogram.hpp"
38 #include "interpreter/interpreter.hpp"
39 #include "interpreter/interpreterRuntime.hpp"
40 #include "jvm.h"
41 #include "memory/resourceArea.hpp"
42 #include "memory/universe.hpp"
43 #include "oops/accessDecorators.hpp"
44 #include "oops/compressedKlass.inline.hpp"
45 #include "oops/compressedOops.inline.hpp"
46 #include "oops/klass.inline.hpp"
47 #include "oops/resolvedFieldEntry.hpp"
48 #include "prims/methodHandles.hpp"
49 #include "runtime/arguments.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/interfaceSupport.inline.hpp"
52 #include "runtime/javaThread.hpp"
53 #include "runtime/jniHandles.hpp"
54 #include "runtime/objectMonitor.hpp"
55 #include "runtime/os.hpp"
56 #include "runtime/safepoint.hpp"
57 #include "runtime/safepointMechanism.hpp"
58 #include "runtime/sharedRuntime.hpp"
59 #include "runtime/signature_cc.hpp"
60 #include "runtime/stubRoutines.hpp"
61 #include "utilities/checkedCast.hpp"
62 #include "utilities/globalDefinitions.hpp"
63 #include "utilities/macros.hpp"
64 #include "vmreg_x86.inline.hpp"
65 #ifdef COMPILER2
66 #include "opto/output.hpp"
67 #endif
68
69 #ifdef PRODUCT
70 #define BLOCK_COMMENT(str) /* nothing */
71 #define STOP(error) stop(error)
72 #else
73 #define BLOCK_COMMENT(str) block_comment(str)
74 #define STOP(error) block_comment(error); stop(error)
75 #endif
76
77 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
78
79 #ifdef ASSERT
80 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
81 #endif
82
83 static const Assembler::Condition reverse[] = {
84 Assembler::noOverflow /* overflow = 0x0 */ ,
85 Assembler::overflow /* noOverflow = 0x1 */ ,
86 Assembler::aboveEqual /* carrySet = 0x2, below = 0x2 */ ,
87 Assembler::below /* aboveEqual = 0x3, carryClear = 0x3 */ ,
1293 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1294 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1295 assert_different_registers(arg_1, c_rarg2);
1296 pass_arg2(this, arg_2);
1297 pass_arg1(this, arg_1);
1298 pass_arg0(this, arg_0);
1299 call_VM_leaf(entry_point, 3);
1300 }
1301
1302 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
1303 assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
1304 assert_different_registers(arg_1, c_rarg2, c_rarg3);
1305 assert_different_registers(arg_2, c_rarg3);
1306 pass_arg3(this, arg_3);
1307 pass_arg2(this, arg_2);
1308 pass_arg1(this, arg_1);
1309 pass_arg0(this, arg_0);
1310 call_VM_leaf(entry_point, 3);
1311 }
1312
1313 void MacroAssembler::super_call_VM_leaf(address entry_point) {
1314 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1315 }
1316
1317 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
1318 pass_arg0(this, arg_0);
1319 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1320 }
1321
1322 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
1323 assert_different_registers(arg_0, c_rarg1);
1324 pass_arg1(this, arg_1);
1325 pass_arg0(this, arg_0);
1326 MacroAssembler::call_VM_leaf_base(entry_point, 2);
1327 }
1328
1329 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1330 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1331 assert_different_registers(arg_1, c_rarg2);
1332 pass_arg2(this, arg_2);
1333 pass_arg1(this, arg_1);
1334 pass_arg0(this, arg_0);
1335 MacroAssembler::call_VM_leaf_base(entry_point, 3);
1336 }
2388 lea(rscratch, src);
2389 Assembler::mulss(dst, Address(rscratch, 0));
2390 }
2391 }
2392
2393 void MacroAssembler::null_check(Register reg, int offset) {
2394 if (needs_explicit_null_check(offset)) {
2395 // provoke OS null exception if reg is null by
2396 // accessing M[reg] w/o changing any (non-CC) registers
2397 // NOTE: cmpl is plenty here to provoke a segv
2398 cmpptr(rax, Address(reg, 0));
2399 // Note: should probably use testl(rax, Address(reg, 0));
2400 // may be shorter code (however, this version of
2401 // testl needs to be implemented first)
2402 } else {
2403 // nothing to do, (later) access of M[reg + offset]
2404 // will provoke OS null exception if reg is null
2405 }
2406 }
2407
2408 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2409 andptr(markword, markWord::inline_type_pattern_mask);
2410 cmpptr(markword, markWord::inline_type_pattern);
2411 jcc(Assembler::equal, is_inline_type);
2412 }
2413
2414 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2415 if (can_be_null) {
2416 testptr(object, object);
2417 jcc(Assembler::zero, not_inline_type);
2418 }
2419 const int is_inline_type_mask = markWord::inline_type_pattern;
2420 movptr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2421 andptr(tmp, is_inline_type_mask);
2422 cmpptr(tmp, is_inline_type_mask);
2423 jcc(Assembler::notEqual, not_inline_type);
2424 }
2425
2426 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2427 movl(temp_reg, flags);
2428 testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
2429 jcc(Assembler::notEqual, is_null_free_inline_type);
2430 }
2431
2432 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2433 movl(temp_reg, flags);
2434 testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
2435 jcc(Assembler::equal, not_null_free_inline_type);
2436 }
2437
2438 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2439 movl(temp_reg, flags);
2440 testl(temp_reg, 1 << ResolvedFieldEntry::is_flat_shift);
2441 jcc(Assembler::notEqual, is_flat);
2442 }
2443
2444 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2445 Label test_mark_word;
2446 // load mark word
2447 movptr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2448 // check displaced
2449 testl(temp_reg, markWord::unlocked_value);
2450 jccb(Assembler::notZero, test_mark_word);
2451 // slow path use klass prototype
2452 push(rscratch1);
2453 load_prototype_header(temp_reg, oop, rscratch1);
2454 pop(rscratch1);
2455
2456 bind(test_mark_word);
2457 testl(temp_reg, test_bit);
2458 jcc((jmp_set) ? Assembler::notZero : Assembler::zero, jmp_label);
2459 }
2460
2461 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg,
2462 Label& is_flat_array) {
2463 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2464 }
2465
2466 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2467 Label& is_non_flat_array) {
2468 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2469 }
2470
2471 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label&is_null_free_array) {
2472 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2473 }
2474
2475 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2476 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2477 }
2478
2479 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2480 testl(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2481 jcc(Assembler::notZero, is_flat_array);
2482 }
2483
2484 void MacroAssembler::os_breakpoint() {
2485 // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
2486 // (e.g., MSVC can't call ps() otherwise)
2487 call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
2488 }
2489
2490 void MacroAssembler::unimplemented(const char* what) {
2491 const char* buf = nullptr;
2492 {
2493 ResourceMark rm;
2494 stringStream ss;
2495 ss.print("unimplemented: %s", what);
2496 buf = code_string(ss.as_string());
2497 }
2498 stop(buf);
2499 }
2500
2501 #define XSTATE_BV 0x200
2502
2503 void MacroAssembler::pop_CPU_state() {
3804 xorptr(temp, temp); // use _zero reg to clear memory (shorter code)
3805 if (UseIncDec) {
3806 shrptr(index, 3); // divide by 8/16 and set carry flag if bit 2 was set
3807 } else {
3808 shrptr(index, 2); // use 2 instructions to avoid partial flag stall
3809 shrptr(index, 1);
3810 }
3811
3812 // initialize remaining object fields: index is a multiple of 2 now
3813 {
3814 Label loop;
3815 bind(loop);
3816 movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
3817 decrement(index);
3818 jcc(Assembler::notZero, loop);
3819 }
3820
3821 bind(done);
3822 }
3823
3824 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
3825 movptr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
3826 #ifdef ASSERT
3827 {
3828 Label done;
3829 cmpptr(layout_info, 0);
3830 jcc(Assembler::notEqual, done);
3831 stop("inline_layout_info_array is null");
3832 bind(done);
3833 }
3834 #endif
3835
3836 InlineLayoutInfo array[2];
3837 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
3838 if (is_power_of_2(size)) {
3839 shll(index, log2i_exact(size)); // Scale index by power of 2
3840 } else {
3841 imull(index, index, size); // Scale the index to be the entry index * array_element_size
3842 }
3843 lea(layout_info, Address(layout_info, index, Address::times_1, Array<InlineLayoutInfo>::base_offset_in_bytes()));
3844 }
3845
3846 // Look up the method for a megamorphic invokeinterface call.
3847 // The target method is determined by <intf_klass, itable_index>.
3848 // The receiver klass is in recv_klass.
3849 // On success, the result will be in method_result, and execution falls through.
3850 // On failure, execution transfers to the given label.
3851 void MacroAssembler::lookup_interface_method(Register recv_klass,
3852 Register intf_klass,
3853 RegisterOrConstant itable_index,
3854 Register method_result,
3855 Register scan_temp,
3856 Label& L_no_such_interface,
3857 bool return_method) {
3858 assert_different_registers(recv_klass, intf_klass, scan_temp);
3859 assert_different_registers(method_result, intf_klass, scan_temp);
3860 assert(recv_klass != method_result || !return_method,
3861 "recv_klass can be destroyed when method isn't needed");
3862
3863 assert(itable_index.is_constant() || itable_index.as_register() == method_result,
3864 "caller must use same register for non-constant itable index as for method");
3865
4876 } else {
4877 Label L;
4878 jccb(negate_condition(cc), L);
4879 movl(dst, src);
4880 bind(L);
4881 }
4882 }
4883
4884 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
4885 if (VM_Version::supports_cmov()) {
4886 cmovl(cc, dst, src);
4887 } else {
4888 Label L;
4889 jccb(negate_condition(cc), L);
4890 movl(dst, src);
4891 bind(L);
4892 }
4893 }
4894
4895 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
4896 if (!VerifyOops || VerifyAdapterSharing) {
4897 // Below address of the code string confuses VerifyAdapterSharing
4898 // because it may differ between otherwise equivalent adapters.
4899 return;
4900 }
4901
4902 BLOCK_COMMENT("verify_oop {");
4903 push(rscratch1);
4904 push(rax); // save rax
4905 push(reg); // pass register argument
4906
4907 // Pass register number to verify_oop_subroutine
4908 const char* b = nullptr;
4909 {
4910 ResourceMark rm;
4911 stringStream ss;
4912 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
4913 b = code_string(ss.as_string());
4914 }
4915 AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
4916 pushptr(buffer.addr(), rscratch1);
4917
4918 // call indirectly to solve generation ordering problem
4919 movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
4920 call(rax);
5133 } else {
5134 pop(rax);
5135 }
5136
5137 // CAS success means the slot now has the receiver we want. CAS failure means
5138 // something had claimed the slot concurrently: it can be the same receiver we want,
5139 // or something else. Since this is a slow path, we can optimize for code density,
5140 // and just restart the search from the beginning.
5141 jmpb(L_restart);
5142
5143 // Found a receiver, convert its slot offset to corresponding count offset.
5144 bind(L_found_recv);
5145 addptr(offset, receiver_to_count_step);
5146
5147 // Finally, update the counter
5148 bind(L_count_update);
5149 addptr(Address(mdp, offset, Address::times_ptr), DataLayout::counter_increment);
5150 }
5151
5152 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
5153 if (!VerifyOops || VerifyAdapterSharing) {
5154 // Below address of the code string confuses VerifyAdapterSharing
5155 // because it may differ between otherwise equivalent adapters.
5156 return;
5157 }
5158
5159 push(rscratch1);
5160 push(rax); // save rax,
5161 // addr may contain rsp so we will have to adjust it based on the push
5162 // we just did (and on 64 bit we do two pushes)
5163 // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
5164 // stores rax into addr which is backwards of what was intended.
5165 if (addr.uses(rsp)) {
5166 lea(rax, addr);
5167 pushptr(Address(rax, 2 * BytesPerWord));
5168 } else {
5169 pushptr(addr);
5170 }
5171
5172 // Pass register number to verify_oop_subroutine
5173 const char* b = nullptr;
5174 {
5175 ResourceMark rm;
5176 stringStream ss;
5177 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
5529
5530 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
5531 // get mirror
5532 const int mirror_offset = in_bytes(Klass::java_mirror_offset());
5533 load_method_holder(mirror, method);
5534 movptr(mirror, Address(mirror, mirror_offset));
5535 resolve_oop_handle(mirror, tmp);
5536 }
5537
5538 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5539 load_method_holder(rresult, rmethod);
5540 movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5541 }
5542
5543 void MacroAssembler::load_method_holder(Register holder, Register method) {
5544 movptr(holder, Address(method, Method::const_offset())); // ConstMethod*
5545 movptr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5546 movptr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5547 }
5548
5549 void MacroAssembler::load_metadata(Register dst, Register src) {
5550 if (UseCompactObjectHeaders) {
5551 load_narrow_klass_compact(dst, src);
5552 } else {
5553 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5554 }
5555 }
5556
5557 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5558 assert(UseCompactObjectHeaders, "expect compact object headers");
5559 movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5560 shrq(dst, markWord::klass_shift);
5561 }
5562
5563 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
5564 assert_different_registers(src, tmp);
5565 assert_different_registers(dst, tmp);
5566
5567 if (UseCompactObjectHeaders) {
5568 load_narrow_klass_compact(dst, src);
5569 decode_klass_not_null(dst, tmp);
5570 } else {
5571 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5572 decode_klass_not_null(dst, tmp);
5573 }
5574 }
5575
5576 void MacroAssembler::load_prototype_header(Register dst, Register src, Register tmp) {
5577 load_klass(dst, src, tmp);
5578 movptr(dst, Address(dst, Klass::prototype_header_offset()));
5579 }
5580
5581 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
5582 assert(!UseCompactObjectHeaders, "not with compact headers");
5583 assert_different_registers(src, tmp);
5584 assert_different_registers(dst, tmp);
5585 encode_klass_not_null(src, tmp);
5586 movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5587 }
5588
5589 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
5590 if (UseCompactObjectHeaders) {
5591 assert(tmp != noreg, "need tmp");
5592 assert_different_registers(klass, obj, tmp);
5593 load_narrow_klass_compact(tmp, obj);
5594 cmpl(klass, tmp);
5595 } else {
5596 cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
5597 }
5598 }
5599
5600 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5617 bool as_raw = (decorators & AS_RAW) != 0;
5618 if (as_raw) {
5619 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
5620 } else {
5621 bs->load_at(this, decorators, type, dst, src, tmp1);
5622 }
5623 }
5624
5625 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
5626 Register tmp1, Register tmp2, Register tmp3) {
5627 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5628 decorators = AccessInternal::decorator_fixup(decorators, type);
5629 bool as_raw = (decorators & AS_RAW) != 0;
5630 if (as_raw) {
5631 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5632 } else {
5633 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5634 }
5635 }
5636
5637 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5638 Register inline_layout_info) {
5639 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5640 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5641 }
5642
5643 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5644 movptr(offset, Address(inline_klass, InlineKlass::adr_members_offset()));
5645 movl(offset, Address(offset, InlineKlass::payload_offset_offset()));
5646 }
5647
5648 void MacroAssembler::payload_addr(Register oop, Register data, Register inline_klass) {
5649 // ((address) (void*) o) + vk->payload_offset();
5650 Register offset = (data == oop) ? rscratch1 : data;
5651 payload_offset(inline_klass, offset);
5652 if (data == oop) {
5653 addptr(data, offset);
5654 } else {
5655 lea(data, Address(oop, offset));
5656 }
5657 }
5658
5659 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5660 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
5661 }
5662
5663 // Doesn't do verification, generates fixed size code
5664 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5665 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
5666 }
5667
5668 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5669 Register tmp2, Register tmp3, DecoratorSet decorators) {
5670 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5671 }
5672
5673 // Used for storing nulls.
5674 void MacroAssembler::store_heap_oop_null(Address dst) {
5675 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5676 }
5677
5678 void MacroAssembler::store_klass_gap(Register dst, Register src) {
6001 assert (oop_recorder() != nullptr, "this assembler needs an OopRecorder");
6002 int klass_index = oop_recorder()->find_index(k);
6003 RelocationHolder rspec = metadata_Relocation::spec(klass_index);
6004 Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
6005 }
6006
6007 void MacroAssembler::reinit_heapbase() {
6008 if (UseCompressedOops) {
6009 if (Universe::heap() != nullptr && !AOTCodeCache::is_on_for_dump()) {
6010 if (CompressedOops::base() == nullptr) {
6011 MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
6012 } else {
6013 mov64(r12_heapbase, (int64_t)CompressedOops::base());
6014 }
6015 } else {
6016 movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
6017 }
6018 }
6019 }
6020
6021 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
6022 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
6023 // An inline type might be returned. If fields are in registers we
6024 // need to allocate an inline type instance and initialize it with
6025 // the value of the fields.
6026 Label skip;
6027 // We only need a new buffered inline type if a new one is not returned
6028 testptr(rax, 1);
6029 jcc(Assembler::zero, skip);
6030 int call_offset = -1;
6031
6032 // The following code is similar to allocation code in TemplateTable::_new but has some slight differences,
6033 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
6034 // allocating is not necessary if vk != nullptr, etc.
6035 Label slow_case;
6036 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
6037 mov(rscratch1, rax); // save rax for slow_case since *_allocate may corrupt it when allocation failed
6038 if (vk != nullptr) {
6039 // Called from C1, where the return type is statically known.
6040 movptr(rbx, (intptr_t)vk->get_InlineKlass());
6041 jint lh = vk->layout_helper();
6042 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
6043 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
6044 tlab_allocate(rax, noreg, lh, r13, r14, slow_case);
6045 } else {
6046 jmp(slow_case);
6047 }
6048 } else {
6049 // Call from interpreter. RAX contains ((the InlineKlass* of the return type) | 0x01)
6050 mov(rbx, rax);
6051 andptr(rbx, -2);
6052 if (UseTLAB) {
6053 movl(r14, Address(rbx, Klass::layout_helper_offset()));
6054 testl(r14, Klass::_lh_instance_slow_path_bit);
6055 jcc(Assembler::notZero, slow_case);
6056 tlab_allocate(rax, r14, 0, r13, r14, slow_case);
6057 } else {
6058 jmp(slow_case);
6059 }
6060 }
6061 if (UseTLAB) {
6062 // 2. Initialize buffered inline instance header
6063 Register buffer_obj = rax;
6064 Register klass = rbx;
6065 if (UseCompactObjectHeaders) {
6066 Register mark_word = r13;
6067 movptr(mark_word, Address(klass, Klass::prototype_header_offset()));
6068 movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes()), mark_word);
6069 } else {
6070 movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes()), (intptr_t)markWord::inline_type_prototype().value());
6071 xorl(r13, r13);
6072 store_klass_gap(buffer_obj, r13);
6073 if (vk == nullptr) {
6074 // store_klass corrupts rbx(klass), so save it in r13 for later use (interpreter case only).
6075 mov(r13, klass);
6076 }
6077 store_klass(buffer_obj, klass, rscratch1);
6078 klass = r13;
6079 }
6080 // 3. Initialize its fields with an inline class specific handler
6081 if (vk != nullptr) {
6082 call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
6083 } else {
6084 movptr(rbx, Address(klass, InlineKlass::adr_members_offset()));
6085 movptr(rbx, Address(rbx, InlineKlass::pack_handler_offset()));
6086 call(rbx);
6087 }
6088 jmp(skip);
6089 }
6090 bind(slow_case);
6091 // We failed to allocate a new inline type, fall back to a runtime
6092 // call. Some oop field may be live in some registers but we can't
6093 // tell. That runtime call will take care of preserving them
6094 // across a GC if there's one.
6095 mov(rax, rscratch1);
6096
6097 if (from_interpreter) {
6098 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
6099 } else {
6100 call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
6101 call_offset = offset();
6102 }
6103
6104 bind(skip);
6105 return call_offset;
6106 }
6107
6108 // Move a value between registers/stack slots and update the reg_state
6109 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
6110 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
6111 if (reg_state[to->value()] == reg_written) {
6112 return true; // Already written
6113 }
6114 if (from != to && bt != T_VOID) {
6115 if (reg_state[to->value()] == reg_readonly) {
6116 return false; // Not yet writable
6117 }
6118 if (from->is_reg()) {
6119 if (to->is_reg()) {
6120 if (from->is_XMMRegister()) {
6121 if (bt == T_DOUBLE) {
6122 movdbl(to->as_XMMRegister(), from->as_XMMRegister());
6123 } else {
6124 assert(bt == T_FLOAT, "must be float");
6125 movflt(to->as_XMMRegister(), from->as_XMMRegister());
6126 }
6127 } else {
6128 movq(to->as_Register(), from->as_Register());
6129 }
6130 } else {
6131 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6132 Address to_addr = Address(rsp, st_off);
6133 if (from->is_XMMRegister()) {
6134 if (bt == T_DOUBLE) {
6135 movdbl(to_addr, from->as_XMMRegister());
6136 } else {
6137 assert(bt == T_FLOAT, "must be float");
6138 movflt(to_addr, from->as_XMMRegister());
6139 }
6140 } else {
6141 movq(to_addr, from->as_Register());
6142 }
6143 }
6144 } else {
6145 Address from_addr = Address(rsp, from->reg2stack() * VMRegImpl::stack_slot_size + wordSize);
6146 if (to->is_reg()) {
6147 if (to->is_XMMRegister()) {
6148 if (bt == T_DOUBLE) {
6149 movdbl(to->as_XMMRegister(), from_addr);
6150 } else {
6151 assert(bt == T_FLOAT, "must be float");
6152 movflt(to->as_XMMRegister(), from_addr);
6153 }
6154 } else {
6155 movq(to->as_Register(), from_addr);
6156 }
6157 } else {
6158 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6159 movq(r13, from_addr);
6160 movq(Address(rsp, st_off), r13);
6161 }
6162 }
6163 }
6164 // Update register states
6165 reg_state[from->value()] = reg_writable;
6166 reg_state[to->value()] = reg_written;
6167 return true;
6168 }
6169
6170 // Calculate the extra stack space required for packing or unpacking inline
6171 // args and adjust the stack pointer (see MacroAssembler::remove_frame).
6172 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
6173 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
6174 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
6175 assert(sp_inc > 0, "sanity");
6176 // Two additional slots to account for return address
6177 sp_inc += 2 * VMRegImpl::stack_slot_size;
6178
6179 push(rbp);
6180 subptr(rsp, sp_inc);
6181 #ifdef ASSERT
6182 movl(Address(rsp, 0), badRegWordVal);
6183 movl(Address(rsp, VMRegImpl::stack_slot_size), badRegWordVal);
6184 #endif
6185 return sp_inc + wordSize; // account for rbp space
6186 }
6187
6188 // Read all fields from an inline type buffer and store the field values in registers/stack slots.
6189 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
6190 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
6191 RegState reg_state[]) {
6192 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
6193 assert(from->is_valid(), "source must be valid");
6194 bool progress = false;
6195 #ifdef ASSERT
6196 const int start_offset = offset();
6197 #endif
6198
6199 Label L_null, L_notNull;
6200 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
6201 Register tmp1 = r10;
6202 Register tmp2 = r13;
6203 Register fromReg = noreg;
6204 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
6205 bool done = true;
6206 bool mark_done = true;
6207 VMReg toReg;
6208 BasicType bt;
6209 // Check if argument requires a null check
6210 bool null_check = false;
6211 VMReg nullCheckReg;
6212 while (stream.next(nullCheckReg, bt)) {
6213 if (sig->at(stream.sig_index())._offset == -1) {
6214 null_check = true;
6215 break;
6216 }
6217 }
6218 stream.reset(sig_index, to_index);
6219 while (stream.next(toReg, bt)) {
6220 assert(toReg->is_valid(), "destination must be valid");
6221 int idx = (int)toReg->value();
6222 if (reg_state[idx] == reg_readonly) {
6223 if (idx != from->value()) {
6224 mark_done = false;
6225 }
6226 done = false;
6227 continue;
6228 } else if (reg_state[idx] == reg_written) {
6229 continue;
6230 }
6231 assert(reg_state[idx] == reg_writable, "must be writable");
6232 reg_state[idx] = reg_written;
6233 progress = true;
6234
6235 if (fromReg == noreg) {
6236 if (from->is_reg()) {
6237 fromReg = from->as_Register();
6238 } else {
6239 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6240 movq(tmp1, Address(rsp, st_off));
6241 fromReg = tmp1;
6242 }
6243 if (null_check) {
6244 // Nullable inline type argument, emit null check
6245 testptr(fromReg, fromReg);
6246 jcc(Assembler::zero, L_null);
6247 }
6248 }
6249 int off = sig->at(stream.sig_index())._offset;
6250 if (off == -1) {
6251 assert(null_check, "Missing null check at");
6252 if (toReg->is_stack()) {
6253 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6254 movq(Address(rsp, st_off), 1);
6255 } else {
6256 movq(toReg->as_Register(), 1);
6257 }
6258 continue;
6259 }
6260 if (sig->at(stream.sig_index())._vt_oop) {
6261 if (toReg->is_stack()) {
6262 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6263 movq(Address(rsp, st_off), fromReg);
6264 } else {
6265 movq(toReg->as_Register(), fromReg);
6266 }
6267 continue;
6268 }
6269 assert(off > 0, "offset in object should be positive");
6270 Address fromAddr = Address(fromReg, off);
6271 if (!toReg->is_XMMRegister()) {
6272 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
6273 if (is_reference_type(bt)) {
6274 load_heap_oop(dst, fromAddr);
6275 } else {
6276 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
6277 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
6278 }
6279 if (toReg->is_stack()) {
6280 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6281 movq(Address(rsp, st_off), dst);
6282 }
6283 } else if (bt == T_DOUBLE) {
6284 movdbl(toReg->as_XMMRegister(), fromAddr);
6285 } else {
6286 assert(bt == T_FLOAT, "must be float");
6287 movflt(toReg->as_XMMRegister(), fromAddr);
6288 }
6289 }
6290 if (progress && null_check) {
6291 if (done) {
6292 jmp(L_notNull);
6293 bind(L_null);
6294 // Set null marker to zero to signal that the argument is null.
6295 // Also set all fields to zero since the runtime requires a canonical
6296 // representation of a flat null.
6297 stream.reset(sig_index, to_index);
6298 while (stream.next(toReg, bt)) {
6299 if (toReg->is_stack()) {
6300 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6301 movq(Address(rsp, st_off), 0);
6302 } else if (toReg->is_XMMRegister()) {
6303 xorps(toReg->as_XMMRegister(), toReg->as_XMMRegister());
6304 } else {
6305 xorl(toReg->as_Register(), toReg->as_Register());
6306 }
6307 }
6308 bind(L_notNull);
6309 } else {
6310 bind(L_null);
6311 }
6312 }
6313
6314 sig_index = stream.sig_index();
6315 to_index = stream.regs_index();
6316
6317 if (mark_done && reg_state[from->value()] != reg_written) {
6318 // This is okay because no one else will write to that slot
6319 reg_state[from->value()] = reg_writable;
6320 }
6321 from_index--;
6322 assert(progress || (start_offset == offset()), "should not emit code");
6323 return done;
6324 }
6325
6326 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
6327 VMRegPair* from, int from_count, int& from_index, VMReg to,
6328 RegState reg_state[], Register val_array) {
6329 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
6330 assert(to->is_valid(), "destination must be valid");
6331
6332 if (reg_state[to->value()] == reg_written) {
6333 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
6334 return true; // Already written
6335 }
6336
6337 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
6338 Register val_obj_tmp = r11;
6339 Register from_reg_tmp = r14;
6340 Register tmp1 = r10;
6341 Register tmp2 = r13;
6342 Register tmp3 = rbx;
6343 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
6344
6345 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
6346
6347 if (reg_state[to->value()] == reg_readonly) {
6348 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
6349 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
6350 return false; // Not yet writable
6351 }
6352 val_obj = val_obj_tmp;
6353 }
6354
6355 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
6356 VMReg fromReg;
6357 BasicType bt;
6358 Label L_null;
6359 while (stream.next(fromReg, bt)) {
6360 assert(fromReg->is_valid(), "source must be valid");
6361 reg_state[fromReg->value()] = reg_writable;
6362
6363 int off = sig->at(stream.sig_index())._offset;
6364 if (off == -1) {
6365 // Nullable inline type argument, emit null check
6366 Label L_notNull;
6367 if (fromReg->is_stack()) {
6368 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6369 testb(Address(rsp, ld_off), 1);
6370 } else {
6371 testb(fromReg->as_Register(), 1);
6372 }
6373 jcc(Assembler::notZero, L_notNull);
6374 movptr(val_obj, 0);
6375 jmp(L_null);
6376 bind(L_notNull);
6377 continue;
6378 }
6379 if (sig->at(stream.sig_index())._vt_oop) {
6380 // buffer argument: use if non null
6381 if (fromReg->is_stack()) {
6382 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6383 movptr(val_obj, Address(rsp, ld_off));
6384 } else {
6385 movptr(val_obj, fromReg->as_Register());
6386 }
6387 testptr(val_obj, val_obj);
6388 jcc(Assembler::notEqual, L_null);
6389 // otherwise get the buffer from the just allocated pool of buffers
6390 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
6391 load_heap_oop(val_obj, Address(val_array, index));
6392 continue;
6393 }
6394
6395 assert(off > 0, "offset in object should be positive");
6396 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
6397
6398 // Pack the scalarized field into the value object.
6399 Address dst(val_obj, off);
6400 if (!fromReg->is_XMMRegister()) {
6401 Register src;
6402 if (fromReg->is_stack()) {
6403 src = from_reg_tmp;
6404 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6405 load_sized_value(src, Address(rsp, ld_off), size_in_bytes, /* is_signed */ false);
6406 } else {
6407 src = fromReg->as_Register();
6408 }
6409 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
6410 if (is_reference_type(bt)) {
6411 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep val_obj valid.
6412 mov(tmp3, val_obj);
6413 Address dst_with_tmp3(tmp3, off);
6414 store_heap_oop(dst_with_tmp3, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
6415 } else {
6416 store_sized_value(dst, src, size_in_bytes);
6417 }
6418 } else if (bt == T_DOUBLE) {
6419 movdbl(dst, fromReg->as_XMMRegister());
6420 } else {
6421 assert(bt == T_FLOAT, "must be float");
6422 movflt(dst, fromReg->as_XMMRegister());
6423 }
6424 }
6425 bind(L_null);
6426 sig_index = stream.sig_index();
6427 from_index = stream.regs_index();
6428
6429 assert(reg_state[to->value()] == reg_writable, "must have already been read");
6430 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
6431 assert(success, "to register must be writable");
6432 return true;
6433 }
6434
6435 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
6436 return reg->is_XMMRegister() ? xmm8->as_VMReg() : r14->as_VMReg();
6437 }
6438
6439 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6440 assert((initial_framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6441 if (needs_stack_repair) {
6442 // The method has a scalarized entry point (where fields of value object arguments
6443 // are passed through registers and stack), and a non-scalarized entry point (where
6444 // value object arguments are given as oops). The non-scalarized entry point will
6445 // first load each field of value object arguments and store them in registers and on
6446 // the stack in a way compatible with the scalarized entry point. To do so, some extra
6447 // stack space might be reserved (if argument registers are not enough). On leaving the
6448 // method, this space must be freed.
6449 //
6450 // In case we used the non-scalarized entry point the stack looks like this:
6451 //
6452 // | Arguments from caller |
6453 // |---------------------------| <-- caller's SP
6454 // | Return address #1 |
6455 // | Saved RBP #1 |
6456 // |---------------------------|
6457 // | Extension space for |
6458 // | inline arg (un)packing |
6459 // |---------------------------| <-- start of this method's frame
6460 // | Return address #2 |
6461 // | Saved RBP #2 |
6462 // |---------------------------| <-- RBP (with -XX:+PreserveFramePointer)
6463 // | sp_inc |
6464 // | method locals |
6465 // |---------------------------| <-- SP
6466 //
6467 // Space for the return pc and saved rbp is reserved twice. But only the #1 copies
6468 // contain the real values of return pc and saved rbp. The #2 copies are not reliable
6469 // and should not be used. They are mostly needed to add space between the extension
6470 // space and the locals, as there would be between the real arguments and the locals
6471 // if we don't need to do unpacking (from the scalarized entry point).
6472 //
6473 // When leaving, one must load RBP #1 into RBP, and use the copy #1 of the return address,
6474 // while keeping in mind that from the scalarized entry point, there will be only one
6475 // copy. Indeed, in the case we used the scalarized calling convention, the stack looks like this:
6476 //
6477 // | Arguments from caller |
6478 // |---------------------------| <-- caller's SP
6479 // | Return address |
6480 // | Saved RBP |
6481 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6482 // | sp_inc |
6483 // | method locals |
6484 // |---------------------------| <-- SP
6485 //
6486 // The sp_inc stack slot holds the total size of the frame, including the extension
6487 // space and copies #2 of the return address and the saved RBP (but never the copies
6488 // #1 of the return address and saved RBP). That is how to find the copies #1 of the
6489 // return address and saved rbp. This size is expressed in bytes. Be careful when using
6490 // it from C++ in pointer arithmetic you might need to divide it by wordSize.
6491
6492 // The stack increment resides just below the saved rbp
6493 addq(rsp, Address(rsp, initial_framesize - wordSize));
6494 pop(rbp);
6495 } else {
6496 if (initial_framesize > 0) {
6497 addq(rsp, initial_framesize);
6498 }
6499 pop(rbp);
6500 }
6501 }
6502
6503 #ifdef COMPILER2
6504
6505 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
6506 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp, KRegister mask) {
6507 // cnt - number of qwords (8-byte words).
6508 // base - start address, qword aligned.
6509 Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
6510 bool use64byteVector = (MaxVectorSize == 64) && (CopyAVX3Threshold == 0);
6511 if (use64byteVector) {
6512 evpbroadcastq(xtmp, val, AVX_512bit);
6513 } else if (MaxVectorSize >= 32) {
6514 movdq(xtmp, val);
6515 punpcklqdq(xtmp, xtmp);
6516 vinserti128_high(xtmp, xtmp);
6517 } else {
6518 movdq(xtmp, val);
6519 punpcklqdq(xtmp, xtmp);
6520 }
6521 jmp(L_zero_64_bytes);
6522
6523 BIND(L_loop);
6524 if (MaxVectorSize >= 32) {
6525 fill64(base, 0, xtmp, use64byteVector);
6526 } else {
6527 movdqu(Address(base, 0), xtmp);
6528 movdqu(Address(base, 16), xtmp);
6529 movdqu(Address(base, 32), xtmp);
6530 movdqu(Address(base, 48), xtmp);
6531 }
6532 addptr(base, 64);
6533
6534 BIND(L_zero_64_bytes);
6535 subptr(cnt, 8);
6536 jccb(Assembler::greaterEqual, L_loop);
6537
6538 // Copy trailing 64 bytes
6539 if (use64byteVector) {
6540 addptr(cnt, 8);
6541 jccb(Assembler::equal, L_end);
6542 fill64_masked(3, base, 0, xtmp, mask, cnt, val, true);
6543 jmp(L_end);
6544 } else {
6545 addptr(cnt, 4);
6546 jccb(Assembler::less, L_tail);
6547 if (MaxVectorSize >= 32) {
6548 vmovdqu(Address(base, 0), xtmp);
6549 } else {
6550 movdqu(Address(base, 0), xtmp);
6551 movdqu(Address(base, 16), xtmp);
6552 }
6553 }
6554 addptr(base, 32);
6555 subptr(cnt, 4);
6556
6557 BIND(L_tail);
6558 addptr(cnt, 4);
6559 jccb(Assembler::lessEqual, L_end);
6560 if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
6561 fill32_masked(3, base, 0, xtmp, mask, cnt, val);
6562 } else {
6563 decrement(cnt);
6564
6565 BIND(L_sloop);
6566 movq(Address(base, 0), xtmp);
6567 addptr(base, 8);
6568 decrement(cnt);
6569 jccb(Assembler::greaterEqual, L_sloop);
6570 }
6571 BIND(L_end);
6572 }
6573
6574 // Clearing constant sized memory using YMM/ZMM registers.
6575 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
6576 assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
6577 bool use64byteVector = (MaxVectorSize > 32) && (CopyAVX3Threshold == 0);
6578
6579 int vector64_count = (cnt & (~0x7)) >> 3;
6580 cnt = cnt & 0x7;
6581 const int fill64_per_loop = 4;
6643 break;
6644 case 7:
6645 if (use64byteVector) {
6646 movl(rtmp, 0x7F);
6647 kmovwl(mask, rtmp);
6648 evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
6649 } else {
6650 evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
6651 movl(rtmp, 0x7);
6652 kmovwl(mask, rtmp);
6653 evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
6654 }
6655 break;
6656 default:
6657 fatal("Unexpected length : %d\n",cnt);
6658 break;
6659 }
6660 }
6661 }
6662
6663 void MacroAssembler::clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp,
6664 bool is_large, bool word_copy_only, KRegister mask) {
6665 // cnt - number of qwords (8-byte words).
6666 // base - start address, qword aligned.
6667 // is_large - if optimizers know cnt is larger than InitArrayShortSize
6668 assert(base==rdi, "base register must be edi for rep stos");
6669 assert(val==rax, "val register must be eax for rep stos");
6670 assert(cnt==rcx, "cnt register must be ecx for rep stos");
6671 assert(InitArrayShortSize % BytesPerLong == 0,
6672 "InitArrayShortSize should be the multiple of BytesPerLong");
6673
6674 Label DONE;
6675
6676 if (!is_large) {
6677 Label LOOP, LONG;
6678 cmpptr(cnt, InitArrayShortSize/BytesPerLong);
6679 jccb(Assembler::greater, LONG);
6680
6681 decrement(cnt);
6682 jccb(Assembler::negative, DONE); // Zero length
6683
6684 // Use individual pointer-sized stores for small counts:
6685 BIND(LOOP);
6686 movptr(Address(base, cnt, Address::times_ptr), val);
6687 decrement(cnt);
6688 jccb(Assembler::greaterEqual, LOOP);
6689 jmpb(DONE);
6690
6691 BIND(LONG);
6692 }
6693
6694 // Use longer rep-prefixed ops for non-small counts:
6695 if (UseFastStosb && !word_copy_only) {
6696 shlptr(cnt, 3); // convert to number of bytes
6697 rep_stosb();
6698 } else if (UseXMMForObjInit) {
6699 xmm_clear_mem(base, cnt, val, xtmp, mask);
6700 } else {
6701 rep_stos();
6702 }
6703
6704 BIND(DONE);
6705 }
6706
6707 #endif //COMPILER2
6708
6709
6710 void MacroAssembler::generate_fill(BasicType t, bool aligned,
6711 Register to, Register value, Register count,
6712 Register rtmp, XMMRegister xtmp) {
6713 ShortBranchVerifier sbv(this);
6714 assert_different_registers(to, value, count, rtmp);
6715 Label L_exit;
6716 Label L_fill_2_bytes, L_fill_4_bytes;
6717
6718 #if defined(COMPILER2)
6719 if(MaxVectorSize >=32 &&
10596
10597 // Load top.
10598 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10599
10600 // Check if the lock-stack is full.
10601 cmpl(top, LockStack::end_offset());
10602 jcc(Assembler::greaterEqual, slow);
10603
10604 // Check for recursion.
10605 cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
10606 jcc(Assembler::equal, push);
10607
10608 // Check header for monitor (0b10).
10609 testptr(reg_rax, markWord::monitor_value);
10610 jcc(Assembler::notZero, slow);
10611
10612 // Try to lock. Transition lock bits 0b01 => 0b00
10613 movptr(tmp, reg_rax);
10614 andptr(tmp, ~(int32_t)markWord::unlocked_value);
10615 orptr(reg_rax, markWord::unlocked_value);
10616 // Mask inline_type bit such that we go to the slow path if object is an inline type
10617 andptr(reg_rax, ~((int) markWord::inline_type_bit_in_place));
10618
10619 lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
10620 jcc(Assembler::notEqual, slow);
10621
10622 // Restore top, CAS clobbers register.
10623 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10624
10625 bind(push);
10626 // After successful lock, push object on lock-stack.
10627 movptr(Address(thread, top), obj);
10628 incrementl(top, oopSize);
10629 movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
10630 }
10631
10632 // Implements fast-unlocking.
10633 //
10634 // obj: the object to be unlocked
10635 // reg_rax: rax
10636 // thread: the thread
10637 // tmp: a temporary register
10638 void MacroAssembler::fast_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {
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