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src/hotspot/cpu/x86/macroAssembler_x86.cpp

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   11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
   12  * version 2 for more details (a copy is included in the LICENSE file that
   13  * accompanied this code).
   14  *
   15  * You should have received a copy of the GNU General Public License version
   16  * 2 along with this work; if not, write to the Free Software Foundation,
   17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
   18  *
   19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
   20  * or visit www.oracle.com if you need additional information or have any
   21  * questions.
   22  *
   23  */
   24 
   25 #include "asm/assembler.hpp"
   26 #include "asm/assembler.inline.hpp"
   27 #include "code/aotCodeCache.hpp"
   28 #include "code/compiledIC.hpp"
   29 #include "compiler/compiler_globals.hpp"
   30 #include "compiler/disassembler.hpp"

   31 #include "crc32c.h"
   32 #include "gc/shared/barrierSet.hpp"
   33 #include "gc/shared/barrierSetAssembler.hpp"
   34 #include "gc/shared/collectedHeap.inline.hpp"
   35 #include "gc/shared/tlab_globals.hpp"
   36 #include "interpreter/bytecodeHistogram.hpp"
   37 #include "interpreter/interpreter.hpp"
   38 #include "interpreter/interpreterRuntime.hpp"
   39 #include "jvm.h"
   40 #include "memory/resourceArea.hpp"
   41 #include "memory/universe.hpp"
   42 #include "oops/accessDecorators.hpp"
   43 #include "oops/compressedKlass.inline.hpp"
   44 #include "oops/compressedOops.inline.hpp"
   45 #include "oops/klass.inline.hpp"

   46 #include "prims/methodHandles.hpp"
   47 #include "runtime/continuation.hpp"
   48 #include "runtime/interfaceSupport.inline.hpp"
   49 #include "runtime/javaThread.hpp"
   50 #include "runtime/jniHandles.hpp"
   51 #include "runtime/objectMonitor.hpp"
   52 #include "runtime/os.hpp"
   53 #include "runtime/safepoint.hpp"
   54 #include "runtime/safepointMechanism.hpp"
   55 #include "runtime/sharedRuntime.hpp"

   56 #include "runtime/stubRoutines.hpp"
   57 #include "utilities/checkedCast.hpp"
   58 #include "utilities/macros.hpp"




   59 
   60 #ifdef PRODUCT
   61 #define BLOCK_COMMENT(str) /* nothing */
   62 #define STOP(error) stop(error)
   63 #else
   64 #define BLOCK_COMMENT(str) block_comment(str)
   65 #define STOP(error) block_comment(error); stop(error)
   66 #endif
   67 
   68 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
   69 
   70 #ifdef ASSERT
   71 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
   72 #endif
   73 
   74 static const Assembler::Condition reverse[] = {
   75     Assembler::noOverflow     /* overflow      = 0x0 */ ,
   76     Assembler::overflow       /* noOverflow    = 0x1 */ ,
   77     Assembler::aboveEqual     /* carrySet      = 0x2, below         = 0x2 */ ,
   78     Assembler::below          /* aboveEqual    = 0x3, carryClear    = 0x3 */ ,

 1286 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
 1287   assert_different_registers(arg_0, c_rarg1, c_rarg2);
 1288   assert_different_registers(arg_1, c_rarg2);
 1289   pass_arg2(this, arg_2);
 1290   pass_arg1(this, arg_1);
 1291   pass_arg0(this, arg_0);
 1292   call_VM_leaf(entry_point, 3);
 1293 }
 1294 
 1295 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
 1296   assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
 1297   assert_different_registers(arg_1, c_rarg2, c_rarg3);
 1298   assert_different_registers(arg_2, c_rarg3);
 1299   pass_arg3(this, arg_3);
 1300   pass_arg2(this, arg_2);
 1301   pass_arg1(this, arg_1);
 1302   pass_arg0(this, arg_0);
 1303   call_VM_leaf(entry_point, 3);
 1304 }
 1305 




 1306 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
 1307   pass_arg0(this, arg_0);
 1308   MacroAssembler::call_VM_leaf_base(entry_point, 1);
 1309 }
 1310 
 1311 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
 1312   assert_different_registers(arg_0, c_rarg1);
 1313   pass_arg1(this, arg_1);
 1314   pass_arg0(this, arg_0);
 1315   MacroAssembler::call_VM_leaf_base(entry_point, 2);
 1316 }
 1317 
 1318 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
 1319   assert_different_registers(arg_0, c_rarg1, c_rarg2);
 1320   assert_different_registers(arg_1, c_rarg2);
 1321   pass_arg2(this, arg_2);
 1322   pass_arg1(this, arg_1);
 1323   pass_arg0(this, arg_0);
 1324   MacroAssembler::call_VM_leaf_base(entry_point, 3);
 1325 }

 2339     lea(rscratch, src);
 2340     Assembler::mulss(dst, Address(rscratch, 0));
 2341   }
 2342 }
 2343 
 2344 void MacroAssembler::null_check(Register reg, int offset) {
 2345   if (needs_explicit_null_check(offset)) {
 2346     // provoke OS null exception if reg is null by
 2347     // accessing M[reg] w/o changing any (non-CC) registers
 2348     // NOTE: cmpl is plenty here to provoke a segv
 2349     cmpptr(rax, Address(reg, 0));
 2350     // Note: should probably use testl(rax, Address(reg, 0));
 2351     //       may be shorter code (however, this version of
 2352     //       testl needs to be implemented first)
 2353   } else {
 2354     // nothing to do, (later) access of M[reg + offset]
 2355     // will provoke OS null exception if reg is null
 2356   }
 2357 }
 2358 











































































































 2359 void MacroAssembler::os_breakpoint() {
 2360   // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
 2361   // (e.g., MSVC can't call ps() otherwise)
 2362   call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
 2363 }
 2364 
 2365 void MacroAssembler::unimplemented(const char* what) {
 2366   const char* buf = nullptr;
 2367   {
 2368     ResourceMark rm;
 2369     stringStream ss;
 2370     ss.print("unimplemented: %s", what);
 2371     buf = code_string(ss.as_string());
 2372   }
 2373   stop(buf);
 2374 }
 2375 
 2376 #define XSTATE_BV 0x200
 2377 
 2378 void MacroAssembler::pop_CPU_state() {

 3427 }
 3428 
 3429 // C++ bool manipulation
 3430 void MacroAssembler::testbool(Register dst) {
 3431   if(sizeof(bool) == 1)
 3432     testb(dst, 0xff);
 3433   else if(sizeof(bool) == 2) {
 3434     // testw implementation needed for two byte bools
 3435     ShouldNotReachHere();
 3436   } else if(sizeof(bool) == 4)
 3437     testl(dst, dst);
 3438   else
 3439     // unsupported
 3440     ShouldNotReachHere();
 3441 }
 3442 
 3443 void MacroAssembler::testptr(Register dst, Register src) {
 3444   testq(dst, src);
 3445 }
 3446 






















































































































 3447 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
 3448 void MacroAssembler::tlab_allocate(Register obj,
 3449                                    Register var_size_in_bytes,
 3450                                    int con_size_in_bytes,
 3451                                    Register t1,
 3452                                    Register t2,
 3453                                    Label& slow_case) {
 3454   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 3455   bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
 3456 }
 3457 
 3458 RegSet MacroAssembler::call_clobbered_gp_registers() {
 3459   RegSet regs;
 3460   regs += RegSet::of(rax, rcx, rdx);
 3461 #ifndef _WINDOWS
 3462   regs += RegSet::of(rsi, rdi);
 3463 #endif
 3464   regs += RegSet::range(r8, r11);
 3465   if (UseAPX) {
 3466     regs += RegSet::range(r16, as_Register(Register::number_of_registers - 1));

 3630   xorptr(temp, temp);    // use _zero reg to clear memory (shorter code)
 3631   if (UseIncDec) {
 3632     shrptr(index, 3);  // divide by 8/16 and set carry flag if bit 2 was set
 3633   } else {
 3634     shrptr(index, 2);  // use 2 instructions to avoid partial flag stall
 3635     shrptr(index, 1);
 3636   }
 3637 
 3638   // initialize remaining object fields: index is a multiple of 2 now
 3639   {
 3640     Label loop;
 3641     bind(loop);
 3642     movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
 3643     decrement(index);
 3644     jcc(Assembler::notZero, loop);
 3645   }
 3646 
 3647   bind(done);
 3648 }
 3649 



























 3650 // Look up the method for a megamorphic invokeinterface call.
 3651 // The target method is determined by <intf_klass, itable_index>.
 3652 // The receiver klass is in recv_klass.
 3653 // On success, the result will be in method_result, and execution falls through.
 3654 // On failure, execution transfers to the given label.
 3655 void MacroAssembler::lookup_interface_method(Register recv_klass,
 3656                                              Register intf_klass,
 3657                                              RegisterOrConstant itable_index,
 3658                                              Register method_result,
 3659                                              Register scan_temp,
 3660                                              Label& L_no_such_interface,
 3661                                              bool return_method) {
 3662   assert_different_registers(recv_klass, intf_klass, scan_temp);
 3663   assert_different_registers(method_result, intf_klass, scan_temp);
 3664   assert(recv_klass != method_result || !return_method,
 3665          "recv_klass can be destroyed when method isn't needed");
 3666 
 3667   assert(itable_index.is_constant() || itable_index.as_register() == method_result,
 3668          "caller must use same register for non-constant itable index as for method");
 3669 

 4680   } else {
 4681     Label L;
 4682     jccb(negate_condition(cc), L);
 4683     movl(dst, src);
 4684     bind(L);
 4685   }
 4686 }
 4687 
 4688 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
 4689   if (VM_Version::supports_cmov()) {
 4690     cmovl(cc, dst, src);
 4691   } else {
 4692     Label L;
 4693     jccb(negate_condition(cc), L);
 4694     movl(dst, src);
 4695     bind(L);
 4696   }
 4697 }
 4698 
 4699 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
 4700   if (!VerifyOops) return;




 4701 
 4702   BLOCK_COMMENT("verify_oop {");
 4703   push(rscratch1);
 4704   push(rax);                          // save rax
 4705   push(reg);                          // pass register argument
 4706 
 4707   // Pass register number to verify_oop_subroutine
 4708   const char* b = nullptr;
 4709   {
 4710     ResourceMark rm;
 4711     stringStream ss;
 4712     ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
 4713     b = code_string(ss.as_string());
 4714   }
 4715   AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
 4716   pushptr(buffer.addr(), rscratch1);
 4717 
 4718   // call indirectly to solve generation ordering problem
 4719   movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
 4720   call(rax);

 4739   // cf. TemplateTable::prepare_invoke(), if (load_receiver).
 4740   int stackElementSize = Interpreter::stackElementSize;
 4741   int offset = Interpreter::expr_offset_in_bytes(extra_slot_offset+0);
 4742 #ifdef ASSERT
 4743   int offset1 = Interpreter::expr_offset_in_bytes(extra_slot_offset+1);
 4744   assert(offset1 - offset == stackElementSize, "correct arithmetic");
 4745 #endif
 4746   Register             scale_reg    = noreg;
 4747   Address::ScaleFactor scale_factor = Address::no_scale;
 4748   if (arg_slot.is_constant()) {
 4749     offset += arg_slot.as_constant() * stackElementSize;
 4750   } else {
 4751     scale_reg    = arg_slot.as_register();
 4752     scale_factor = Address::times(stackElementSize);
 4753   }
 4754   offset += wordSize;           // return PC is on stack
 4755   return Address(rsp, scale_reg, scale_factor, offset);
 4756 }
 4757 
 4758 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
 4759   if (!VerifyOops) return;




 4760 
 4761   push(rscratch1);
 4762   push(rax); // save rax,
 4763   // addr may contain rsp so we will have to adjust it based on the push
 4764   // we just did (and on 64 bit we do two pushes)
 4765   // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
 4766   // stores rax into addr which is backwards of what was intended.
 4767   if (addr.uses(rsp)) {
 4768     lea(rax, addr);
 4769     pushptr(Address(rax, 2 * BytesPerWord));
 4770   } else {
 4771     pushptr(addr);
 4772   }
 4773 
 4774   // Pass register number to verify_oop_subroutine
 4775   const char* b = nullptr;
 4776   {
 4777     ResourceMark rm;
 4778     stringStream ss;
 4779     ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);

 5133 
 5134 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
 5135   // get mirror
 5136   const int mirror_offset = in_bytes(Klass::java_mirror_offset());
 5137   load_method_holder(mirror, method);
 5138   movptr(mirror, Address(mirror, mirror_offset));
 5139   resolve_oop_handle(mirror, tmp);
 5140 }
 5141 
 5142 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
 5143   load_method_holder(rresult, rmethod);
 5144   movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
 5145 }
 5146 
 5147 void MacroAssembler::load_method_holder(Register holder, Register method) {
 5148   movptr(holder, Address(method, Method::const_offset()));                      // ConstMethod*
 5149   movptr(holder, Address(holder, ConstMethod::constants_offset()));             // ConstantPool*
 5150   movptr(holder, Address(holder, ConstantPool::pool_holder_offset()));          // InstanceKlass*
 5151 }
 5152 










 5153 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
 5154   assert(UseCompactObjectHeaders, "expect compact object headers");
 5155   movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
 5156   shrq(dst, markWord::klass_shift);
 5157 }
 5158 
 5159 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
 5160   assert_different_registers(src, tmp);
 5161   assert_different_registers(dst, tmp);
 5162 
 5163   if (UseCompactObjectHeaders) {
 5164     load_narrow_klass_compact(dst, src);
 5165     decode_klass_not_null(dst, tmp);
 5166   } else if (UseCompressedClassPointers) {
 5167     movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 5168     decode_klass_not_null(dst, tmp);
 5169   } else {
 5170     movptr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 5171   }
 5172 }
 5173 





 5174 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
 5175   assert(!UseCompactObjectHeaders, "not with compact headers");
 5176   assert_different_registers(src, tmp);
 5177   assert_different_registers(dst, tmp);
 5178   if (UseCompressedClassPointers) {
 5179     encode_klass_not_null(src, tmp);
 5180     movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
 5181   } else {
 5182     movptr(Address(dst, oopDesc::klass_offset_in_bytes()), src);
 5183   }
 5184 }
 5185 
 5186 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
 5187   if (UseCompactObjectHeaders) {
 5188     assert(tmp != noreg, "need tmp");
 5189     assert_different_registers(klass, obj, tmp);
 5190     load_narrow_klass_compact(tmp, obj);
 5191     cmpl(klass, tmp);
 5192   } else if (UseCompressedClassPointers) {
 5193     cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));

 5219   bool as_raw = (decorators & AS_RAW) != 0;
 5220   if (as_raw) {
 5221     bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
 5222   } else {
 5223     bs->load_at(this, decorators, type, dst, src, tmp1);
 5224   }
 5225 }
 5226 
 5227 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
 5228                                      Register tmp1, Register tmp2, Register tmp3) {
 5229   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 5230   decorators = AccessInternal::decorator_fixup(decorators, type);
 5231   bool as_raw = (decorators & AS_RAW) != 0;
 5232   if (as_raw) {
 5233     bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
 5234   } else {
 5235     bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
 5236   }
 5237 }
 5238 








































 5239 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
 5240   access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
 5241 }
 5242 
 5243 // Doesn't do verification, generates fixed size code
 5244 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
 5245   access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
 5246 }
 5247 
 5248 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
 5249                                     Register tmp2, Register tmp3, DecoratorSet decorators) {
 5250   access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
 5251 }
 5252 
 5253 // Used for storing nulls.
 5254 void MacroAssembler::store_heap_oop_null(Address dst) {
 5255   access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
 5256 }
 5257 
 5258 void MacroAssembler::store_klass_gap(Register dst, Register src) {

 5578   Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
 5579 }
 5580 
 5581 void MacroAssembler::reinit_heapbase() {
 5582   if (UseCompressedOops) {
 5583     if (Universe::heap() != nullptr) {
 5584       if (CompressedOops::base() == nullptr) {
 5585         MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
 5586       } else {
 5587         mov64(r12_heapbase, (int64_t)CompressedOops::base());
 5588       }
 5589     } else {
 5590       movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
 5591     }
 5592   }
 5593 }
 5594 
 5595 #if COMPILER2_OR_JVMCI
 5596 
 5597 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
 5598 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
 5599   // cnt - number of qwords (8-byte words).
 5600   // base - start address, qword aligned.
 5601   Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
 5602   bool use64byteVector = (MaxVectorSize == 64) && (VM_Version::avx3_threshold() == 0);
 5603   if (use64byteVector) {
 5604     vpxor(xtmp, xtmp, xtmp, AVX_512bit);
 5605   } else if (MaxVectorSize >= 32) {
 5606     vpxor(xtmp, xtmp, xtmp, AVX_256bit);


 5607   } else {
 5608     pxor(xtmp, xtmp);

 5609   }
 5610   jmp(L_zero_64_bytes);
 5611 
 5612   BIND(L_loop);
 5613   if (MaxVectorSize >= 32) {
 5614     fill64(base, 0, xtmp, use64byteVector);
 5615   } else {
 5616     movdqu(Address(base,  0), xtmp);
 5617     movdqu(Address(base, 16), xtmp);
 5618     movdqu(Address(base, 32), xtmp);
 5619     movdqu(Address(base, 48), xtmp);
 5620   }
 5621   addptr(base, 64);
 5622 
 5623   BIND(L_zero_64_bytes);
 5624   subptr(cnt, 8);
 5625   jccb(Assembler::greaterEqual, L_loop);
 5626 
 5627   // Copy trailing 64 bytes
 5628   if (use64byteVector) {
 5629     addptr(cnt, 8);
 5630     jccb(Assembler::equal, L_end);
 5631     fill64_masked(3, base, 0, xtmp, mask, cnt, rtmp, true);
 5632     jmp(L_end);
 5633   } else {
 5634     addptr(cnt, 4);
 5635     jccb(Assembler::less, L_tail);
 5636     if (MaxVectorSize >= 32) {
 5637       vmovdqu(Address(base, 0), xtmp);
 5638     } else {
 5639       movdqu(Address(base,  0), xtmp);
 5640       movdqu(Address(base, 16), xtmp);
 5641     }
 5642   }
 5643   addptr(base, 32);
 5644   subptr(cnt, 4);
 5645 
 5646   BIND(L_tail);
 5647   addptr(cnt, 4);
 5648   jccb(Assembler::lessEqual, L_end);
 5649   if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
 5650     fill32_masked(3, base, 0, xtmp, mask, cnt, rtmp);
 5651   } else {
 5652     decrement(cnt);
 5653 
 5654     BIND(L_sloop);
 5655     movq(Address(base, 0), xtmp);
 5656     addptr(base, 8);
 5657     decrement(cnt);
 5658     jccb(Assembler::greaterEqual, L_sloop);
 5659   }
 5660   BIND(L_end);
 5661 }
 5662 


























































































































































































































































































































































































































 5663 // Clearing constant sized memory using YMM/ZMM registers.
 5664 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
 5665   assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
 5666   bool use64byteVector = (MaxVectorSize > 32) && (VM_Version::avx3_threshold() == 0);
 5667 
 5668   int vector64_count = (cnt & (~0x7)) >> 3;
 5669   cnt = cnt & 0x7;
 5670   const int fill64_per_loop = 4;
 5671   const int max_unrolled_fill64 = 8;
 5672 
 5673   // 64 byte initialization loop.
 5674   vpxor(xtmp, xtmp, xtmp, use64byteVector ? AVX_512bit : AVX_256bit);
 5675   int start64 = 0;
 5676   if (vector64_count > max_unrolled_fill64) {
 5677     Label LOOP;
 5678     Register index = rtmp;
 5679 
 5680     start64 = vector64_count - (vector64_count % fill64_per_loop);
 5681 
 5682     movl(index, 0);

 5732         break;
 5733       case 7:
 5734         if (use64byteVector) {
 5735           movl(rtmp, 0x7F);
 5736           kmovwl(mask, rtmp);
 5737           evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
 5738         } else {
 5739           evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
 5740           movl(rtmp, 0x7);
 5741           kmovwl(mask, rtmp);
 5742           evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
 5743         }
 5744         break;
 5745       default:
 5746         fatal("Unexpected length : %d\n",cnt);
 5747         break;
 5748     }
 5749   }
 5750 }
 5751 
 5752 void MacroAssembler::clear_mem(Register base, Register cnt, Register tmp, XMMRegister xtmp,
 5753                                bool is_large, KRegister mask) {
 5754   // cnt      - number of qwords (8-byte words).
 5755   // base     - start address, qword aligned.
 5756   // is_large - if optimizers know cnt is larger than InitArrayShortSize
 5757   assert(base==rdi, "base register must be edi for rep stos");
 5758   assert(tmp==rax,   "tmp register must be eax for rep stos");
 5759   assert(cnt==rcx,   "cnt register must be ecx for rep stos");
 5760   assert(InitArrayShortSize % BytesPerLong == 0,
 5761     "InitArrayShortSize should be the multiple of BytesPerLong");
 5762 
 5763   Label DONE;
 5764   if (!is_large || !UseXMMForObjInit) {
 5765     xorptr(tmp, tmp);
 5766   }
 5767 
 5768   if (!is_large) {
 5769     Label LOOP, LONG;
 5770     cmpptr(cnt, InitArrayShortSize/BytesPerLong);
 5771     jccb(Assembler::greater, LONG);
 5772 
 5773     decrement(cnt);
 5774     jccb(Assembler::negative, DONE); // Zero length
 5775 
 5776     // Use individual pointer-sized stores for small counts:
 5777     BIND(LOOP);
 5778     movptr(Address(base, cnt, Address::times_ptr), tmp);
 5779     decrement(cnt);
 5780     jccb(Assembler::greaterEqual, LOOP);
 5781     jmpb(DONE);
 5782 
 5783     BIND(LONG);
 5784   }
 5785 
 5786   // Use longer rep-prefixed ops for non-small counts:
 5787   if (UseFastStosb) {
 5788     shlptr(cnt, 3); // convert to number of bytes
 5789     rep_stosb();
 5790   } else if (UseXMMForObjInit) {
 5791     xmm_clear_mem(base, cnt, tmp, xtmp, mask);
 5792   } else {
 5793     rep_stos();
 5794   }
 5795 
 5796   BIND(DONE);
 5797 }
 5798 
 5799 #endif //COMPILER2_OR_JVMCI
 5800 
 5801 
 5802 void MacroAssembler::generate_fill(BasicType t, bool aligned,
 5803                                    Register to, Register value, Register count,
 5804                                    Register rtmp, XMMRegister xtmp) {
 5805   ShortBranchVerifier sbv(this);
 5806   assert_different_registers(to, value, count, rtmp);
 5807   Label L_exit;
 5808   Label L_fill_2_bytes, L_fill_4_bytes;
 5809 
 5810 #if defined(COMPILER2)
 5811   if(MaxVectorSize >=32 &&

 9658 
 9659   // Load top.
 9660   movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
 9661 
 9662   // Check if the lock-stack is full.
 9663   cmpl(top, LockStack::end_offset());
 9664   jcc(Assembler::greaterEqual, slow);
 9665 
 9666   // Check for recursion.
 9667   cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
 9668   jcc(Assembler::equal, push);
 9669 
 9670   // Check header for monitor (0b10).
 9671   testptr(reg_rax, markWord::monitor_value);
 9672   jcc(Assembler::notZero, slow);
 9673 
 9674   // Try to lock. Transition lock bits 0b01 => 0b00
 9675   movptr(tmp, reg_rax);
 9676   andptr(tmp, ~(int32_t)markWord::unlocked_value);
 9677   orptr(reg_rax, markWord::unlocked_value);




 9678   lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
 9679   jcc(Assembler::notEqual, slow);
 9680 
 9681   // Restore top, CAS clobbers register.
 9682   movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
 9683 
 9684   bind(push);
 9685   // After successful lock, push object on lock-stack.
 9686   movptr(Address(thread, top), obj);
 9687   incrementl(top, oopSize);
 9688   movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
 9689 }
 9690 
 9691 // Implements lightweight-unlocking.
 9692 //
 9693 // obj: the object to be unlocked
 9694 // reg_rax: rax
 9695 // thread: the thread
 9696 // tmp: a temporary register
 9697 void MacroAssembler::lightweight_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {

   11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
   12  * version 2 for more details (a copy is included in the LICENSE file that
   13  * accompanied this code).
   14  *
   15  * You should have received a copy of the GNU General Public License version
   16  * 2 along with this work; if not, write to the Free Software Foundation,
   17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
   18  *
   19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
   20  * or visit www.oracle.com if you need additional information or have any
   21  * questions.
   22  *
   23  */
   24 
   25 #include "asm/assembler.hpp"
   26 #include "asm/assembler.inline.hpp"
   27 #include "code/aotCodeCache.hpp"
   28 #include "code/compiledIC.hpp"
   29 #include "compiler/compiler_globals.hpp"
   30 #include "compiler/disassembler.hpp"
   31 #include "ci/ciInlineKlass.hpp"
   32 #include "crc32c.h"
   33 #include "gc/shared/barrierSet.hpp"
   34 #include "gc/shared/barrierSetAssembler.hpp"
   35 #include "gc/shared/collectedHeap.inline.hpp"
   36 #include "gc/shared/tlab_globals.hpp"
   37 #include "interpreter/bytecodeHistogram.hpp"
   38 #include "interpreter/interpreter.hpp"
   39 #include "interpreter/interpreterRuntime.hpp"
   40 #include "jvm.h"
   41 #include "memory/resourceArea.hpp"
   42 #include "memory/universe.hpp"
   43 #include "oops/accessDecorators.hpp"
   44 #include "oops/compressedKlass.inline.hpp"
   45 #include "oops/compressedOops.inline.hpp"
   46 #include "oops/klass.inline.hpp"
   47 #include "oops/resolvedFieldEntry.hpp"
   48 #include "prims/methodHandles.hpp"
   49 #include "runtime/continuation.hpp"
   50 #include "runtime/interfaceSupport.inline.hpp"
   51 #include "runtime/javaThread.hpp"
   52 #include "runtime/jniHandles.hpp"
   53 #include "runtime/objectMonitor.hpp"
   54 #include "runtime/os.hpp"
   55 #include "runtime/safepoint.hpp"
   56 #include "runtime/safepointMechanism.hpp"
   57 #include "runtime/sharedRuntime.hpp"
   58 #include "runtime/signature_cc.hpp"
   59 #include "runtime/stubRoutines.hpp"
   60 #include "utilities/checkedCast.hpp"
   61 #include "utilities/macros.hpp"
   62 #include "vmreg_x86.inline.hpp"
   63 #ifdef COMPILER2
   64 #include "opto/output.hpp"
   65 #endif
   66 
   67 #ifdef PRODUCT
   68 #define BLOCK_COMMENT(str) /* nothing */
   69 #define STOP(error) stop(error)
   70 #else
   71 #define BLOCK_COMMENT(str) block_comment(str)
   72 #define STOP(error) block_comment(error); stop(error)
   73 #endif
   74 
   75 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
   76 
   77 #ifdef ASSERT
   78 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
   79 #endif
   80 
   81 static const Assembler::Condition reverse[] = {
   82     Assembler::noOverflow     /* overflow      = 0x0 */ ,
   83     Assembler::overflow       /* noOverflow    = 0x1 */ ,
   84     Assembler::aboveEqual     /* carrySet      = 0x2, below         = 0x2 */ ,
   85     Assembler::below          /* aboveEqual    = 0x3, carryClear    = 0x3 */ ,

 1293 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
 1294   assert_different_registers(arg_0, c_rarg1, c_rarg2);
 1295   assert_different_registers(arg_1, c_rarg2);
 1296   pass_arg2(this, arg_2);
 1297   pass_arg1(this, arg_1);
 1298   pass_arg0(this, arg_0);
 1299   call_VM_leaf(entry_point, 3);
 1300 }
 1301 
 1302 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
 1303   assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
 1304   assert_different_registers(arg_1, c_rarg2, c_rarg3);
 1305   assert_different_registers(arg_2, c_rarg3);
 1306   pass_arg3(this, arg_3);
 1307   pass_arg2(this, arg_2);
 1308   pass_arg1(this, arg_1);
 1309   pass_arg0(this, arg_0);
 1310   call_VM_leaf(entry_point, 3);
 1311 }
 1312 
 1313 void MacroAssembler::super_call_VM_leaf(address entry_point) {
 1314   MacroAssembler::call_VM_leaf_base(entry_point, 1);
 1315 }
 1316 
 1317 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
 1318   pass_arg0(this, arg_0);
 1319   MacroAssembler::call_VM_leaf_base(entry_point, 1);
 1320 }
 1321 
 1322 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
 1323   assert_different_registers(arg_0, c_rarg1);
 1324   pass_arg1(this, arg_1);
 1325   pass_arg0(this, arg_0);
 1326   MacroAssembler::call_VM_leaf_base(entry_point, 2);
 1327 }
 1328 
 1329 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
 1330   assert_different_registers(arg_0, c_rarg1, c_rarg2);
 1331   assert_different_registers(arg_1, c_rarg2);
 1332   pass_arg2(this, arg_2);
 1333   pass_arg1(this, arg_1);
 1334   pass_arg0(this, arg_0);
 1335   MacroAssembler::call_VM_leaf_base(entry_point, 3);
 1336 }

 2350     lea(rscratch, src);
 2351     Assembler::mulss(dst, Address(rscratch, 0));
 2352   }
 2353 }
 2354 
 2355 void MacroAssembler::null_check(Register reg, int offset) {
 2356   if (needs_explicit_null_check(offset)) {
 2357     // provoke OS null exception if reg is null by
 2358     // accessing M[reg] w/o changing any (non-CC) registers
 2359     // NOTE: cmpl is plenty here to provoke a segv
 2360     cmpptr(rax, Address(reg, 0));
 2361     // Note: should probably use testl(rax, Address(reg, 0));
 2362     //       may be shorter code (however, this version of
 2363     //       testl needs to be implemented first)
 2364   } else {
 2365     // nothing to do, (later) access of M[reg + offset]
 2366     // will provoke OS null exception if reg is null
 2367   }
 2368 }
 2369 
 2370 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
 2371   andptr(markword, markWord::inline_type_mask_in_place);
 2372   cmpptr(markword, markWord::inline_type_pattern);
 2373   jcc(Assembler::equal, is_inline_type);
 2374 }
 2375 
 2376 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
 2377   if (can_be_null) {
 2378     testptr(object, object);
 2379     jcc(Assembler::zero, not_inline_type);
 2380   }
 2381   const int is_inline_type_mask = markWord::inline_type_pattern;
 2382   movptr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
 2383   andptr(tmp, is_inline_type_mask);
 2384   cmpptr(tmp, is_inline_type_mask);
 2385   jcc(Assembler::notEqual, not_inline_type);
 2386 }
 2387 
 2388 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
 2389   movl(temp_reg, flags);
 2390   testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
 2391   jcc(Assembler::notEqual, is_null_free_inline_type);
 2392 }
 2393 
 2394 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
 2395   movl(temp_reg, flags);
 2396   testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
 2397   jcc(Assembler::equal, not_null_free_inline_type);
 2398 }
 2399 
 2400 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
 2401   movl(temp_reg, flags);
 2402   testl(temp_reg, 1 << ResolvedFieldEntry::is_flat_shift);
 2403   jcc(Assembler::notEqual, is_flat);
 2404 }
 2405 
 2406 void MacroAssembler::test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker) {
 2407   movl(temp_reg, flags);
 2408   testl(temp_reg, 1 << ResolvedFieldEntry::has_null_marker_shift);
 2409   jcc(Assembler::notEqual, has_null_marker);
 2410 }
 2411 
 2412 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
 2413   Label test_mark_word;
 2414   // load mark word
 2415   movptr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
 2416   // check displaced
 2417   testl(temp_reg, markWord::unlocked_value);
 2418   jccb(Assembler::notZero, test_mark_word);
 2419   // slow path use klass prototype
 2420   push(rscratch1);
 2421   load_prototype_header(temp_reg, oop, rscratch1);
 2422   pop(rscratch1);
 2423 
 2424   bind(test_mark_word);
 2425   testl(temp_reg, test_bit);
 2426   jcc((jmp_set) ? Assembler::notZero : Assembler::zero, jmp_label);
 2427 }
 2428 
 2429 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg,
 2430                                          Label& is_flat_array) {
 2431 #ifdef _LP64
 2432   test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
 2433 #else
 2434   load_klass(temp_reg, oop, noreg);
 2435   movl(temp_reg, Address(temp_reg, Klass::layout_helper_offset()));
 2436   test_flat_array_layout(temp_reg, is_flat_array);
 2437 #endif
 2438 }
 2439 
 2440 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
 2441                                              Label& is_non_flat_array) {
 2442 #ifdef _LP64
 2443   test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
 2444 #else
 2445   load_klass(temp_reg, oop, noreg);
 2446   movl(temp_reg, Address(temp_reg, Klass::layout_helper_offset()));
 2447   test_non_flat_array_layout(temp_reg, is_non_flat_array);
 2448 #endif
 2449 }
 2450 
 2451 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label&is_null_free_array) {
 2452 #ifdef _LP64
 2453   test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
 2454 #else
 2455   Unimplemented();
 2456 #endif
 2457 }
 2458 
 2459 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
 2460 #ifdef _LP64
 2461   test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
 2462 #else
 2463   Unimplemented();
 2464 #endif
 2465 }
 2466 
 2467 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
 2468   testl(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
 2469   jcc(Assembler::notZero, is_flat_array);
 2470 }
 2471 
 2472 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
 2473   testl(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
 2474   jcc(Assembler::zero, is_non_flat_array);
 2475 }
 2476 
 2477 void MacroAssembler::os_breakpoint() {
 2478   // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
 2479   // (e.g., MSVC can't call ps() otherwise)
 2480   call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
 2481 }
 2482 
 2483 void MacroAssembler::unimplemented(const char* what) {
 2484   const char* buf = nullptr;
 2485   {
 2486     ResourceMark rm;
 2487     stringStream ss;
 2488     ss.print("unimplemented: %s", what);
 2489     buf = code_string(ss.as_string());
 2490   }
 2491   stop(buf);
 2492 }
 2493 
 2494 #define XSTATE_BV 0x200
 2495 
 2496 void MacroAssembler::pop_CPU_state() {

 3545 }
 3546 
 3547 // C++ bool manipulation
 3548 void MacroAssembler::testbool(Register dst) {
 3549   if(sizeof(bool) == 1)
 3550     testb(dst, 0xff);
 3551   else if(sizeof(bool) == 2) {
 3552     // testw implementation needed for two byte bools
 3553     ShouldNotReachHere();
 3554   } else if(sizeof(bool) == 4)
 3555     testl(dst, dst);
 3556   else
 3557     // unsupported
 3558     ShouldNotReachHere();
 3559 }
 3560 
 3561 void MacroAssembler::testptr(Register dst, Register src) {
 3562   testq(dst, src);
 3563 }
 3564 
 3565 // Object / value buffer allocation...
 3566 //
 3567 // Kills klass and rsi on LP64
 3568 void MacroAssembler::allocate_instance(Register klass, Register new_obj,
 3569                                        Register t1, Register t2,
 3570                                        bool clear_fields, Label& alloc_failed)
 3571 {
 3572   Label done, initialize_header, initialize_object, slow_case, slow_case_no_pop;
 3573   Register layout_size = t1;
 3574   assert(new_obj == rax, "needs to be rax");
 3575   assert_different_registers(klass, new_obj, t1, t2);
 3576 
 3577   // get instance_size in InstanceKlass (scaled to a count of bytes)
 3578   movl(layout_size, Address(klass, Klass::layout_helper_offset()));
 3579   // test to see if it is malformed in some way
 3580   testl(layout_size, Klass::_lh_instance_slow_path_bit);
 3581   jcc(Assembler::notZero, slow_case_no_pop);
 3582 
 3583   // Allocate the instance:
 3584   //  If TLAB is enabled:
 3585   //    Try to allocate in the TLAB.
 3586   //    If fails, go to the slow path.
 3587   //  Else If inline contiguous allocations are enabled:
 3588   //    Try to allocate in eden.
 3589   //    If fails due to heap end, go to slow path.
 3590   //
 3591   //  If TLAB is enabled OR inline contiguous is enabled:
 3592   //    Initialize the allocation.
 3593   //    Exit.
 3594   //
 3595   //  Go to slow path.
 3596 
 3597   push(klass);
 3598   if (UseTLAB) {
 3599     tlab_allocate(new_obj, layout_size, 0, klass, t2, slow_case);
 3600     if (ZeroTLAB || (!clear_fields)) {
 3601       // the fields have been already cleared
 3602       jmp(initialize_header);
 3603     } else {
 3604       // initialize both the header and fields
 3605       jmp(initialize_object);
 3606     }
 3607   } else {
 3608     jmp(slow_case);
 3609   }
 3610 
 3611   // If UseTLAB is true, the object is created above and there is an initialize need.
 3612   // Otherwise, skip and go to the slow path.
 3613   if (UseTLAB) {
 3614     if (clear_fields) {
 3615       // The object is initialized before the header.  If the object size is
 3616       // zero, go directly to the header initialization.
 3617       bind(initialize_object);
 3618       if (UseCompactObjectHeaders) {
 3619         assert(is_aligned(oopDesc::base_offset_in_bytes(), BytesPerLong), "oop base offset must be 8-byte-aligned");
 3620         decrement(layout_size, oopDesc::base_offset_in_bytes());
 3621       } else {
 3622         decrement(layout_size, sizeof(oopDesc));
 3623       }
 3624       jcc(Assembler::zero, initialize_header);
 3625 
 3626       // Initialize topmost object field, divide size by 8, check if odd and
 3627       // test if zero.
 3628       Register zero = klass;
 3629       xorl(zero, zero);    // use zero reg to clear memory (shorter code)
 3630       shrl(layout_size, LogBytesPerLong); // divide by 2*oopSize and set carry flag if odd
 3631 
 3632   #ifdef ASSERT
 3633       // make sure instance_size was multiple of 8
 3634       Label L;
 3635       // Ignore partial flag stall after shrl() since it is debug VM
 3636       jcc(Assembler::carryClear, L);
 3637       stop("object size is not multiple of 2 - adjust this code");
 3638       bind(L);
 3639       // must be > 0, no extra check needed here
 3640   #endif
 3641 
 3642       // initialize remaining object fields: instance_size was a multiple of 8
 3643       {
 3644         Label loop;
 3645         bind(loop);
 3646         int header_size_bytes = oopDesc::header_size() * HeapWordSize;
 3647         assert(is_aligned(header_size_bytes, BytesPerLong), "oop header size must be 8-byte-aligned");
 3648         movptr(Address(new_obj, layout_size, Address::times_8, header_size_bytes - 1*oopSize), zero);
 3649         decrement(layout_size);
 3650         jcc(Assembler::notZero, loop);
 3651       }
 3652     } // clear_fields
 3653 
 3654     // initialize object header only.
 3655     bind(initialize_header);
 3656     if (UseCompactObjectHeaders || EnableValhalla) {
 3657       pop(klass);
 3658       Register mark_word = t2;
 3659       movptr(mark_word, Address(klass, Klass::prototype_header_offset()));
 3660       movptr(Address(new_obj, oopDesc::mark_offset_in_bytes ()), mark_word);
 3661     } else {
 3662      movptr(Address(new_obj, oopDesc::mark_offset_in_bytes()),
 3663             (intptr_t)markWord::prototype().value()); // header
 3664      pop(klass);   // get saved klass back in the register.
 3665     }
 3666     if (!UseCompactObjectHeaders) {
 3667       xorl(rsi, rsi);                 // use zero reg to clear memory (shorter code)
 3668       store_klass_gap(new_obj, rsi);  // zero klass gap for compressed oops
 3669       movptr(t2, klass);         // preserve klass
 3670       store_klass(new_obj, t2, rscratch1);  // src klass reg is potentially compressed
 3671     }
 3672     jmp(done);
 3673   }
 3674 
 3675   bind(slow_case);
 3676   pop(klass);
 3677   bind(slow_case_no_pop);
 3678   jmp(alloc_failed);
 3679 
 3680   bind(done);
 3681 }
 3682 
 3683 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
 3684 void MacroAssembler::tlab_allocate(Register obj,
 3685                                    Register var_size_in_bytes,
 3686                                    int con_size_in_bytes,
 3687                                    Register t1,
 3688                                    Register t2,
 3689                                    Label& slow_case) {
 3690   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 3691   bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
 3692 }
 3693 
 3694 RegSet MacroAssembler::call_clobbered_gp_registers() {
 3695   RegSet regs;
 3696   regs += RegSet::of(rax, rcx, rdx);
 3697 #ifndef _WINDOWS
 3698   regs += RegSet::of(rsi, rdi);
 3699 #endif
 3700   regs += RegSet::range(r8, r11);
 3701   if (UseAPX) {
 3702     regs += RegSet::range(r16, as_Register(Register::number_of_registers - 1));

 3866   xorptr(temp, temp);    // use _zero reg to clear memory (shorter code)
 3867   if (UseIncDec) {
 3868     shrptr(index, 3);  // divide by 8/16 and set carry flag if bit 2 was set
 3869   } else {
 3870     shrptr(index, 2);  // use 2 instructions to avoid partial flag stall
 3871     shrptr(index, 1);
 3872   }
 3873 
 3874   // initialize remaining object fields: index is a multiple of 2 now
 3875   {
 3876     Label loop;
 3877     bind(loop);
 3878     movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
 3879     decrement(index);
 3880     jcc(Assembler::notZero, loop);
 3881   }
 3882 
 3883   bind(done);
 3884 }
 3885 
 3886 void MacroAssembler::get_inline_type_field_klass(Register holder_klass, Register index, Register inline_klass) {
 3887   inline_layout_info(holder_klass, index, inline_klass);
 3888   movptr(inline_klass, Address(inline_klass, InlineLayoutInfo::klass_offset()));
 3889 }
 3890 
 3891 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
 3892   movptr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
 3893 #ifdef ASSERT
 3894   {
 3895     Label done;
 3896     cmpptr(layout_info, 0);
 3897     jcc(Assembler::notEqual, done);
 3898     stop("inline_layout_info_array is null");
 3899     bind(done);
 3900   }
 3901 #endif
 3902 
 3903   InlineLayoutInfo array[2];
 3904   int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
 3905   if (is_power_of_2(size)) {
 3906     shll(index, log2i_exact(size)); // Scale index by power of 2
 3907   } else {
 3908     imull(index, index, size); // Scale the index to be the entry index * array_element_size
 3909   }
 3910   lea(layout_info, Address(layout_info, index, Address::times_1, Array<InlineLayoutInfo>::base_offset_in_bytes()));
 3911 }
 3912 
 3913 // Look up the method for a megamorphic invokeinterface call.
 3914 // The target method is determined by <intf_klass, itable_index>.
 3915 // The receiver klass is in recv_klass.
 3916 // On success, the result will be in method_result, and execution falls through.
 3917 // On failure, execution transfers to the given label.
 3918 void MacroAssembler::lookup_interface_method(Register recv_klass,
 3919                                              Register intf_klass,
 3920                                              RegisterOrConstant itable_index,
 3921                                              Register method_result,
 3922                                              Register scan_temp,
 3923                                              Label& L_no_such_interface,
 3924                                              bool return_method) {
 3925   assert_different_registers(recv_klass, intf_klass, scan_temp);
 3926   assert_different_registers(method_result, intf_klass, scan_temp);
 3927   assert(recv_klass != method_result || !return_method,
 3928          "recv_klass can be destroyed when method isn't needed");
 3929 
 3930   assert(itable_index.is_constant() || itable_index.as_register() == method_result,
 3931          "caller must use same register for non-constant itable index as for method");
 3932 

 4943   } else {
 4944     Label L;
 4945     jccb(negate_condition(cc), L);
 4946     movl(dst, src);
 4947     bind(L);
 4948   }
 4949 }
 4950 
 4951 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
 4952   if (VM_Version::supports_cmov()) {
 4953     cmovl(cc, dst, src);
 4954   } else {
 4955     Label L;
 4956     jccb(negate_condition(cc), L);
 4957     movl(dst, src);
 4958     bind(L);
 4959   }
 4960 }
 4961 
 4962 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
 4963   if (!VerifyOops || VerifyAdapterSharing) {
 4964     // Below address of the code string confuses VerifyAdapterSharing
 4965     // because it may differ between otherwise equivalent adapters.
 4966     return;
 4967   }
 4968 
 4969   BLOCK_COMMENT("verify_oop {");
 4970   push(rscratch1);
 4971   push(rax);                          // save rax
 4972   push(reg);                          // pass register argument
 4973 
 4974   // Pass register number to verify_oop_subroutine
 4975   const char* b = nullptr;
 4976   {
 4977     ResourceMark rm;
 4978     stringStream ss;
 4979     ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
 4980     b = code_string(ss.as_string());
 4981   }
 4982   AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
 4983   pushptr(buffer.addr(), rscratch1);
 4984 
 4985   // call indirectly to solve generation ordering problem
 4986   movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
 4987   call(rax);

 5006   // cf. TemplateTable::prepare_invoke(), if (load_receiver).
 5007   int stackElementSize = Interpreter::stackElementSize;
 5008   int offset = Interpreter::expr_offset_in_bytes(extra_slot_offset+0);
 5009 #ifdef ASSERT
 5010   int offset1 = Interpreter::expr_offset_in_bytes(extra_slot_offset+1);
 5011   assert(offset1 - offset == stackElementSize, "correct arithmetic");
 5012 #endif
 5013   Register             scale_reg    = noreg;
 5014   Address::ScaleFactor scale_factor = Address::no_scale;
 5015   if (arg_slot.is_constant()) {
 5016     offset += arg_slot.as_constant() * stackElementSize;
 5017   } else {
 5018     scale_reg    = arg_slot.as_register();
 5019     scale_factor = Address::times(stackElementSize);
 5020   }
 5021   offset += wordSize;           // return PC is on stack
 5022   return Address(rsp, scale_reg, scale_factor, offset);
 5023 }
 5024 
 5025 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
 5026   if (!VerifyOops || VerifyAdapterSharing) {
 5027     // Below address of the code string confuses VerifyAdapterSharing
 5028     // because it may differ between otherwise equivalent adapters.
 5029     return;
 5030   }
 5031 
 5032   push(rscratch1);
 5033   push(rax); // save rax,
 5034   // addr may contain rsp so we will have to adjust it based on the push
 5035   // we just did (and on 64 bit we do two pushes)
 5036   // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
 5037   // stores rax into addr which is backwards of what was intended.
 5038   if (addr.uses(rsp)) {
 5039     lea(rax, addr);
 5040     pushptr(Address(rax, 2 * BytesPerWord));
 5041   } else {
 5042     pushptr(addr);
 5043   }
 5044 
 5045   // Pass register number to verify_oop_subroutine
 5046   const char* b = nullptr;
 5047   {
 5048     ResourceMark rm;
 5049     stringStream ss;
 5050     ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);

 5404 
 5405 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
 5406   // get mirror
 5407   const int mirror_offset = in_bytes(Klass::java_mirror_offset());
 5408   load_method_holder(mirror, method);
 5409   movptr(mirror, Address(mirror, mirror_offset));
 5410   resolve_oop_handle(mirror, tmp);
 5411 }
 5412 
 5413 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
 5414   load_method_holder(rresult, rmethod);
 5415   movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
 5416 }
 5417 
 5418 void MacroAssembler::load_method_holder(Register holder, Register method) {
 5419   movptr(holder, Address(method, Method::const_offset()));                      // ConstMethod*
 5420   movptr(holder, Address(holder, ConstMethod::constants_offset()));             // ConstantPool*
 5421   movptr(holder, Address(holder, ConstantPool::pool_holder_offset()));          // InstanceKlass*
 5422 }
 5423 
 5424 void MacroAssembler::load_metadata(Register dst, Register src) {
 5425   if (UseCompactObjectHeaders) {
 5426     load_narrow_klass_compact(dst, src);
 5427   } else if (UseCompressedClassPointers) {
 5428     movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 5429   } else {
 5430     movptr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 5431   }
 5432 }
 5433 
 5434 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
 5435   assert(UseCompactObjectHeaders, "expect compact object headers");
 5436   movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
 5437   shrq(dst, markWord::klass_shift);
 5438 }
 5439 
 5440 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
 5441   assert_different_registers(src, tmp);
 5442   assert_different_registers(dst, tmp);
 5443 
 5444   if (UseCompactObjectHeaders) {
 5445     load_narrow_klass_compact(dst, src);
 5446     decode_klass_not_null(dst, tmp);
 5447   } else if (UseCompressedClassPointers) {
 5448     movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 5449     decode_klass_not_null(dst, tmp);
 5450   } else {
 5451     movptr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 5452   }
 5453 }
 5454 
 5455 void MacroAssembler::load_prototype_header(Register dst, Register src, Register tmp) {
 5456   load_klass(dst, src, tmp);
 5457   movptr(dst, Address(dst, Klass::prototype_header_offset()));
 5458 }
 5459 
 5460 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
 5461   assert(!UseCompactObjectHeaders, "not with compact headers");
 5462   assert_different_registers(src, tmp);
 5463   assert_different_registers(dst, tmp);
 5464   if (UseCompressedClassPointers) {
 5465     encode_klass_not_null(src, tmp);
 5466     movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
 5467   } else {
 5468     movptr(Address(dst, oopDesc::klass_offset_in_bytes()), src);
 5469   }
 5470 }
 5471 
 5472 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
 5473   if (UseCompactObjectHeaders) {
 5474     assert(tmp != noreg, "need tmp");
 5475     assert_different_registers(klass, obj, tmp);
 5476     load_narrow_klass_compact(tmp, obj);
 5477     cmpl(klass, tmp);
 5478   } else if (UseCompressedClassPointers) {
 5479     cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));

 5505   bool as_raw = (decorators & AS_RAW) != 0;
 5506   if (as_raw) {
 5507     bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
 5508   } else {
 5509     bs->load_at(this, decorators, type, dst, src, tmp1);
 5510   }
 5511 }
 5512 
 5513 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
 5514                                      Register tmp1, Register tmp2, Register tmp3) {
 5515   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 5516   decorators = AccessInternal::decorator_fixup(decorators, type);
 5517   bool as_raw = (decorators & AS_RAW) != 0;
 5518   if (as_raw) {
 5519     bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
 5520   } else {
 5521     bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
 5522   }
 5523 }
 5524 
 5525 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
 5526                                      Register inline_layout_info) {
 5527   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 5528   bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
 5529 }
 5530 
 5531 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
 5532   movptr(offset, Address(inline_klass, InstanceKlass::adr_inlineklass_fixed_block_offset()));
 5533   movl(offset, Address(offset, InlineKlass::payload_offset_offset()));
 5534 }
 5535 
 5536 void MacroAssembler::payload_addr(Register oop, Register data, Register inline_klass) {
 5537   // ((address) (void*) o) + vk->payload_offset();
 5538   Register offset = (data == oop) ? rscratch1 : data;
 5539   payload_offset(inline_klass, offset);
 5540   if (data == oop) {
 5541     addptr(data, offset);
 5542   } else {
 5543     lea(data, Address(oop, offset));
 5544   }
 5545 }
 5546 
 5547 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
 5548                                                 Register index, Register data) {
 5549   assert(index != rcx, "index needs to shift by rcx");
 5550   assert_different_registers(array, array_klass, index);
 5551   assert_different_registers(rcx, array, index);
 5552 
 5553   // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
 5554   movl(rcx, Address(array_klass, Klass::layout_helper_offset()));
 5555 
 5556   // Klass::layout_helper_log2_element_size(lh)
 5557   // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
 5558   shrl(rcx, Klass::_lh_log2_element_size_shift);
 5559   andl(rcx, Klass::_lh_log2_element_size_mask);
 5560   shlptr(index); // index << rcx
 5561 
 5562   lea(data, Address(array, index, Address::times_1, arrayOopDesc::base_offset_in_bytes(T_FLAT_ELEMENT)));
 5563 }
 5564 
 5565 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
 5566   access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
 5567 }
 5568 
 5569 // Doesn't do verification, generates fixed size code
 5570 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
 5571   access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
 5572 }
 5573 
 5574 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
 5575                                     Register tmp2, Register tmp3, DecoratorSet decorators) {
 5576   access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
 5577 }
 5578 
 5579 // Used for storing nulls.
 5580 void MacroAssembler::store_heap_oop_null(Address dst) {
 5581   access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
 5582 }
 5583 
 5584 void MacroAssembler::store_klass_gap(Register dst, Register src) {

 5904   Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
 5905 }
 5906 
 5907 void MacroAssembler::reinit_heapbase() {
 5908   if (UseCompressedOops) {
 5909     if (Universe::heap() != nullptr) {
 5910       if (CompressedOops::base() == nullptr) {
 5911         MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
 5912       } else {
 5913         mov64(r12_heapbase, (int64_t)CompressedOops::base());
 5914       }
 5915     } else {
 5916       movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
 5917     }
 5918   }
 5919 }
 5920 
 5921 #if COMPILER2_OR_JVMCI
 5922 
 5923 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
 5924 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp, KRegister mask) {
 5925   // cnt - number of qwords (8-byte words).
 5926   // base - start address, qword aligned.
 5927   Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
 5928   bool use64byteVector = (MaxVectorSize == 64) && (VM_Version::avx3_threshold() == 0);
 5929   if (use64byteVector) {
 5930     evpbroadcastq(xtmp, val, AVX_512bit);
 5931   } else if (MaxVectorSize >= 32) {
 5932     movdq(xtmp, val);
 5933     punpcklqdq(xtmp, xtmp);
 5934     vinserti128_high(xtmp, xtmp);
 5935   } else {
 5936     movdq(xtmp, val);
 5937     punpcklqdq(xtmp, xtmp);
 5938   }
 5939   jmp(L_zero_64_bytes);
 5940 
 5941   BIND(L_loop);
 5942   if (MaxVectorSize >= 32) {
 5943     fill64(base, 0, xtmp, use64byteVector);
 5944   } else {
 5945     movdqu(Address(base,  0), xtmp);
 5946     movdqu(Address(base, 16), xtmp);
 5947     movdqu(Address(base, 32), xtmp);
 5948     movdqu(Address(base, 48), xtmp);
 5949   }
 5950   addptr(base, 64);
 5951 
 5952   BIND(L_zero_64_bytes);
 5953   subptr(cnt, 8);
 5954   jccb(Assembler::greaterEqual, L_loop);
 5955 
 5956   // Copy trailing 64 bytes
 5957   if (use64byteVector) {
 5958     addptr(cnt, 8);
 5959     jccb(Assembler::equal, L_end);
 5960     fill64_masked(3, base, 0, xtmp, mask, cnt, val, true);
 5961     jmp(L_end);
 5962   } else {
 5963     addptr(cnt, 4);
 5964     jccb(Assembler::less, L_tail);
 5965     if (MaxVectorSize >= 32) {
 5966       vmovdqu(Address(base, 0), xtmp);
 5967     } else {
 5968       movdqu(Address(base,  0), xtmp);
 5969       movdqu(Address(base, 16), xtmp);
 5970     }
 5971   }
 5972   addptr(base, 32);
 5973   subptr(cnt, 4);
 5974 
 5975   BIND(L_tail);
 5976   addptr(cnt, 4);
 5977   jccb(Assembler::lessEqual, L_end);
 5978   if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
 5979     fill32_masked(3, base, 0, xtmp, mask, cnt, val);
 5980   } else {
 5981     decrement(cnt);
 5982 
 5983     BIND(L_sloop);
 5984     movq(Address(base, 0), xtmp);
 5985     addptr(base, 8);
 5986     decrement(cnt);
 5987     jccb(Assembler::greaterEqual, L_sloop);
 5988   }
 5989   BIND(L_end);
 5990 }
 5991 
 5992 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
 5993   assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
 5994   // An inline type might be returned. If fields are in registers we
 5995   // need to allocate an inline type instance and initialize it with
 5996   // the value of the fields.
 5997   Label skip;
 5998   // We only need a new buffered inline type if a new one is not returned
 5999   testptr(rax, 1);
 6000   jcc(Assembler::zero, skip);
 6001   int call_offset = -1;
 6002 
 6003 #ifdef _LP64
 6004   // The following code is similar to allocate_instance but has some slight differences,
 6005   // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
 6006   // allocating is not necessary if vk != nullptr, etc. allocate_instance is not aware of these.
 6007   Label slow_case;
 6008   // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
 6009   mov(rscratch1, rax); // save rax for slow_case since *_allocate may corrupt it when allocation failed
 6010   if (vk != nullptr) {
 6011     // Called from C1, where the return type is statically known.
 6012     movptr(rbx, (intptr_t)vk->get_InlineKlass());
 6013     jint lh = vk->layout_helper();
 6014     assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
 6015     if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
 6016       tlab_allocate(rax, noreg, lh, r13, r14, slow_case);
 6017     } else {
 6018       jmp(slow_case);
 6019     }
 6020   } else {
 6021     // Call from interpreter. RAX contains ((the InlineKlass* of the return type) | 0x01)
 6022     mov(rbx, rax);
 6023     andptr(rbx, -2);
 6024     if (UseTLAB) {
 6025       movl(r14, Address(rbx, Klass::layout_helper_offset()));
 6026       testl(r14, Klass::_lh_instance_slow_path_bit);
 6027       jcc(Assembler::notZero, slow_case);
 6028       tlab_allocate(rax, r14, 0, r13, r14, slow_case);
 6029     } else {
 6030       jmp(slow_case);
 6031     }
 6032   }
 6033   if (UseTLAB) {
 6034     // 2. Initialize buffered inline instance header
 6035     Register buffer_obj = rax;
 6036     Register klass = rbx;
 6037     if (UseCompactObjectHeaders) {
 6038       Register mark_word = r13;
 6039       movptr(mark_word, Address(klass, Klass::prototype_header_offset()));
 6040       movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes()), mark_word);
 6041     } else {
 6042       movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes()), (intptr_t)markWord::inline_type_prototype().value());
 6043       xorl(r13, r13);
 6044       store_klass_gap(buffer_obj, r13);
 6045       if (vk == nullptr) {
 6046         // store_klass corrupts rbx(klass), so save it in r13 for later use (interpreter case only).
 6047         mov(r13, klass);
 6048       }
 6049       store_klass(buffer_obj, klass, rscratch1);
 6050       klass = r13;
 6051     }
 6052     // 3. Initialize its fields with an inline class specific handler
 6053     if (vk != nullptr) {
 6054       call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
 6055     } else {
 6056       movptr(rbx, Address(klass, InstanceKlass::adr_inlineklass_fixed_block_offset()));
 6057       movptr(rbx, Address(rbx, InlineKlass::pack_handler_offset()));
 6058       call(rbx);
 6059     }
 6060     jmp(skip);
 6061   }
 6062   bind(slow_case);
 6063   // We failed to allocate a new inline type, fall back to a runtime
 6064   // call. Some oop field may be live in some registers but we can't
 6065   // tell. That runtime call will take care of preserving them
 6066   // across a GC if there's one.
 6067   mov(rax, rscratch1);
 6068 #endif
 6069 
 6070   if (from_interpreter) {
 6071     super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
 6072   } else {
 6073     call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
 6074     call_offset = offset();
 6075   }
 6076 
 6077   bind(skip);
 6078   return call_offset;
 6079 }
 6080 
 6081 // Move a value between registers/stack slots and update the reg_state
 6082 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
 6083   assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
 6084   if (reg_state[to->value()] == reg_written) {
 6085     return true; // Already written
 6086   }
 6087   if (from != to && bt != T_VOID) {
 6088     if (reg_state[to->value()] == reg_readonly) {
 6089       return false; // Not yet writable
 6090     }
 6091     if (from->is_reg()) {
 6092       if (to->is_reg()) {
 6093         if (from->is_XMMRegister()) {
 6094           if (bt == T_DOUBLE) {
 6095             movdbl(to->as_XMMRegister(), from->as_XMMRegister());
 6096           } else {
 6097             assert(bt == T_FLOAT, "must be float");
 6098             movflt(to->as_XMMRegister(), from->as_XMMRegister());
 6099           }
 6100         } else {
 6101           movq(to->as_Register(), from->as_Register());
 6102         }
 6103       } else {
 6104         int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6105         Address to_addr = Address(rsp, st_off);
 6106         if (from->is_XMMRegister()) {
 6107           if (bt == T_DOUBLE) {
 6108             movdbl(to_addr, from->as_XMMRegister());
 6109           } else {
 6110             assert(bt == T_FLOAT, "must be float");
 6111             movflt(to_addr, from->as_XMMRegister());
 6112           }
 6113         } else {
 6114           movq(to_addr, from->as_Register());
 6115         }
 6116       }
 6117     } else {
 6118       Address from_addr = Address(rsp, from->reg2stack() * VMRegImpl::stack_slot_size + wordSize);
 6119       if (to->is_reg()) {
 6120         if (to->is_XMMRegister()) {
 6121           if (bt == T_DOUBLE) {
 6122             movdbl(to->as_XMMRegister(), from_addr);
 6123           } else {
 6124             assert(bt == T_FLOAT, "must be float");
 6125             movflt(to->as_XMMRegister(), from_addr);
 6126           }
 6127         } else {
 6128           movq(to->as_Register(), from_addr);
 6129         }
 6130       } else {
 6131         int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6132         movq(r13, from_addr);
 6133         movq(Address(rsp, st_off), r13);
 6134       }
 6135     }
 6136   }
 6137   // Update register states
 6138   reg_state[from->value()] = reg_writable;
 6139   reg_state[to->value()] = reg_written;
 6140   return true;
 6141 }
 6142 
 6143 // Calculate the extra stack space required for packing or unpacking inline
 6144 // args and adjust the stack pointer
 6145 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
 6146   // Two additional slots to account for return address
 6147   int sp_inc = (args_on_stack + 2) * VMRegImpl::stack_slot_size;
 6148   sp_inc = align_up(sp_inc, StackAlignmentInBytes);
 6149   // Save the return address, adjust the stack (make sure it is properly
 6150   // 16-byte aligned) and copy the return address to the new top of the stack.
 6151   // The stack will be repaired on return (see MacroAssembler::remove_frame).
 6152   assert(sp_inc > 0, "sanity");
 6153   pop(r13);
 6154   subptr(rsp, sp_inc);
 6155   push(r13);
 6156   return sp_inc;
 6157 }
 6158 
 6159 // Read all fields from an inline type buffer and store the field values in registers/stack slots.
 6160 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
 6161                                           VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
 6162                                           RegState reg_state[]) {
 6163   assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
 6164   assert(from->is_valid(), "source must be valid");
 6165   bool progress = false;
 6166 #ifdef ASSERT
 6167   const int start_offset = offset();
 6168 #endif
 6169 
 6170   Label L_null, L_notNull;
 6171   // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
 6172   Register tmp1 = r10;
 6173   Register tmp2 = r13;
 6174   Register fromReg = noreg;
 6175   ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, -1);
 6176   bool done = true;
 6177   bool mark_done = true;
 6178   VMReg toReg;
 6179   BasicType bt;
 6180   // Check if argument requires a null check
 6181   bool null_check = false;
 6182   VMReg nullCheckReg;
 6183   while (stream.next(nullCheckReg, bt)) {
 6184     if (sig->at(stream.sig_index())._offset == -1) {
 6185       null_check = true;
 6186       break;
 6187     }
 6188   }
 6189   stream.reset(sig_index, to_index);
 6190   while (stream.next(toReg, bt)) {
 6191     assert(toReg->is_valid(), "destination must be valid");
 6192     int idx = (int)toReg->value();
 6193     if (reg_state[idx] == reg_readonly) {
 6194       if (idx != from->value()) {
 6195         mark_done = false;
 6196       }
 6197       done = false;
 6198       continue;
 6199     } else if (reg_state[idx] == reg_written) {
 6200       continue;
 6201     }
 6202     assert(reg_state[idx] == reg_writable, "must be writable");
 6203     reg_state[idx] = reg_written;
 6204     progress = true;
 6205 
 6206     if (fromReg == noreg) {
 6207       if (from->is_reg()) {
 6208         fromReg = from->as_Register();
 6209       } else {
 6210         int st_off = from->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6211         movq(tmp1, Address(rsp, st_off));
 6212         fromReg = tmp1;
 6213       }
 6214       if (null_check) {
 6215         // Nullable inline type argument, emit null check
 6216         testptr(fromReg, fromReg);
 6217         jcc(Assembler::zero, L_null);
 6218       }
 6219     }
 6220     int off = sig->at(stream.sig_index())._offset;
 6221     if (off == -1) {
 6222       assert(null_check, "Missing null check at");
 6223       if (toReg->is_stack()) {
 6224         int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6225         movq(Address(rsp, st_off), 1);
 6226       } else {
 6227         movq(toReg->as_Register(), 1);
 6228       }
 6229       continue;
 6230     }
 6231     assert(off > 0, "offset in object should be positive");
 6232     Address fromAddr = Address(fromReg, off);
 6233     if (!toReg->is_XMMRegister()) {
 6234       Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
 6235       if (is_reference_type(bt)) {
 6236         load_heap_oop(dst, fromAddr);
 6237       } else {
 6238         bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
 6239         load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
 6240       }
 6241       if (toReg->is_stack()) {
 6242         int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6243         movq(Address(rsp, st_off), dst);
 6244       }
 6245     } else if (bt == T_DOUBLE) {
 6246       movdbl(toReg->as_XMMRegister(), fromAddr);
 6247     } else {
 6248       assert(bt == T_FLOAT, "must be float");
 6249       movflt(toReg->as_XMMRegister(), fromAddr);
 6250     }
 6251   }
 6252   if (progress && null_check) {
 6253     if (done) {
 6254       jmp(L_notNull);
 6255       bind(L_null);
 6256       // Set null marker to zero to signal that the argument is null.
 6257       // Also set all oop fields to zero to make the GC happy.
 6258       stream.reset(sig_index, to_index);
 6259       while (stream.next(toReg, bt)) {
 6260         if (sig->at(stream.sig_index())._offset == -1 ||
 6261             bt == T_OBJECT || bt == T_ARRAY) {
 6262           if (toReg->is_stack()) {
 6263             int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6264             movq(Address(rsp, st_off), 0);
 6265           } else {
 6266             xorq(toReg->as_Register(), toReg->as_Register());
 6267           }
 6268         }
 6269       }
 6270       bind(L_notNull);
 6271     } else {
 6272       bind(L_null);
 6273     }
 6274   }
 6275 
 6276   sig_index = stream.sig_index();
 6277   to_index = stream.regs_index();
 6278 
 6279   if (mark_done && reg_state[from->value()] != reg_written) {
 6280     // This is okay because no one else will write to that slot
 6281     reg_state[from->value()] = reg_writable;
 6282   }
 6283   from_index--;
 6284   assert(progress || (start_offset == offset()), "should not emit code");
 6285   return done;
 6286 }
 6287 
 6288 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
 6289                                         VMRegPair* from, int from_count, int& from_index, VMReg to,
 6290                                         RegState reg_state[], Register val_array) {
 6291   assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
 6292   assert(to->is_valid(), "destination must be valid");
 6293 
 6294   if (reg_state[to->value()] == reg_written) {
 6295     skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
 6296     return true; // Already written
 6297   }
 6298 
 6299   // TODO 8284443 Isn't it an issue if below code uses r14 as tmp when it contains a spilled value?
 6300   // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
 6301   Register val_obj_tmp = r11;
 6302   Register from_reg_tmp = r14;
 6303   Register tmp1 = r10;
 6304   Register tmp2 = r13;
 6305   Register tmp3 = rbx;
 6306   Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
 6307 
 6308   assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
 6309 
 6310   if (reg_state[to->value()] == reg_readonly) {
 6311     if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
 6312       skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
 6313       return false; // Not yet writable
 6314     }
 6315     val_obj = val_obj_tmp;
 6316   }
 6317 
 6318   int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
 6319   load_heap_oop(val_obj, Address(val_array, index));
 6320 
 6321   ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
 6322   VMReg fromReg;
 6323   BasicType bt;
 6324   Label L_null;
 6325   while (stream.next(fromReg, bt)) {
 6326     assert(fromReg->is_valid(), "source must be valid");
 6327     reg_state[fromReg->value()] = reg_writable;
 6328 
 6329     int off = sig->at(stream.sig_index())._offset;
 6330     if (off == -1) {
 6331       // Nullable inline type argument, emit null check
 6332       Label L_notNull;
 6333       if (fromReg->is_stack()) {
 6334         int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6335         testb(Address(rsp, ld_off), 1);
 6336       } else {
 6337         testb(fromReg->as_Register(), 1);
 6338       }
 6339       jcc(Assembler::notZero, L_notNull);
 6340       movptr(val_obj, 0);
 6341       jmp(L_null);
 6342       bind(L_notNull);
 6343       continue;
 6344     }
 6345 
 6346     assert(off > 0, "offset in object should be positive");
 6347     size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
 6348 
 6349     // Pack the scalarized field into the value object.
 6350     Address dst(val_obj, off);
 6351     if (!fromReg->is_XMMRegister()) {
 6352       Register src;
 6353       if (fromReg->is_stack()) {
 6354         src = from_reg_tmp;
 6355         int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6356         load_sized_value(src, Address(rsp, ld_off), size_in_bytes, /* is_signed */ false);
 6357       } else {
 6358         src = fromReg->as_Register();
 6359       }
 6360       assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
 6361       if (is_reference_type(bt)) {
 6362         store_heap_oop(dst, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
 6363       } else {
 6364         store_sized_value(dst, src, size_in_bytes);
 6365       }
 6366     } else if (bt == T_DOUBLE) {
 6367       movdbl(dst, fromReg->as_XMMRegister());
 6368     } else {
 6369       assert(bt == T_FLOAT, "must be float");
 6370       movflt(dst, fromReg->as_XMMRegister());
 6371     }
 6372   }
 6373   bind(L_null);
 6374   sig_index = stream.sig_index();
 6375   from_index = stream.regs_index();
 6376 
 6377   assert(reg_state[to->value()] == reg_writable, "must have already been read");
 6378   bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
 6379   assert(success, "to register must be writeable");
 6380   return true;
 6381 }
 6382 
 6383 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
 6384   return reg->is_XMMRegister() ? xmm8->as_VMReg() : r14->as_VMReg();
 6385 }
 6386 
 6387 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
 6388   assert((initial_framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
 6389   if (needs_stack_repair) {
 6390     // TODO 8284443 Add a comment drawing the frame like in Aarch64's version of MacroAssembler::remove_frame
 6391     movq(rbp, Address(rsp, initial_framesize));
 6392     // The stack increment resides just below the saved rbp
 6393     addq(rsp, Address(rsp, initial_framesize - wordSize));
 6394   } else {
 6395     if (initial_framesize > 0) {
 6396       addq(rsp, initial_framesize);
 6397     }
 6398     pop(rbp);
 6399   }
 6400 }
 6401 
 6402 // Clearing constant sized memory using YMM/ZMM registers.
 6403 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
 6404   assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
 6405   bool use64byteVector = (MaxVectorSize > 32) && (VM_Version::avx3_threshold() == 0);
 6406 
 6407   int vector64_count = (cnt & (~0x7)) >> 3;
 6408   cnt = cnt & 0x7;
 6409   const int fill64_per_loop = 4;
 6410   const int max_unrolled_fill64 = 8;
 6411 
 6412   // 64 byte initialization loop.
 6413   vpxor(xtmp, xtmp, xtmp, use64byteVector ? AVX_512bit : AVX_256bit);
 6414   int start64 = 0;
 6415   if (vector64_count > max_unrolled_fill64) {
 6416     Label LOOP;
 6417     Register index = rtmp;
 6418 
 6419     start64 = vector64_count - (vector64_count % fill64_per_loop);
 6420 
 6421     movl(index, 0);

 6471         break;
 6472       case 7:
 6473         if (use64byteVector) {
 6474           movl(rtmp, 0x7F);
 6475           kmovwl(mask, rtmp);
 6476           evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
 6477         } else {
 6478           evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
 6479           movl(rtmp, 0x7);
 6480           kmovwl(mask, rtmp);
 6481           evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
 6482         }
 6483         break;
 6484       default:
 6485         fatal("Unexpected length : %d\n",cnt);
 6486         break;
 6487     }
 6488   }
 6489 }
 6490 
 6491 void MacroAssembler::clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp,
 6492                                bool is_large, bool word_copy_only, KRegister mask) {
 6493   // cnt      - number of qwords (8-byte words).
 6494   // base     - start address, qword aligned.
 6495   // is_large - if optimizers know cnt is larger than InitArrayShortSize
 6496   assert(base==rdi, "base register must be edi for rep stos");
 6497   assert(val==rax,   "val register must be eax for rep stos");
 6498   assert(cnt==rcx,   "cnt register must be ecx for rep stos");
 6499   assert(InitArrayShortSize % BytesPerLong == 0,
 6500     "InitArrayShortSize should be the multiple of BytesPerLong");
 6501 
 6502   Label DONE;



 6503 
 6504   if (!is_large) {
 6505     Label LOOP, LONG;
 6506     cmpptr(cnt, InitArrayShortSize/BytesPerLong);
 6507     jccb(Assembler::greater, LONG);
 6508 
 6509     decrement(cnt);
 6510     jccb(Assembler::negative, DONE); // Zero length
 6511 
 6512     // Use individual pointer-sized stores for small counts:
 6513     BIND(LOOP);
 6514     movptr(Address(base, cnt, Address::times_ptr), val);
 6515     decrement(cnt);
 6516     jccb(Assembler::greaterEqual, LOOP);
 6517     jmpb(DONE);
 6518 
 6519     BIND(LONG);
 6520   }
 6521 
 6522   // Use longer rep-prefixed ops for non-small counts:
 6523   if (UseFastStosb && !word_copy_only) {
 6524     shlptr(cnt, 3); // convert to number of bytes
 6525     rep_stosb();
 6526   } else if (UseXMMForObjInit) {
 6527     xmm_clear_mem(base, cnt, val, xtmp, mask);
 6528   } else {
 6529     rep_stos();
 6530   }
 6531 
 6532   BIND(DONE);
 6533 }
 6534 
 6535 #endif //COMPILER2_OR_JVMCI
 6536 
 6537 
 6538 void MacroAssembler::generate_fill(BasicType t, bool aligned,
 6539                                    Register to, Register value, Register count,
 6540                                    Register rtmp, XMMRegister xtmp) {
 6541   ShortBranchVerifier sbv(this);
 6542   assert_different_registers(to, value, count, rtmp);
 6543   Label L_exit;
 6544   Label L_fill_2_bytes, L_fill_4_bytes;
 6545 
 6546 #if defined(COMPILER2)
 6547   if(MaxVectorSize >=32 &&

10394 
10395   // Load top.
10396   movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10397 
10398   // Check if the lock-stack is full.
10399   cmpl(top, LockStack::end_offset());
10400   jcc(Assembler::greaterEqual, slow);
10401 
10402   // Check for recursion.
10403   cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
10404   jcc(Assembler::equal, push);
10405 
10406   // Check header for monitor (0b10).
10407   testptr(reg_rax, markWord::monitor_value);
10408   jcc(Assembler::notZero, slow);
10409 
10410   // Try to lock. Transition lock bits 0b01 => 0b00
10411   movptr(tmp, reg_rax);
10412   andptr(tmp, ~(int32_t)markWord::unlocked_value);
10413   orptr(reg_rax, markWord::unlocked_value);
10414   if (EnableValhalla) {
10415     // Mask inline_type bit such that we go to the slow path if object is an inline type
10416     andptr(reg_rax, ~((int) markWord::inline_type_bit_in_place));
10417   }
10418   lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
10419   jcc(Assembler::notEqual, slow);
10420 
10421   // Restore top, CAS clobbers register.
10422   movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10423 
10424   bind(push);
10425   // After successful lock, push object on lock-stack.
10426   movptr(Address(thread, top), obj);
10427   incrementl(top, oopSize);
10428   movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
10429 }
10430 
10431 // Implements lightweight-unlocking.
10432 //
10433 // obj: the object to be unlocked
10434 // reg_rax: rax
10435 // thread: the thread
10436 // tmp: a temporary register
10437 void MacroAssembler::lightweight_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {
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