11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/assembler.hpp"
26 #include "asm/assembler.inline.hpp"
27 #include "code/aotCodeCache.hpp"
28 #include "code/compiledIC.hpp"
29 #include "compiler/compiler_globals.hpp"
30 #include "compiler/disassembler.hpp"
31 #include "crc32c.h"
32 #include "gc/shared/barrierSet.hpp"
33 #include "gc/shared/barrierSetAssembler.hpp"
34 #include "gc/shared/collectedHeap.inline.hpp"
35 #include "gc/shared/tlab_globals.hpp"
36 #include "interpreter/bytecodeHistogram.hpp"
37 #include "interpreter/interpreter.hpp"
38 #include "interpreter/interpreterRuntime.hpp"
39 #include "jvm.h"
40 #include "memory/resourceArea.hpp"
41 #include "memory/universe.hpp"
42 #include "oops/accessDecorators.hpp"
43 #include "oops/compressedKlass.inline.hpp"
44 #include "oops/compressedOops.inline.hpp"
45 #include "oops/klass.inline.hpp"
46 #include "prims/methodHandles.hpp"
47 #include "runtime/continuation.hpp"
48 #include "runtime/interfaceSupport.inline.hpp"
49 #include "runtime/javaThread.hpp"
50 #include "runtime/jniHandles.hpp"
51 #include "runtime/objectMonitor.hpp"
52 #include "runtime/os.hpp"
53 #include "runtime/safepoint.hpp"
54 #include "runtime/safepointMechanism.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/checkedCast.hpp"
58 #include "utilities/globalDefinitions.hpp"
59 #include "utilities/macros.hpp"
60
61 #ifdef PRODUCT
62 #define BLOCK_COMMENT(str) /* nothing */
63 #define STOP(error) stop(error)
64 #else
65 #define BLOCK_COMMENT(str) block_comment(str)
66 #define STOP(error) block_comment(error); stop(error)
67 #endif
68
69 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
70
71 #ifdef ASSERT
72 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
73 #endif
74
75 static const Assembler::Condition reverse[] = {
76 Assembler::noOverflow /* overflow = 0x0 */ ,
77 Assembler::overflow /* noOverflow = 0x1 */ ,
78 Assembler::aboveEqual /* carrySet = 0x2, below = 0x2 */ ,
79 Assembler::below /* aboveEqual = 0x3, carryClear = 0x3 */ ,
1285 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1286 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1287 assert_different_registers(arg_1, c_rarg2);
1288 pass_arg2(this, arg_2);
1289 pass_arg1(this, arg_1);
1290 pass_arg0(this, arg_0);
1291 call_VM_leaf(entry_point, 3);
1292 }
1293
1294 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
1295 assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
1296 assert_different_registers(arg_1, c_rarg2, c_rarg3);
1297 assert_different_registers(arg_2, c_rarg3);
1298 pass_arg3(this, arg_3);
1299 pass_arg2(this, arg_2);
1300 pass_arg1(this, arg_1);
1301 pass_arg0(this, arg_0);
1302 call_VM_leaf(entry_point, 3);
1303 }
1304
1305 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
1306 pass_arg0(this, arg_0);
1307 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1308 }
1309
1310 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
1311 assert_different_registers(arg_0, c_rarg1);
1312 pass_arg1(this, arg_1);
1313 pass_arg0(this, arg_0);
1314 MacroAssembler::call_VM_leaf_base(entry_point, 2);
1315 }
1316
1317 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1318 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1319 assert_different_registers(arg_1, c_rarg2);
1320 pass_arg2(this, arg_2);
1321 pass_arg1(this, arg_1);
1322 pass_arg0(this, arg_0);
1323 MacroAssembler::call_VM_leaf_base(entry_point, 3);
1324 }
2356 lea(rscratch, src);
2357 Assembler::mulss(dst, Address(rscratch, 0));
2358 }
2359 }
2360
2361 void MacroAssembler::null_check(Register reg, int offset) {
2362 if (needs_explicit_null_check(offset)) {
2363 // provoke OS null exception if reg is null by
2364 // accessing M[reg] w/o changing any (non-CC) registers
2365 // NOTE: cmpl is plenty here to provoke a segv
2366 cmpptr(rax, Address(reg, 0));
2367 // Note: should probably use testl(rax, Address(reg, 0));
2368 // may be shorter code (however, this version of
2369 // testl needs to be implemented first)
2370 } else {
2371 // nothing to do, (later) access of M[reg + offset]
2372 // will provoke OS null exception if reg is null
2373 }
2374 }
2375
2376 void MacroAssembler::os_breakpoint() {
2377 // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
2378 // (e.g., MSVC can't call ps() otherwise)
2379 call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
2380 }
2381
2382 void MacroAssembler::unimplemented(const char* what) {
2383 const char* buf = nullptr;
2384 {
2385 ResourceMark rm;
2386 stringStream ss;
2387 ss.print("unimplemented: %s", what);
2388 buf = code_string(ss.as_string());
2389 }
2390 stop(buf);
2391 }
2392
2393 #define XSTATE_BV 0x200
2394
2395 void MacroAssembler::pop_CPU_state() {
3696 xorptr(temp, temp); // use _zero reg to clear memory (shorter code)
3697 if (UseIncDec) {
3698 shrptr(index, 3); // divide by 8/16 and set carry flag if bit 2 was set
3699 } else {
3700 shrptr(index, 2); // use 2 instructions to avoid partial flag stall
3701 shrptr(index, 1);
3702 }
3703
3704 // initialize remaining object fields: index is a multiple of 2 now
3705 {
3706 Label loop;
3707 bind(loop);
3708 movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
3709 decrement(index);
3710 jcc(Assembler::notZero, loop);
3711 }
3712
3713 bind(done);
3714 }
3715
3716 // Look up the method for a megamorphic invokeinterface call.
3717 // The target method is determined by <intf_klass, itable_index>.
3718 // The receiver klass is in recv_klass.
3719 // On success, the result will be in method_result, and execution falls through.
3720 // On failure, execution transfers to the given label.
3721 void MacroAssembler::lookup_interface_method(Register recv_klass,
3722 Register intf_klass,
3723 RegisterOrConstant itable_index,
3724 Register method_result,
3725 Register scan_temp,
3726 Label& L_no_such_interface,
3727 bool return_method) {
3728 assert_different_registers(recv_klass, intf_klass, scan_temp);
3729 assert_different_registers(method_result, intf_klass, scan_temp);
3730 assert(recv_klass != method_result || !return_method,
3731 "recv_klass can be destroyed when method isn't needed");
3732
3733 assert(itable_index.is_constant() || itable_index.as_register() == method_result,
3734 "caller must use same register for non-constant itable index as for method");
3735
4746 } else {
4747 Label L;
4748 jccb(negate_condition(cc), L);
4749 movl(dst, src);
4750 bind(L);
4751 }
4752 }
4753
4754 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
4755 if (VM_Version::supports_cmov()) {
4756 cmovl(cc, dst, src);
4757 } else {
4758 Label L;
4759 jccb(negate_condition(cc), L);
4760 movl(dst, src);
4761 bind(L);
4762 }
4763 }
4764
4765 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
4766 if (!VerifyOops) return;
4767
4768 BLOCK_COMMENT("verify_oop {");
4769 push(rscratch1);
4770 push(rax); // save rax
4771 push(reg); // pass register argument
4772
4773 // Pass register number to verify_oop_subroutine
4774 const char* b = nullptr;
4775 {
4776 ResourceMark rm;
4777 stringStream ss;
4778 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
4779 b = code_string(ss.as_string());
4780 }
4781 AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
4782 pushptr(buffer.addr(), rscratch1);
4783
4784 // call indirectly to solve generation ordering problem
4785 movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
4786 call(rax);
5002 // or something else. Since this is a slow path, we can optimize for code density,
5003 // and just restart the search from the beginning.
5004 jmpb(L_restart);
5005
5006 // Counter updates:
5007
5008 // Increment polymorphic counter instead of receiver slot.
5009 bind(L_polymorphic);
5010 movptr(offset, poly_count_offset);
5011 jmpb(L_count_update);
5012
5013 // Found a receiver, convert its slot offset to corresponding count offset.
5014 bind(L_found_recv);
5015 addptr(offset, receiver_to_count_step);
5016
5017 bind(L_count_update);
5018 addptr(Address(mdp, offset, Address::times_ptr), DataLayout::counter_increment);
5019 }
5020
5021 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
5022 if (!VerifyOops) return;
5023
5024 push(rscratch1);
5025 push(rax); // save rax,
5026 // addr may contain rsp so we will have to adjust it based on the push
5027 // we just did (and on 64 bit we do two pushes)
5028 // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
5029 // stores rax into addr which is backwards of what was intended.
5030 if (addr.uses(rsp)) {
5031 lea(rax, addr);
5032 pushptr(Address(rax, 2 * BytesPerWord));
5033 } else {
5034 pushptr(addr);
5035 }
5036
5037 // Pass register number to verify_oop_subroutine
5038 const char* b = nullptr;
5039 {
5040 ResourceMark rm;
5041 stringStream ss;
5042 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
5394
5395 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
5396 // get mirror
5397 const int mirror_offset = in_bytes(Klass::java_mirror_offset());
5398 load_method_holder(mirror, method);
5399 movptr(mirror, Address(mirror, mirror_offset));
5400 resolve_oop_handle(mirror, tmp);
5401 }
5402
5403 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5404 load_method_holder(rresult, rmethod);
5405 movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5406 }
5407
5408 void MacroAssembler::load_method_holder(Register holder, Register method) {
5409 movptr(holder, Address(method, Method::const_offset())); // ConstMethod*
5410 movptr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5411 movptr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5412 }
5413
5414 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5415 assert(UseCompactObjectHeaders, "expect compact object headers");
5416 movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5417 shrq(dst, markWord::klass_shift);
5418 }
5419
5420 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
5421 assert_different_registers(src, tmp);
5422 assert_different_registers(dst, tmp);
5423
5424 if (UseCompactObjectHeaders) {
5425 load_narrow_klass_compact(dst, src);
5426 decode_klass_not_null(dst, tmp);
5427 } else {
5428 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5429 decode_klass_not_null(dst, tmp);
5430 }
5431 }
5432
5433 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
5434 assert(!UseCompactObjectHeaders, "not with compact headers");
5435 assert_different_registers(src, tmp);
5436 assert_different_registers(dst, tmp);
5437 encode_klass_not_null(src, tmp);
5438 movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5439 }
5440
5441 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
5442 if (UseCompactObjectHeaders) {
5443 assert(tmp != noreg, "need tmp");
5444 assert_different_registers(klass, obj, tmp);
5445 load_narrow_klass_compact(tmp, obj);
5446 cmpl(klass, tmp);
5447 } else {
5448 cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
5449 }
5450 }
5451
5452 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5469 bool as_raw = (decorators & AS_RAW) != 0;
5470 if (as_raw) {
5471 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
5472 } else {
5473 bs->load_at(this, decorators, type, dst, src, tmp1);
5474 }
5475 }
5476
5477 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
5478 Register tmp1, Register tmp2, Register tmp3) {
5479 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5480 decorators = AccessInternal::decorator_fixup(decorators, type);
5481 bool as_raw = (decorators & AS_RAW) != 0;
5482 if (as_raw) {
5483 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5484 } else {
5485 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5486 }
5487 }
5488
5489 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5490 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
5491 }
5492
5493 // Doesn't do verification, generates fixed size code
5494 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5495 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
5496 }
5497
5498 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5499 Register tmp2, Register tmp3, DecoratorSet decorators) {
5500 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5501 }
5502
5503 // Used for storing nulls.
5504 void MacroAssembler::store_heap_oop_null(Address dst) {
5505 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5506 }
5507
5508 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5831 assert (oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5832 int klass_index = oop_recorder()->find_index(k);
5833 RelocationHolder rspec = metadata_Relocation::spec(klass_index);
5834 Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
5835 }
5836
5837 void MacroAssembler::reinit_heapbase() {
5838 if (UseCompressedOops) {
5839 if (Universe::heap() != nullptr && !AOTCodeCache::is_on_for_dump()) {
5840 if (CompressedOops::base() == nullptr) {
5841 MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
5842 } else {
5843 mov64(r12_heapbase, (int64_t)CompressedOops::base());
5844 }
5845 } else {
5846 movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
5847 }
5848 }
5849 }
5850
5851 #ifdef COMPILER2
5852
5853 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
5854 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
5855 // cnt - number of qwords (8-byte words).
5856 // base - start address, qword aligned.
5857 Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
5858 bool use64byteVector = (MaxVectorSize == 64) && (CopyAVX3Threshold == 0);
5859 if (use64byteVector) {
5860 vpxor(xtmp, xtmp, xtmp, AVX_512bit);
5861 } else if (MaxVectorSize >= 32) {
5862 vpxor(xtmp, xtmp, xtmp, AVX_256bit);
5863 } else {
5864 pxor(xtmp, xtmp);
5865 }
5866 jmp(L_zero_64_bytes);
5867
5868 BIND(L_loop);
5869 if (MaxVectorSize >= 32) {
5870 fill64(base, 0, xtmp, use64byteVector);
5871 } else {
5872 movdqu(Address(base, 0), xtmp);
5873 movdqu(Address(base, 16), xtmp);
5874 movdqu(Address(base, 32), xtmp);
5875 movdqu(Address(base, 48), xtmp);
5876 }
5877 addptr(base, 64);
5878
5879 BIND(L_zero_64_bytes);
5880 subptr(cnt, 8);
5881 jccb(Assembler::greaterEqual, L_loop);
5882
5883 // Copy trailing 64 bytes
5884 if (use64byteVector) {
5885 addptr(cnt, 8);
5886 jccb(Assembler::equal, L_end);
5887 fill64_masked(3, base, 0, xtmp, mask, cnt, rtmp, true);
5888 jmp(L_end);
5889 } else {
5890 addptr(cnt, 4);
5891 jccb(Assembler::less, L_tail);
5892 if (MaxVectorSize >= 32) {
5893 vmovdqu(Address(base, 0), xtmp);
5894 } else {
5895 movdqu(Address(base, 0), xtmp);
5896 movdqu(Address(base, 16), xtmp);
5897 }
5898 }
5899 addptr(base, 32);
5900 subptr(cnt, 4);
5901
5902 BIND(L_tail);
5903 addptr(cnt, 4);
5904 jccb(Assembler::lessEqual, L_end);
5905 if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
5906 fill32_masked(3, base, 0, xtmp, mask, cnt, rtmp);
5907 } else {
5908 decrement(cnt);
5909
5910 BIND(L_sloop);
5911 movq(Address(base, 0), xtmp);
5912 addptr(base, 8);
5913 decrement(cnt);
5914 jccb(Assembler::greaterEqual, L_sloop);
5915 }
5916 BIND(L_end);
5917 }
5918
5919 // Clearing constant sized memory using YMM/ZMM registers.
5920 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
5921 assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
5922 bool use64byteVector = (MaxVectorSize > 32) && (CopyAVX3Threshold == 0);
5923
5924 int vector64_count = (cnt & (~0x7)) >> 3;
5925 cnt = cnt & 0x7;
5926 const int fill64_per_loop = 4;
5988 break;
5989 case 7:
5990 if (use64byteVector) {
5991 movl(rtmp, 0x7F);
5992 kmovwl(mask, rtmp);
5993 evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
5994 } else {
5995 evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
5996 movl(rtmp, 0x7);
5997 kmovwl(mask, rtmp);
5998 evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
5999 }
6000 break;
6001 default:
6002 fatal("Unexpected length : %d\n",cnt);
6003 break;
6004 }
6005 }
6006 }
6007
6008 void MacroAssembler::clear_mem(Register base, Register cnt, Register tmp, XMMRegister xtmp,
6009 bool is_large, KRegister mask) {
6010 // cnt - number of qwords (8-byte words).
6011 // base - start address, qword aligned.
6012 // is_large - if optimizers know cnt is larger than InitArrayShortSize
6013 assert(base==rdi, "base register must be edi for rep stos");
6014 assert(tmp==rax, "tmp register must be eax for rep stos");
6015 assert(cnt==rcx, "cnt register must be ecx for rep stos");
6016 assert(InitArrayShortSize % BytesPerLong == 0,
6017 "InitArrayShortSize should be the multiple of BytesPerLong");
6018
6019 Label DONE;
6020 if (!is_large || !UseXMMForObjInit) {
6021 xorptr(tmp, tmp);
6022 }
6023
6024 if (!is_large) {
6025 Label LOOP, LONG;
6026 cmpptr(cnt, InitArrayShortSize/BytesPerLong);
6027 jccb(Assembler::greater, LONG);
6028
6029 decrement(cnt);
6030 jccb(Assembler::negative, DONE); // Zero length
6031
6032 // Use individual pointer-sized stores for small counts:
6033 BIND(LOOP);
6034 movptr(Address(base, cnt, Address::times_ptr), tmp);
6035 decrement(cnt);
6036 jccb(Assembler::greaterEqual, LOOP);
6037 jmpb(DONE);
6038
6039 BIND(LONG);
6040 }
6041
6042 // Use longer rep-prefixed ops for non-small counts:
6043 if (UseFastStosb) {
6044 shlptr(cnt, 3); // convert to number of bytes
6045 rep_stosb();
6046 } else if (UseXMMForObjInit) {
6047 xmm_clear_mem(base, cnt, tmp, xtmp, mask);
6048 } else {
6049 rep_stos();
6050 }
6051
6052 BIND(DONE);
6053 }
6054
6055 #endif //COMPILER2
6056
6057
6058 void MacroAssembler::generate_fill(BasicType t, bool aligned,
6059 Register to, Register value, Register count,
6060 Register rtmp, XMMRegister xtmp) {
6061 ShortBranchVerifier sbv(this);
6062 assert_different_registers(to, value, count, rtmp);
6063 Label L_exit;
6064 Label L_fill_2_bytes, L_fill_4_bytes;
6065
6066 #if defined(COMPILER2)
6067 if(MaxVectorSize >=32 &&
9944
9945 // Load top.
9946 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
9947
9948 // Check if the lock-stack is full.
9949 cmpl(top, LockStack::end_offset());
9950 jcc(Assembler::greaterEqual, slow);
9951
9952 // Check for recursion.
9953 cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
9954 jcc(Assembler::equal, push);
9955
9956 // Check header for monitor (0b10).
9957 testptr(reg_rax, markWord::monitor_value);
9958 jcc(Assembler::notZero, slow);
9959
9960 // Try to lock. Transition lock bits 0b01 => 0b00
9961 movptr(tmp, reg_rax);
9962 andptr(tmp, ~(int32_t)markWord::unlocked_value);
9963 orptr(reg_rax, markWord::unlocked_value);
9964 lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
9965 jcc(Assembler::notEqual, slow);
9966
9967 // Restore top, CAS clobbers register.
9968 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
9969
9970 bind(push);
9971 // After successful lock, push object on lock-stack.
9972 movptr(Address(thread, top), obj);
9973 incrementl(top, oopSize);
9974 movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
9975 }
9976
9977 // Implements fast-unlocking.
9978 //
9979 // obj: the object to be unlocked
9980 // reg_rax: rax
9981 // thread: the thread
9982 // tmp: a temporary register
9983 void MacroAssembler::fast_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {
|
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/assembler.hpp"
26 #include "asm/assembler.inline.hpp"
27 #include "code/aotCodeCache.hpp"
28 #include "code/compiledIC.hpp"
29 #include "compiler/compiler_globals.hpp"
30 #include "compiler/disassembler.hpp"
31 #include "ci/ciInlineKlass.hpp"
32 #include "crc32c.h"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/collectedHeap.inline.hpp"
36 #include "gc/shared/tlab_globals.hpp"
37 #include "interpreter/bytecodeHistogram.hpp"
38 #include "interpreter/interpreter.hpp"
39 #include "interpreter/interpreterRuntime.hpp"
40 #include "jvm.h"
41 #include "memory/resourceArea.hpp"
42 #include "memory/universe.hpp"
43 #include "oops/accessDecorators.hpp"
44 #include "oops/compressedKlass.inline.hpp"
45 #include "oops/compressedOops.inline.hpp"
46 #include "oops/klass.inline.hpp"
47 #include "oops/resolvedFieldEntry.hpp"
48 #include "prims/methodHandles.hpp"
49 #include "runtime/arguments.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/interfaceSupport.inline.hpp"
52 #include "runtime/javaThread.hpp"
53 #include "runtime/jniHandles.hpp"
54 #include "runtime/objectMonitor.hpp"
55 #include "runtime/os.hpp"
56 #include "runtime/safepoint.hpp"
57 #include "runtime/safepointMechanism.hpp"
58 #include "runtime/sharedRuntime.hpp"
59 #include "runtime/signature_cc.hpp"
60 #include "runtime/stubRoutines.hpp"
61 #include "utilities/checkedCast.hpp"
62 #include "utilities/globalDefinitions.hpp"
63 #include "utilities/macros.hpp"
64 #include "vmreg_x86.inline.hpp"
65 #ifdef COMPILER2
66 #include "opto/output.hpp"
67 #endif
68
69 #ifdef PRODUCT
70 #define BLOCK_COMMENT(str) /* nothing */
71 #define STOP(error) stop(error)
72 #else
73 #define BLOCK_COMMENT(str) block_comment(str)
74 #define STOP(error) block_comment(error); stop(error)
75 #endif
76
77 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
78
79 #ifdef ASSERT
80 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
81 #endif
82
83 static const Assembler::Condition reverse[] = {
84 Assembler::noOverflow /* overflow = 0x0 */ ,
85 Assembler::overflow /* noOverflow = 0x1 */ ,
86 Assembler::aboveEqual /* carrySet = 0x2, below = 0x2 */ ,
87 Assembler::below /* aboveEqual = 0x3, carryClear = 0x3 */ ,
1293 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1294 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1295 assert_different_registers(arg_1, c_rarg2);
1296 pass_arg2(this, arg_2);
1297 pass_arg1(this, arg_1);
1298 pass_arg0(this, arg_0);
1299 call_VM_leaf(entry_point, 3);
1300 }
1301
1302 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
1303 assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
1304 assert_different_registers(arg_1, c_rarg2, c_rarg3);
1305 assert_different_registers(arg_2, c_rarg3);
1306 pass_arg3(this, arg_3);
1307 pass_arg2(this, arg_2);
1308 pass_arg1(this, arg_1);
1309 pass_arg0(this, arg_0);
1310 call_VM_leaf(entry_point, 3);
1311 }
1312
1313 void MacroAssembler::super_call_VM_leaf(address entry_point) {
1314 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1315 }
1316
1317 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
1318 pass_arg0(this, arg_0);
1319 MacroAssembler::call_VM_leaf_base(entry_point, 1);
1320 }
1321
1322 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
1323 assert_different_registers(arg_0, c_rarg1);
1324 pass_arg1(this, arg_1);
1325 pass_arg0(this, arg_0);
1326 MacroAssembler::call_VM_leaf_base(entry_point, 2);
1327 }
1328
1329 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
1330 assert_different_registers(arg_0, c_rarg1, c_rarg2);
1331 assert_different_registers(arg_1, c_rarg2);
1332 pass_arg2(this, arg_2);
1333 pass_arg1(this, arg_1);
1334 pass_arg0(this, arg_0);
1335 MacroAssembler::call_VM_leaf_base(entry_point, 3);
1336 }
2368 lea(rscratch, src);
2369 Assembler::mulss(dst, Address(rscratch, 0));
2370 }
2371 }
2372
2373 void MacroAssembler::null_check(Register reg, int offset) {
2374 if (needs_explicit_null_check(offset)) {
2375 // provoke OS null exception if reg is null by
2376 // accessing M[reg] w/o changing any (non-CC) registers
2377 // NOTE: cmpl is plenty here to provoke a segv
2378 cmpptr(rax, Address(reg, 0));
2379 // Note: should probably use testl(rax, Address(reg, 0));
2380 // may be shorter code (however, this version of
2381 // testl needs to be implemented first)
2382 } else {
2383 // nothing to do, (later) access of M[reg + offset]
2384 // will provoke OS null exception if reg is null
2385 }
2386 }
2387
2388 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2389 andptr(markword, markWord::inline_type_pattern_mask);
2390 cmpptr(markword, markWord::inline_type_pattern);
2391 jcc(Assembler::equal, is_inline_type);
2392 }
2393
2394 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
2395 if (can_be_null) {
2396 testptr(object, object);
2397 jcc(Assembler::zero, not_inline_type);
2398 }
2399 const int is_inline_type_mask = markWord::inline_type_pattern;
2400 movptr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2401 andptr(tmp, is_inline_type_mask);
2402 cmpptr(tmp, is_inline_type_mask);
2403 jcc(Assembler::notEqual, not_inline_type);
2404 }
2405
2406 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2407 movl(temp_reg, flags);
2408 testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
2409 jcc(Assembler::notEqual, is_null_free_inline_type);
2410 }
2411
2412 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2413 movl(temp_reg, flags);
2414 testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
2415 jcc(Assembler::equal, not_null_free_inline_type);
2416 }
2417
2418 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2419 movl(temp_reg, flags);
2420 testl(temp_reg, 1 << ResolvedFieldEntry::is_flat_shift);
2421 jcc(Assembler::notEqual, is_flat);
2422 }
2423
2424 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2425 Label test_mark_word;
2426 // load mark word
2427 movptr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2428 // check displaced
2429 testl(temp_reg, markWord::unlocked_value);
2430 jccb(Assembler::notZero, test_mark_word);
2431 // slow path use klass prototype
2432 push(rscratch1);
2433 load_prototype_header(temp_reg, oop, rscratch1);
2434 pop(rscratch1);
2435
2436 bind(test_mark_word);
2437 testl(temp_reg, test_bit);
2438 jcc((jmp_set) ? Assembler::notZero : Assembler::zero, jmp_label);
2439 }
2440
2441 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg,
2442 Label& is_flat_array) {
2443 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2444 }
2445
2446 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2447 Label& is_non_flat_array) {
2448 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2449 }
2450
2451 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label&is_null_free_array) {
2452 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2453 }
2454
2455 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2456 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2457 }
2458
2459 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2460 testl(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2461 jcc(Assembler::notZero, is_flat_array);
2462 }
2463
2464 void MacroAssembler::os_breakpoint() {
2465 // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
2466 // (e.g., MSVC can't call ps() otherwise)
2467 call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
2468 }
2469
2470 void MacroAssembler::unimplemented(const char* what) {
2471 const char* buf = nullptr;
2472 {
2473 ResourceMark rm;
2474 stringStream ss;
2475 ss.print("unimplemented: %s", what);
2476 buf = code_string(ss.as_string());
2477 }
2478 stop(buf);
2479 }
2480
2481 #define XSTATE_BV 0x200
2482
2483 void MacroAssembler::pop_CPU_state() {
3784 xorptr(temp, temp); // use _zero reg to clear memory (shorter code)
3785 if (UseIncDec) {
3786 shrptr(index, 3); // divide by 8/16 and set carry flag if bit 2 was set
3787 } else {
3788 shrptr(index, 2); // use 2 instructions to avoid partial flag stall
3789 shrptr(index, 1);
3790 }
3791
3792 // initialize remaining object fields: index is a multiple of 2 now
3793 {
3794 Label loop;
3795 bind(loop);
3796 movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
3797 decrement(index);
3798 jcc(Assembler::notZero, loop);
3799 }
3800
3801 bind(done);
3802 }
3803
3804 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
3805 movptr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
3806 #ifdef ASSERT
3807 {
3808 Label done;
3809 cmpptr(layout_info, 0);
3810 jcc(Assembler::notEqual, done);
3811 stop("inline_layout_info_array is null");
3812 bind(done);
3813 }
3814 #endif
3815
3816 InlineLayoutInfo array[2];
3817 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
3818 if (is_power_of_2(size)) {
3819 shll(index, log2i_exact(size)); // Scale index by power of 2
3820 } else {
3821 imull(index, index, size); // Scale the index to be the entry index * array_element_size
3822 }
3823 lea(layout_info, Address(layout_info, index, Address::times_1, Array<InlineLayoutInfo>::base_offset_in_bytes()));
3824 }
3825
3826 // Look up the method for a megamorphic invokeinterface call.
3827 // The target method is determined by <intf_klass, itable_index>.
3828 // The receiver klass is in recv_klass.
3829 // On success, the result will be in method_result, and execution falls through.
3830 // On failure, execution transfers to the given label.
3831 void MacroAssembler::lookup_interface_method(Register recv_klass,
3832 Register intf_klass,
3833 RegisterOrConstant itable_index,
3834 Register method_result,
3835 Register scan_temp,
3836 Label& L_no_such_interface,
3837 bool return_method) {
3838 assert_different_registers(recv_klass, intf_klass, scan_temp);
3839 assert_different_registers(method_result, intf_klass, scan_temp);
3840 assert(recv_klass != method_result || !return_method,
3841 "recv_klass can be destroyed when method isn't needed");
3842
3843 assert(itable_index.is_constant() || itable_index.as_register() == method_result,
3844 "caller must use same register for non-constant itable index as for method");
3845
4856 } else {
4857 Label L;
4858 jccb(negate_condition(cc), L);
4859 movl(dst, src);
4860 bind(L);
4861 }
4862 }
4863
4864 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
4865 if (VM_Version::supports_cmov()) {
4866 cmovl(cc, dst, src);
4867 } else {
4868 Label L;
4869 jccb(negate_condition(cc), L);
4870 movl(dst, src);
4871 bind(L);
4872 }
4873 }
4874
4875 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
4876 if (!VerifyOops || VerifyAdapterSharing) {
4877 // Below address of the code string confuses VerifyAdapterSharing
4878 // because it may differ between otherwise equivalent adapters.
4879 return;
4880 }
4881
4882 BLOCK_COMMENT("verify_oop {");
4883 push(rscratch1);
4884 push(rax); // save rax
4885 push(reg); // pass register argument
4886
4887 // Pass register number to verify_oop_subroutine
4888 const char* b = nullptr;
4889 {
4890 ResourceMark rm;
4891 stringStream ss;
4892 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
4893 b = code_string(ss.as_string());
4894 }
4895 AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
4896 pushptr(buffer.addr(), rscratch1);
4897
4898 // call indirectly to solve generation ordering problem
4899 movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
4900 call(rax);
5116 // or something else. Since this is a slow path, we can optimize for code density,
5117 // and just restart the search from the beginning.
5118 jmpb(L_restart);
5119
5120 // Counter updates:
5121
5122 // Increment polymorphic counter instead of receiver slot.
5123 bind(L_polymorphic);
5124 movptr(offset, poly_count_offset);
5125 jmpb(L_count_update);
5126
5127 // Found a receiver, convert its slot offset to corresponding count offset.
5128 bind(L_found_recv);
5129 addptr(offset, receiver_to_count_step);
5130
5131 bind(L_count_update);
5132 addptr(Address(mdp, offset, Address::times_ptr), DataLayout::counter_increment);
5133 }
5134
5135 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
5136 if (!VerifyOops || VerifyAdapterSharing) {
5137 // Below address of the code string confuses VerifyAdapterSharing
5138 // because it may differ between otherwise equivalent adapters.
5139 return;
5140 }
5141
5142 push(rscratch1);
5143 push(rax); // save rax,
5144 // addr may contain rsp so we will have to adjust it based on the push
5145 // we just did (and on 64 bit we do two pushes)
5146 // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
5147 // stores rax into addr which is backwards of what was intended.
5148 if (addr.uses(rsp)) {
5149 lea(rax, addr);
5150 pushptr(Address(rax, 2 * BytesPerWord));
5151 } else {
5152 pushptr(addr);
5153 }
5154
5155 // Pass register number to verify_oop_subroutine
5156 const char* b = nullptr;
5157 {
5158 ResourceMark rm;
5159 stringStream ss;
5160 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
5512
5513 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
5514 // get mirror
5515 const int mirror_offset = in_bytes(Klass::java_mirror_offset());
5516 load_method_holder(mirror, method);
5517 movptr(mirror, Address(mirror, mirror_offset));
5518 resolve_oop_handle(mirror, tmp);
5519 }
5520
5521 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5522 load_method_holder(rresult, rmethod);
5523 movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5524 }
5525
5526 void MacroAssembler::load_method_holder(Register holder, Register method) {
5527 movptr(holder, Address(method, Method::const_offset())); // ConstMethod*
5528 movptr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5529 movptr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5530 }
5531
5532 void MacroAssembler::load_metadata(Register dst, Register src) {
5533 if (UseCompactObjectHeaders) {
5534 load_narrow_klass_compact(dst, src);
5535 } else {
5536 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5537 }
5538 }
5539
5540 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5541 assert(UseCompactObjectHeaders, "expect compact object headers");
5542 movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5543 shrq(dst, markWord::klass_shift);
5544 }
5545
5546 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
5547 assert_different_registers(src, tmp);
5548 assert_different_registers(dst, tmp);
5549
5550 if (UseCompactObjectHeaders) {
5551 load_narrow_klass_compact(dst, src);
5552 decode_klass_not_null(dst, tmp);
5553 } else {
5554 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5555 decode_klass_not_null(dst, tmp);
5556 }
5557 }
5558
5559 void MacroAssembler::load_prototype_header(Register dst, Register src, Register tmp) {
5560 load_klass(dst, src, tmp);
5561 movptr(dst, Address(dst, Klass::prototype_header_offset()));
5562 }
5563
5564 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
5565 assert(!UseCompactObjectHeaders, "not with compact headers");
5566 assert_different_registers(src, tmp);
5567 assert_different_registers(dst, tmp);
5568 encode_klass_not_null(src, tmp);
5569 movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
5570 }
5571
5572 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
5573 if (UseCompactObjectHeaders) {
5574 assert(tmp != noreg, "need tmp");
5575 assert_different_registers(klass, obj, tmp);
5576 load_narrow_klass_compact(tmp, obj);
5577 cmpl(klass, tmp);
5578 } else {
5579 cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
5580 }
5581 }
5582
5583 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5600 bool as_raw = (decorators & AS_RAW) != 0;
5601 if (as_raw) {
5602 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
5603 } else {
5604 bs->load_at(this, decorators, type, dst, src, tmp1);
5605 }
5606 }
5607
5608 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
5609 Register tmp1, Register tmp2, Register tmp3) {
5610 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5611 decorators = AccessInternal::decorator_fixup(decorators, type);
5612 bool as_raw = (decorators & AS_RAW) != 0;
5613 if (as_raw) {
5614 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5615 } else {
5616 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5617 }
5618 }
5619
5620 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5621 Register inline_layout_info) {
5622 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5623 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5624 }
5625
5626 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5627 movptr(offset, Address(inline_klass, InlineKlass::adr_members_offset()));
5628 movl(offset, Address(offset, InlineKlass::payload_offset_offset()));
5629 }
5630
5631 void MacroAssembler::payload_addr(Register oop, Register data, Register inline_klass) {
5632 // ((address) (void*) o) + vk->payload_offset();
5633 Register offset = (data == oop) ? rscratch1 : data;
5634 payload_offset(inline_klass, offset);
5635 if (data == oop) {
5636 addptr(data, offset);
5637 } else {
5638 lea(data, Address(oop, offset));
5639 }
5640 }
5641
5642 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5643 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
5644 }
5645
5646 // Doesn't do verification, generates fixed size code
5647 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
5648 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
5649 }
5650
5651 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5652 Register tmp2, Register tmp3, DecoratorSet decorators) {
5653 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5654 }
5655
5656 // Used for storing nulls.
5657 void MacroAssembler::store_heap_oop_null(Address dst) {
5658 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5659 }
5660
5661 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5984 assert (oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5985 int klass_index = oop_recorder()->find_index(k);
5986 RelocationHolder rspec = metadata_Relocation::spec(klass_index);
5987 Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
5988 }
5989
5990 void MacroAssembler::reinit_heapbase() {
5991 if (UseCompressedOops) {
5992 if (Universe::heap() != nullptr && !AOTCodeCache::is_on_for_dump()) {
5993 if (CompressedOops::base() == nullptr) {
5994 MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
5995 } else {
5996 mov64(r12_heapbase, (int64_t)CompressedOops::base());
5997 }
5998 } else {
5999 movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
6000 }
6001 }
6002 }
6003
6004 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
6005 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
6006 // An inline type might be returned. If fields are in registers we
6007 // need to allocate an inline type instance and initialize it with
6008 // the value of the fields.
6009 Label skip;
6010 // We only need a new buffered inline type if a new one is not returned
6011 testptr(rax, 1);
6012 jcc(Assembler::zero, skip);
6013 int call_offset = -1;
6014
6015 // The following code is similar to allocation code in TemplateTable::_new but has some slight differences,
6016 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
6017 // allocating is not necessary if vk != nullptr, etc.
6018 Label slow_case;
6019 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
6020 mov(rscratch1, rax); // save rax for slow_case since *_allocate may corrupt it when allocation failed
6021 if (vk != nullptr) {
6022 // Called from C1, where the return type is statically known.
6023 movptr(rbx, (intptr_t)vk->get_InlineKlass());
6024 jint lh = vk->layout_helper();
6025 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
6026 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
6027 tlab_allocate(rax, noreg, lh, r13, r14, slow_case);
6028 } else {
6029 jmp(slow_case);
6030 }
6031 } else {
6032 // Call from interpreter. RAX contains ((the InlineKlass* of the return type) | 0x01)
6033 mov(rbx, rax);
6034 andptr(rbx, -2);
6035 if (UseTLAB) {
6036 movl(r14, Address(rbx, Klass::layout_helper_offset()));
6037 testl(r14, Klass::_lh_instance_slow_path_bit);
6038 jcc(Assembler::notZero, slow_case);
6039 tlab_allocate(rax, r14, 0, r13, r14, slow_case);
6040 } else {
6041 jmp(slow_case);
6042 }
6043 }
6044 if (UseTLAB) {
6045 // 2. Initialize buffered inline instance header
6046 Register buffer_obj = rax;
6047 Register klass = rbx;
6048 if (UseCompactObjectHeaders) {
6049 Register mark_word = r13;
6050 movptr(mark_word, Address(klass, Klass::prototype_header_offset()));
6051 movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes()), mark_word);
6052 } else {
6053 movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes()), (intptr_t)markWord::inline_type_prototype().value());
6054 xorl(r13, r13);
6055 store_klass_gap(buffer_obj, r13);
6056 if (vk == nullptr) {
6057 // store_klass corrupts rbx(klass), so save it in r13 for later use (interpreter case only).
6058 mov(r13, klass);
6059 }
6060 store_klass(buffer_obj, klass, rscratch1);
6061 klass = r13;
6062 }
6063 // 3. Initialize its fields with an inline class specific handler
6064 if (vk != nullptr) {
6065 call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
6066 } else {
6067 movptr(rbx, Address(klass, InlineKlass::adr_members_offset()));
6068 movptr(rbx, Address(rbx, InlineKlass::pack_handler_offset()));
6069 call(rbx);
6070 }
6071 jmp(skip);
6072 }
6073 bind(slow_case);
6074 // We failed to allocate a new inline type, fall back to a runtime
6075 // call. Some oop field may be live in some registers but we can't
6076 // tell. That runtime call will take care of preserving them
6077 // across a GC if there's one.
6078 mov(rax, rscratch1);
6079
6080 if (from_interpreter) {
6081 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
6082 } else {
6083 call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
6084 call_offset = offset();
6085 }
6086
6087 bind(skip);
6088 return call_offset;
6089 }
6090
6091 // Move a value between registers/stack slots and update the reg_state
6092 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
6093 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
6094 if (reg_state[to->value()] == reg_written) {
6095 return true; // Already written
6096 }
6097 if (from != to && bt != T_VOID) {
6098 if (reg_state[to->value()] == reg_readonly) {
6099 return false; // Not yet writable
6100 }
6101 if (from->is_reg()) {
6102 if (to->is_reg()) {
6103 if (from->is_XMMRegister()) {
6104 if (bt == T_DOUBLE) {
6105 movdbl(to->as_XMMRegister(), from->as_XMMRegister());
6106 } else {
6107 assert(bt == T_FLOAT, "must be float");
6108 movflt(to->as_XMMRegister(), from->as_XMMRegister());
6109 }
6110 } else {
6111 movq(to->as_Register(), from->as_Register());
6112 }
6113 } else {
6114 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6115 Address to_addr = Address(rsp, st_off);
6116 if (from->is_XMMRegister()) {
6117 if (bt == T_DOUBLE) {
6118 movdbl(to_addr, from->as_XMMRegister());
6119 } else {
6120 assert(bt == T_FLOAT, "must be float");
6121 movflt(to_addr, from->as_XMMRegister());
6122 }
6123 } else {
6124 movq(to_addr, from->as_Register());
6125 }
6126 }
6127 } else {
6128 Address from_addr = Address(rsp, from->reg2stack() * VMRegImpl::stack_slot_size + wordSize);
6129 if (to->is_reg()) {
6130 if (to->is_XMMRegister()) {
6131 if (bt == T_DOUBLE) {
6132 movdbl(to->as_XMMRegister(), from_addr);
6133 } else {
6134 assert(bt == T_FLOAT, "must be float");
6135 movflt(to->as_XMMRegister(), from_addr);
6136 }
6137 } else {
6138 movq(to->as_Register(), from_addr);
6139 }
6140 } else {
6141 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6142 movq(r13, from_addr);
6143 movq(Address(rsp, st_off), r13);
6144 }
6145 }
6146 }
6147 // Update register states
6148 reg_state[from->value()] = reg_writable;
6149 reg_state[to->value()] = reg_written;
6150 return true;
6151 }
6152
6153 // Calculate the extra stack space required for packing or unpacking inline
6154 // args and adjust the stack pointer (see MacroAssembler::remove_frame).
6155 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
6156 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
6157 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
6158 assert(sp_inc > 0, "sanity");
6159 // Two additional slots to account for return address
6160 sp_inc += 2 * VMRegImpl::stack_slot_size;
6161
6162 push(rbp);
6163 subptr(rsp, sp_inc);
6164 #ifdef ASSERT
6165 movl(Address(rsp, 0), badRegWordVal);
6166 movl(Address(rsp, VMRegImpl::stack_slot_size), badRegWordVal);
6167 #endif
6168 return sp_inc + wordSize; // account for rbp space
6169 }
6170
6171 // Read all fields from an inline type buffer and store the field values in registers/stack slots.
6172 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
6173 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
6174 RegState reg_state[]) {
6175 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
6176 assert(from->is_valid(), "source must be valid");
6177 bool progress = false;
6178 #ifdef ASSERT
6179 const int start_offset = offset();
6180 #endif
6181
6182 Label L_null, L_notNull;
6183 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
6184 Register tmp1 = r10;
6185 Register tmp2 = r13;
6186 Register fromReg = noreg;
6187 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
6188 bool done = true;
6189 bool mark_done = true;
6190 VMReg toReg;
6191 BasicType bt;
6192 // Check if argument requires a null check
6193 bool null_check = false;
6194 VMReg nullCheckReg;
6195 while (stream.next(nullCheckReg, bt)) {
6196 if (sig->at(stream.sig_index())._offset == -1) {
6197 null_check = true;
6198 break;
6199 }
6200 }
6201 stream.reset(sig_index, to_index);
6202 while (stream.next(toReg, bt)) {
6203 assert(toReg->is_valid(), "destination must be valid");
6204 int idx = (int)toReg->value();
6205 if (reg_state[idx] == reg_readonly) {
6206 if (idx != from->value()) {
6207 mark_done = false;
6208 }
6209 done = false;
6210 continue;
6211 } else if (reg_state[idx] == reg_written) {
6212 continue;
6213 }
6214 assert(reg_state[idx] == reg_writable, "must be writable");
6215 reg_state[idx] = reg_written;
6216 progress = true;
6217
6218 if (fromReg == noreg) {
6219 if (from->is_reg()) {
6220 fromReg = from->as_Register();
6221 } else {
6222 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6223 movq(tmp1, Address(rsp, st_off));
6224 fromReg = tmp1;
6225 }
6226 if (null_check) {
6227 // Nullable inline type argument, emit null check
6228 testptr(fromReg, fromReg);
6229 jcc(Assembler::zero, L_null);
6230 }
6231 }
6232 int off = sig->at(stream.sig_index())._offset;
6233 if (off == -1) {
6234 assert(null_check, "Missing null check at");
6235 if (toReg->is_stack()) {
6236 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6237 movq(Address(rsp, st_off), 1);
6238 } else {
6239 movq(toReg->as_Register(), 1);
6240 }
6241 continue;
6242 }
6243 if (sig->at(stream.sig_index())._vt_oop) {
6244 if (toReg->is_stack()) {
6245 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6246 movq(Address(rsp, st_off), fromReg);
6247 } else {
6248 movq(toReg->as_Register(), fromReg);
6249 }
6250 continue;
6251 }
6252 assert(off > 0, "offset in object should be positive");
6253 Address fromAddr = Address(fromReg, off);
6254 if (!toReg->is_XMMRegister()) {
6255 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
6256 if (is_reference_type(bt)) {
6257 load_heap_oop(dst, fromAddr);
6258 } else {
6259 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
6260 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
6261 }
6262 if (toReg->is_stack()) {
6263 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6264 movq(Address(rsp, st_off), dst);
6265 }
6266 } else if (bt == T_DOUBLE) {
6267 movdbl(toReg->as_XMMRegister(), fromAddr);
6268 } else {
6269 assert(bt == T_FLOAT, "must be float");
6270 movflt(toReg->as_XMMRegister(), fromAddr);
6271 }
6272 }
6273 if (progress && null_check) {
6274 if (done) {
6275 jmp(L_notNull);
6276 bind(L_null);
6277 // Set null marker to zero to signal that the argument is null.
6278 // Also set all fields to zero since the runtime requires a canonical
6279 // representation of a flat null.
6280 stream.reset(sig_index, to_index);
6281 while (stream.next(toReg, bt)) {
6282 if (toReg->is_stack()) {
6283 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6284 movq(Address(rsp, st_off), 0);
6285 } else if (toReg->is_XMMRegister()) {
6286 xorps(toReg->as_XMMRegister(), toReg->as_XMMRegister());
6287 } else {
6288 xorl(toReg->as_Register(), toReg->as_Register());
6289 }
6290 }
6291 bind(L_notNull);
6292 } else {
6293 bind(L_null);
6294 }
6295 }
6296
6297 sig_index = stream.sig_index();
6298 to_index = stream.regs_index();
6299
6300 if (mark_done && reg_state[from->value()] != reg_written) {
6301 // This is okay because no one else will write to that slot
6302 reg_state[from->value()] = reg_writable;
6303 }
6304 from_index--;
6305 assert(progress || (start_offset == offset()), "should not emit code");
6306 return done;
6307 }
6308
6309 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
6310 VMRegPair* from, int from_count, int& from_index, VMReg to,
6311 RegState reg_state[], Register val_array) {
6312 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
6313 assert(to->is_valid(), "destination must be valid");
6314
6315 if (reg_state[to->value()] == reg_written) {
6316 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
6317 return true; // Already written
6318 }
6319
6320 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
6321 Register val_obj_tmp = r11;
6322 Register from_reg_tmp = r14;
6323 Register tmp1 = r10;
6324 Register tmp2 = r13;
6325 Register tmp3 = rbx;
6326 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
6327
6328 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
6329
6330 if (reg_state[to->value()] == reg_readonly) {
6331 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
6332 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
6333 return false; // Not yet writable
6334 }
6335 val_obj = val_obj_tmp;
6336 }
6337
6338 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
6339 VMReg fromReg;
6340 BasicType bt;
6341 Label L_null;
6342 while (stream.next(fromReg, bt)) {
6343 assert(fromReg->is_valid(), "source must be valid");
6344 reg_state[fromReg->value()] = reg_writable;
6345
6346 int off = sig->at(stream.sig_index())._offset;
6347 if (off == -1) {
6348 // Nullable inline type argument, emit null check
6349 Label L_notNull;
6350 if (fromReg->is_stack()) {
6351 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6352 testb(Address(rsp, ld_off), 1);
6353 } else {
6354 testb(fromReg->as_Register(), 1);
6355 }
6356 jcc(Assembler::notZero, L_notNull);
6357 movptr(val_obj, 0);
6358 jmp(L_null);
6359 bind(L_notNull);
6360 continue;
6361 }
6362 if (sig->at(stream.sig_index())._vt_oop) {
6363 // buffer argument: use if non null
6364 if (fromReg->is_stack()) {
6365 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6366 movptr(val_obj, Address(rsp, ld_off));
6367 } else {
6368 movptr(val_obj, fromReg->as_Register());
6369 }
6370 testptr(val_obj, val_obj);
6371 jcc(Assembler::notEqual, L_null);
6372 // otherwise get the buffer from the just allocated pool of buffers
6373 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
6374 load_heap_oop(val_obj, Address(val_array, index));
6375 continue;
6376 }
6377
6378 assert(off > 0, "offset in object should be positive");
6379 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
6380
6381 // Pack the scalarized field into the value object.
6382 Address dst(val_obj, off);
6383 if (!fromReg->is_XMMRegister()) {
6384 Register src;
6385 if (fromReg->is_stack()) {
6386 src = from_reg_tmp;
6387 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
6388 load_sized_value(src, Address(rsp, ld_off), size_in_bytes, /* is_signed */ false);
6389 } else {
6390 src = fromReg->as_Register();
6391 }
6392 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
6393 if (is_reference_type(bt)) {
6394 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep val_obj valid.
6395 mov(tmp3, val_obj);
6396 Address dst_with_tmp3(tmp3, off);
6397 store_heap_oop(dst_with_tmp3, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
6398 } else {
6399 store_sized_value(dst, src, size_in_bytes);
6400 }
6401 } else if (bt == T_DOUBLE) {
6402 movdbl(dst, fromReg->as_XMMRegister());
6403 } else {
6404 assert(bt == T_FLOAT, "must be float");
6405 movflt(dst, fromReg->as_XMMRegister());
6406 }
6407 }
6408 bind(L_null);
6409 sig_index = stream.sig_index();
6410 from_index = stream.regs_index();
6411
6412 assert(reg_state[to->value()] == reg_writable, "must have already been read");
6413 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
6414 assert(success, "to register must be writable");
6415 return true;
6416 }
6417
6418 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
6419 return reg->is_XMMRegister() ? xmm8->as_VMReg() : r14->as_VMReg();
6420 }
6421
6422 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6423 assert((initial_framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6424 if (needs_stack_repair) {
6425 // The method has a scalarized entry point (where fields of value object arguments
6426 // are passed through registers and stack), and a non-scalarized entry point (where
6427 // value object arguments are given as oops). The non-scalarized entry point will
6428 // first load each field of value object arguments and store them in registers and on
6429 // the stack in a way compatible with the scalarized entry point. To do so, some extra
6430 // stack space might be reserved (if argument registers are not enough). On leaving the
6431 // method, this space must be freed.
6432 //
6433 // In case we used the non-scalarized entry point the stack looks like this:
6434 //
6435 // | Arguments from caller |
6436 // |---------------------------| <-- caller's SP
6437 // | Return address #1 |
6438 // | Saved RBP #1 |
6439 // |---------------------------|
6440 // | Extension space for |
6441 // | inline arg (un)packing |
6442 // |---------------------------| <-- start of this method's frame
6443 // | Return address #2 |
6444 // | Saved RBP #2 |
6445 // |---------------------------| <-- RBP (with -XX:+PreserveFramePointer)
6446 // | sp_inc |
6447 // | method locals |
6448 // |---------------------------| <-- SP
6449 //
6450 // Space for the return pc and saved rbp is reserved twice. But only the #1 copies
6451 // contain the real values of return pc and saved rbp. The #2 copies are not reliable
6452 // and should not be used. They are mostly needed to add space between the extension
6453 // space and the locals, as there would be between the real arguments and the locals
6454 // if we don't need to do unpacking (from the scalarized entry point).
6455 //
6456 // When leaving, one must load RBP #1 into RBP, and use the copy #1 of the return address,
6457 // while keeping in mind that from the scalarized entry point, there will be only one
6458 // copy. Indeed, in the case we used the scalarized calling convention, the stack looks like this:
6459 //
6460 // | Arguments from caller |
6461 // |---------------------------| <-- caller's SP
6462 // | Return address |
6463 // | Saved RBP |
6464 // |---------------------------| <-- FP (with -XX:+PreserveFramePointer)
6465 // | sp_inc |
6466 // | method locals |
6467 // |---------------------------| <-- SP
6468 //
6469 // The sp_inc stack slot holds the total size of the frame, including the extension
6470 // space and copies #2 of the return address and the saved RBP (but never the copies
6471 // #1 of the return address and saved RBP). That is how to find the copies #1 of the
6472 // return address and saved rbp. This size is expressed in bytes. Be careful when using
6473 // it from C++ in pointer arithmetic you might need to divide it by wordSize.
6474
6475 // The stack increment resides just below the saved rbp
6476 addq(rsp, Address(rsp, initial_framesize - wordSize));
6477 pop(rbp);
6478 } else {
6479 if (initial_framesize > 0) {
6480 addq(rsp, initial_framesize);
6481 }
6482 pop(rbp);
6483 }
6484 }
6485
6486 #ifdef COMPILER2
6487
6488 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
6489 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp, KRegister mask) {
6490 // cnt - number of qwords (8-byte words).
6491 // base - start address, qword aligned.
6492 Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
6493 bool use64byteVector = (MaxVectorSize == 64) && (CopyAVX3Threshold == 0);
6494 if (use64byteVector) {
6495 evpbroadcastq(xtmp, val, AVX_512bit);
6496 } else if (MaxVectorSize >= 32) {
6497 movdq(xtmp, val);
6498 punpcklqdq(xtmp, xtmp);
6499 vinserti128_high(xtmp, xtmp);
6500 } else {
6501 movdq(xtmp, val);
6502 punpcklqdq(xtmp, xtmp);
6503 }
6504 jmp(L_zero_64_bytes);
6505
6506 BIND(L_loop);
6507 if (MaxVectorSize >= 32) {
6508 fill64(base, 0, xtmp, use64byteVector);
6509 } else {
6510 movdqu(Address(base, 0), xtmp);
6511 movdqu(Address(base, 16), xtmp);
6512 movdqu(Address(base, 32), xtmp);
6513 movdqu(Address(base, 48), xtmp);
6514 }
6515 addptr(base, 64);
6516
6517 BIND(L_zero_64_bytes);
6518 subptr(cnt, 8);
6519 jccb(Assembler::greaterEqual, L_loop);
6520
6521 // Copy trailing 64 bytes
6522 if (use64byteVector) {
6523 addptr(cnt, 8);
6524 jccb(Assembler::equal, L_end);
6525 fill64_masked(3, base, 0, xtmp, mask, cnt, val, true);
6526 jmp(L_end);
6527 } else {
6528 addptr(cnt, 4);
6529 jccb(Assembler::less, L_tail);
6530 if (MaxVectorSize >= 32) {
6531 vmovdqu(Address(base, 0), xtmp);
6532 } else {
6533 movdqu(Address(base, 0), xtmp);
6534 movdqu(Address(base, 16), xtmp);
6535 }
6536 }
6537 addptr(base, 32);
6538 subptr(cnt, 4);
6539
6540 BIND(L_tail);
6541 addptr(cnt, 4);
6542 jccb(Assembler::lessEqual, L_end);
6543 if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
6544 fill32_masked(3, base, 0, xtmp, mask, cnt, val);
6545 } else {
6546 decrement(cnt);
6547
6548 BIND(L_sloop);
6549 movq(Address(base, 0), xtmp);
6550 addptr(base, 8);
6551 decrement(cnt);
6552 jccb(Assembler::greaterEqual, L_sloop);
6553 }
6554 BIND(L_end);
6555 }
6556
6557 // Clearing constant sized memory using YMM/ZMM registers.
6558 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
6559 assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
6560 bool use64byteVector = (MaxVectorSize > 32) && (CopyAVX3Threshold == 0);
6561
6562 int vector64_count = (cnt & (~0x7)) >> 3;
6563 cnt = cnt & 0x7;
6564 const int fill64_per_loop = 4;
6626 break;
6627 case 7:
6628 if (use64byteVector) {
6629 movl(rtmp, 0x7F);
6630 kmovwl(mask, rtmp);
6631 evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
6632 } else {
6633 evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
6634 movl(rtmp, 0x7);
6635 kmovwl(mask, rtmp);
6636 evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
6637 }
6638 break;
6639 default:
6640 fatal("Unexpected length : %d\n",cnt);
6641 break;
6642 }
6643 }
6644 }
6645
6646 void MacroAssembler::clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp,
6647 bool is_large, bool word_copy_only, KRegister mask) {
6648 // cnt - number of qwords (8-byte words).
6649 // base - start address, qword aligned.
6650 // is_large - if optimizers know cnt is larger than InitArrayShortSize
6651 assert(base==rdi, "base register must be edi for rep stos");
6652 assert(val==rax, "val register must be eax for rep stos");
6653 assert(cnt==rcx, "cnt register must be ecx for rep stos");
6654 assert(InitArrayShortSize % BytesPerLong == 0,
6655 "InitArrayShortSize should be the multiple of BytesPerLong");
6656
6657 Label DONE;
6658
6659 if (!is_large) {
6660 Label LOOP, LONG;
6661 cmpptr(cnt, InitArrayShortSize/BytesPerLong);
6662 jccb(Assembler::greater, LONG);
6663
6664 decrement(cnt);
6665 jccb(Assembler::negative, DONE); // Zero length
6666
6667 // Use individual pointer-sized stores for small counts:
6668 BIND(LOOP);
6669 movptr(Address(base, cnt, Address::times_ptr), val);
6670 decrement(cnt);
6671 jccb(Assembler::greaterEqual, LOOP);
6672 jmpb(DONE);
6673
6674 BIND(LONG);
6675 }
6676
6677 // Use longer rep-prefixed ops for non-small counts:
6678 if (UseFastStosb && !word_copy_only) {
6679 shlptr(cnt, 3); // convert to number of bytes
6680 rep_stosb();
6681 } else if (UseXMMForObjInit) {
6682 xmm_clear_mem(base, cnt, val, xtmp, mask);
6683 } else {
6684 rep_stos();
6685 }
6686
6687 BIND(DONE);
6688 }
6689
6690 #endif //COMPILER2
6691
6692
6693 void MacroAssembler::generate_fill(BasicType t, bool aligned,
6694 Register to, Register value, Register count,
6695 Register rtmp, XMMRegister xtmp) {
6696 ShortBranchVerifier sbv(this);
6697 assert_different_registers(to, value, count, rtmp);
6698 Label L_exit;
6699 Label L_fill_2_bytes, L_fill_4_bytes;
6700
6701 #if defined(COMPILER2)
6702 if(MaxVectorSize >=32 &&
10579
10580 // Load top.
10581 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10582
10583 // Check if the lock-stack is full.
10584 cmpl(top, LockStack::end_offset());
10585 jcc(Assembler::greaterEqual, slow);
10586
10587 // Check for recursion.
10588 cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
10589 jcc(Assembler::equal, push);
10590
10591 // Check header for monitor (0b10).
10592 testptr(reg_rax, markWord::monitor_value);
10593 jcc(Assembler::notZero, slow);
10594
10595 // Try to lock. Transition lock bits 0b01 => 0b00
10596 movptr(tmp, reg_rax);
10597 andptr(tmp, ~(int32_t)markWord::unlocked_value);
10598 orptr(reg_rax, markWord::unlocked_value);
10599 // Mask inline_type bit such that we go to the slow path if object is an inline type
10600 andptr(reg_rax, ~((int) markWord::inline_type_bit_in_place));
10601
10602 lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
10603 jcc(Assembler::notEqual, slow);
10604
10605 // Restore top, CAS clobbers register.
10606 movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10607
10608 bind(push);
10609 // After successful lock, push object on lock-stack.
10610 movptr(Address(thread, top), obj);
10611 incrementl(top, oopSize);
10612 movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
10613 }
10614
10615 // Implements fast-unlocking.
10616 //
10617 // obj: the object to be unlocked
10618 // reg_rax: rax
10619 // thread: the thread
10620 // tmp: a temporary register
10621 void MacroAssembler::fast_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {
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