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src/hotspot/cpu/x86/macroAssembler_x86.cpp

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   11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
   12  * version 2 for more details (a copy is included in the LICENSE file that
   13  * accompanied this code).
   14  *
   15  * You should have received a copy of the GNU General Public License version
   16  * 2 along with this work; if not, write to the Free Software Foundation,
   17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
   18  *
   19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
   20  * or visit www.oracle.com if you need additional information or have any
   21  * questions.
   22  *
   23  */
   24 
   25 #include "asm/assembler.hpp"
   26 #include "asm/assembler.inline.hpp"
   27 #include "code/aotCodeCache.hpp"
   28 #include "code/compiledIC.hpp"
   29 #include "compiler/compiler_globals.hpp"
   30 #include "compiler/disassembler.hpp"

   31 #include "crc32c.h"
   32 #include "gc/shared/barrierSet.hpp"
   33 #include "gc/shared/barrierSetAssembler.hpp"
   34 #include "gc/shared/collectedHeap.inline.hpp"
   35 #include "gc/shared/tlab_globals.hpp"
   36 #include "interpreter/bytecodeHistogram.hpp"
   37 #include "interpreter/interpreter.hpp"
   38 #include "interpreter/interpreterRuntime.hpp"
   39 #include "jvm.h"
   40 #include "memory/resourceArea.hpp"
   41 #include "memory/universe.hpp"
   42 #include "oops/accessDecorators.hpp"
   43 #include "oops/compressedKlass.inline.hpp"
   44 #include "oops/compressedOops.inline.hpp"
   45 #include "oops/klass.inline.hpp"

   46 #include "prims/methodHandles.hpp"

   47 #include "runtime/continuation.hpp"
   48 #include "runtime/interfaceSupport.inline.hpp"
   49 #include "runtime/javaThread.hpp"
   50 #include "runtime/jniHandles.hpp"
   51 #include "runtime/objectMonitor.hpp"
   52 #include "runtime/os.hpp"
   53 #include "runtime/safepoint.hpp"
   54 #include "runtime/safepointMechanism.hpp"
   55 #include "runtime/sharedRuntime.hpp"

   56 #include "runtime/stubRoutines.hpp"
   57 #include "utilities/checkedCast.hpp"
   58 #include "utilities/macros.hpp"




   59 
   60 #ifdef PRODUCT
   61 #define BLOCK_COMMENT(str) /* nothing */
   62 #define STOP(error) stop(error)
   63 #else
   64 #define BLOCK_COMMENT(str) block_comment(str)
   65 #define STOP(error) block_comment(error); stop(error)
   66 #endif
   67 
   68 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
   69 
   70 #ifdef ASSERT
   71 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
   72 #endif
   73 
   74 static const Assembler::Condition reverse[] = {
   75     Assembler::noOverflow     /* overflow      = 0x0 */ ,
   76     Assembler::overflow       /* noOverflow    = 0x1 */ ,
   77     Assembler::aboveEqual     /* carrySet      = 0x2, below         = 0x2 */ ,
   78     Assembler::below          /* aboveEqual    = 0x3, carryClear    = 0x3 */ ,

 1283 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
 1284   assert_different_registers(arg_0, c_rarg1, c_rarg2);
 1285   assert_different_registers(arg_1, c_rarg2);
 1286   pass_arg2(this, arg_2);
 1287   pass_arg1(this, arg_1);
 1288   pass_arg0(this, arg_0);
 1289   call_VM_leaf(entry_point, 3);
 1290 }
 1291 
 1292 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
 1293   assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
 1294   assert_different_registers(arg_1, c_rarg2, c_rarg3);
 1295   assert_different_registers(arg_2, c_rarg3);
 1296   pass_arg3(this, arg_3);
 1297   pass_arg2(this, arg_2);
 1298   pass_arg1(this, arg_1);
 1299   pass_arg0(this, arg_0);
 1300   call_VM_leaf(entry_point, 3);
 1301 }
 1302 




 1303 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
 1304   pass_arg0(this, arg_0);
 1305   MacroAssembler::call_VM_leaf_base(entry_point, 1);
 1306 }
 1307 
 1308 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
 1309   assert_different_registers(arg_0, c_rarg1);
 1310   pass_arg1(this, arg_1);
 1311   pass_arg0(this, arg_0);
 1312   MacroAssembler::call_VM_leaf_base(entry_point, 2);
 1313 }
 1314 
 1315 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
 1316   assert_different_registers(arg_0, c_rarg1, c_rarg2);
 1317   assert_different_registers(arg_1, c_rarg2);
 1318   pass_arg2(this, arg_2);
 1319   pass_arg1(this, arg_1);
 1320   pass_arg0(this, arg_0);
 1321   MacroAssembler::call_VM_leaf_base(entry_point, 3);
 1322 }

 2354     lea(rscratch, src);
 2355     Assembler::mulss(dst, Address(rscratch, 0));
 2356   }
 2357 }
 2358 
 2359 void MacroAssembler::null_check(Register reg, int offset) {
 2360   if (needs_explicit_null_check(offset)) {
 2361     // provoke OS null exception if reg is null by
 2362     // accessing M[reg] w/o changing any (non-CC) registers
 2363     // NOTE: cmpl is plenty here to provoke a segv
 2364     cmpptr(rax, Address(reg, 0));
 2365     // Note: should probably use testl(rax, Address(reg, 0));
 2366     //       may be shorter code (however, this version of
 2367     //       testl needs to be implemented first)
 2368   } else {
 2369     // nothing to do, (later) access of M[reg + offset]
 2370     // will provoke OS null exception if reg is null
 2371   }
 2372 }
 2373 











































































































 2374 void MacroAssembler::os_breakpoint() {
 2375   // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
 2376   // (e.g., MSVC can't call ps() otherwise)
 2377   call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
 2378 }
 2379 
 2380 void MacroAssembler::unimplemented(const char* what) {
 2381   const char* buf = nullptr;
 2382   {
 2383     ResourceMark rm;
 2384     stringStream ss;
 2385     ss.print("unimplemented: %s", what);
 2386     buf = code_string(ss.as_string());
 2387   }
 2388   stop(buf);
 2389 }
 2390 
 2391 #define XSTATE_BV 0x200
 2392 
 2393 void MacroAssembler::pop_CPU_state() {

 3480 }
 3481 
 3482 // C++ bool manipulation
 3483 void MacroAssembler::testbool(Register dst) {
 3484   if(sizeof(bool) == 1)
 3485     testb(dst, 0xff);
 3486   else if(sizeof(bool) == 2) {
 3487     // testw implementation needed for two byte bools
 3488     ShouldNotReachHere();
 3489   } else if(sizeof(bool) == 4)
 3490     testl(dst, dst);
 3491   else
 3492     // unsupported
 3493     ShouldNotReachHere();
 3494 }
 3495 
 3496 void MacroAssembler::testptr(Register dst, Register src) {
 3497   testq(dst, src);
 3498 }
 3499 






















































































































 3500 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
 3501 void MacroAssembler::tlab_allocate(Register obj,
 3502                                    Register var_size_in_bytes,
 3503                                    int con_size_in_bytes,
 3504                                    Register t1,
 3505                                    Register t2,
 3506                                    Label& slow_case) {
 3507   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 3508   bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
 3509 }
 3510 
 3511 RegSet MacroAssembler::call_clobbered_gp_registers() {
 3512   RegSet regs;
 3513   regs += RegSet::of(rax, rcx, rdx);
 3514 #ifndef _WINDOWS
 3515   regs += RegSet::of(rsi, rdi);
 3516 #endif
 3517   regs += RegSet::range(r8, r11);
 3518   if (UseAPX) {
 3519     regs += RegSet::range(r16, as_Register(Register::number_of_registers - 1));

 3683   xorptr(temp, temp);    // use _zero reg to clear memory (shorter code)
 3684   if (UseIncDec) {
 3685     shrptr(index, 3);  // divide by 8/16 and set carry flag if bit 2 was set
 3686   } else {
 3687     shrptr(index, 2);  // use 2 instructions to avoid partial flag stall
 3688     shrptr(index, 1);
 3689   }
 3690 
 3691   // initialize remaining object fields: index is a multiple of 2 now
 3692   {
 3693     Label loop;
 3694     bind(loop);
 3695     movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
 3696     decrement(index);
 3697     jcc(Assembler::notZero, loop);
 3698   }
 3699 
 3700   bind(done);
 3701 }
 3702 






















 3703 // Look up the method for a megamorphic invokeinterface call.
 3704 // The target method is determined by <intf_klass, itable_index>.
 3705 // The receiver klass is in recv_klass.
 3706 // On success, the result will be in method_result, and execution falls through.
 3707 // On failure, execution transfers to the given label.
 3708 void MacroAssembler::lookup_interface_method(Register recv_klass,
 3709                                              Register intf_klass,
 3710                                              RegisterOrConstant itable_index,
 3711                                              Register method_result,
 3712                                              Register scan_temp,
 3713                                              Label& L_no_such_interface,
 3714                                              bool return_method) {
 3715   assert_different_registers(recv_klass, intf_klass, scan_temp);
 3716   assert_different_registers(method_result, intf_klass, scan_temp);
 3717   assert(recv_klass != method_result || !return_method,
 3718          "recv_klass can be destroyed when method isn't needed");
 3719 
 3720   assert(itable_index.is_constant() || itable_index.as_register() == method_result,
 3721          "caller must use same register for non-constant itable index as for method");
 3722 

 4733   } else {
 4734     Label L;
 4735     jccb(negate_condition(cc), L);
 4736     movl(dst, src);
 4737     bind(L);
 4738   }
 4739 }
 4740 
 4741 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
 4742   if (VM_Version::supports_cmov()) {
 4743     cmovl(cc, dst, src);
 4744   } else {
 4745     Label L;
 4746     jccb(negate_condition(cc), L);
 4747     movl(dst, src);
 4748     bind(L);
 4749   }
 4750 }
 4751 
 4752 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
 4753   if (!VerifyOops) return;




 4754 
 4755   BLOCK_COMMENT("verify_oop {");
 4756   push(rscratch1);
 4757   push(rax);                          // save rax
 4758   push(reg);                          // pass register argument
 4759 
 4760   // Pass register number to verify_oop_subroutine
 4761   const char* b = nullptr;
 4762   {
 4763     ResourceMark rm;
 4764     stringStream ss;
 4765     ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
 4766     b = code_string(ss.as_string());
 4767   }
 4768   AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
 4769   pushptr(buffer.addr(), rscratch1);
 4770 
 4771   // call indirectly to solve generation ordering problem
 4772   movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
 4773   call(rax);

 4989   // or something else. Since this is a slow path, we can optimize for code density,
 4990   // and just restart the search from the beginning.
 4991   jmpb(L_restart);
 4992 
 4993   // Counter updates:
 4994 
 4995   // Increment polymorphic counter instead of receiver slot.
 4996   bind(L_polymorphic);
 4997   movptr(offset, poly_count_offset);
 4998   jmpb(L_count_update);
 4999 
 5000   // Found a receiver, convert its slot offset to corresponding count offset.
 5001   bind(L_found_recv);
 5002   addptr(offset, receiver_to_count_step);
 5003 
 5004   bind(L_count_update);
 5005   addptr(Address(mdp, offset, Address::times_ptr), DataLayout::counter_increment);
 5006 }
 5007 
 5008 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
 5009   if (!VerifyOops) return;




 5010 
 5011   push(rscratch1);
 5012   push(rax); // save rax,
 5013   // addr may contain rsp so we will have to adjust it based on the push
 5014   // we just did (and on 64 bit we do two pushes)
 5015   // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
 5016   // stores rax into addr which is backwards of what was intended.
 5017   if (addr.uses(rsp)) {
 5018     lea(rax, addr);
 5019     pushptr(Address(rax, 2 * BytesPerWord));
 5020   } else {
 5021     pushptr(addr);
 5022   }
 5023 
 5024   // Pass register number to verify_oop_subroutine
 5025   const char* b = nullptr;
 5026   {
 5027     ResourceMark rm;
 5028     stringStream ss;
 5029     ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);

 5383 
 5384 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
 5385   // get mirror
 5386   const int mirror_offset = in_bytes(Klass::java_mirror_offset());
 5387   load_method_holder(mirror, method);
 5388   movptr(mirror, Address(mirror, mirror_offset));
 5389   resolve_oop_handle(mirror, tmp);
 5390 }
 5391 
 5392 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
 5393   load_method_holder(rresult, rmethod);
 5394   movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
 5395 }
 5396 
 5397 void MacroAssembler::load_method_holder(Register holder, Register method) {
 5398   movptr(holder, Address(method, Method::const_offset()));                      // ConstMethod*
 5399   movptr(holder, Address(holder, ConstMethod::constants_offset()));             // ConstantPool*
 5400   movptr(holder, Address(holder, ConstantPool::pool_holder_offset()));          // InstanceKlass*
 5401 }
 5402 








 5403 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
 5404   assert(UseCompactObjectHeaders, "expect compact object headers");
 5405   movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
 5406   shrq(dst, markWord::klass_shift);
 5407 }
 5408 
 5409 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
 5410   assert_different_registers(src, tmp);
 5411   assert_different_registers(dst, tmp);
 5412 
 5413   if (UseCompactObjectHeaders) {
 5414     load_narrow_klass_compact(dst, src);
 5415     decode_klass_not_null(dst, tmp);
 5416   } else {
 5417     movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 5418     decode_klass_not_null(dst, tmp);
 5419   }
 5420 }
 5421 





 5422 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
 5423   assert(!UseCompactObjectHeaders, "not with compact headers");
 5424   assert_different_registers(src, tmp);
 5425   assert_different_registers(dst, tmp);
 5426   encode_klass_not_null(src, tmp);
 5427   movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
 5428 }
 5429 
 5430 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
 5431   if (UseCompactObjectHeaders) {
 5432     assert(tmp != noreg, "need tmp");
 5433     assert_different_registers(klass, obj, tmp);
 5434     load_narrow_klass_compact(tmp, obj);
 5435     cmpl(klass, tmp);
 5436   } else {
 5437     cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
 5438   }
 5439 }
 5440 
 5441 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {

 5458   bool as_raw = (decorators & AS_RAW) != 0;
 5459   if (as_raw) {
 5460     bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
 5461   } else {
 5462     bs->load_at(this, decorators, type, dst, src, tmp1);
 5463   }
 5464 }
 5465 
 5466 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
 5467                                      Register tmp1, Register tmp2, Register tmp3) {
 5468   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 5469   decorators = AccessInternal::decorator_fixup(decorators, type);
 5470   bool as_raw = (decorators & AS_RAW) != 0;
 5471   if (as_raw) {
 5472     bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
 5473   } else {
 5474     bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
 5475   }
 5476 }
 5477 








































 5478 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
 5479   access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
 5480 }
 5481 
 5482 // Doesn't do verification, generates fixed size code
 5483 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
 5484   access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
 5485 }
 5486 
 5487 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
 5488                                     Register tmp2, Register tmp3, DecoratorSet decorators) {
 5489   access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
 5490 }
 5491 
 5492 // Used for storing nulls.
 5493 void MacroAssembler::store_heap_oop_null(Address dst) {
 5494   access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
 5495 }
 5496 
 5497 void MacroAssembler::store_klass_gap(Register dst, Register src) {

 5806   assert (oop_recorder() != nullptr, "this assembler needs an OopRecorder");
 5807   int klass_index = oop_recorder()->find_index(k);
 5808   RelocationHolder rspec = metadata_Relocation::spec(klass_index);
 5809   Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
 5810 }
 5811 
 5812 void MacroAssembler::reinit_heapbase() {
 5813   if (UseCompressedOops) {
 5814     if (Universe::heap() != nullptr) {
 5815       if (CompressedOops::base() == nullptr) {
 5816         MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
 5817       } else {
 5818         mov64(r12_heapbase, (int64_t)CompressedOops::base());
 5819       }
 5820     } else {
 5821       movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
 5822     }
 5823   }
 5824 }
 5825 





































































































































































































































































































































































































































































































 5826 #if COMPILER2_OR_JVMCI
 5827 
 5828 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
 5829 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
 5830   // cnt - number of qwords (8-byte words).
 5831   // base - start address, qword aligned.
 5832   Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
 5833   bool use64byteVector = (MaxVectorSize == 64) && (CopyAVX3Threshold == 0);
 5834   if (use64byteVector) {
 5835     vpxor(xtmp, xtmp, xtmp, AVX_512bit);
 5836   } else if (MaxVectorSize >= 32) {
 5837     vpxor(xtmp, xtmp, xtmp, AVX_256bit);


 5838   } else {
 5839     pxor(xtmp, xtmp);

 5840   }
 5841   jmp(L_zero_64_bytes);
 5842 
 5843   BIND(L_loop);
 5844   if (MaxVectorSize >= 32) {
 5845     fill64(base, 0, xtmp, use64byteVector);
 5846   } else {
 5847     movdqu(Address(base,  0), xtmp);
 5848     movdqu(Address(base, 16), xtmp);
 5849     movdqu(Address(base, 32), xtmp);
 5850     movdqu(Address(base, 48), xtmp);
 5851   }
 5852   addptr(base, 64);
 5853 
 5854   BIND(L_zero_64_bytes);
 5855   subptr(cnt, 8);
 5856   jccb(Assembler::greaterEqual, L_loop);
 5857 
 5858   // Copy trailing 64 bytes
 5859   if (use64byteVector) {
 5860     addptr(cnt, 8);
 5861     jccb(Assembler::equal, L_end);
 5862     fill64_masked(3, base, 0, xtmp, mask, cnt, rtmp, true);
 5863     jmp(L_end);
 5864   } else {
 5865     addptr(cnt, 4);
 5866     jccb(Assembler::less, L_tail);
 5867     if (MaxVectorSize >= 32) {
 5868       vmovdqu(Address(base, 0), xtmp);
 5869     } else {
 5870       movdqu(Address(base,  0), xtmp);
 5871       movdqu(Address(base, 16), xtmp);
 5872     }
 5873   }
 5874   addptr(base, 32);
 5875   subptr(cnt, 4);
 5876 
 5877   BIND(L_tail);
 5878   addptr(cnt, 4);
 5879   jccb(Assembler::lessEqual, L_end);
 5880   if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
 5881     fill32_masked(3, base, 0, xtmp, mask, cnt, rtmp);
 5882   } else {
 5883     decrement(cnt);
 5884 
 5885     BIND(L_sloop);
 5886     movq(Address(base, 0), xtmp);
 5887     addptr(base, 8);
 5888     decrement(cnt);
 5889     jccb(Assembler::greaterEqual, L_sloop);
 5890   }
 5891   BIND(L_end);
 5892 }
 5893 
 5894 // Clearing constant sized memory using YMM/ZMM registers.
 5895 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
 5896   assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
 5897   bool use64byteVector = (MaxVectorSize > 32) && (CopyAVX3Threshold == 0);
 5898 
 5899   int vector64_count = (cnt & (~0x7)) >> 3;
 5900   cnt = cnt & 0x7;
 5901   const int fill64_per_loop = 4;

 5963         break;
 5964       case 7:
 5965         if (use64byteVector) {
 5966           movl(rtmp, 0x7F);
 5967           kmovwl(mask, rtmp);
 5968           evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
 5969         } else {
 5970           evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
 5971           movl(rtmp, 0x7);
 5972           kmovwl(mask, rtmp);
 5973           evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
 5974         }
 5975         break;
 5976       default:
 5977         fatal("Unexpected length : %d\n",cnt);
 5978         break;
 5979     }
 5980   }
 5981 }
 5982 
 5983 void MacroAssembler::clear_mem(Register base, Register cnt, Register tmp, XMMRegister xtmp,
 5984                                bool is_large, KRegister mask) {
 5985   // cnt      - number of qwords (8-byte words).
 5986   // base     - start address, qword aligned.
 5987   // is_large - if optimizers know cnt is larger than InitArrayShortSize
 5988   assert(base==rdi, "base register must be edi for rep stos");
 5989   assert(tmp==rax,   "tmp register must be eax for rep stos");
 5990   assert(cnt==rcx,   "cnt register must be ecx for rep stos");
 5991   assert(InitArrayShortSize % BytesPerLong == 0,
 5992     "InitArrayShortSize should be the multiple of BytesPerLong");
 5993 
 5994   Label DONE;
 5995   if (!is_large || !UseXMMForObjInit) {
 5996     xorptr(tmp, tmp);
 5997   }
 5998 
 5999   if (!is_large) {
 6000     Label LOOP, LONG;
 6001     cmpptr(cnt, InitArrayShortSize/BytesPerLong);
 6002     jccb(Assembler::greater, LONG);
 6003 
 6004     decrement(cnt);
 6005     jccb(Assembler::negative, DONE); // Zero length
 6006 
 6007     // Use individual pointer-sized stores for small counts:
 6008     BIND(LOOP);
 6009     movptr(Address(base, cnt, Address::times_ptr), tmp);
 6010     decrement(cnt);
 6011     jccb(Assembler::greaterEqual, LOOP);
 6012     jmpb(DONE);
 6013 
 6014     BIND(LONG);
 6015   }
 6016 
 6017   // Use longer rep-prefixed ops for non-small counts:
 6018   if (UseFastStosb) {
 6019     shlptr(cnt, 3); // convert to number of bytes
 6020     rep_stosb();
 6021   } else if (UseXMMForObjInit) {
 6022     xmm_clear_mem(base, cnt, tmp, xtmp, mask);
 6023   } else {
 6024     rep_stos();
 6025   }
 6026 
 6027   BIND(DONE);
 6028 }
 6029 
 6030 #endif //COMPILER2_OR_JVMCI
 6031 
 6032 
 6033 void MacroAssembler::generate_fill(BasicType t, bool aligned,
 6034                                    Register to, Register value, Register count,
 6035                                    Register rtmp, XMMRegister xtmp) {
 6036   ShortBranchVerifier sbv(this);
 6037   assert_different_registers(to, value, count, rtmp);
 6038   Label L_exit;
 6039   Label L_fill_2_bytes, L_fill_4_bytes;
 6040 
 6041 #if defined(COMPILER2)
 6042   if(MaxVectorSize >=32 &&

 9921 
 9922   // Load top.
 9923   movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
 9924 
 9925   // Check if the lock-stack is full.
 9926   cmpl(top, LockStack::end_offset());
 9927   jcc(Assembler::greaterEqual, slow);
 9928 
 9929   // Check for recursion.
 9930   cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
 9931   jcc(Assembler::equal, push);
 9932 
 9933   // Check header for monitor (0b10).
 9934   testptr(reg_rax, markWord::monitor_value);
 9935   jcc(Assembler::notZero, slow);
 9936 
 9937   // Try to lock. Transition lock bits 0b01 => 0b00
 9938   movptr(tmp, reg_rax);
 9939   andptr(tmp, ~(int32_t)markWord::unlocked_value);
 9940   orptr(reg_rax, markWord::unlocked_value);



 9941   lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
 9942   jcc(Assembler::notEqual, slow);
 9943 
 9944   // Restore top, CAS clobbers register.
 9945   movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
 9946 
 9947   bind(push);
 9948   // After successful lock, push object on lock-stack.
 9949   movptr(Address(thread, top), obj);
 9950   incrementl(top, oopSize);
 9951   movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
 9952 }
 9953 
 9954 // Implements fast-unlocking.
 9955 //
 9956 // obj: the object to be unlocked
 9957 // reg_rax: rax
 9958 // thread: the thread
 9959 // tmp: a temporary register
 9960 void MacroAssembler::fast_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {

   11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
   12  * version 2 for more details (a copy is included in the LICENSE file that
   13  * accompanied this code).
   14  *
   15  * You should have received a copy of the GNU General Public License version
   16  * 2 along with this work; if not, write to the Free Software Foundation,
   17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
   18  *
   19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
   20  * or visit www.oracle.com if you need additional information or have any
   21  * questions.
   22  *
   23  */
   24 
   25 #include "asm/assembler.hpp"
   26 #include "asm/assembler.inline.hpp"
   27 #include "code/aotCodeCache.hpp"
   28 #include "code/compiledIC.hpp"
   29 #include "compiler/compiler_globals.hpp"
   30 #include "compiler/disassembler.hpp"
   31 #include "ci/ciInlineKlass.hpp"
   32 #include "crc32c.h"
   33 #include "gc/shared/barrierSet.hpp"
   34 #include "gc/shared/barrierSetAssembler.hpp"
   35 #include "gc/shared/collectedHeap.inline.hpp"
   36 #include "gc/shared/tlab_globals.hpp"
   37 #include "interpreter/bytecodeHistogram.hpp"
   38 #include "interpreter/interpreter.hpp"
   39 #include "interpreter/interpreterRuntime.hpp"
   40 #include "jvm.h"
   41 #include "memory/resourceArea.hpp"
   42 #include "memory/universe.hpp"
   43 #include "oops/accessDecorators.hpp"
   44 #include "oops/compressedKlass.inline.hpp"
   45 #include "oops/compressedOops.inline.hpp"
   46 #include "oops/klass.inline.hpp"
   47 #include "oops/resolvedFieldEntry.hpp"
   48 #include "prims/methodHandles.hpp"
   49 #include "runtime/arguments.hpp"
   50 #include "runtime/continuation.hpp"
   51 #include "runtime/interfaceSupport.inline.hpp"
   52 #include "runtime/javaThread.hpp"
   53 #include "runtime/jniHandles.hpp"
   54 #include "runtime/objectMonitor.hpp"
   55 #include "runtime/os.hpp"
   56 #include "runtime/safepoint.hpp"
   57 #include "runtime/safepointMechanism.hpp"
   58 #include "runtime/sharedRuntime.hpp"
   59 #include "runtime/signature_cc.hpp"
   60 #include "runtime/stubRoutines.hpp"
   61 #include "utilities/checkedCast.hpp"
   62 #include "utilities/macros.hpp"
   63 #include "vmreg_x86.inline.hpp"
   64 #ifdef COMPILER2
   65 #include "opto/output.hpp"
   66 #endif
   67 
   68 #ifdef PRODUCT
   69 #define BLOCK_COMMENT(str) /* nothing */
   70 #define STOP(error) stop(error)
   71 #else
   72 #define BLOCK_COMMENT(str) block_comment(str)
   73 #define STOP(error) block_comment(error); stop(error)
   74 #endif
   75 
   76 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
   77 
   78 #ifdef ASSERT
   79 bool AbstractAssembler::pd_check_instruction_mark() { return true; }
   80 #endif
   81 
   82 static const Assembler::Condition reverse[] = {
   83     Assembler::noOverflow     /* overflow      = 0x0 */ ,
   84     Assembler::overflow       /* noOverflow    = 0x1 */ ,
   85     Assembler::aboveEqual     /* carrySet      = 0x2, below         = 0x2 */ ,
   86     Assembler::below          /* aboveEqual    = 0x3, carryClear    = 0x3 */ ,

 1291 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
 1292   assert_different_registers(arg_0, c_rarg1, c_rarg2);
 1293   assert_different_registers(arg_1, c_rarg2);
 1294   pass_arg2(this, arg_2);
 1295   pass_arg1(this, arg_1);
 1296   pass_arg0(this, arg_0);
 1297   call_VM_leaf(entry_point, 3);
 1298 }
 1299 
 1300 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2, Register arg_3) {
 1301   assert_different_registers(arg_0, c_rarg1, c_rarg2, c_rarg3);
 1302   assert_different_registers(arg_1, c_rarg2, c_rarg3);
 1303   assert_different_registers(arg_2, c_rarg3);
 1304   pass_arg3(this, arg_3);
 1305   pass_arg2(this, arg_2);
 1306   pass_arg1(this, arg_1);
 1307   pass_arg0(this, arg_0);
 1308   call_VM_leaf(entry_point, 3);
 1309 }
 1310 
 1311 void MacroAssembler::super_call_VM_leaf(address entry_point) {
 1312   MacroAssembler::call_VM_leaf_base(entry_point, 1);
 1313 }
 1314 
 1315 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
 1316   pass_arg0(this, arg_0);
 1317   MacroAssembler::call_VM_leaf_base(entry_point, 1);
 1318 }
 1319 
 1320 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
 1321   assert_different_registers(arg_0, c_rarg1);
 1322   pass_arg1(this, arg_1);
 1323   pass_arg0(this, arg_0);
 1324   MacroAssembler::call_VM_leaf_base(entry_point, 2);
 1325 }
 1326 
 1327 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
 1328   assert_different_registers(arg_0, c_rarg1, c_rarg2);
 1329   assert_different_registers(arg_1, c_rarg2);
 1330   pass_arg2(this, arg_2);
 1331   pass_arg1(this, arg_1);
 1332   pass_arg0(this, arg_0);
 1333   MacroAssembler::call_VM_leaf_base(entry_point, 3);
 1334 }

 2366     lea(rscratch, src);
 2367     Assembler::mulss(dst, Address(rscratch, 0));
 2368   }
 2369 }
 2370 
 2371 void MacroAssembler::null_check(Register reg, int offset) {
 2372   if (needs_explicit_null_check(offset)) {
 2373     // provoke OS null exception if reg is null by
 2374     // accessing M[reg] w/o changing any (non-CC) registers
 2375     // NOTE: cmpl is plenty here to provoke a segv
 2376     cmpptr(rax, Address(reg, 0));
 2377     // Note: should probably use testl(rax, Address(reg, 0));
 2378     //       may be shorter code (however, this version of
 2379     //       testl needs to be implemented first)
 2380   } else {
 2381     // nothing to do, (later) access of M[reg + offset]
 2382     // will provoke OS null exception if reg is null
 2383   }
 2384 }
 2385 
 2386 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
 2387   andptr(markword, markWord::inline_type_pattern_mask);
 2388   cmpptr(markword, markWord::inline_type_pattern);
 2389   jcc(Assembler::equal, is_inline_type);
 2390 }
 2391 
 2392 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null) {
 2393   if (can_be_null) {
 2394     testptr(object, object);
 2395     jcc(Assembler::zero, not_inline_type);
 2396   }
 2397   const int is_inline_type_mask = markWord::inline_type_pattern;
 2398   movptr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
 2399   andptr(tmp, is_inline_type_mask);
 2400   cmpptr(tmp, is_inline_type_mask);
 2401   jcc(Assembler::notEqual, not_inline_type);
 2402 }
 2403 
 2404 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
 2405   movl(temp_reg, flags);
 2406   testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
 2407   jcc(Assembler::notEqual, is_null_free_inline_type);
 2408 }
 2409 
 2410 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
 2411   movl(temp_reg, flags);
 2412   testl(temp_reg, 1 << ResolvedFieldEntry::is_null_free_inline_type_shift);
 2413   jcc(Assembler::equal, not_null_free_inline_type);
 2414 }
 2415 
 2416 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
 2417   movl(temp_reg, flags);
 2418   testl(temp_reg, 1 << ResolvedFieldEntry::is_flat_shift);
 2419   jcc(Assembler::notEqual, is_flat);
 2420 }
 2421 
 2422 void MacroAssembler::test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker) {
 2423   movl(temp_reg, flags);
 2424   testl(temp_reg, 1 << ResolvedFieldEntry::has_null_marker_shift);
 2425   jcc(Assembler::notEqual, has_null_marker);
 2426 }
 2427 
 2428 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
 2429   Label test_mark_word;
 2430   // load mark word
 2431   movptr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
 2432   // check displaced
 2433   testl(temp_reg, markWord::unlocked_value);
 2434   jccb(Assembler::notZero, test_mark_word);
 2435   // slow path use klass prototype
 2436   push(rscratch1);
 2437   load_prototype_header(temp_reg, oop, rscratch1);
 2438   pop(rscratch1);
 2439 
 2440   bind(test_mark_word);
 2441   testl(temp_reg, test_bit);
 2442   jcc((jmp_set) ? Assembler::notZero : Assembler::zero, jmp_label);
 2443 }
 2444 
 2445 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg,
 2446                                          Label& is_flat_array) {
 2447 #ifdef _LP64
 2448   test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
 2449 #else
 2450   load_klass(temp_reg, oop, noreg);
 2451   movl(temp_reg, Address(temp_reg, Klass::layout_helper_offset()));
 2452   test_flat_array_layout(temp_reg, is_flat_array);
 2453 #endif
 2454 }
 2455 
 2456 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
 2457                                              Label& is_non_flat_array) {
 2458 #ifdef _LP64
 2459   test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
 2460 #else
 2461   load_klass(temp_reg, oop, noreg);
 2462   movl(temp_reg, Address(temp_reg, Klass::layout_helper_offset()));
 2463   test_non_flat_array_layout(temp_reg, is_non_flat_array);
 2464 #endif
 2465 }
 2466 
 2467 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label&is_null_free_array) {
 2468 #ifdef _LP64
 2469   test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
 2470 #else
 2471   Unimplemented();
 2472 #endif
 2473 }
 2474 
 2475 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
 2476 #ifdef _LP64
 2477   test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
 2478 #else
 2479   Unimplemented();
 2480 #endif
 2481 }
 2482 
 2483 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
 2484   testl(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
 2485   jcc(Assembler::notZero, is_flat_array);
 2486 }
 2487 
 2488 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
 2489   testl(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
 2490   jcc(Assembler::zero, is_non_flat_array);
 2491 }
 2492 
 2493 void MacroAssembler::os_breakpoint() {
 2494   // instead of directly emitting a breakpoint, call os:breakpoint for better debugability
 2495   // (e.g., MSVC can't call ps() otherwise)
 2496   call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
 2497 }
 2498 
 2499 void MacroAssembler::unimplemented(const char* what) {
 2500   const char* buf = nullptr;
 2501   {
 2502     ResourceMark rm;
 2503     stringStream ss;
 2504     ss.print("unimplemented: %s", what);
 2505     buf = code_string(ss.as_string());
 2506   }
 2507   stop(buf);
 2508 }
 2509 
 2510 #define XSTATE_BV 0x200
 2511 
 2512 void MacroAssembler::pop_CPU_state() {

 3599 }
 3600 
 3601 // C++ bool manipulation
 3602 void MacroAssembler::testbool(Register dst) {
 3603   if(sizeof(bool) == 1)
 3604     testb(dst, 0xff);
 3605   else if(sizeof(bool) == 2) {
 3606     // testw implementation needed for two byte bools
 3607     ShouldNotReachHere();
 3608   } else if(sizeof(bool) == 4)
 3609     testl(dst, dst);
 3610   else
 3611     // unsupported
 3612     ShouldNotReachHere();
 3613 }
 3614 
 3615 void MacroAssembler::testptr(Register dst, Register src) {
 3616   testq(dst, src);
 3617 }
 3618 
 3619 // Object / value buffer allocation...
 3620 //
 3621 // Kills klass and rsi on LP64
 3622 void MacroAssembler::allocate_instance(Register klass, Register new_obj,
 3623                                        Register t1, Register t2,
 3624                                        bool clear_fields, Label& alloc_failed)
 3625 {
 3626   Label done, initialize_header, initialize_object, slow_case, slow_case_no_pop;
 3627   Register layout_size = t1;
 3628   assert(new_obj == rax, "needs to be rax");
 3629   assert_different_registers(klass, new_obj, t1, t2);
 3630 
 3631   // get instance_size in InstanceKlass (scaled to a count of bytes)
 3632   movl(layout_size, Address(klass, Klass::layout_helper_offset()));
 3633   // test to see if it is malformed in some way
 3634   testl(layout_size, Klass::_lh_instance_slow_path_bit);
 3635   jcc(Assembler::notZero, slow_case_no_pop);
 3636 
 3637   // Allocate the instance:
 3638   //  If TLAB is enabled:
 3639   //    Try to allocate in the TLAB.
 3640   //    If fails, go to the slow path.
 3641   //  Else If inline contiguous allocations are enabled:
 3642   //    Try to allocate in eden.
 3643   //    If fails due to heap end, go to slow path.
 3644   //
 3645   //  If TLAB is enabled OR inline contiguous is enabled:
 3646   //    Initialize the allocation.
 3647   //    Exit.
 3648   //
 3649   //  Go to slow path.
 3650 
 3651   push(klass);
 3652   if (UseTLAB) {
 3653     tlab_allocate(new_obj, layout_size, 0, klass, t2, slow_case);
 3654     if (ZeroTLAB || (!clear_fields)) {
 3655       // the fields have been already cleared
 3656       jmp(initialize_header);
 3657     } else {
 3658       // initialize both the header and fields
 3659       jmp(initialize_object);
 3660     }
 3661   } else {
 3662     jmp(slow_case);
 3663   }
 3664 
 3665   // If UseTLAB is true, the object is created above and there is an initialize need.
 3666   // Otherwise, skip and go to the slow path.
 3667   if (UseTLAB) {
 3668     if (clear_fields) {
 3669       // The object is initialized before the header.  If the object size is
 3670       // zero, go directly to the header initialization.
 3671       bind(initialize_object);
 3672       if (UseCompactObjectHeaders) {
 3673         assert(is_aligned(oopDesc::base_offset_in_bytes(), BytesPerLong), "oop base offset must be 8-byte-aligned");
 3674         decrement(layout_size, oopDesc::base_offset_in_bytes());
 3675       } else {
 3676         decrement(layout_size, sizeof(oopDesc));
 3677       }
 3678       jcc(Assembler::zero, initialize_header);
 3679 
 3680       // Initialize topmost object field, divide size by 8, check if odd and
 3681       // test if zero.
 3682       Register zero = klass;
 3683       xorl(zero, zero);    // use zero reg to clear memory (shorter code)
 3684       shrl(layout_size, LogBytesPerLong); // divide by 2*oopSize and set carry flag if odd
 3685 
 3686   #ifdef ASSERT
 3687       // make sure instance_size was multiple of 8
 3688       Label L;
 3689       // Ignore partial flag stall after shrl() since it is debug VM
 3690       jcc(Assembler::carryClear, L);
 3691       stop("object size is not multiple of 2 - adjust this code");
 3692       bind(L);
 3693       // must be > 0, no extra check needed here
 3694   #endif
 3695 
 3696       // initialize remaining object fields: instance_size was a multiple of 8
 3697       {
 3698         Label loop;
 3699         bind(loop);
 3700         int header_size_bytes = oopDesc::header_size() * HeapWordSize;
 3701         assert(is_aligned(header_size_bytes, BytesPerLong), "oop header size must be 8-byte-aligned");
 3702         movptr(Address(new_obj, layout_size, Address::times_8, header_size_bytes - 1*oopSize), zero);
 3703         decrement(layout_size);
 3704         jcc(Assembler::notZero, loop);
 3705       }
 3706     } // clear_fields
 3707 
 3708     // initialize object header only.
 3709     bind(initialize_header);
 3710     if (UseCompactObjectHeaders || Arguments::is_valhalla_enabled()) {
 3711       pop(klass);
 3712       Register mark_word = t2;
 3713       movptr(mark_word, Address(klass, Klass::prototype_header_offset()));
 3714       movptr(Address(new_obj, oopDesc::mark_offset_in_bytes ()), mark_word);
 3715     } else {
 3716      movptr(Address(new_obj, oopDesc::mark_offset_in_bytes()),
 3717             (intptr_t)markWord::prototype().value()); // header
 3718      pop(klass);   // get saved klass back in the register.
 3719     }
 3720     if (!UseCompactObjectHeaders) {
 3721       xorl(rsi, rsi);                 // use zero reg to clear memory (shorter code)
 3722       store_klass_gap(new_obj, rsi);  // zero klass gap for compressed oops
 3723       movptr(t2, klass);         // preserve klass
 3724       store_klass(new_obj, t2, rscratch1);  // src klass reg is potentially compressed
 3725     }
 3726     jmp(done);
 3727   }
 3728 
 3729   bind(slow_case);
 3730   pop(klass);
 3731   bind(slow_case_no_pop);
 3732   jmp(alloc_failed);
 3733 
 3734   bind(done);
 3735 }
 3736 
 3737 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
 3738 void MacroAssembler::tlab_allocate(Register obj,
 3739                                    Register var_size_in_bytes,
 3740                                    int con_size_in_bytes,
 3741                                    Register t1,
 3742                                    Register t2,
 3743                                    Label& slow_case) {
 3744   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 3745   bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
 3746 }
 3747 
 3748 RegSet MacroAssembler::call_clobbered_gp_registers() {
 3749   RegSet regs;
 3750   regs += RegSet::of(rax, rcx, rdx);
 3751 #ifndef _WINDOWS
 3752   regs += RegSet::of(rsi, rdi);
 3753 #endif
 3754   regs += RegSet::range(r8, r11);
 3755   if (UseAPX) {
 3756     regs += RegSet::range(r16, as_Register(Register::number_of_registers - 1));

 3920   xorptr(temp, temp);    // use _zero reg to clear memory (shorter code)
 3921   if (UseIncDec) {
 3922     shrptr(index, 3);  // divide by 8/16 and set carry flag if bit 2 was set
 3923   } else {
 3924     shrptr(index, 2);  // use 2 instructions to avoid partial flag stall
 3925     shrptr(index, 1);
 3926   }
 3927 
 3928   // initialize remaining object fields: index is a multiple of 2 now
 3929   {
 3930     Label loop;
 3931     bind(loop);
 3932     movptr(Address(address, index, Address::times_8, offset_in_bytes - 1*BytesPerWord), temp);
 3933     decrement(index);
 3934     jcc(Assembler::notZero, loop);
 3935   }
 3936 
 3937   bind(done);
 3938 }
 3939 
 3940 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
 3941   movptr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
 3942 #ifdef ASSERT
 3943   {
 3944     Label done;
 3945     cmpptr(layout_info, 0);
 3946     jcc(Assembler::notEqual, done);
 3947     stop("inline_layout_info_array is null");
 3948     bind(done);
 3949   }
 3950 #endif
 3951 
 3952   InlineLayoutInfo array[2];
 3953   int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
 3954   if (is_power_of_2(size)) {
 3955     shll(index, log2i_exact(size)); // Scale index by power of 2
 3956   } else {
 3957     imull(index, index, size); // Scale the index to be the entry index * array_element_size
 3958   }
 3959   lea(layout_info, Address(layout_info, index, Address::times_1, Array<InlineLayoutInfo>::base_offset_in_bytes()));
 3960 }
 3961 
 3962 // Look up the method for a megamorphic invokeinterface call.
 3963 // The target method is determined by <intf_klass, itable_index>.
 3964 // The receiver klass is in recv_klass.
 3965 // On success, the result will be in method_result, and execution falls through.
 3966 // On failure, execution transfers to the given label.
 3967 void MacroAssembler::lookup_interface_method(Register recv_klass,
 3968                                              Register intf_klass,
 3969                                              RegisterOrConstant itable_index,
 3970                                              Register method_result,
 3971                                              Register scan_temp,
 3972                                              Label& L_no_such_interface,
 3973                                              bool return_method) {
 3974   assert_different_registers(recv_klass, intf_klass, scan_temp);
 3975   assert_different_registers(method_result, intf_klass, scan_temp);
 3976   assert(recv_klass != method_result || !return_method,
 3977          "recv_klass can be destroyed when method isn't needed");
 3978 
 3979   assert(itable_index.is_constant() || itable_index.as_register() == method_result,
 3980          "caller must use same register for non-constant itable index as for method");
 3981 

 4992   } else {
 4993     Label L;
 4994     jccb(negate_condition(cc), L);
 4995     movl(dst, src);
 4996     bind(L);
 4997   }
 4998 }
 4999 
 5000 void MacroAssembler::cmov32(Condition cc, Register dst, Register src) {
 5001   if (VM_Version::supports_cmov()) {
 5002     cmovl(cc, dst, src);
 5003   } else {
 5004     Label L;
 5005     jccb(negate_condition(cc), L);
 5006     movl(dst, src);
 5007     bind(L);
 5008   }
 5009 }
 5010 
 5011 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
 5012   if (!VerifyOops || VerifyAdapterSharing) {
 5013     // Below address of the code string confuses VerifyAdapterSharing
 5014     // because it may differ between otherwise equivalent adapters.
 5015     return;
 5016   }
 5017 
 5018   BLOCK_COMMENT("verify_oop {");
 5019   push(rscratch1);
 5020   push(rax);                          // save rax
 5021   push(reg);                          // pass register argument
 5022 
 5023   // Pass register number to verify_oop_subroutine
 5024   const char* b = nullptr;
 5025   {
 5026     ResourceMark rm;
 5027     stringStream ss;
 5028     ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
 5029     b = code_string(ss.as_string());
 5030   }
 5031   AddressLiteral buffer((address) b, external_word_Relocation::spec_for_immediate());
 5032   pushptr(buffer.addr(), rscratch1);
 5033 
 5034   // call indirectly to solve generation ordering problem
 5035   movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
 5036   call(rax);

 5252   // or something else. Since this is a slow path, we can optimize for code density,
 5253   // and just restart the search from the beginning.
 5254   jmpb(L_restart);
 5255 
 5256   // Counter updates:
 5257 
 5258   // Increment polymorphic counter instead of receiver slot.
 5259   bind(L_polymorphic);
 5260   movptr(offset, poly_count_offset);
 5261   jmpb(L_count_update);
 5262 
 5263   // Found a receiver, convert its slot offset to corresponding count offset.
 5264   bind(L_found_recv);
 5265   addptr(offset, receiver_to_count_step);
 5266 
 5267   bind(L_count_update);
 5268   addptr(Address(mdp, offset, Address::times_ptr), DataLayout::counter_increment);
 5269 }
 5270 
 5271 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
 5272   if (!VerifyOops || VerifyAdapterSharing) {
 5273     // Below address of the code string confuses VerifyAdapterSharing
 5274     // because it may differ between otherwise equivalent adapters.
 5275     return;
 5276   }
 5277 
 5278   push(rscratch1);
 5279   push(rax); // save rax,
 5280   // addr may contain rsp so we will have to adjust it based on the push
 5281   // we just did (and on 64 bit we do two pushes)
 5282   // NOTE: 64bit seemed to have had a bug in that it did movq(addr, rax); which
 5283   // stores rax into addr which is backwards of what was intended.
 5284   if (addr.uses(rsp)) {
 5285     lea(rax, addr);
 5286     pushptr(Address(rax, 2 * BytesPerWord));
 5287   } else {
 5288     pushptr(addr);
 5289   }
 5290 
 5291   // Pass register number to verify_oop_subroutine
 5292   const char* b = nullptr;
 5293   {
 5294     ResourceMark rm;
 5295     stringStream ss;
 5296     ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);

 5650 
 5651 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
 5652   // get mirror
 5653   const int mirror_offset = in_bytes(Klass::java_mirror_offset());
 5654   load_method_holder(mirror, method);
 5655   movptr(mirror, Address(mirror, mirror_offset));
 5656   resolve_oop_handle(mirror, tmp);
 5657 }
 5658 
 5659 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
 5660   load_method_holder(rresult, rmethod);
 5661   movptr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
 5662 }
 5663 
 5664 void MacroAssembler::load_method_holder(Register holder, Register method) {
 5665   movptr(holder, Address(method, Method::const_offset()));                      // ConstMethod*
 5666   movptr(holder, Address(holder, ConstMethod::constants_offset()));             // ConstantPool*
 5667   movptr(holder, Address(holder, ConstantPool::pool_holder_offset()));          // InstanceKlass*
 5668 }
 5669 
 5670 void MacroAssembler::load_metadata(Register dst, Register src) {
 5671   if (UseCompactObjectHeaders) {
 5672     load_narrow_klass_compact(dst, src);
 5673   } else {
 5674     movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 5675   }
 5676 }
 5677 
 5678 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
 5679   assert(UseCompactObjectHeaders, "expect compact object headers");
 5680   movq(dst, Address(src, oopDesc::mark_offset_in_bytes()));
 5681   shrq(dst, markWord::klass_shift);
 5682 }
 5683 
 5684 void MacroAssembler::load_klass(Register dst, Register src, Register tmp) {
 5685   assert_different_registers(src, tmp);
 5686   assert_different_registers(dst, tmp);
 5687 
 5688   if (UseCompactObjectHeaders) {
 5689     load_narrow_klass_compact(dst, src);
 5690     decode_klass_not_null(dst, tmp);
 5691   } else {
 5692     movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 5693     decode_klass_not_null(dst, tmp);
 5694   }
 5695 }
 5696 
 5697 void MacroAssembler::load_prototype_header(Register dst, Register src, Register tmp) {
 5698   load_klass(dst, src, tmp);
 5699   movptr(dst, Address(dst, Klass::prototype_header_offset()));
 5700 }
 5701 
 5702 void MacroAssembler::store_klass(Register dst, Register src, Register tmp) {
 5703   assert(!UseCompactObjectHeaders, "not with compact headers");
 5704   assert_different_registers(src, tmp);
 5705   assert_different_registers(dst, tmp);
 5706   encode_klass_not_null(src, tmp);
 5707   movl(Address(dst, oopDesc::klass_offset_in_bytes()), src);
 5708 }
 5709 
 5710 void MacroAssembler::cmp_klass(Register klass, Register obj, Register tmp) {
 5711   if (UseCompactObjectHeaders) {
 5712     assert(tmp != noreg, "need tmp");
 5713     assert_different_registers(klass, obj, tmp);
 5714     load_narrow_klass_compact(tmp, obj);
 5715     cmpl(klass, tmp);
 5716   } else {
 5717     cmpl(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
 5718   }
 5719 }
 5720 
 5721 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {

 5738   bool as_raw = (decorators & AS_RAW) != 0;
 5739   if (as_raw) {
 5740     bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1);
 5741   } else {
 5742     bs->load_at(this, decorators, type, dst, src, tmp1);
 5743   }
 5744 }
 5745 
 5746 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
 5747                                      Register tmp1, Register tmp2, Register tmp3) {
 5748   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 5749   decorators = AccessInternal::decorator_fixup(decorators, type);
 5750   bool as_raw = (decorators & AS_RAW) != 0;
 5751   if (as_raw) {
 5752     bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
 5753   } else {
 5754     bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
 5755   }
 5756 }
 5757 
 5758 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
 5759                                      Register inline_layout_info) {
 5760   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 5761   bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
 5762 }
 5763 
 5764 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
 5765   movptr(offset, Address(inline_klass, InlineKlass::adr_members_offset()));
 5766   movl(offset, Address(offset, InlineKlass::payload_offset_offset()));
 5767 }
 5768 
 5769 void MacroAssembler::payload_addr(Register oop, Register data, Register inline_klass) {
 5770   // ((address) (void*) o) + vk->payload_offset();
 5771   Register offset = (data == oop) ? rscratch1 : data;
 5772   payload_offset(inline_klass, offset);
 5773   if (data == oop) {
 5774     addptr(data, offset);
 5775   } else {
 5776     lea(data, Address(oop, offset));
 5777   }
 5778 }
 5779 
 5780 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
 5781                                                 Register index, Register data) {
 5782   assert(index != rcx, "index needs to shift by rcx");
 5783   assert_different_registers(array, array_klass, index);
 5784   assert_different_registers(rcx, array, index);
 5785 
 5786   // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
 5787   movl(rcx, Address(array_klass, Klass::layout_helper_offset()));
 5788 
 5789   // Klass::layout_helper_log2_element_size(lh)
 5790   // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
 5791   shrl(rcx, Klass::_lh_log2_element_size_shift);
 5792   andl(rcx, Klass::_lh_log2_element_size_mask);
 5793   shlptr(index); // index << rcx
 5794 
 5795   lea(data, Address(array, index, Address::times_1, arrayOopDesc::base_offset_in_bytes(T_FLAT_ELEMENT)));
 5796 }
 5797 
 5798 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
 5799   access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1);
 5800 }
 5801 
 5802 // Doesn't do verification, generates fixed size code
 5803 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, DecoratorSet decorators) {
 5804   access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1);
 5805 }
 5806 
 5807 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
 5808                                     Register tmp2, Register tmp3, DecoratorSet decorators) {
 5809   access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
 5810 }
 5811 
 5812 // Used for storing nulls.
 5813 void MacroAssembler::store_heap_oop_null(Address dst) {
 5814   access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
 5815 }
 5816 
 5817 void MacroAssembler::store_klass_gap(Register dst, Register src) {

 6126   assert (oop_recorder() != nullptr, "this assembler needs an OopRecorder");
 6127   int klass_index = oop_recorder()->find_index(k);
 6128   RelocationHolder rspec = metadata_Relocation::spec(klass_index);
 6129   Assembler::cmp_narrow_oop(dst, CompressedKlassPointers::encode(k), rspec);
 6130 }
 6131 
 6132 void MacroAssembler::reinit_heapbase() {
 6133   if (UseCompressedOops) {
 6134     if (Universe::heap() != nullptr) {
 6135       if (CompressedOops::base() == nullptr) {
 6136         MacroAssembler::xorptr(r12_heapbase, r12_heapbase);
 6137       } else {
 6138         mov64(r12_heapbase, (int64_t)CompressedOops::base());
 6139       }
 6140     } else {
 6141       movptr(r12_heapbase, ExternalAddress(CompressedOops::base_addr()));
 6142     }
 6143   }
 6144 }
 6145 
 6146 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
 6147   assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
 6148   // An inline type might be returned. If fields are in registers we
 6149   // need to allocate an inline type instance and initialize it with
 6150   // the value of the fields.
 6151   Label skip;
 6152   // We only need a new buffered inline type if a new one is not returned
 6153   testptr(rax, 1);
 6154   jcc(Assembler::zero, skip);
 6155   int call_offset = -1;
 6156 
 6157 #ifdef _LP64
 6158   // The following code is similar to allocate_instance but has some slight differences,
 6159   // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
 6160   // allocating is not necessary if vk != nullptr, etc. allocate_instance is not aware of these.
 6161   Label slow_case;
 6162   // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
 6163   mov(rscratch1, rax); // save rax for slow_case since *_allocate may corrupt it when allocation failed
 6164   if (vk != nullptr) {
 6165     // Called from C1, where the return type is statically known.
 6166     movptr(rbx, (intptr_t)vk->get_InlineKlass());
 6167     jint lh = vk->layout_helper();
 6168     assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
 6169     if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
 6170       tlab_allocate(rax, noreg, lh, r13, r14, slow_case);
 6171     } else {
 6172       jmp(slow_case);
 6173     }
 6174   } else {
 6175     // Call from interpreter. RAX contains ((the InlineKlass* of the return type) | 0x01)
 6176     mov(rbx, rax);
 6177     andptr(rbx, -2);
 6178     if (UseTLAB) {
 6179       movl(r14, Address(rbx, Klass::layout_helper_offset()));
 6180       testl(r14, Klass::_lh_instance_slow_path_bit);
 6181       jcc(Assembler::notZero, slow_case);
 6182       tlab_allocate(rax, r14, 0, r13, r14, slow_case);
 6183     } else {
 6184       jmp(slow_case);
 6185     }
 6186   }
 6187   if (UseTLAB) {
 6188     // 2. Initialize buffered inline instance header
 6189     Register buffer_obj = rax;
 6190     Register klass = rbx;
 6191     if (UseCompactObjectHeaders) {
 6192       Register mark_word = r13;
 6193       movptr(mark_word, Address(klass, Klass::prototype_header_offset()));
 6194       movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes()), mark_word);
 6195     } else {
 6196       movptr(Address(buffer_obj, oopDesc::mark_offset_in_bytes()), (intptr_t)markWord::inline_type_prototype().value());
 6197       xorl(r13, r13);
 6198       store_klass_gap(buffer_obj, r13);
 6199       if (vk == nullptr) {
 6200         // store_klass corrupts rbx(klass), so save it in r13 for later use (interpreter case only).
 6201         mov(r13, klass);
 6202       }
 6203       store_klass(buffer_obj, klass, rscratch1);
 6204       klass = r13;
 6205     }
 6206     // 3. Initialize its fields with an inline class specific handler
 6207     if (vk != nullptr) {
 6208       call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
 6209     } else {
 6210       movptr(rbx, Address(klass, InlineKlass::adr_members_offset()));
 6211       movptr(rbx, Address(rbx, InlineKlass::pack_handler_offset()));
 6212       call(rbx);
 6213     }
 6214     jmp(skip);
 6215   }
 6216   bind(slow_case);
 6217   // We failed to allocate a new inline type, fall back to a runtime
 6218   // call. Some oop field may be live in some registers but we can't
 6219   // tell. That runtime call will take care of preserving them
 6220   // across a GC if there's one.
 6221   mov(rax, rscratch1);
 6222 #endif
 6223 
 6224   if (from_interpreter) {
 6225     super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
 6226   } else {
 6227     call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
 6228     call_offset = offset();
 6229   }
 6230 
 6231   bind(skip);
 6232   return call_offset;
 6233 }
 6234 
 6235 // Move a value between registers/stack slots and update the reg_state
 6236 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
 6237   assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
 6238   if (reg_state[to->value()] == reg_written) {
 6239     return true; // Already written
 6240   }
 6241   if (from != to && bt != T_VOID) {
 6242     if (reg_state[to->value()] == reg_readonly) {
 6243       return false; // Not yet writable
 6244     }
 6245     if (from->is_reg()) {
 6246       if (to->is_reg()) {
 6247         if (from->is_XMMRegister()) {
 6248           if (bt == T_DOUBLE) {
 6249             movdbl(to->as_XMMRegister(), from->as_XMMRegister());
 6250           } else {
 6251             assert(bt == T_FLOAT, "must be float");
 6252             movflt(to->as_XMMRegister(), from->as_XMMRegister());
 6253           }
 6254         } else {
 6255           movq(to->as_Register(), from->as_Register());
 6256         }
 6257       } else {
 6258         int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6259         Address to_addr = Address(rsp, st_off);
 6260         if (from->is_XMMRegister()) {
 6261           if (bt == T_DOUBLE) {
 6262             movdbl(to_addr, from->as_XMMRegister());
 6263           } else {
 6264             assert(bt == T_FLOAT, "must be float");
 6265             movflt(to_addr, from->as_XMMRegister());
 6266           }
 6267         } else {
 6268           movq(to_addr, from->as_Register());
 6269         }
 6270       }
 6271     } else {
 6272       Address from_addr = Address(rsp, from->reg2stack() * VMRegImpl::stack_slot_size + wordSize);
 6273       if (to->is_reg()) {
 6274         if (to->is_XMMRegister()) {
 6275           if (bt == T_DOUBLE) {
 6276             movdbl(to->as_XMMRegister(), from_addr);
 6277           } else {
 6278             assert(bt == T_FLOAT, "must be float");
 6279             movflt(to->as_XMMRegister(), from_addr);
 6280           }
 6281         } else {
 6282           movq(to->as_Register(), from_addr);
 6283         }
 6284       } else {
 6285         int st_off = to->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6286         movq(r13, from_addr);
 6287         movq(Address(rsp, st_off), r13);
 6288       }
 6289     }
 6290   }
 6291   // Update register states
 6292   reg_state[from->value()] = reg_writable;
 6293   reg_state[to->value()] = reg_written;
 6294   return true;
 6295 }
 6296 
 6297 // Calculate the extra stack space required for packing or unpacking inline
 6298 // args and adjust the stack pointer (see MacroAssembler::remove_frame).
 6299 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
 6300   int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
 6301   sp_inc = align_up(sp_inc, StackAlignmentInBytes);
 6302   assert(sp_inc > 0, "sanity");
 6303   // Two additional slots to account for return address
 6304   sp_inc +=  2 * VMRegImpl::stack_slot_size;
 6305 
 6306   push(rbp);
 6307   subptr(rsp, sp_inc);
 6308 #ifdef ASSERT
 6309   movl(Address(rsp, 0), badRegWordVal);
 6310   movl(Address(rsp, VMRegImpl::stack_slot_size), badRegWordVal);
 6311 #endif
 6312   return sp_inc + wordSize; // account for rbp space
 6313 }
 6314 
 6315 // Read all fields from an inline type buffer and store the field values in registers/stack slots.
 6316 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
 6317                                           VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
 6318                                           RegState reg_state[]) {
 6319   assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
 6320   assert(from->is_valid(), "source must be valid");
 6321   bool progress = false;
 6322 #ifdef ASSERT
 6323   const int start_offset = offset();
 6324 #endif
 6325 
 6326   Label L_null, L_notNull;
 6327   // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
 6328   Register tmp1 = r10;
 6329   Register tmp2 = r13;
 6330   Register fromReg = noreg;
 6331   ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
 6332   bool done = true;
 6333   bool mark_done = true;
 6334   VMReg toReg;
 6335   BasicType bt;
 6336   // Check if argument requires a null check
 6337   bool null_check = false;
 6338   VMReg nullCheckReg;
 6339   while (stream.next(nullCheckReg, bt)) {
 6340     if (sig->at(stream.sig_index())._offset == -1) {
 6341       null_check = true;
 6342       break;
 6343     }
 6344   }
 6345   stream.reset(sig_index, to_index);
 6346   while (stream.next(toReg, bt)) {
 6347     assert(toReg->is_valid(), "destination must be valid");
 6348     int idx = (int)toReg->value();
 6349     if (reg_state[idx] == reg_readonly) {
 6350       if (idx != from->value()) {
 6351         mark_done = false;
 6352       }
 6353       done = false;
 6354       continue;
 6355     } else if (reg_state[idx] == reg_written) {
 6356       continue;
 6357     }
 6358     assert(reg_state[idx] == reg_writable, "must be writable");
 6359     reg_state[idx] = reg_written;
 6360     progress = true;
 6361 
 6362     if (fromReg == noreg) {
 6363       if (from->is_reg()) {
 6364         fromReg = from->as_Register();
 6365       } else {
 6366         int st_off = from->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6367         movq(tmp1, Address(rsp, st_off));
 6368         fromReg = tmp1;
 6369       }
 6370       if (null_check) {
 6371         // Nullable inline type argument, emit null check
 6372         testptr(fromReg, fromReg);
 6373         jcc(Assembler::zero, L_null);
 6374       }
 6375     }
 6376     int off = sig->at(stream.sig_index())._offset;
 6377     if (off == -1) {
 6378       assert(null_check, "Missing null check at");
 6379       if (toReg->is_stack()) {
 6380         int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6381         movq(Address(rsp, st_off), 1);
 6382       } else {
 6383         movq(toReg->as_Register(), 1);
 6384       }
 6385       continue;
 6386     }
 6387     if (sig->at(stream.sig_index())._vt_oop) {
 6388       if (toReg->is_stack()) {
 6389         int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6390         movq(Address(rsp, st_off), fromReg);
 6391       } else {
 6392         movq(toReg->as_Register(), fromReg);
 6393       }
 6394       continue;
 6395     }
 6396     assert(off > 0, "offset in object should be positive");
 6397     Address fromAddr = Address(fromReg, off);
 6398     if (!toReg->is_XMMRegister()) {
 6399       Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
 6400       if (is_reference_type(bt)) {
 6401         load_heap_oop(dst, fromAddr);
 6402       } else {
 6403         bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
 6404         load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
 6405       }
 6406       if (toReg->is_stack()) {
 6407         int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6408         movq(Address(rsp, st_off), dst);
 6409       }
 6410     } else if (bt == T_DOUBLE) {
 6411       movdbl(toReg->as_XMMRegister(), fromAddr);
 6412     } else {
 6413       assert(bt == T_FLOAT, "must be float");
 6414       movflt(toReg->as_XMMRegister(), fromAddr);
 6415     }
 6416   }
 6417   if (progress && null_check) {
 6418     if (done) {
 6419       jmp(L_notNull);
 6420       bind(L_null);
 6421       // Set null marker to zero to signal that the argument is null.
 6422       // Also set all fields to zero since the runtime requires a canonical
 6423       // representation of a flat null.
 6424       stream.reset(sig_index, to_index);
 6425       while (stream.next(toReg, bt)) {
 6426         if (toReg->is_stack()) {
 6427           int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6428           movq(Address(rsp, st_off), 0);
 6429         } else if (toReg->is_XMMRegister()) {
 6430           xorps(toReg->as_XMMRegister(), toReg->as_XMMRegister());
 6431         } else {
 6432           xorl(toReg->as_Register(), toReg->as_Register());
 6433         }
 6434       }
 6435       bind(L_notNull);
 6436     } else {
 6437       bind(L_null);
 6438     }
 6439   }
 6440 
 6441   sig_index = stream.sig_index();
 6442   to_index = stream.regs_index();
 6443 
 6444   if (mark_done && reg_state[from->value()] != reg_written) {
 6445     // This is okay because no one else will write to that slot
 6446     reg_state[from->value()] = reg_writable;
 6447   }
 6448   from_index--;
 6449   assert(progress || (start_offset == offset()), "should not emit code");
 6450   return done;
 6451 }
 6452 
 6453 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
 6454                                         VMRegPair* from, int from_count, int& from_index, VMReg to,
 6455                                         RegState reg_state[], Register val_array) {
 6456   assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
 6457   assert(to->is_valid(), "destination must be valid");
 6458 
 6459   if (reg_state[to->value()] == reg_written) {
 6460     skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
 6461     return true; // Already written
 6462   }
 6463 
 6464   // TODO 8284443 Isn't it an issue if below code uses r14 as tmp when it contains a spilled value?
 6465   // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
 6466   Register val_obj_tmp = r11;
 6467   Register from_reg_tmp = r14;
 6468   Register tmp1 = r10;
 6469   Register tmp2 = r13;
 6470   Register tmp3 = rbx;
 6471   Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
 6472 
 6473   assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
 6474 
 6475   if (reg_state[to->value()] == reg_readonly) {
 6476     if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
 6477       skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
 6478       return false; // Not yet writable
 6479     }
 6480     val_obj = val_obj_tmp;
 6481   }
 6482 
 6483   ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
 6484   VMReg fromReg;
 6485   BasicType bt;
 6486   Label L_null;
 6487   while (stream.next(fromReg, bt)) {
 6488     assert(fromReg->is_valid(), "source must be valid");
 6489     reg_state[fromReg->value()] = reg_writable;
 6490 
 6491     int off = sig->at(stream.sig_index())._offset;
 6492     if (off == -1) {
 6493       // Nullable inline type argument, emit null check
 6494       Label L_notNull;
 6495       if (fromReg->is_stack()) {
 6496         int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6497         testb(Address(rsp, ld_off), 1);
 6498       } else {
 6499         testb(fromReg->as_Register(), 1);
 6500       }
 6501       jcc(Assembler::notZero, L_notNull);
 6502       movptr(val_obj, 0);
 6503       jmp(L_null);
 6504       bind(L_notNull);
 6505       continue;
 6506     }
 6507     if (sig->at(stream.sig_index())._vt_oop) {
 6508       // buffer argument: use if non null
 6509       if (fromReg->is_stack()) {
 6510         int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6511         movptr(val_obj, Address(rsp, ld_off));
 6512       } else {
 6513         movptr(val_obj, fromReg->as_Register());
 6514       }
 6515       testptr(val_obj, val_obj);
 6516       jcc(Assembler::notEqual, L_null);
 6517       // otherwise get the buffer from the just allocated pool of buffers
 6518       int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
 6519       load_heap_oop(val_obj, Address(val_array, index));
 6520       continue;
 6521     }
 6522 
 6523     assert(off > 0, "offset in object should be positive");
 6524     size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
 6525 
 6526     // Pack the scalarized field into the value object.
 6527     Address dst(val_obj, off);
 6528     if (!fromReg->is_XMMRegister()) {
 6529       Register src;
 6530       if (fromReg->is_stack()) {
 6531         src = from_reg_tmp;
 6532         int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
 6533         load_sized_value(src, Address(rsp, ld_off), size_in_bytes, /* is_signed */ false);
 6534       } else {
 6535         src = fromReg->as_Register();
 6536       }
 6537       assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
 6538       if (is_reference_type(bt)) {
 6539         // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep val_obj valid.
 6540         mov(tmp3, val_obj);
 6541         Address dst_with_tmp3(tmp3, off);
 6542         store_heap_oop(dst_with_tmp3, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
 6543       } else {
 6544         store_sized_value(dst, src, size_in_bytes);
 6545       }
 6546     } else if (bt == T_DOUBLE) {
 6547       movdbl(dst, fromReg->as_XMMRegister());
 6548     } else {
 6549       assert(bt == T_FLOAT, "must be float");
 6550       movflt(dst, fromReg->as_XMMRegister());
 6551     }
 6552   }
 6553   bind(L_null);
 6554   sig_index = stream.sig_index();
 6555   from_index = stream.regs_index();
 6556 
 6557   assert(reg_state[to->value()] == reg_writable, "must have already been read");
 6558   bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
 6559   assert(success, "to register must be writeable");
 6560   return true;
 6561 }
 6562 
 6563 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
 6564   return reg->is_XMMRegister() ? xmm8->as_VMReg() : r14->as_VMReg();
 6565 }
 6566 
 6567 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
 6568   assert((initial_framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
 6569   if (needs_stack_repair) {
 6570     // The method has a scalarized entry point (where fields of value object arguments
 6571     // are passed through registers and stack), and a non-scalarized entry point (where
 6572     // value object arguments are given as oops). The non-scalarized entry point will
 6573     // first load each field of value object arguments and store them in registers and on
 6574     // the stack in a way compatible with the scalarized entry point. To do so, some extra
 6575     // stack space might be reserved (if argument registers are not enough). On leaving the
 6576     // method, this space must be freed.
 6577     //
 6578     // In case we used the non-scalarized entry point the stack looks like this:
 6579     //
 6580     // | Arguments from caller     |
 6581     // |---------------------------|  <-- caller's SP
 6582     // | Return address #1         |
 6583     // | Saved RBP #1              |
 6584     // |---------------------------|
 6585     // | Extension space for       |
 6586     // |   inline arg (un)packing  |
 6587     // |---------------------------|  <-- start of this method's frame
 6588     // | Return address #2         |
 6589     // | Saved RBP #2              |
 6590     // |---------------------------|  <-- RBP (with -XX:+PreserveFramePointer)
 6591     // | sp_inc                    |
 6592     // | method locals             |
 6593     // |---------------------------|  <-- SP
 6594     //
 6595     // Space for the return pc and saved rbp is reserved twice. But only the #1 copies
 6596     // contain the real values of return pc and saved rbp. The #2 copies are not reliable
 6597     // and should not be used. They are mostly needed to add space between the  extension
 6598     // space and the locals, as there would be between the real arguments and the locals
 6599     // if we don't need to do unpacking (from the scalarized entry point).
 6600     //
 6601     // When leaving, one must load RBP #1 into RBP, and use the copy #1 of the return address,
 6602     // while keeping in mind that from the scalarized entry point, there will be only one
 6603     // copy. Indeed, in the case we used the scalarized calling convention, the stack looks like this:
 6604     //
 6605     // | Arguments from caller     |
 6606     // |---------------------------|  <-- caller's SP
 6607     // | Return address            |
 6608     // | Saved RBP                 |
 6609     // |---------------------------|  <-- FP (with -XX:+PreserveFramePointer)
 6610     // | sp_inc                    |
 6611     // | method locals             |
 6612     // |---------------------------|  <-- SP
 6613     //
 6614     // The sp_inc stack slot holds the total size of the frame, including the extension
 6615     // space and copies #2 of the return address and the saved RBP (but never the copies
 6616     // #1 of the return address and saved RBP). That is how to find the copies #1 of the
 6617     // return address and saved rbp. This size is expressed in bytes. Be careful when using
 6618     // it from C++ in pointer arithmetic you might need to divide it by wordSize.
 6619 
 6620     // The stack increment resides just below the saved rbp
 6621     addq(rsp, Address(rsp, initial_framesize - wordSize));
 6622     pop(rbp);
 6623   } else {
 6624     if (initial_framesize > 0) {
 6625       addq(rsp, initial_framesize);
 6626     }
 6627     pop(rbp);
 6628   }
 6629 }
 6630 
 6631 #if COMPILER2_OR_JVMCI
 6632 
 6633 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM/ZMM registers
 6634 void MacroAssembler::xmm_clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp, KRegister mask) {
 6635   // cnt - number of qwords (8-byte words).
 6636   // base - start address, qword aligned.
 6637   Label L_zero_64_bytes, L_loop, L_sloop, L_tail, L_end;
 6638   bool use64byteVector = (MaxVectorSize == 64) && (CopyAVX3Threshold == 0);
 6639   if (use64byteVector) {
 6640     evpbroadcastq(xtmp, val, AVX_512bit);
 6641   } else if (MaxVectorSize >= 32) {
 6642     movdq(xtmp, val);
 6643     punpcklqdq(xtmp, xtmp);
 6644     vinserti128_high(xtmp, xtmp);
 6645   } else {
 6646     movdq(xtmp, val);
 6647     punpcklqdq(xtmp, xtmp);
 6648   }
 6649   jmp(L_zero_64_bytes);
 6650 
 6651   BIND(L_loop);
 6652   if (MaxVectorSize >= 32) {
 6653     fill64(base, 0, xtmp, use64byteVector);
 6654   } else {
 6655     movdqu(Address(base,  0), xtmp);
 6656     movdqu(Address(base, 16), xtmp);
 6657     movdqu(Address(base, 32), xtmp);
 6658     movdqu(Address(base, 48), xtmp);
 6659   }
 6660   addptr(base, 64);
 6661 
 6662   BIND(L_zero_64_bytes);
 6663   subptr(cnt, 8);
 6664   jccb(Assembler::greaterEqual, L_loop);
 6665 
 6666   // Copy trailing 64 bytes
 6667   if (use64byteVector) {
 6668     addptr(cnt, 8);
 6669     jccb(Assembler::equal, L_end);
 6670     fill64_masked(3, base, 0, xtmp, mask, cnt, val, true);
 6671     jmp(L_end);
 6672   } else {
 6673     addptr(cnt, 4);
 6674     jccb(Assembler::less, L_tail);
 6675     if (MaxVectorSize >= 32) {
 6676       vmovdqu(Address(base, 0), xtmp);
 6677     } else {
 6678       movdqu(Address(base,  0), xtmp);
 6679       movdqu(Address(base, 16), xtmp);
 6680     }
 6681   }
 6682   addptr(base, 32);
 6683   subptr(cnt, 4);
 6684 
 6685   BIND(L_tail);
 6686   addptr(cnt, 4);
 6687   jccb(Assembler::lessEqual, L_end);
 6688   if (UseAVX > 2 && MaxVectorSize >= 32 && VM_Version::supports_avx512vl()) {
 6689     fill32_masked(3, base, 0, xtmp, mask, cnt, val);
 6690   } else {
 6691     decrement(cnt);
 6692 
 6693     BIND(L_sloop);
 6694     movq(Address(base, 0), xtmp);
 6695     addptr(base, 8);
 6696     decrement(cnt);
 6697     jccb(Assembler::greaterEqual, L_sloop);
 6698   }
 6699   BIND(L_end);
 6700 }
 6701 
 6702 // Clearing constant sized memory using YMM/ZMM registers.
 6703 void MacroAssembler::clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask) {
 6704   assert(UseAVX > 2 && VM_Version::supports_avx512vl(), "");
 6705   bool use64byteVector = (MaxVectorSize > 32) && (CopyAVX3Threshold == 0);
 6706 
 6707   int vector64_count = (cnt & (~0x7)) >> 3;
 6708   cnt = cnt & 0x7;
 6709   const int fill64_per_loop = 4;

 6771         break;
 6772       case 7:
 6773         if (use64byteVector) {
 6774           movl(rtmp, 0x7F);
 6775           kmovwl(mask, rtmp);
 6776           evmovdqu(T_LONG, mask, Address(base, disp), xtmp, true, Assembler::AVX_512bit);
 6777         } else {
 6778           evmovdqu(T_LONG, k0, Address(base, disp), xtmp, false, Assembler::AVX_256bit);
 6779           movl(rtmp, 0x7);
 6780           kmovwl(mask, rtmp);
 6781           evmovdqu(T_LONG, mask, Address(base, disp + 32), xtmp, true, Assembler::AVX_256bit);
 6782         }
 6783         break;
 6784       default:
 6785         fatal("Unexpected length : %d\n",cnt);
 6786         break;
 6787     }
 6788   }
 6789 }
 6790 
 6791 void MacroAssembler::clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp,
 6792                                bool is_large, bool word_copy_only, KRegister mask) {
 6793   // cnt      - number of qwords (8-byte words).
 6794   // base     - start address, qword aligned.
 6795   // is_large - if optimizers know cnt is larger than InitArrayShortSize
 6796   assert(base==rdi, "base register must be edi for rep stos");
 6797   assert(val==rax,   "val register must be eax for rep stos");
 6798   assert(cnt==rcx,   "cnt register must be ecx for rep stos");
 6799   assert(InitArrayShortSize % BytesPerLong == 0,
 6800     "InitArrayShortSize should be the multiple of BytesPerLong");
 6801 
 6802   Label DONE;



 6803 
 6804   if (!is_large) {
 6805     Label LOOP, LONG;
 6806     cmpptr(cnt, InitArrayShortSize/BytesPerLong);
 6807     jccb(Assembler::greater, LONG);
 6808 
 6809     decrement(cnt);
 6810     jccb(Assembler::negative, DONE); // Zero length
 6811 
 6812     // Use individual pointer-sized stores for small counts:
 6813     BIND(LOOP);
 6814     movptr(Address(base, cnt, Address::times_ptr), val);
 6815     decrement(cnt);
 6816     jccb(Assembler::greaterEqual, LOOP);
 6817     jmpb(DONE);
 6818 
 6819     BIND(LONG);
 6820   }
 6821 
 6822   // Use longer rep-prefixed ops for non-small counts:
 6823   if (UseFastStosb && !word_copy_only) {
 6824     shlptr(cnt, 3); // convert to number of bytes
 6825     rep_stosb();
 6826   } else if (UseXMMForObjInit) {
 6827     xmm_clear_mem(base, cnt, val, xtmp, mask);
 6828   } else {
 6829     rep_stos();
 6830   }
 6831 
 6832   BIND(DONE);
 6833 }
 6834 
 6835 #endif //COMPILER2_OR_JVMCI
 6836 
 6837 
 6838 void MacroAssembler::generate_fill(BasicType t, bool aligned,
 6839                                    Register to, Register value, Register count,
 6840                                    Register rtmp, XMMRegister xtmp) {
 6841   ShortBranchVerifier sbv(this);
 6842   assert_different_registers(to, value, count, rtmp);
 6843   Label L_exit;
 6844   Label L_fill_2_bytes, L_fill_4_bytes;
 6845 
 6846 #if defined(COMPILER2)
 6847   if(MaxVectorSize >=32 &&

10726 
10727   // Load top.
10728   movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10729 
10730   // Check if the lock-stack is full.
10731   cmpl(top, LockStack::end_offset());
10732   jcc(Assembler::greaterEqual, slow);
10733 
10734   // Check for recursion.
10735   cmpptr(obj, Address(thread, top, Address::times_1, -oopSize));
10736   jcc(Assembler::equal, push);
10737 
10738   // Check header for monitor (0b10).
10739   testptr(reg_rax, markWord::monitor_value);
10740   jcc(Assembler::notZero, slow);
10741 
10742   // Try to lock. Transition lock bits 0b01 => 0b00
10743   movptr(tmp, reg_rax);
10744   andptr(tmp, ~(int32_t)markWord::unlocked_value);
10745   orptr(reg_rax, markWord::unlocked_value);
10746   // Mask inline_type bit such that we go to the slow path if object is an inline type
10747   andptr(reg_rax, ~((int) markWord::inline_type_bit_in_place));
10748 
10749   lock(); cmpxchgptr(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
10750   jcc(Assembler::notEqual, slow);
10751 
10752   // Restore top, CAS clobbers register.
10753   movl(top, Address(thread, JavaThread::lock_stack_top_offset()));
10754 
10755   bind(push);
10756   // After successful lock, push object on lock-stack.
10757   movptr(Address(thread, top), obj);
10758   incrementl(top, oopSize);
10759   movl(Address(thread, JavaThread::lock_stack_top_offset()), top);
10760 }
10761 
10762 // Implements fast-unlocking.
10763 //
10764 // obj: the object to be unlocked
10765 // reg_rax: rax
10766 // thread: the thread
10767 // tmp: a temporary register
10768 void MacroAssembler::fast_unlock(Register obj, Register reg_rax, Register tmp, Label& slow) {
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