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src/hotspot/cpu/x86/macroAssembler_x86.hpp

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  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef CPU_X86_MACROASSEMBLER_X86_HPP
  26 #define CPU_X86_MACROASSEMBLER_X86_HPP
  27 
  28 #include "asm/assembler.hpp"
  29 #include "utilities/macros.hpp"
  30 #include "runtime/rtmLocking.hpp"



  31 
  32 // MacroAssembler extends Assembler by frequently used macros.
  33 //
  34 // Instructions for which a 'better' code sequence exists depending
  35 // on arguments should also go in here.
  36 
  37 class MacroAssembler: public Assembler {
  38   friend class LIR_Assembler;
  39   friend class Runtime1;      // as_Address()
  40 
  41  public:
  42   // Support for VM calls
  43   //
  44   // This is the base routine called by the different versions of call_VM_leaf. The interpreter
  45   // may customize this version by overriding it for its purposes (e.g., to save/restore
  46   // additional registers when doing a VM call).
  47 
  48   virtual void call_VM_leaf_base(
  49     address entry_point,               // the entry point
  50     int     number_of_arguments        // the number of arguments to pop after the call


  81  // These routines should emit JVMTI PopFrame and ForceEarlyReturn handling code.
  82  // The implementation is only non-empty for the InterpreterMacroAssembler,
  83  // as only the interpreter handles PopFrame and ForceEarlyReturn requests.
  84  virtual void check_and_handle_popframe(Register java_thread);
  85  virtual void check_and_handle_earlyret(Register java_thread);
  86 
  87   Address as_Address(AddressLiteral adr);
  88   Address as_Address(ArrayAddress adr);
  89 
  90   // Support for NULL-checks
  91   //
  92   // Generates code that causes a NULL OS exception if the content of reg is NULL.
  93   // If the accessed location is M[reg + offset] and the offset is known, provide the
  94   // offset. No explicit code generation is needed if the offset is within a certain
  95   // range (0 <= offset <= page_size).
  96 
  97   void null_check(Register reg, int offset = -1);
  98   static bool needs_explicit_null_check(intptr_t offset);
  99   static bool uses_implicit_null_check(void* address);
 100 










 101   // Required platform-specific helpers for Label::patch_instructions.
 102   // They _shadow_ the declarations in AbstractAssembler, which are undefined.
 103   void pd_patch_instruction(address branch, address target, const char* file, int line) {
 104     unsigned char op = branch[0];
 105     assert(op == 0xE8 /* call */ ||
 106         op == 0xE9 /* jmp */ ||
 107         op == 0xEB /* short jmp */ ||
 108         (op & 0xF0) == 0x70 /* short jcc */ ||
 109         op == 0x0F && (branch[1] & 0xF0) == 0x80 /* jcc */ ||
 110         op == 0xC7 && branch[1] == 0xF8 /* xbegin */,
 111         "Invalid opcode at patch point");
 112 
 113     if (op == 0xEB || (op & 0xF0) == 0x70) {
 114       // short offset operators (jmp and jcc)
 115       char* disp = (char*) &branch[1];
 116       int imm8 = target - (address) &disp[1];
 117       guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset at %s:%d", file, line);
 118       *disp = imm8;
 119     } else {
 120       int* disp = (int*) &branch[(op == 0x0F || op == 0xC7)? 2: 1];


 303   void resolve_jobject(Register value, Register thread, Register tmp);
 304 
 305   // C 'boolean' to Java boolean: x == 0 ? 0 : 1
 306   void c2bool(Register x);
 307 
 308   // C++ bool manipulation
 309 
 310   void movbool(Register dst, Address src);
 311   void movbool(Address dst, bool boolconst);
 312   void movbool(Address dst, Register src);
 313   void testbool(Register dst);
 314 
 315   void resolve_oop_handle(Register result, Register tmp = rscratch2);
 316   void resolve_weak_handle(Register result, Register tmp);
 317   void load_mirror(Register mirror, Register method, Register tmp = rscratch2);
 318   void load_method_holder_cld(Register rresult, Register rmethod);
 319 
 320   void load_method_holder(Register holder, Register method);
 321 
 322   // oop manipulations


 323   void load_klass(Register dst, Register src);
 324   void store_klass(Register dst, Register src);
 325 
 326   void access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
 327                       Register tmp1, Register thread_tmp);
 328   void access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register src,
 329                        Register tmp1, Register tmp2);
 330 
 331   // Resolves obj access. Result is placed in the same register.
 332   // All other registers are preserved.
 333   void resolve(DecoratorSet decorators, Register obj);
 334 
 335   void load_heap_oop(Register dst, Address src, Register tmp1 = noreg,
 336                      Register thread_tmp = noreg, DecoratorSet decorators = 0);
 337   void load_heap_oop_not_null(Register dst, Address src, Register tmp1 = noreg,
 338                               Register thread_tmp = noreg, DecoratorSet decorators = 0);
 339   void store_heap_oop(Address dst, Register src, Register tmp1 = noreg,
 340                       Register tmp2 = noreg, DecoratorSet decorators = 0);
 341 
 342   // Used for storing NULL. All other oop constants should be
 343   // stored using routines that take a jobject.
 344   void store_heap_oop_null(Address dst);
 345 
 346   void load_prototype_header(Register dst, Register src);
 347 
 348 #ifdef _LP64
 349   void store_klass_gap(Register dst, Register src);
 350 
 351   // This dummy is to prevent a call to store_heap_oop from
 352   // converting a zero (like NULL) into a Register by giving
 353   // the compiler two choices it can't resolve
 354 
 355   void store_heap_oop(Address dst, void* dummy);
 356 
 357   void encode_heap_oop(Register r);
 358   void decode_heap_oop(Register r);
 359   void encode_heap_oop_not_null(Register r);
 360   void decode_heap_oop_not_null(Register r);


1614   void movl2ptr(Register dst, Address src) { LP64_ONLY(movslq(dst, src)) NOT_LP64(movl(dst, src)); }
1615   void movl2ptr(Register dst, Register src) { LP64_ONLY(movslq(dst, src)) NOT_LP64(if (dst != src) movl(dst, src)); }
1616 
1617 #ifdef COMPILER2
1618   // Generic instructions support for use in .ad files C2 code generation
1619   void vabsnegd(int opcode, XMMRegister dst, Register scr);
1620   void vabsnegd(int opcode, XMMRegister dst, XMMRegister src, int vector_len, Register scr);
1621   void vabsnegf(int opcode, XMMRegister dst, Register scr);
1622   void vabsnegf(int opcode, XMMRegister dst, XMMRegister src, int vector_len, Register scr);
1623   void vextendbw(bool sign, XMMRegister dst, XMMRegister src, int vector_len);
1624   void vextendbw(bool sign, XMMRegister dst, XMMRegister src);
1625   void vshiftd(int opcode, XMMRegister dst, XMMRegister src);
1626   void vshiftd(int opcode, XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1627   void vshiftw(int opcode, XMMRegister dst, XMMRegister src);
1628   void vshiftw(int opcode, XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1629   void vshiftq(int opcode, XMMRegister dst, XMMRegister src);
1630   void vshiftq(int opcode, XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1631 #endif
1632 
1633   // C2 compiled method's prolog code.
1634   void verified_entry(int framesize, int stack_bang_size, bool fp_mode_24b, bool is_stub);



























1635 
1636   // clear memory of size 'cnt' qwords, starting at 'base';
1637   // if 'is_large' is set, do not try to produce short loop
1638   void clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, bool is_large);
1639 
1640   // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM registers
1641   void xmm_clear_mem(Register base, Register cnt, XMMRegister xtmp);
1642 
1643 #ifdef COMPILER2
1644   void string_indexof_char(Register str1, Register cnt1, Register ch, Register result,
1645                            XMMRegister vec1, XMMRegister vec2, XMMRegister vec3, Register tmp);
1646 
1647   // IndexOf strings.
1648   // Small strings are loaded through stack if they cross page boundary.
1649   void string_indexof(Register str1, Register str2,
1650                       Register cnt1, Register cnt2,
1651                       int int_cnt2,  Register result,
1652                       XMMRegister vec, Register tmp,
1653                       int ae);
1654 
1655   // IndexOf for constant substrings with size >= 8 elements
1656   // which don't need to be loaded through stack.
1657   void string_indexofC8(Register str1, Register str2,
1658                       Register cnt1, Register cnt2,
1659                       int int_cnt2,  Register result,
1660                       XMMRegister vec, Register tmp,
1661                       int ae);


1772                             Register tmp1, Register tmp2, Register tmp3,
1773                             Register tmp4, Register tmp5, Register tmp6,
1774                             XMMRegister w_xtmp1, XMMRegister w_xtmp2, XMMRegister w_xtmp3,
1775                             bool is_pclmulqdq_supported);
1776   // Fold 128-bit data chunk
1777   void fold_128bit_crc32(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, Register buf, int offset);
1778   void fold_128bit_crc32(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, XMMRegister xbuf);
1779   // Fold 8-bit data
1780   void fold_8bit_crc32(Register crc, Register table, Register tmp);
1781   void fold_8bit_crc32(XMMRegister crc, Register table, XMMRegister xtmp, Register tmp);
1782   void fold_128bit_crc32_avx512(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, Register buf, int offset);
1783 
1784   // Compress char[] array to byte[].
1785   void char_array_compress(Register src, Register dst, Register len,
1786                            XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3,
1787                            XMMRegister tmp4, Register tmp5, Register result);
1788 
1789   // Inflate byte[] array to char[].
1790   void byte_array_inflate(Register src, Register dst, Register len,
1791                           XMMRegister tmp1, Register tmp2);



1792 
1793 };
1794 
1795 /**
1796  * class SkipIfEqual:
1797  *
1798  * Instantiating this class will result in assembly code being output that will
1799  * jump around any code emitted between the creation of the instance and it's
1800  * automatic destruction at the end of a scope block, depending on the value of
1801  * the flag passed to the constructor, which will be checked at run-time.
1802  */
1803 class SkipIfEqual {
1804  private:
1805   MacroAssembler* _masm;
1806   Label _label;
1807 
1808  public:
1809    SkipIfEqual(MacroAssembler*, const bool* flag_addr, bool value);
1810    ~SkipIfEqual();
1811 };


  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef CPU_X86_MACROASSEMBLER_X86_HPP
  26 #define CPU_X86_MACROASSEMBLER_X86_HPP
  27 
  28 #include "asm/assembler.hpp"
  29 #include "utilities/macros.hpp"
  30 #include "runtime/rtmLocking.hpp"
  31 #include "runtime/signature.hpp"
  32 
  33 class ciValueKlass;
  34 
  35 // MacroAssembler extends Assembler by frequently used macros.
  36 //
  37 // Instructions for which a 'better' code sequence exists depending
  38 // on arguments should also go in here.
  39 
  40 class MacroAssembler: public Assembler {
  41   friend class LIR_Assembler;
  42   friend class Runtime1;      // as_Address()
  43 
  44  public:
  45   // Support for VM calls
  46   //
  47   // This is the base routine called by the different versions of call_VM_leaf. The interpreter
  48   // may customize this version by overriding it for its purposes (e.g., to save/restore
  49   // additional registers when doing a VM call).
  50 
  51   virtual void call_VM_leaf_base(
  52     address entry_point,               // the entry point
  53     int     number_of_arguments        // the number of arguments to pop after the call


  84  // These routines should emit JVMTI PopFrame and ForceEarlyReturn handling code.
  85  // The implementation is only non-empty for the InterpreterMacroAssembler,
  86  // as only the interpreter handles PopFrame and ForceEarlyReturn requests.
  87  virtual void check_and_handle_popframe(Register java_thread);
  88  virtual void check_and_handle_earlyret(Register java_thread);
  89 
  90   Address as_Address(AddressLiteral adr);
  91   Address as_Address(ArrayAddress adr);
  92 
  93   // Support for NULL-checks
  94   //
  95   // Generates code that causes a NULL OS exception if the content of reg is NULL.
  96   // If the accessed location is M[reg + offset] and the offset is known, provide the
  97   // offset. No explicit code generation is needed if the offset is within a certain
  98   // range (0 <= offset <= page_size).
  99 
 100   void null_check(Register reg, int offset = -1);
 101   static bool needs_explicit_null_check(intptr_t offset);
 102   static bool uses_implicit_null_check(void* address);
 103 
 104   void test_klass_is_value(Register klass, Register temp_reg, Label& is_value);
 105 
 106   void test_field_is_flattenable(Register flags, Register temp_reg, Label& is_flattenable);
 107   void test_field_is_not_flattenable(Register flags, Register temp_reg, Label& notFlattenable);
 108   void test_field_is_flattened(Register flags, Register temp_reg, Label& is_flattened);
 109 
 110   // Check oops array storage properties, i.e. flattened and/or null-free
 111   void test_flattened_array_oop(Register oop, Register temp_reg, Label&is_flattened_array);
 112   void test_null_free_array_oop(Register oop, Register temp_reg, Label&is_null_free_array);
 113 
 114   // Required platform-specific helpers for Label::patch_instructions.
 115   // They _shadow_ the declarations in AbstractAssembler, which are undefined.
 116   void pd_patch_instruction(address branch, address target, const char* file, int line) {
 117     unsigned char op = branch[0];
 118     assert(op == 0xE8 /* call */ ||
 119         op == 0xE9 /* jmp */ ||
 120         op == 0xEB /* short jmp */ ||
 121         (op & 0xF0) == 0x70 /* short jcc */ ||
 122         op == 0x0F && (branch[1] & 0xF0) == 0x80 /* jcc */ ||
 123         op == 0xC7 && branch[1] == 0xF8 /* xbegin */,
 124         "Invalid opcode at patch point");
 125 
 126     if (op == 0xEB || (op & 0xF0) == 0x70) {
 127       // short offset operators (jmp and jcc)
 128       char* disp = (char*) &branch[1];
 129       int imm8 = target - (address) &disp[1];
 130       guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset at %s:%d", file, line);
 131       *disp = imm8;
 132     } else {
 133       int* disp = (int*) &branch[(op == 0x0F || op == 0xC7)? 2: 1];


 316   void resolve_jobject(Register value, Register thread, Register tmp);
 317 
 318   // C 'boolean' to Java boolean: x == 0 ? 0 : 1
 319   void c2bool(Register x);
 320 
 321   // C++ bool manipulation
 322 
 323   void movbool(Register dst, Address src);
 324   void movbool(Address dst, bool boolconst);
 325   void movbool(Address dst, Register src);
 326   void testbool(Register dst);
 327 
 328   void resolve_oop_handle(Register result, Register tmp = rscratch2);
 329   void resolve_weak_handle(Register result, Register tmp);
 330   void load_mirror(Register mirror, Register method, Register tmp = rscratch2);
 331   void load_method_holder_cld(Register rresult, Register rmethod);
 332 
 333   void load_method_holder(Register holder, Register method);
 334 
 335   // oop manipulations
 336   void load_metadata(Register dst, Register src);
 337   void load_storage_props(Register dst, Register src);
 338   void load_klass(Register dst, Register src);
 339   void store_klass(Register dst, Register src);
 340 
 341   void access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
 342                       Register tmp1, Register thread_tmp);
 343   void access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register src,
 344                        Register tmp1, Register tmp2, Register tmp3 = noreg);
 345 
 346   // Resolves obj access. Result is placed in the same register.
 347   // All other registers are preserved.
 348   void resolve(DecoratorSet decorators, Register obj);
 349 
 350   void load_heap_oop(Register dst, Address src, Register tmp1 = noreg,
 351                      Register thread_tmp = noreg, DecoratorSet decorators = 0);
 352   void load_heap_oop_not_null(Register dst, Address src, Register tmp1 = noreg,
 353                               Register thread_tmp = noreg, DecoratorSet decorators = 0);
 354   void store_heap_oop(Address dst, Register src, Register tmp1 = noreg,
 355                       Register tmp2 = noreg, Register tmp3 = noreg, DecoratorSet decorators = 0);
 356 
 357   // Used for storing NULL. All other oop constants should be
 358   // stored using routines that take a jobject.
 359   void store_heap_oop_null(Address dst);
 360 
 361   void load_prototype_header(Register dst, Register src);
 362 
 363 #ifdef _LP64
 364   void store_klass_gap(Register dst, Register src);
 365 
 366   // This dummy is to prevent a call to store_heap_oop from
 367   // converting a zero (like NULL) into a Register by giving
 368   // the compiler two choices it can't resolve
 369 
 370   void store_heap_oop(Address dst, void* dummy);
 371 
 372   void encode_heap_oop(Register r);
 373   void decode_heap_oop(Register r);
 374   void encode_heap_oop_not_null(Register r);
 375   void decode_heap_oop_not_null(Register r);


1629   void movl2ptr(Register dst, Address src) { LP64_ONLY(movslq(dst, src)) NOT_LP64(movl(dst, src)); }
1630   void movl2ptr(Register dst, Register src) { LP64_ONLY(movslq(dst, src)) NOT_LP64(if (dst != src) movl(dst, src)); }
1631 
1632 #ifdef COMPILER2
1633   // Generic instructions support for use in .ad files C2 code generation
1634   void vabsnegd(int opcode, XMMRegister dst, Register scr);
1635   void vabsnegd(int opcode, XMMRegister dst, XMMRegister src, int vector_len, Register scr);
1636   void vabsnegf(int opcode, XMMRegister dst, Register scr);
1637   void vabsnegf(int opcode, XMMRegister dst, XMMRegister src, int vector_len, Register scr);
1638   void vextendbw(bool sign, XMMRegister dst, XMMRegister src, int vector_len);
1639   void vextendbw(bool sign, XMMRegister dst, XMMRegister src);
1640   void vshiftd(int opcode, XMMRegister dst, XMMRegister src);
1641   void vshiftd(int opcode, XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1642   void vshiftw(int opcode, XMMRegister dst, XMMRegister src);
1643   void vshiftw(int opcode, XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1644   void vshiftq(int opcode, XMMRegister dst, XMMRegister src);
1645   void vshiftq(int opcode, XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1646 #endif
1647 
1648   // C2 compiled method's prolog code.
1649   void verified_entry(Compile* C, int sp_inc = 0);
1650 
1651   enum RegState {
1652     reg_readonly,
1653     reg_writable,
1654     reg_written
1655   };
1656 
1657   int store_value_type_fields_to_buf(ciValueKlass* vk, bool from_interpreter = true);
1658 
1659   // Unpack all value type arguments passed as oops
1660   void unpack_value_args(Compile* C, bool receiver_only);
1661   bool move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[], int ret_off, int extra_stack_offset);
1662   bool unpack_value_helper(const GrowableArray<SigEntry>* sig, int& sig_index, VMReg from, VMRegPair* regs_to, int& to_index,
1663                            RegState reg_state[], int ret_off, int extra_stack_offset);
1664   bool pack_value_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
1665                          VMReg to, VMRegPair* regs_from, int regs_from_count, int& from_index, RegState reg_state[],
1666                          int ret_off, int extra_stack_offset);
1667   void restore_stack(Compile* C);
1668 
1669   int shuffle_value_args(bool is_packing, bool receiver_only, int extra_stack_offset,
1670                          BasicType* sig_bt, const GrowableArray<SigEntry>* sig_cc,
1671                          int args_passed, int args_on_stack, VMRegPair* regs,
1672                          int args_passed_to, int args_on_stack_to, VMRegPair* regs_to);
1673   bool shuffle_value_args_spill(bool is_packing,  const GrowableArray<SigEntry>* sig_cc, int sig_cc_index,
1674                                 VMRegPair* regs_from, int from_index, int regs_from_count,
1675                                 RegState* reg_state, int sp_inc, int extra_stack_offset);
1676   VMReg spill_reg_for(VMReg reg);
1677 
1678   // clear memory of size 'cnt' qwords, starting at 'base';
1679   // if 'is_large' is set, do not try to produce short loop
1680   void clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp, bool is_large, bool word_copy_only);
1681 
1682   // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM registers
1683   void xmm_clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp);
1684 
1685 #ifdef COMPILER2
1686   void string_indexof_char(Register str1, Register cnt1, Register ch, Register result,
1687                            XMMRegister vec1, XMMRegister vec2, XMMRegister vec3, Register tmp);
1688 
1689   // IndexOf strings.
1690   // Small strings are loaded through stack if they cross page boundary.
1691   void string_indexof(Register str1, Register str2,
1692                       Register cnt1, Register cnt2,
1693                       int int_cnt2,  Register result,
1694                       XMMRegister vec, Register tmp,
1695                       int ae);
1696 
1697   // IndexOf for constant substrings with size >= 8 elements
1698   // which don't need to be loaded through stack.
1699   void string_indexofC8(Register str1, Register str2,
1700                       Register cnt1, Register cnt2,
1701                       int int_cnt2,  Register result,
1702                       XMMRegister vec, Register tmp,
1703                       int ae);


1814                             Register tmp1, Register tmp2, Register tmp3,
1815                             Register tmp4, Register tmp5, Register tmp6,
1816                             XMMRegister w_xtmp1, XMMRegister w_xtmp2, XMMRegister w_xtmp3,
1817                             bool is_pclmulqdq_supported);
1818   // Fold 128-bit data chunk
1819   void fold_128bit_crc32(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, Register buf, int offset);
1820   void fold_128bit_crc32(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, XMMRegister xbuf);
1821   // Fold 8-bit data
1822   void fold_8bit_crc32(Register crc, Register table, Register tmp);
1823   void fold_8bit_crc32(XMMRegister crc, Register table, XMMRegister xtmp, Register tmp);
1824   void fold_128bit_crc32_avx512(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, Register buf, int offset);
1825 
1826   // Compress char[] array to byte[].
1827   void char_array_compress(Register src, Register dst, Register len,
1828                            XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3,
1829                            XMMRegister tmp4, Register tmp5, Register result);
1830 
1831   // Inflate byte[] array to char[].
1832   void byte_array_inflate(Register src, Register dst, Register len,
1833                           XMMRegister tmp1, Register tmp2);
1834 
1835 #include "asm/macroAssembler_common.hpp"
1836 
1837 
1838 };
1839 
1840 /**
1841  * class SkipIfEqual:
1842  *
1843  * Instantiating this class will result in assembly code being output that will
1844  * jump around any code emitted between the creation of the instance and it's
1845  * automatic destruction at the end of a scope block, depending on the value of
1846  * the flag passed to the constructor, which will be checked at run-time.
1847  */
1848 class SkipIfEqual {
1849  private:
1850   MacroAssembler* _masm;
1851   Label _label;
1852 
1853  public:
1854    SkipIfEqual(MacroAssembler*, const bool* flag_addr, bool value);
1855    ~SkipIfEqual();
1856 };
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