13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef CPU_X86_MACROASSEMBLER_X86_HPP
26 #define CPU_X86_MACROASSEMBLER_X86_HPP
27
28 #include "asm/assembler.hpp"
29 #include "asm/register.hpp"
30 #include "code/vmreg.inline.hpp"
31 #include "compiler/oopMap.hpp"
32 #include "utilities/macros.hpp"
33 #include "runtime/vm_version.hpp"
34 #include "utilities/checkedCast.hpp"
35
36 // MacroAssembler extends Assembler by frequently used macros.
37 //
38 // Instructions for which a 'better' code sequence exists depending
39 // on arguments should also go in here.
40
41 class MacroAssembler: public Assembler {
42 friend class LIR_Assembler;
43 friend class Runtime1; // as_Address()
44
45 public:
46 // Support for VM calls
47 //
48 // This is the base routine called by the different versions of call_VM_leaf. The interpreter
49 // may customize this version by overriding it for its purposes (e.g., to save/restore
50 // additional registers when doing a VM call).
51
52 virtual void call_VM_leaf_base(
53 address entry_point, // the entry point
54 int number_of_arguments // the number of arguments to pop after the call
55 );
77 // These routines should emit JVMTI PopFrame and ForceEarlyReturn handling code.
78 // The implementation is only non-empty for the InterpreterMacroAssembler,
79 // as only the interpreter handles PopFrame and ForceEarlyReturn requests.
80 virtual void check_and_handle_popframe();
81 virtual void check_and_handle_earlyret();
82
83 Address as_Address(AddressLiteral adr);
84 Address as_Address(ArrayAddress adr, Register rscratch);
85
86 // Support for null-checks
87 //
88 // Generates code that causes a null OS exception if the content of reg is null.
89 // If the accessed location is M[reg + offset] and the offset is known, provide the
90 // offset. No explicit code generation is needed if the offset is within a certain
91 // range (0 <= offset <= page_size).
92
93 void null_check(Register reg, int offset = -1);
94 static bool needs_explicit_null_check(intptr_t offset);
95 static bool uses_implicit_null_check(void* address);
96
97 // Required platform-specific helpers for Label::patch_instructions.
98 // They _shadow_ the declarations in AbstractAssembler, which are undefined.
99 void pd_patch_instruction(address branch, address target, const char* file, int line) {
100 unsigned char op = branch[0];
101 assert(op == 0xE8 /* call */ ||
102 op == 0xE9 /* jmp */ ||
103 op == 0xEB /* short jmp */ ||
104 (op & 0xF0) == 0x70 /* short jcc */ ||
105 (op == 0x0F && (branch[1] & 0xF0) == 0x80) /* jcc */ ||
106 (op == 0xC7 && branch[1] == 0xF8) /* xbegin */ ||
107 (op == 0x8D) /* lea */,
108 "Invalid opcode at patch point");
109
110 if (op == 0xEB || (op & 0xF0) == 0x70) {
111 // short offset operators (jmp and jcc)
112 char* disp = (char*) &branch[1];
113 int imm8 = checked_cast<int>(target - (address) &disp[1]);
114 guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset at %s:%d",
115 file == nullptr ? "<null>" : file, line);
116 *disp = (char)imm8;
330 void resolve_global_jobject(Register value, Register tmp);
331
332 // C 'boolean' to Java boolean: x == 0 ? 0 : 1
333 void c2bool(Register x);
334
335 // C++ bool manipulation
336
337 void movbool(Register dst, Address src);
338 void movbool(Address dst, bool boolconst);
339 void movbool(Address dst, Register src);
340 void testbool(Register dst);
341
342 void resolve_oop_handle(Register result, Register tmp);
343 void resolve_weak_handle(Register result, Register tmp);
344 void load_mirror(Register mirror, Register method, Register tmp);
345 void load_method_holder_cld(Register rresult, Register rmethod);
346
347 void load_method_holder(Register holder, Register method);
348
349 // oop manipulations
350 void load_narrow_klass_compact(Register dst, Register src);
351 void load_klass(Register dst, Register src, Register tmp);
352 void store_klass(Register dst, Register src, Register tmp);
353
354 // Compares the Klass pointer of an object to a given Klass (which might be narrow,
355 // depending on UseCompressedClassPointers).
356 void cmp_klass(Register klass, Register obj, Register tmp);
357
358 // Compares the Klass pointer of two objects obj1 and obj2. Result is in the condition flags.
359 // Uses tmp1 and tmp2 as temporary registers.
360 void cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2);
361
362 void access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
363 Register tmp1);
364 void access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
365 Register tmp1, Register tmp2, Register tmp3);
366
367 void load_heap_oop(Register dst, Address src, Register tmp1 = noreg, DecoratorSet decorators = 0);
368 void load_heap_oop_not_null(Register dst, Address src, Register tmp1 = noreg, DecoratorSet decorators = 0);
369 void store_heap_oop(Address dst, Register val, Register tmp1 = noreg,
370 Register tmp2 = noreg, Register tmp3 = noreg, DecoratorSet decorators = 0);
371
372 // Used for storing null. All other oop constants should be
373 // stored using routines that take a jobject.
374 void store_heap_oop_null(Address dst);
375
376 void store_klass_gap(Register dst, Register src);
377
378 // This dummy is to prevent a call to store_heap_oop from
379 // converting a zero (like null) into a Register by giving
380 // the compiler two choices it can't resolve
381
382 void store_heap_oop(Address dst, void* dummy);
383
384 void encode_heap_oop(Register r);
385 void decode_heap_oop(Register r);
386 void encode_heap_oop_not_null(Register r);
387 void decode_heap_oop_not_null(Register r);
388 void encode_heap_oop_not_null(Register dst, Register src);
389 void decode_heap_oop_not_null(Register dst, Register src);
390
391 void set_narrow_oop(Register dst, jobject obj);
392 void set_narrow_oop(Address dst, jobject obj);
393 void cmp_narrow_oop(Register dst, jobject obj);
394 void cmp_narrow_oop(Address dst, jobject obj);
395
490
491 public:
492 void push_set(RegSet set, int offset = -1);
493 void pop_set(RegSet set, int offset = -1);
494
495 // Push and pop everything that might be clobbered by a native
496 // runtime call.
497 // Only save the lower 64 bits of each vector register.
498 // Additional registers can be excluded in a passed RegSet.
499 void push_call_clobbered_registers_except(RegSet exclude, bool save_fpu = true);
500 void pop_call_clobbered_registers_except(RegSet exclude, bool restore_fpu = true);
501
502 void push_call_clobbered_registers(bool save_fpu = true) {
503 push_call_clobbered_registers_except(RegSet(), save_fpu);
504 }
505 void pop_call_clobbered_registers(bool restore_fpu = true) {
506 pop_call_clobbered_registers_except(RegSet(), restore_fpu);
507 }
508
509 // allocation
510 void tlab_allocate(
511 Register obj, // result: pointer to object after successful allocation
512 Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise
513 int con_size_in_bytes, // object size in bytes if known at compile time
514 Register t1, // temp register
515 Register t2, // temp register
516 Label& slow_case // continuation point if fast allocation fails
517 );
518 void zero_memory(Register address, Register length_in_bytes, int offset_in_bytes, Register temp);
519
520 void population_count(Register dst, Register src, Register scratch1, Register scratch2);
521
522 // interface method calling
523 void lookup_interface_method(Register recv_klass,
524 Register intf_klass,
525 RegisterOrConstant itable_index,
526 Register method_result,
527 Register scan_temp,
528 Label& no_such_interface,
529 bool return_method = true);
530
531 void lookup_interface_method_stub(Register recv_klass,
532 Register holder_klass,
533 Register resolved_klass,
534 Register method_result,
535 Register scan_temp,
536 Register temp_reg2,
537 Register receiver,
538 int itable_index,
539 Label& L_no_such_interface);
746 // operands. In general the names are modified to avoid hiding the instruction in Assembler
747 // so that we don't need to implement all the varieties in the Assembler with trivial wrappers
748 // here in MacroAssembler. The major exception to this rule is call
749
750 // Arithmetics
751
752
753 void addptr(Address dst, int32_t src) { addq(dst, src); }
754 void addptr(Address dst, Register src);
755
756 void addptr(Register dst, Address src) { addq(dst, src); }
757 void addptr(Register dst, int32_t src);
758 void addptr(Register dst, Register src);
759 void addptr(Register dst, RegisterOrConstant src) {
760 if (src.is_constant()) addptr(dst, checked_cast<int>(src.as_constant()));
761 else addptr(dst, src.as_register());
762 }
763
764 void andptr(Register dst, int32_t src);
765 void andptr(Register src1, Register src2) { andq(src1, src2); }
766
767 using Assembler::andq;
768 void andq(Register dst, AddressLiteral src, Register rscratch = noreg);
769
770 void cmp8(AddressLiteral src1, int imm, Register rscratch = noreg);
771
772 // renamed to drag out the casting of address to int32_t/intptr_t
773 void cmp32(Register src1, int32_t imm);
774
775 void cmp32(AddressLiteral src1, int32_t imm, Register rscratch = noreg);
776 // compare reg - mem, or reg - &mem
777 void cmp32(Register src1, AddressLiteral src2, Register rscratch = noreg);
778
779 void cmp32(Register src1, Address src2);
780
781 void cmpoop(Register src1, Register src2);
782 void cmpoop(Register src1, Address src2);
783 void cmpoop(Register dst, jobject obj, Register rscratch);
784
785 // NOTE src2 must be the lval. This is NOT an mem-mem compare
1884 void movdl(XMMRegister dst, AddressLiteral src, Register rscratch = noreg);
1885
1886 using Assembler::movq;
1887 void movq(XMMRegister dst, AddressLiteral src, Register rscratch = noreg);
1888
1889 // Can push value or effective address
1890 void pushptr(AddressLiteral src, Register rscratch);
1891
1892 void pushptr(Address src) { pushq(src); }
1893 void popptr(Address src) { popq(src); }
1894
1895 void pushoop(jobject obj, Register rscratch);
1896 void pushklass(Metadata* obj, Register rscratch);
1897
1898 // sign extend as need a l to ptr sized element
1899 void movl2ptr(Register dst, Address src) { movslq(dst, src); }
1900 void movl2ptr(Register dst, Register src) { movslq(dst, src); }
1901
1902
1903 public:
1904 // clear memory of size 'cnt' qwords, starting at 'base';
1905 // if 'is_large' is set, do not try to produce short loop
1906 void clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, bool is_large, KRegister mask=knoreg);
1907
1908 // clear memory initialization sequence for constant size;
1909 void clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1910
1911 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM registers
1912 void xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1913
1914 // Fill primitive arrays
1915 void generate_fill(BasicType t, bool aligned,
1916 Register to, Register value, Register count,
1917 Register rtmp, XMMRegister xtmp);
1918
1919 void encode_iso_array(Register src, Register dst, Register len,
1920 XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3,
1921 XMMRegister tmp4, Register tmp5, Register result, bool ascii);
1922
1923 void add2_with_carry(Register dest_hi, Register dest_lo, Register src1, Register src2);
1924 void multiply_64_x_64_loop(Register x, Register xstart, Register x_xstart,
1925 Register y, Register y_idx, Register z,
1926 Register carry, Register product,
|
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef CPU_X86_MACROASSEMBLER_X86_HPP
26 #define CPU_X86_MACROASSEMBLER_X86_HPP
27
28 #include "asm/assembler.hpp"
29 #include "asm/register.hpp"
30 #include "code/vmreg.inline.hpp"
31 #include "compiler/oopMap.hpp"
32 #include "utilities/macros.hpp"
33 #include "runtime/signature.hpp"
34 #include "runtime/vm_version.hpp"
35 #include "utilities/checkedCast.hpp"
36
37 class ciInlineKlass;
38
39 // MacroAssembler extends Assembler by frequently used macros.
40 //
41 // Instructions for which a 'better' code sequence exists depending
42 // on arguments should also go in here.
43
44 class MacroAssembler: public Assembler {
45 friend class LIR_Assembler;
46 friend class Runtime1; // as_Address()
47
48 public:
49 // Support for VM calls
50 //
51 // This is the base routine called by the different versions of call_VM_leaf. The interpreter
52 // may customize this version by overriding it for its purposes (e.g., to save/restore
53 // additional registers when doing a VM call).
54
55 virtual void call_VM_leaf_base(
56 address entry_point, // the entry point
57 int number_of_arguments // the number of arguments to pop after the call
58 );
80 // These routines should emit JVMTI PopFrame and ForceEarlyReturn handling code.
81 // The implementation is only non-empty for the InterpreterMacroAssembler,
82 // as only the interpreter handles PopFrame and ForceEarlyReturn requests.
83 virtual void check_and_handle_popframe();
84 virtual void check_and_handle_earlyret();
85
86 Address as_Address(AddressLiteral adr);
87 Address as_Address(ArrayAddress adr, Register rscratch);
88
89 // Support for null-checks
90 //
91 // Generates code that causes a null OS exception if the content of reg is null.
92 // If the accessed location is M[reg + offset] and the offset is known, provide the
93 // offset. No explicit code generation is needed if the offset is within a certain
94 // range (0 <= offset <= page_size).
95
96 void null_check(Register reg, int offset = -1);
97 static bool needs_explicit_null_check(intptr_t offset);
98 static bool uses_implicit_null_check(void* address);
99
100 // markWord tests, kills markWord reg
101 void test_markword_is_inline_type(Register markword, Label& is_inline_type);
102
103 // inlineKlass queries, kills temp_reg
104 void test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null = true);
105
106 void test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free);
107 void test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free);
108 void test_field_is_flat(Register flags, Register temp_reg, Label& is_flat);
109 void test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker);
110
111 // Check oops for special arrays, i.e. flat arrays and/or null-free arrays
112 void test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label);
113 void test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array);
114 void test_non_flat_array_oop(Register oop, Register temp_reg, Label& is_non_flat_array);
115 void test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array);
116 void test_non_null_free_array_oop(Register oop, Register temp_reg, Label& is_non_null_free_array);
117
118 // Check array klass layout helper for flat or null-free arrays...
119 void test_flat_array_layout(Register lh, Label& is_flat_array);
120 void test_non_flat_array_layout(Register lh, Label& is_non_flat_array);
121
122 // Required platform-specific helpers for Label::patch_instructions.
123 // They _shadow_ the declarations in AbstractAssembler, which are undefined.
124 void pd_patch_instruction(address branch, address target, const char* file, int line) {
125 unsigned char op = branch[0];
126 assert(op == 0xE8 /* call */ ||
127 op == 0xE9 /* jmp */ ||
128 op == 0xEB /* short jmp */ ||
129 (op & 0xF0) == 0x70 /* short jcc */ ||
130 (op == 0x0F && (branch[1] & 0xF0) == 0x80) /* jcc */ ||
131 (op == 0xC7 && branch[1] == 0xF8) /* xbegin */ ||
132 (op == 0x8D) /* lea */,
133 "Invalid opcode at patch point");
134
135 if (op == 0xEB || (op & 0xF0) == 0x70) {
136 // short offset operators (jmp and jcc)
137 char* disp = (char*) &branch[1];
138 int imm8 = checked_cast<int>(target - (address) &disp[1]);
139 guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset at %s:%d",
140 file == nullptr ? "<null>" : file, line);
141 *disp = (char)imm8;
355 void resolve_global_jobject(Register value, Register tmp);
356
357 // C 'boolean' to Java boolean: x == 0 ? 0 : 1
358 void c2bool(Register x);
359
360 // C++ bool manipulation
361
362 void movbool(Register dst, Address src);
363 void movbool(Address dst, bool boolconst);
364 void movbool(Address dst, Register src);
365 void testbool(Register dst);
366
367 void resolve_oop_handle(Register result, Register tmp);
368 void resolve_weak_handle(Register result, Register tmp);
369 void load_mirror(Register mirror, Register method, Register tmp);
370 void load_method_holder_cld(Register rresult, Register rmethod);
371
372 void load_method_holder(Register holder, Register method);
373
374 // oop manipulations
375
376 // Load oopDesc._metadata without decode (useful for direct Klass* compare from oops)
377 void load_metadata(Register dst, Register src);
378 void load_narrow_klass_compact(Register dst, Register src);
379 void load_klass(Register dst, Register src, Register tmp);
380 void store_klass(Register dst, Register src, Register tmp);
381
382 // Compares the Klass pointer of an object to a given Klass (which might be narrow,
383 // depending on UseCompressedClassPointers).
384 void cmp_klass(Register klass, Register obj, Register tmp);
385
386 // Compares the Klass pointer of two objects obj1 and obj2. Result is in the condition flags.
387 // Uses tmp1 and tmp2 as temporary registers.
388 void cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2);
389
390 void access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
391 Register tmp1);
392 void access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
393 Register tmp1, Register tmp2, Register tmp3);
394
395 void flat_field_copy(DecoratorSet decorators, Register src, Register dst, Register inline_layout_info);
396
397 // inline type data payload offsets...
398 void payload_offset(Register inline_klass, Register offset);
399 void payload_addr(Register oop, Register data, Register inline_klass);
400 // get data payload ptr a flat value array at index, kills rcx and index
401 void data_for_value_array_index(Register array, Register array_klass,
402 Register index, Register data);
403
404 void load_heap_oop(Register dst, Address src, Register tmp1 = noreg, DecoratorSet decorators = 0);
405 void load_heap_oop_not_null(Register dst, Address src, Register tmp1 = noreg, DecoratorSet decorators = 0);
406 void store_heap_oop(Address dst, Register val, Register tmp1 = noreg,
407 Register tmp2 = noreg, Register tmp3 = noreg, DecoratorSet decorators = 0);
408
409 // Used for storing null. All other oop constants should be
410 // stored using routines that take a jobject.
411 void store_heap_oop_null(Address dst);
412
413 void load_prototype_header(Register dst, Register src, Register tmp);
414
415 void store_klass_gap(Register dst, Register src);
416
417 // This dummy is to prevent a call to store_heap_oop from
418 // converting a zero (like null) into a Register by giving
419 // the compiler two choices it can't resolve
420
421 void store_heap_oop(Address dst, void* dummy);
422
423 void encode_heap_oop(Register r);
424 void decode_heap_oop(Register r);
425 void encode_heap_oop_not_null(Register r);
426 void decode_heap_oop_not_null(Register r);
427 void encode_heap_oop_not_null(Register dst, Register src);
428 void decode_heap_oop_not_null(Register dst, Register src);
429
430 void set_narrow_oop(Register dst, jobject obj);
431 void set_narrow_oop(Address dst, jobject obj);
432 void cmp_narrow_oop(Register dst, jobject obj);
433 void cmp_narrow_oop(Address dst, jobject obj);
434
529
530 public:
531 void push_set(RegSet set, int offset = -1);
532 void pop_set(RegSet set, int offset = -1);
533
534 // Push and pop everything that might be clobbered by a native
535 // runtime call.
536 // Only save the lower 64 bits of each vector register.
537 // Additional registers can be excluded in a passed RegSet.
538 void push_call_clobbered_registers_except(RegSet exclude, bool save_fpu = true);
539 void pop_call_clobbered_registers_except(RegSet exclude, bool restore_fpu = true);
540
541 void push_call_clobbered_registers(bool save_fpu = true) {
542 push_call_clobbered_registers_except(RegSet(), save_fpu);
543 }
544 void pop_call_clobbered_registers(bool restore_fpu = true) {
545 pop_call_clobbered_registers_except(RegSet(), restore_fpu);
546 }
547
548 // allocation
549
550 // Object / value buffer allocation...
551 // Allocate instance of klass, assumes klass initialized by caller
552 // new_obj prefers to be rax
553 // Kills t1 and t2, perserves klass, return allocation in new_obj (rsi on LP64)
554 void allocate_instance(Register klass, Register new_obj,
555 Register t1, Register t2,
556 bool clear_fields, Label& alloc_failed);
557
558 void tlab_allocate(
559 Register obj, // result: pointer to object after successful allocation
560 Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise
561 int con_size_in_bytes, // object size in bytes if known at compile time
562 Register t1, // temp register
563 Register t2, // temp register
564 Label& slow_case // continuation point if fast allocation fails
565 );
566 void zero_memory(Register address, Register length_in_bytes, int offset_in_bytes, Register temp);
567
568 // For field "index" within "klass", return inline_klass ...
569 void get_inline_type_field_klass(Register klass, Register index, Register inline_klass);
570
571 void inline_layout_info(Register klass, Register index, Register layout_info);
572
573 void population_count(Register dst, Register src, Register scratch1, Register scratch2);
574
575 // interface method calling
576 void lookup_interface_method(Register recv_klass,
577 Register intf_klass,
578 RegisterOrConstant itable_index,
579 Register method_result,
580 Register scan_temp,
581 Label& no_such_interface,
582 bool return_method = true);
583
584 void lookup_interface_method_stub(Register recv_klass,
585 Register holder_klass,
586 Register resolved_klass,
587 Register method_result,
588 Register scan_temp,
589 Register temp_reg2,
590 Register receiver,
591 int itable_index,
592 Label& L_no_such_interface);
799 // operands. In general the names are modified to avoid hiding the instruction in Assembler
800 // so that we don't need to implement all the varieties in the Assembler with trivial wrappers
801 // here in MacroAssembler. The major exception to this rule is call
802
803 // Arithmetics
804
805
806 void addptr(Address dst, int32_t src) { addq(dst, src); }
807 void addptr(Address dst, Register src);
808
809 void addptr(Register dst, Address src) { addq(dst, src); }
810 void addptr(Register dst, int32_t src);
811 void addptr(Register dst, Register src);
812 void addptr(Register dst, RegisterOrConstant src) {
813 if (src.is_constant()) addptr(dst, checked_cast<int>(src.as_constant()));
814 else addptr(dst, src.as_register());
815 }
816
817 void andptr(Register dst, int32_t src);
818 void andptr(Register src1, Register src2) { andq(src1, src2); }
819 void andptr(Register dst, Address src) { andq(dst, src); }
820
821 using Assembler::andq;
822 void andq(Register dst, AddressLiteral src, Register rscratch = noreg);
823
824 void cmp8(AddressLiteral src1, int imm, Register rscratch = noreg);
825
826 // renamed to drag out the casting of address to int32_t/intptr_t
827 void cmp32(Register src1, int32_t imm);
828
829 void cmp32(AddressLiteral src1, int32_t imm, Register rscratch = noreg);
830 // compare reg - mem, or reg - &mem
831 void cmp32(Register src1, AddressLiteral src2, Register rscratch = noreg);
832
833 void cmp32(Register src1, Address src2);
834
835 void cmpoop(Register src1, Register src2);
836 void cmpoop(Register src1, Address src2);
837 void cmpoop(Register dst, jobject obj, Register rscratch);
838
839 // NOTE src2 must be the lval. This is NOT an mem-mem compare
1938 void movdl(XMMRegister dst, AddressLiteral src, Register rscratch = noreg);
1939
1940 using Assembler::movq;
1941 void movq(XMMRegister dst, AddressLiteral src, Register rscratch = noreg);
1942
1943 // Can push value or effective address
1944 void pushptr(AddressLiteral src, Register rscratch);
1945
1946 void pushptr(Address src) { pushq(src); }
1947 void popptr(Address src) { popq(src); }
1948
1949 void pushoop(jobject obj, Register rscratch);
1950 void pushklass(Metadata* obj, Register rscratch);
1951
1952 // sign extend as need a l to ptr sized element
1953 void movl2ptr(Register dst, Address src) { movslq(dst, src); }
1954 void movl2ptr(Register dst, Register src) { movslq(dst, src); }
1955
1956
1957 public:
1958 // Inline type specific methods
1959 #include "asm/macroAssembler_common.hpp"
1960
1961 int store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter = true);
1962 bool move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]);
1963 bool unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
1964 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
1965 RegState reg_state[]);
1966 bool pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
1967 VMRegPair* from, int from_count, int& from_index, VMReg to,
1968 RegState reg_state[], Register val_array);
1969 int extend_stack_for_inline_args(int args_on_stack);
1970 void remove_frame(int initial_framesize, bool needs_stack_repair);
1971 VMReg spill_reg_for(VMReg reg);
1972
1973 // clear memory of size 'cnt' qwords, starting at 'base';
1974 // if 'is_large' is set, do not try to produce short loop
1975 void clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp, bool is_large, bool word_copy_only, KRegister mask=knoreg);
1976
1977 // clear memory initialization sequence for constant size;
1978 void clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1979
1980 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM registers
1981 void xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1982
1983 // Fill primitive arrays
1984 void generate_fill(BasicType t, bool aligned,
1985 Register to, Register value, Register count,
1986 Register rtmp, XMMRegister xtmp);
1987
1988 void encode_iso_array(Register src, Register dst, Register len,
1989 XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3,
1990 XMMRegister tmp4, Register tmp5, Register result, bool ascii);
1991
1992 void add2_with_carry(Register dest_hi, Register dest_lo, Register src1, Register src2);
1993 void multiply_64_x_64_loop(Register x, Register xstart, Register x_xstart,
1994 Register y, Register y_idx, Register z,
1995 Register carry, Register product,
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