13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef CPU_X86_MACROASSEMBLER_X86_HPP
26 #define CPU_X86_MACROASSEMBLER_X86_HPP
27
28 #include "asm/assembler.hpp"
29 #include "asm/register.hpp"
30 #include "code/vmreg.inline.hpp"
31 #include "compiler/oopMap.hpp"
32 #include "utilities/macros.hpp"
33 #include "runtime/vm_version.hpp"
34 #include "utilities/checkedCast.hpp"
35
36 // MacroAssembler extends Assembler by frequently used macros.
37 //
38 // Instructions for which a 'better' code sequence exists depending
39 // on arguments should also go in here.
40
41 class MacroAssembler: public Assembler {
42 friend class LIR_Assembler;
43 friend class Runtime1; // as_Address()
44
45 public:
46 // Support for VM calls
47 //
48 // This is the base routine called by the different versions of call_VM_leaf. The interpreter
49 // may customize this version by overriding it for its purposes (e.g., to save/restore
50 // additional registers when doing a VM call).
51
52 virtual void call_VM_leaf_base(
53 address entry_point, // the entry point
54 int number_of_arguments // the number of arguments to pop after the call
55 );
77 // These routines should emit JVMTI PopFrame and ForceEarlyReturn handling code.
78 // The implementation is only non-empty for the InterpreterMacroAssembler,
79 // as only the interpreter handles PopFrame and ForceEarlyReturn requests.
80 virtual void check_and_handle_popframe();
81 virtual void check_and_handle_earlyret();
82
83 Address as_Address(AddressLiteral adr);
84 Address as_Address(ArrayAddress adr, Register rscratch);
85
86 // Support for null-checks
87 //
88 // Generates code that causes a null OS exception if the content of reg is null.
89 // If the accessed location is M[reg + offset] and the offset is known, provide the
90 // offset. No explicit code generation is needed if the offset is within a certain
91 // range (0 <= offset <= page_size).
92
93 void null_check(Register reg, int offset = -1);
94 static bool needs_explicit_null_check(intptr_t offset);
95 static bool uses_implicit_null_check(void* address);
96
97 // Required platform-specific helpers for Label::patch_instructions.
98 // They _shadow_ the declarations in AbstractAssembler, which are undefined.
99 void pd_patch_instruction(address branch, address target, const char* file, int line) {
100 unsigned char op = branch[0];
101 assert(op == 0xE8 /* call */ ||
102 op == 0xE9 /* jmp */ ||
103 op == 0xEB /* short jmp */ ||
104 (op & 0xF0) == 0x70 /* short jcc */ ||
105 (op == 0x0F && (branch[1] & 0xF0) == 0x80) /* jcc */ ||
106 (op == 0xC7 && branch[1] == 0xF8) /* xbegin */ ||
107 (op == 0x8D) /* lea */,
108 "Invalid opcode at patch point");
109
110 if (op == 0xEB || (op & 0xF0) == 0x70) {
111 // short offset operators (jmp and jcc)
112 char* disp = (char*) &branch[1];
113 int imm8 = checked_cast<int>(target - (address) &disp[1]);
114 guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset at %s:%d",
115 file == nullptr ? "<null>" : file, line);
116 *disp = (char)imm8;
332 void resolve_global_jobject(Register value, Register tmp);
333
334 // C 'boolean' to Java boolean: x == 0 ? 0 : 1
335 void c2bool(Register x);
336
337 // C++ bool manipulation
338
339 void movbool(Register dst, Address src);
340 void movbool(Address dst, bool boolconst);
341 void movbool(Address dst, Register src);
342 void testbool(Register dst);
343
344 void resolve_oop_handle(Register result, Register tmp);
345 void resolve_weak_handle(Register result, Register tmp);
346 void load_mirror(Register mirror, Register method, Register tmp);
347 void load_method_holder_cld(Register rresult, Register rmethod);
348
349 void load_method_holder(Register holder, Register method);
350
351 // oop manipulations
352 void load_narrow_klass_compact(Register dst, Register src);
353 void load_klass(Register dst, Register src, Register tmp);
354 void store_klass(Register dst, Register src, Register tmp);
355
356 // Compares the narrow Klass pointer of an object to a given narrow Klass.
357 void cmp_klass(Register klass, Register obj, Register tmp);
358
359 // Compares the Klass pointer of two objects obj1 and obj2. Result is in the condition flags.
360 // Uses tmp1 and tmp2 as temporary registers.
361 void cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2);
362
363 void access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
364 Register tmp1);
365 void access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
366 Register tmp1, Register tmp2, Register tmp3);
367
368 void load_heap_oop(Register dst, Address src, Register tmp1 = noreg, DecoratorSet decorators = 0);
369 void load_heap_oop_not_null(Register dst, Address src, Register tmp1 = noreg, DecoratorSet decorators = 0);
370 void store_heap_oop(Address dst, Register val, Register tmp1 = noreg,
371 Register tmp2 = noreg, Register tmp3 = noreg, DecoratorSet decorators = 0);
372
373 // Used for storing null. All other oop constants should be
374 // stored using routines that take a jobject.
375 void store_heap_oop_null(Address dst);
376
377 void store_klass_gap(Register dst, Register src);
378
379 // This dummy is to prevent a call to store_heap_oop from
380 // converting a zero (like null) into a Register by giving
381 // the compiler two choices it can't resolve
382
383 void store_heap_oop(Address dst, void* dummy);
384
385 void encode_heap_oop(Register r);
386 void decode_heap_oop(Register r);
387 void encode_heap_oop_not_null(Register r);
388 void decode_heap_oop_not_null(Register r);
389 void encode_heap_oop_not_null(Register dst, Register src);
390 void decode_heap_oop_not_null(Register dst, Register src);
391
392 void set_narrow_oop(Register dst, jobject obj);
393 void set_narrow_oop(Address dst, jobject obj);
394 void cmp_narrow_oop(Register dst, jobject obj);
395 void cmp_narrow_oop(Address dst, jobject obj);
396
494
495 public:
496 void push_set(RegSet set, int offset = -1);
497 void pop_set(RegSet set, int offset = -1);
498
499 // Push and pop everything that might be clobbered by a native
500 // runtime call.
501 // Only save the lower 64 bits of each vector register.
502 // Additional registers can be excluded in a passed RegSet.
503 void push_call_clobbered_registers_except(RegSet exclude, bool save_fpu = true);
504 void pop_call_clobbered_registers_except(RegSet exclude, bool restore_fpu = true);
505
506 void push_call_clobbered_registers(bool save_fpu = true) {
507 push_call_clobbered_registers_except(RegSet(), save_fpu);
508 }
509 void pop_call_clobbered_registers(bool restore_fpu = true) {
510 pop_call_clobbered_registers_except(RegSet(), restore_fpu);
511 }
512
513 // allocation
514 void tlab_allocate(
515 Register obj, // result: pointer to object after successful allocation
516 Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise
517 int con_size_in_bytes, // object size in bytes if known at compile time
518 Register t1, // temp register
519 Register t2, // temp register
520 Label& slow_case // continuation point if fast allocation fails
521 );
522 void zero_memory(Register address, Register length_in_bytes, int offset_in_bytes, Register temp);
523
524 void population_count(Register dst, Register src, Register scratch1, Register scratch2);
525
526 // interface method calling
527 void lookup_interface_method(Register recv_klass,
528 Register intf_klass,
529 RegisterOrConstant itable_index,
530 Register method_result,
531 Register scan_temp,
532 Label& no_such_interface,
533 bool return_method = true);
534
535 void lookup_interface_method_stub(Register recv_klass,
536 Register holder_klass,
537 Register resolved_klass,
538 Register method_result,
539 Register scan_temp,
540 Register temp_reg2,
541 Register receiver,
542 int itable_index,
543 Label& L_no_such_interface);
752 // operands. In general the names are modified to avoid hiding the instruction in Assembler
753 // so that we don't need to implement all the varieties in the Assembler with trivial wrappers
754 // here in MacroAssembler. The major exception to this rule is call
755
756 // Arithmetics
757
758
759 void addptr(Address dst, int32_t src) { addq(dst, src); }
760 void addptr(Address dst, Register src);
761
762 void addptr(Register dst, Address src) { addq(dst, src); }
763 void addptr(Register dst, int32_t src);
764 void addptr(Register dst, Register src);
765 void addptr(Register dst, RegisterOrConstant src) {
766 if (src.is_constant()) addptr(dst, checked_cast<int>(src.as_constant()));
767 else addptr(dst, src.as_register());
768 }
769
770 void andptr(Register dst, int32_t src);
771 void andptr(Register src1, Register src2) { andq(src1, src2); }
772
773 using Assembler::andq;
774 void andq(Register dst, AddressLiteral src, Register rscratch = noreg);
775
776 void cmp8(AddressLiteral src1, int imm, Register rscratch = noreg);
777
778 // renamed to drag out the casting of address to int32_t/intptr_t
779 void cmp32(Register src1, int32_t imm);
780
781 void cmp32(AddressLiteral src1, int32_t imm, Register rscratch = noreg);
782 // compare reg - mem, or reg - &mem
783 void cmp32(Register src1, AddressLiteral src2, Register rscratch = noreg);
784
785 void cmp32(Register src1, Address src2);
786
787 void cmpoop(Register src1, Register src2);
788 void cmpoop(Register src1, Address src2);
789 void cmpoop(Register dst, jobject obj, Register rscratch);
790
791 // NOTE src2 must be the lval. This is NOT an mem-mem compare
1910 void movdl(XMMRegister dst, AddressLiteral src, Register rscratch = noreg);
1911
1912 using Assembler::movq;
1913 void movq(XMMRegister dst, AddressLiteral src, Register rscratch = noreg);
1914
1915 // Can push value or effective address
1916 void pushptr(AddressLiteral src, Register rscratch);
1917
1918 void pushptr(Address src) { pushq(src); }
1919 void popptr(Address src) { popq(src); }
1920
1921 void pushoop(jobject obj, Register rscratch);
1922 void pushklass(Metadata* obj, Register rscratch);
1923
1924 // sign extend as need a l to ptr sized element
1925 void movl2ptr(Register dst, Address src) { movslq(dst, src); }
1926 void movl2ptr(Register dst, Register src) { movslq(dst, src); }
1927
1928
1929 public:
1930 // clear memory of size 'cnt' qwords, starting at 'base';
1931 // if 'is_large' is set, do not try to produce short loop
1932 void clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, bool is_large, KRegister mask=knoreg);
1933
1934 // clear memory initialization sequence for constant size;
1935 void clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1936
1937 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM registers
1938 void xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1939
1940 // Fill primitive arrays
1941 void generate_fill(BasicType t, bool aligned,
1942 Register to, Register value, Register count,
1943 Register rtmp, XMMRegister xtmp);
1944
1945 void encode_iso_array(Register src, Register dst, Register len,
1946 XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3,
1947 XMMRegister tmp4, Register tmp5, Register result, bool ascii);
1948
1949 void add2_with_carry(Register dest_hi, Register dest_lo, Register src1, Register src2);
1950 void multiply_64_x_64_loop(Register x, Register xstart, Register x_xstart,
1951 Register y, Register y_idx, Register z,
1952 Register carry, Register product,
|
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef CPU_X86_MACROASSEMBLER_X86_HPP
26 #define CPU_X86_MACROASSEMBLER_X86_HPP
27
28 #include "asm/assembler.hpp"
29 #include "asm/register.hpp"
30 #include "code/vmreg.inline.hpp"
31 #include "compiler/oopMap.hpp"
32 #include "utilities/macros.hpp"
33 #include "runtime/signature.hpp"
34 #include "runtime/vm_version.hpp"
35 #include "utilities/checkedCast.hpp"
36
37 class ciInlineKlass;
38
39 // MacroAssembler extends Assembler by frequently used macros.
40 //
41 // Instructions for which a 'better' code sequence exists depending
42 // on arguments should also go in here.
43
44 class MacroAssembler: public Assembler {
45 friend class LIR_Assembler;
46 friend class Runtime1; // as_Address()
47
48 public:
49 // Support for VM calls
50 //
51 // This is the base routine called by the different versions of call_VM_leaf. The interpreter
52 // may customize this version by overriding it for its purposes (e.g., to save/restore
53 // additional registers when doing a VM call).
54
55 virtual void call_VM_leaf_base(
56 address entry_point, // the entry point
57 int number_of_arguments // the number of arguments to pop after the call
58 );
80 // These routines should emit JVMTI PopFrame and ForceEarlyReturn handling code.
81 // The implementation is only non-empty for the InterpreterMacroAssembler,
82 // as only the interpreter handles PopFrame and ForceEarlyReturn requests.
83 virtual void check_and_handle_popframe();
84 virtual void check_and_handle_earlyret();
85
86 Address as_Address(AddressLiteral adr);
87 Address as_Address(ArrayAddress adr, Register rscratch);
88
89 // Support for null-checks
90 //
91 // Generates code that causes a null OS exception if the content of reg is null.
92 // If the accessed location is M[reg + offset] and the offset is known, provide the
93 // offset. No explicit code generation is needed if the offset is within a certain
94 // range (0 <= offset <= page_size).
95
96 void null_check(Register reg, int offset = -1);
97 static bool needs_explicit_null_check(intptr_t offset);
98 static bool uses_implicit_null_check(void* address);
99
100 // markWord tests, kills markWord reg
101 void test_markword_is_inline_type(Register markword, Label& is_inline_type);
102
103 // inlineKlass queries, kills temp_reg
104 void test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null = true);
105
106 void test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free);
107 void test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free);
108 void test_field_is_flat(Register flags, Register temp_reg, Label& is_flat);
109 void test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker);
110
111 // Check oops for special arrays, i.e. flat arrays and/or null-free arrays
112 void test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label);
113 void test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array);
114 void test_non_flat_array_oop(Register oop, Register temp_reg, Label& is_non_flat_array);
115 void test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array);
116 void test_non_null_free_array_oop(Register oop, Register temp_reg, Label& is_non_null_free_array);
117
118 // Check array klass layout helper for flat or null-free arrays...
119 void test_flat_array_layout(Register lh, Label& is_flat_array);
120 void test_non_flat_array_layout(Register lh, Label& is_non_flat_array);
121
122 // Required platform-specific helpers for Label::patch_instructions.
123 // They _shadow_ the declarations in AbstractAssembler, which are undefined.
124 void pd_patch_instruction(address branch, address target, const char* file, int line) {
125 unsigned char op = branch[0];
126 assert(op == 0xE8 /* call */ ||
127 op == 0xE9 /* jmp */ ||
128 op == 0xEB /* short jmp */ ||
129 (op & 0xF0) == 0x70 /* short jcc */ ||
130 (op == 0x0F && (branch[1] & 0xF0) == 0x80) /* jcc */ ||
131 (op == 0xC7 && branch[1] == 0xF8) /* xbegin */ ||
132 (op == 0x8D) /* lea */,
133 "Invalid opcode at patch point");
134
135 if (op == 0xEB || (op & 0xF0) == 0x70) {
136 // short offset operators (jmp and jcc)
137 char* disp = (char*) &branch[1];
138 int imm8 = checked_cast<int>(target - (address) &disp[1]);
139 guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset at %s:%d",
140 file == nullptr ? "<null>" : file, line);
141 *disp = (char)imm8;
357 void resolve_global_jobject(Register value, Register tmp);
358
359 // C 'boolean' to Java boolean: x == 0 ? 0 : 1
360 void c2bool(Register x);
361
362 // C++ bool manipulation
363
364 void movbool(Register dst, Address src);
365 void movbool(Address dst, bool boolconst);
366 void movbool(Address dst, Register src);
367 void testbool(Register dst);
368
369 void resolve_oop_handle(Register result, Register tmp);
370 void resolve_weak_handle(Register result, Register tmp);
371 void load_mirror(Register mirror, Register method, Register tmp);
372 void load_method_holder_cld(Register rresult, Register rmethod);
373
374 void load_method_holder(Register holder, Register method);
375
376 // oop manipulations
377
378 // Load oopDesc._metadata without decode (useful for direct Klass* compare from oops)
379 void load_metadata(Register dst, Register src);
380 void load_narrow_klass_compact(Register dst, Register src);
381 void load_klass(Register dst, Register src, Register tmp);
382 void store_klass(Register dst, Register src, Register tmp);
383
384 // Compares the narrow Klass pointer of an object to a given narrow Klass.
385 void cmp_klass(Register klass, Register obj, Register tmp);
386
387 // Compares the Klass pointer of two objects obj1 and obj2. Result is in the condition flags.
388 // Uses tmp1 and tmp2 as temporary registers.
389 void cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2);
390
391 void access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
392 Register tmp1);
393 void access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
394 Register tmp1, Register tmp2, Register tmp3);
395
396 void flat_field_copy(DecoratorSet decorators, Register src, Register dst, Register inline_layout_info);
397
398 // inline type data payload offsets...
399 void payload_offset(Register inline_klass, Register offset);
400 void payload_addr(Register oop, Register data, Register inline_klass);
401 // get data payload ptr a flat value array at index, kills rcx and index
402 void data_for_value_array_index(Register array, Register array_klass,
403 Register index, Register data);
404
405 void load_heap_oop(Register dst, Address src, Register tmp1 = noreg, DecoratorSet decorators = 0);
406 void load_heap_oop_not_null(Register dst, Address src, Register tmp1 = noreg, DecoratorSet decorators = 0);
407 void store_heap_oop(Address dst, Register val, Register tmp1 = noreg,
408 Register tmp2 = noreg, Register tmp3 = noreg, DecoratorSet decorators = 0);
409
410 // Used for storing null. All other oop constants should be
411 // stored using routines that take a jobject.
412 void store_heap_oop_null(Address dst);
413
414 void load_prototype_header(Register dst, Register src, Register tmp);
415
416 void store_klass_gap(Register dst, Register src);
417
418 // This dummy is to prevent a call to store_heap_oop from
419 // converting a zero (like null) into a Register by giving
420 // the compiler two choices it can't resolve
421
422 void store_heap_oop(Address dst, void* dummy);
423
424 void encode_heap_oop(Register r);
425 void decode_heap_oop(Register r);
426 void encode_heap_oop_not_null(Register r);
427 void decode_heap_oop_not_null(Register r);
428 void encode_heap_oop_not_null(Register dst, Register src);
429 void decode_heap_oop_not_null(Register dst, Register src);
430
431 void set_narrow_oop(Register dst, jobject obj);
432 void set_narrow_oop(Address dst, jobject obj);
433 void cmp_narrow_oop(Register dst, jobject obj);
434 void cmp_narrow_oop(Address dst, jobject obj);
435
533
534 public:
535 void push_set(RegSet set, int offset = -1);
536 void pop_set(RegSet set, int offset = -1);
537
538 // Push and pop everything that might be clobbered by a native
539 // runtime call.
540 // Only save the lower 64 bits of each vector register.
541 // Additional registers can be excluded in a passed RegSet.
542 void push_call_clobbered_registers_except(RegSet exclude, bool save_fpu = true);
543 void pop_call_clobbered_registers_except(RegSet exclude, bool restore_fpu = true);
544
545 void push_call_clobbered_registers(bool save_fpu = true) {
546 push_call_clobbered_registers_except(RegSet(), save_fpu);
547 }
548 void pop_call_clobbered_registers(bool restore_fpu = true) {
549 pop_call_clobbered_registers_except(RegSet(), restore_fpu);
550 }
551
552 // allocation
553
554 // Object / value buffer allocation...
555 // Allocate instance of klass, assumes klass initialized by caller
556 // new_obj prefers to be rax
557 // Kills t1 and t2, perserves klass, return allocation in new_obj (rsi on LP64)
558 void allocate_instance(Register klass, Register new_obj,
559 Register t1, Register t2,
560 bool clear_fields, Label& alloc_failed);
561
562 void tlab_allocate(
563 Register obj, // result: pointer to object after successful allocation
564 Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise
565 int con_size_in_bytes, // object size in bytes if known at compile time
566 Register t1, // temp register
567 Register t2, // temp register
568 Label& slow_case // continuation point if fast allocation fails
569 );
570 void zero_memory(Register address, Register length_in_bytes, int offset_in_bytes, Register temp);
571
572 void inline_layout_info(Register klass, Register index, Register layout_info);
573
574 void population_count(Register dst, Register src, Register scratch1, Register scratch2);
575
576 // interface method calling
577 void lookup_interface_method(Register recv_klass,
578 Register intf_klass,
579 RegisterOrConstant itable_index,
580 Register method_result,
581 Register scan_temp,
582 Label& no_such_interface,
583 bool return_method = true);
584
585 void lookup_interface_method_stub(Register recv_klass,
586 Register holder_klass,
587 Register resolved_klass,
588 Register method_result,
589 Register scan_temp,
590 Register temp_reg2,
591 Register receiver,
592 int itable_index,
593 Label& L_no_such_interface);
802 // operands. In general the names are modified to avoid hiding the instruction in Assembler
803 // so that we don't need to implement all the varieties in the Assembler with trivial wrappers
804 // here in MacroAssembler. The major exception to this rule is call
805
806 // Arithmetics
807
808
809 void addptr(Address dst, int32_t src) { addq(dst, src); }
810 void addptr(Address dst, Register src);
811
812 void addptr(Register dst, Address src) { addq(dst, src); }
813 void addptr(Register dst, int32_t src);
814 void addptr(Register dst, Register src);
815 void addptr(Register dst, RegisterOrConstant src) {
816 if (src.is_constant()) addptr(dst, checked_cast<int>(src.as_constant()));
817 else addptr(dst, src.as_register());
818 }
819
820 void andptr(Register dst, int32_t src);
821 void andptr(Register src1, Register src2) { andq(src1, src2); }
822 void andptr(Register dst, Address src) { andq(dst, src); }
823
824 using Assembler::andq;
825 void andq(Register dst, AddressLiteral src, Register rscratch = noreg);
826
827 void cmp8(AddressLiteral src1, int imm, Register rscratch = noreg);
828
829 // renamed to drag out the casting of address to int32_t/intptr_t
830 void cmp32(Register src1, int32_t imm);
831
832 void cmp32(AddressLiteral src1, int32_t imm, Register rscratch = noreg);
833 // compare reg - mem, or reg - &mem
834 void cmp32(Register src1, AddressLiteral src2, Register rscratch = noreg);
835
836 void cmp32(Register src1, Address src2);
837
838 void cmpoop(Register src1, Register src2);
839 void cmpoop(Register src1, Address src2);
840 void cmpoop(Register dst, jobject obj, Register rscratch);
841
842 // NOTE src2 must be the lval. This is NOT an mem-mem compare
1961 void movdl(XMMRegister dst, AddressLiteral src, Register rscratch = noreg);
1962
1963 using Assembler::movq;
1964 void movq(XMMRegister dst, AddressLiteral src, Register rscratch = noreg);
1965
1966 // Can push value or effective address
1967 void pushptr(AddressLiteral src, Register rscratch);
1968
1969 void pushptr(Address src) { pushq(src); }
1970 void popptr(Address src) { popq(src); }
1971
1972 void pushoop(jobject obj, Register rscratch);
1973 void pushklass(Metadata* obj, Register rscratch);
1974
1975 // sign extend as need a l to ptr sized element
1976 void movl2ptr(Register dst, Address src) { movslq(dst, src); }
1977 void movl2ptr(Register dst, Register src) { movslq(dst, src); }
1978
1979
1980 public:
1981 // Inline type specific methods
1982 #include "asm/macroAssembler_common.hpp"
1983
1984 int store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter = true);
1985 bool move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]);
1986 bool unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
1987 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
1988 RegState reg_state[]);
1989 bool pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
1990 VMRegPair* from, int from_count, int& from_index, VMReg to,
1991 RegState reg_state[], Register val_array);
1992 int extend_stack_for_inline_args(int args_on_stack);
1993 void remove_frame(int initial_framesize, bool needs_stack_repair);
1994 VMReg spill_reg_for(VMReg reg);
1995
1996 // clear memory of size 'cnt' qwords, starting at 'base';
1997 // if 'is_large' is set, do not try to produce short loop
1998 void clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp, bool is_large, bool word_copy_only, KRegister mask=knoreg);
1999
2000 // clear memory initialization sequence for constant size;
2001 void clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
2002
2003 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM registers
2004 void xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
2005
2006 // Fill primitive arrays
2007 void generate_fill(BasicType t, bool aligned,
2008 Register to, Register value, Register count,
2009 Register rtmp, XMMRegister xtmp);
2010
2011 void encode_iso_array(Register src, Register dst, Register len,
2012 XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3,
2013 XMMRegister tmp4, Register tmp5, Register result, bool ascii);
2014
2015 void add2_with_carry(Register dest_hi, Register dest_lo, Register src1, Register src2);
2016 void multiply_64_x_64_loop(Register x, Register xstart, Register x_xstart,
2017 Register y, Register y_idx, Register z,
2018 Register carry, Register product,
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