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src/hotspot/cpu/x86/macroAssembler_x86.hpp

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  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef CPU_X86_MACROASSEMBLER_X86_HPP
  26 #define CPU_X86_MACROASSEMBLER_X86_HPP
  27 
  28 #include "asm/assembler.hpp"
  29 #include "asm/register.hpp"
  30 #include "code/vmreg.inline.hpp"
  31 #include "compiler/oopMap.hpp"
  32 #include "utilities/macros.hpp"

  33 #include "runtime/vm_version.hpp"
  34 #include "utilities/checkedCast.hpp"
  35 


  36 // MacroAssembler extends Assembler by frequently used macros.
  37 //
  38 // Instructions for which a 'better' code sequence exists depending
  39 // on arguments should also go in here.
  40 
  41 class MacroAssembler: public Assembler {
  42   friend class LIR_Assembler;
  43   friend class Runtime1;      // as_Address()
  44 
  45  public:
  46   // Support for VM calls
  47   //
  48   // This is the base routine called by the different versions of call_VM_leaf. The interpreter
  49   // may customize this version by overriding it for its purposes (e.g., to save/restore
  50   // additional registers when doing a VM call).
  51 
  52   virtual void call_VM_leaf_base(
  53     address entry_point,               // the entry point
  54     int     number_of_arguments        // the number of arguments to pop after the call
  55   );

  77  // These routines should emit JVMTI PopFrame and ForceEarlyReturn handling code.
  78  // The implementation is only non-empty for the InterpreterMacroAssembler,
  79  // as only the interpreter handles PopFrame and ForceEarlyReturn requests.
  80  virtual void check_and_handle_popframe();
  81  virtual void check_and_handle_earlyret();
  82 
  83   Address as_Address(AddressLiteral adr);
  84   Address as_Address(ArrayAddress adr, Register rscratch);
  85 
  86   // Support for null-checks
  87   //
  88   // Generates code that causes a null OS exception if the content of reg is null.
  89   // If the accessed location is M[reg + offset] and the offset is known, provide the
  90   // offset. No explicit code generation is needed if the offset is within a certain
  91   // range (0 <= offset <= page_size).
  92 
  93   void null_check(Register reg, int offset = -1);
  94   static bool needs_explicit_null_check(intptr_t offset);
  95   static bool uses_implicit_null_check(void* address);
  96 




















  97   // Required platform-specific helpers for Label::patch_instructions.
  98   // They _shadow_ the declarations in AbstractAssembler, which are undefined.
  99   void pd_patch_instruction(address branch, address target, const char* file, int line) {
 100     unsigned char op = branch[0];
 101     assert(op == 0xE8 /* call */ ||
 102         op == 0xE9 /* jmp */ ||
 103         op == 0xEB /* short jmp */ ||
 104         (op & 0xF0) == 0x70 /* short jcc */ ||
 105         (op == 0x0F && (branch[1] & 0xF0) == 0x80) /* jcc */ ||
 106         (op == 0xC7 && branch[1] == 0xF8) /* xbegin */ ||
 107         (op == 0x8D) /* lea */,
 108         "Invalid opcode at patch point");
 109 
 110     if (op == 0xEB || (op & 0xF0) == 0x70) {
 111       // short offset operators (jmp and jcc)
 112       char* disp = (char*) &branch[1];
 113       int imm8 = checked_cast<int>(target - (address) &disp[1]);
 114       guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset at %s:%d",
 115                 file == nullptr ? "<null>" : file, line);
 116       *disp = (char)imm8;

 332   void resolve_global_jobject(Register value, Register tmp);
 333 
 334   // C 'boolean' to Java boolean: x == 0 ? 0 : 1
 335   void c2bool(Register x);
 336 
 337   // C++ bool manipulation
 338 
 339   void movbool(Register dst, Address src);
 340   void movbool(Address dst, bool boolconst);
 341   void movbool(Address dst, Register src);
 342   void testbool(Register dst);
 343 
 344   void resolve_oop_handle(Register result, Register tmp);
 345   void resolve_weak_handle(Register result, Register tmp);
 346   void load_mirror(Register mirror, Register method, Register tmp);
 347   void load_method_holder_cld(Register rresult, Register rmethod);
 348 
 349   void load_method_holder(Register holder, Register method);
 350 
 351   // oop manipulations



 352   void load_narrow_klass_compact(Register dst, Register src);
 353   void load_narrow_klass(Register dst, Register src);
 354   void load_klass(Register dst, Register src, Register tmp);
 355   void store_klass(Register dst, Register src, Register tmp);
 356 
 357   // Compares the narrow Klass pointer of an object to a given narrow Klass.
 358   void cmp_klass(Register klass, Register obj, Register tmp);
 359 
 360   // Compares the Klass pointer of two objects obj1 and obj2. Result is in the condition flags.
 361   // Uses tmp1 and tmp2 as temporary registers.
 362   void cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2);
 363 
 364   void access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
 365                       Register tmp1);
 366   void access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
 367                        Register tmp1, Register tmp2, Register tmp3);
 368 






 369   void load_heap_oop(Register dst, Address src, Register tmp1 = noreg, DecoratorSet decorators = 0);
 370   void load_heap_oop_not_null(Register dst, Address src, Register tmp1 = noreg, DecoratorSet decorators = 0);
 371   void store_heap_oop(Address dst, Register val, Register tmp1 = noreg,
 372                       Register tmp2 = noreg, Register tmp3 = noreg, DecoratorSet decorators = 0);
 373 
 374   // Used for storing null. All other oop constants should be
 375   // stored using routines that take a jobject.
 376   void store_heap_oop_null(Address dst);
 377 


 378   void store_klass_gap(Register dst, Register src);
 379 
 380   // This dummy is to prevent a call to store_heap_oop from
 381   // converting a zero (like null) into a Register by giving
 382   // the compiler two choices it can't resolve
 383 
 384   void store_heap_oop(Address dst, void* dummy);
 385 
 386   void encode_heap_oop(Register r);
 387   void decode_heap_oop(Register r);
 388   void encode_heap_oop_not_null(Register r);
 389   void decode_heap_oop_not_null(Register r);
 390   void encode_heap_oop_not_null(Register dst, Register src);
 391   void decode_heap_oop_not_null(Register dst, Register src);
 392 
 393   void set_narrow_oop(Register dst, jobject obj);
 394   void set_narrow_oop(Address dst, jobject obj);
 395   void cmp_narrow_oop(Register dst, jobject obj);
 396   void cmp_narrow_oop(Address dst, jobject obj);
 397 

 505   void pop_call_clobbered_registers_except(RegSet exclude, bool restore_fpu = true);
 506 
 507   void push_call_clobbered_registers(bool save_fpu = true) {
 508     push_call_clobbered_registers_except(RegSet(), save_fpu);
 509   }
 510   void pop_call_clobbered_registers(bool restore_fpu = true) {
 511     pop_call_clobbered_registers_except(RegSet(), restore_fpu);
 512   }
 513 
 514   // allocation
 515   void tlab_allocate(
 516     Register obj,                      // result: pointer to object after successful allocation
 517     Register var_size_in_bytes,        // object size in bytes if unknown at compile time; invalid otherwise
 518     int      con_size_in_bytes,        // object size in bytes if   known at compile time
 519     Register t1,                       // temp register
 520     Register t2,                       // temp register
 521     Label&   slow_case                 // continuation point if fast allocation fails
 522   );
 523   void zero_memory(Register address, Register length_in_bytes, int offset_in_bytes, Register temp);
 524 


 525   void population_count(Register dst, Register src, Register scratch1, Register scratch2);
 526 
 527   // interface method calling
 528   void lookup_interface_method(Register recv_klass,
 529                                Register intf_klass,
 530                                RegisterOrConstant itable_index,
 531                                Register method_result,
 532                                Register scan_temp,
 533                                Label& no_such_interface,
 534                                bool return_method = true);
 535 
 536   void lookup_interface_method_stub(Register recv_klass,
 537                                     Register holder_klass,
 538                                     Register resolved_klass,
 539                                     Register method_result,
 540                                     Register scan_temp,
 541                                     Register temp_reg2,
 542                                     Register receiver,
 543                                     int itable_index,
 544                                     Label& L_no_such_interface);

 753   // operands. In general the names are modified to avoid hiding the instruction in Assembler
 754   // so that we don't need to implement all the varieties in the Assembler with trivial wrappers
 755   // here in MacroAssembler. The major exception to this rule is call
 756 
 757   // Arithmetics
 758 
 759 
 760   void addptr(Address dst, int32_t src) { addq(dst, src); }
 761   void addptr(Address dst, Register src);
 762 
 763   void addptr(Register dst, Address src) { addq(dst, src); }
 764   void addptr(Register dst, int32_t src);
 765   void addptr(Register dst, Register src);
 766   void addptr(Register dst, RegisterOrConstant src) {
 767     if (src.is_constant()) addptr(dst, checked_cast<int>(src.as_constant()));
 768     else                   addptr(dst, src.as_register());
 769   }
 770 
 771   void andptr(Register dst, int32_t src);
 772   void andptr(Register src1, Register src2) { andq(src1, src2); }

 773 
 774   using Assembler::andq;
 775   void andq(Register dst, AddressLiteral src, Register rscratch = noreg);
 776 
 777   void cmp8(AddressLiteral src1, int imm, Register rscratch = noreg);
 778 
 779   // renamed to drag out the casting of address to int32_t/intptr_t
 780   void cmp32(Register src1, int32_t imm);
 781 
 782   void cmp32(AddressLiteral src1, int32_t imm, Register rscratch = noreg);
 783   // compare reg - mem, or reg - &mem
 784   void cmp32(Register src1, AddressLiteral src2, Register rscratch = noreg);
 785 
 786   void cmp32(Register src1, Address src2);
 787 
 788   void cmpoop(Register src1, Register src2);
 789   void cmpoop(Register src1, Address src2);
 790   void cmpoop(Register dst, jobject obj, Register rscratch);
 791 
 792   // NOTE src2 must be the lval. This is NOT an mem-mem compare

1913   void movdl(XMMRegister dst, AddressLiteral src, Register rscratch = noreg);
1914 
1915   using Assembler::movq;
1916   void movq(XMMRegister dst, AddressLiteral src, Register rscratch = noreg);
1917 
1918   // Can push value or effective address
1919   void pushptr(AddressLiteral src, Register rscratch);
1920 
1921   void pushptr(Address src) { pushq(src); }
1922   void popptr(Address src) { popq(src); }
1923 
1924   void pushoop(jobject obj, Register rscratch);
1925   void pushklass(Metadata* obj, Register rscratch);
1926 
1927   // sign extend as need a l to ptr sized element
1928   void movl2ptr(Register dst, Address src) { movslq(dst, src); }
1929   void movl2ptr(Register dst, Register src) { movslq(dst, src); }
1930 
1931 
1932  public:



1933   // clear memory of size 'cnt' qwords, starting at 'base';
1934   // if 'is_large' is set, do not try to produce short loop
1935   void clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, bool is_large, KRegister mask=knoreg);
1936 
1937   // clear memory initialization sequence for constant size;
1938   void clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1939 
1940   // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM registers
1941   void xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1942 
1943   // Fill primitive arrays
1944   void generate_fill(BasicType t, bool aligned,
1945                      Register to, Register value, Register count,
1946                      Register rtmp, XMMRegister xtmp);
1947 
1948   void encode_iso_array(Register src, Register dst, Register len,
1949                         XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3,
1950                         XMMRegister tmp4, Register tmp5, Register result, bool ascii);
1951 
1952   void add2_with_carry(Register dest_hi, Register dest_lo, Register src1, Register src2);
1953   void multiply_64_x_64_loop(Register x, Register xstart, Register x_xstart,
1954                              Register y, Register y_idx, Register z,
1955                              Register carry, Register product,

  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef CPU_X86_MACROASSEMBLER_X86_HPP
  26 #define CPU_X86_MACROASSEMBLER_X86_HPP
  27 
  28 #include "asm/assembler.hpp"
  29 #include "asm/register.hpp"
  30 #include "code/vmreg.inline.hpp"
  31 #include "compiler/oopMap.hpp"
  32 #include "utilities/macros.hpp"
  33 #include "runtime/signature.hpp"
  34 #include "runtime/vm_version.hpp"
  35 #include "utilities/checkedCast.hpp"
  36 
  37 class ciInlineKlass;
  38 
  39 // MacroAssembler extends Assembler by frequently used macros.
  40 //
  41 // Instructions for which a 'better' code sequence exists depending
  42 // on arguments should also go in here.
  43 
  44 class MacroAssembler: public Assembler {
  45   friend class LIR_Assembler;
  46   friend class Runtime1;      // as_Address()
  47 
  48  public:
  49   // Support for VM calls
  50   //
  51   // This is the base routine called by the different versions of call_VM_leaf. The interpreter
  52   // may customize this version by overriding it for its purposes (e.g., to save/restore
  53   // additional registers when doing a VM call).
  54 
  55   virtual void call_VM_leaf_base(
  56     address entry_point,               // the entry point
  57     int     number_of_arguments        // the number of arguments to pop after the call
  58   );

  80  // These routines should emit JVMTI PopFrame and ForceEarlyReturn handling code.
  81  // The implementation is only non-empty for the InterpreterMacroAssembler,
  82  // as only the interpreter handles PopFrame and ForceEarlyReturn requests.
  83  virtual void check_and_handle_popframe();
  84  virtual void check_and_handle_earlyret();
  85 
  86   Address as_Address(AddressLiteral adr);
  87   Address as_Address(ArrayAddress adr, Register rscratch);
  88 
  89   // Support for null-checks
  90   //
  91   // Generates code that causes a null OS exception if the content of reg is null.
  92   // If the accessed location is M[reg + offset] and the offset is known, provide the
  93   // offset. No explicit code generation is needed if the offset is within a certain
  94   // range (0 <= offset <= page_size).
  95 
  96   void null_check(Register reg, int offset = -1);
  97   static bool needs_explicit_null_check(intptr_t offset);
  98   static bool uses_implicit_null_check(void* address);
  99 
 100   // markWord tests, kills markWord reg
 101   void test_markword_is_inline_type(Register markword, Label& is_inline_type);
 102 
 103   // inlineKlass queries, kills temp_reg
 104   void test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type, bool can_be_null = true);
 105 
 106   void test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free);
 107   void test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free);
 108   void test_field_is_flat(Register flags, Register temp_reg, Label& is_flat);
 109 
 110   // Check oops for special arrays, i.e. flat arrays and/or null-free arrays
 111   void test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label);
 112   void test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array);
 113   void test_non_flat_array_oop(Register oop, Register temp_reg, Label& is_non_flat_array);
 114   void test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array);
 115   void test_non_null_free_array_oop(Register oop, Register temp_reg, Label& is_non_null_free_array);
 116 
 117   // Check array klass layout helper for flat or null-free arrays...
 118   void test_flat_array_layout(Register lh, Label& is_flat_array);
 119 
 120   // Required platform-specific helpers for Label::patch_instructions.
 121   // They _shadow_ the declarations in AbstractAssembler, which are undefined.
 122   void pd_patch_instruction(address branch, address target, const char* file, int line) {
 123     unsigned char op = branch[0];
 124     assert(op == 0xE8 /* call */ ||
 125         op == 0xE9 /* jmp */ ||
 126         op == 0xEB /* short jmp */ ||
 127         (op & 0xF0) == 0x70 /* short jcc */ ||
 128         (op == 0x0F && (branch[1] & 0xF0) == 0x80) /* jcc */ ||
 129         (op == 0xC7 && branch[1] == 0xF8) /* xbegin */ ||
 130         (op == 0x8D) /* lea */,
 131         "Invalid opcode at patch point");
 132 
 133     if (op == 0xEB || (op & 0xF0) == 0x70) {
 134       // short offset operators (jmp and jcc)
 135       char* disp = (char*) &branch[1];
 136       int imm8 = checked_cast<int>(target - (address) &disp[1]);
 137       guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset at %s:%d",
 138                 file == nullptr ? "<null>" : file, line);
 139       *disp = (char)imm8;

 355   void resolve_global_jobject(Register value, Register tmp);
 356 
 357   // C 'boolean' to Java boolean: x == 0 ? 0 : 1
 358   void c2bool(Register x);
 359 
 360   // C++ bool manipulation
 361 
 362   void movbool(Register dst, Address src);
 363   void movbool(Address dst, bool boolconst);
 364   void movbool(Address dst, Register src);
 365   void testbool(Register dst);
 366 
 367   void resolve_oop_handle(Register result, Register tmp);
 368   void resolve_weak_handle(Register result, Register tmp);
 369   void load_mirror(Register mirror, Register method, Register tmp);
 370   void load_method_holder_cld(Register rresult, Register rmethod);
 371 
 372   void load_method_holder(Register holder, Register method);
 373 
 374   // oop manipulations
 375 
 376   // Load oopDesc._metadata without decode (useful for direct Klass* compare from oops)
 377   void load_metadata(Register dst, Register src);
 378   void load_narrow_klass_compact(Register dst, Register src);
 379   void load_narrow_klass(Register dst, Register src);
 380   void load_klass(Register dst, Register src, Register tmp);
 381   void store_klass(Register dst, Register src, Register tmp);
 382 
 383   // Compares the narrow Klass pointer of an object to a given narrow Klass.
 384   void cmp_klass(Register klass, Register obj, Register tmp);
 385 
 386   // Compares the Klass pointer of two objects obj1 and obj2. Result is in the condition flags.
 387   // Uses tmp1 and tmp2 as temporary registers.
 388   void cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2);
 389 
 390   void access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
 391                       Register tmp1);
 392   void access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
 393                        Register tmp1, Register tmp2, Register tmp3);
 394 
 395   void flat_field_copy(DecoratorSet decorators, Register src, Register dst, Register inline_layout_info);
 396 
 397   // inline type data payload offsets...
 398   void payload_offset(Register inline_klass, Register offset);
 399   void payload_addr(Register oop, Register data, Register inline_klass);
 400 
 401   void load_heap_oop(Register dst, Address src, Register tmp1 = noreg, DecoratorSet decorators = 0);
 402   void load_heap_oop_not_null(Register dst, Address src, Register tmp1 = noreg, DecoratorSet decorators = 0);
 403   void store_heap_oop(Address dst, Register val, Register tmp1 = noreg,
 404                       Register tmp2 = noreg, Register tmp3 = noreg, DecoratorSet decorators = 0);
 405 
 406   // Used for storing null. All other oop constants should be
 407   // stored using routines that take a jobject.
 408   void store_heap_oop_null(Address dst);
 409 
 410   void load_prototype_header(Register dst, Register src, Register tmp);
 411 
 412   void store_klass_gap(Register dst, Register src);
 413 
 414   // This dummy is to prevent a call to store_heap_oop from
 415   // converting a zero (like null) into a Register by giving
 416   // the compiler two choices it can't resolve
 417 
 418   void store_heap_oop(Address dst, void* dummy);
 419 
 420   void encode_heap_oop(Register r);
 421   void decode_heap_oop(Register r);
 422   void encode_heap_oop_not_null(Register r);
 423   void decode_heap_oop_not_null(Register r);
 424   void encode_heap_oop_not_null(Register dst, Register src);
 425   void decode_heap_oop_not_null(Register dst, Register src);
 426 
 427   void set_narrow_oop(Register dst, jobject obj);
 428   void set_narrow_oop(Address dst, jobject obj);
 429   void cmp_narrow_oop(Register dst, jobject obj);
 430   void cmp_narrow_oop(Address dst, jobject obj);
 431 

 539   void pop_call_clobbered_registers_except(RegSet exclude, bool restore_fpu = true);
 540 
 541   void push_call_clobbered_registers(bool save_fpu = true) {
 542     push_call_clobbered_registers_except(RegSet(), save_fpu);
 543   }
 544   void pop_call_clobbered_registers(bool restore_fpu = true) {
 545     pop_call_clobbered_registers_except(RegSet(), restore_fpu);
 546   }
 547 
 548   // allocation
 549   void tlab_allocate(
 550     Register obj,                      // result: pointer to object after successful allocation
 551     Register var_size_in_bytes,        // object size in bytes if unknown at compile time; invalid otherwise
 552     int      con_size_in_bytes,        // object size in bytes if   known at compile time
 553     Register t1,                       // temp register
 554     Register t2,                       // temp register
 555     Label&   slow_case                 // continuation point if fast allocation fails
 556   );
 557   void zero_memory(Register address, Register length_in_bytes, int offset_in_bytes, Register temp);
 558 
 559   void inline_layout_info(Register klass, Register index, Register layout_info);
 560 
 561   void population_count(Register dst, Register src, Register scratch1, Register scratch2);
 562 
 563   // interface method calling
 564   void lookup_interface_method(Register recv_klass,
 565                                Register intf_klass,
 566                                RegisterOrConstant itable_index,
 567                                Register method_result,
 568                                Register scan_temp,
 569                                Label& no_such_interface,
 570                                bool return_method = true);
 571 
 572   void lookup_interface_method_stub(Register recv_klass,
 573                                     Register holder_klass,
 574                                     Register resolved_klass,
 575                                     Register method_result,
 576                                     Register scan_temp,
 577                                     Register temp_reg2,
 578                                     Register receiver,
 579                                     int itable_index,
 580                                     Label& L_no_such_interface);

 789   // operands. In general the names are modified to avoid hiding the instruction in Assembler
 790   // so that we don't need to implement all the varieties in the Assembler with trivial wrappers
 791   // here in MacroAssembler. The major exception to this rule is call
 792 
 793   // Arithmetics
 794 
 795 
 796   void addptr(Address dst, int32_t src) { addq(dst, src); }
 797   void addptr(Address dst, Register src);
 798 
 799   void addptr(Register dst, Address src) { addq(dst, src); }
 800   void addptr(Register dst, int32_t src);
 801   void addptr(Register dst, Register src);
 802   void addptr(Register dst, RegisterOrConstant src) {
 803     if (src.is_constant()) addptr(dst, checked_cast<int>(src.as_constant()));
 804     else                   addptr(dst, src.as_register());
 805   }
 806 
 807   void andptr(Register dst, int32_t src);
 808   void andptr(Register src1, Register src2) { andq(src1, src2); }
 809   void andptr(Register dst, Address src) { andq(dst, src); }
 810 
 811   using Assembler::andq;
 812   void andq(Register dst, AddressLiteral src, Register rscratch = noreg);
 813 
 814   void cmp8(AddressLiteral src1, int imm, Register rscratch = noreg);
 815 
 816   // renamed to drag out the casting of address to int32_t/intptr_t
 817   void cmp32(Register src1, int32_t imm);
 818 
 819   void cmp32(AddressLiteral src1, int32_t imm, Register rscratch = noreg);
 820   // compare reg - mem, or reg - &mem
 821   void cmp32(Register src1, AddressLiteral src2, Register rscratch = noreg);
 822 
 823   void cmp32(Register src1, Address src2);
 824 
 825   void cmpoop(Register src1, Register src2);
 826   void cmpoop(Register src1, Address src2);
 827   void cmpoop(Register dst, jobject obj, Register rscratch);
 828 
 829   // NOTE src2 must be the lval. This is NOT an mem-mem compare

1950   void movdl(XMMRegister dst, AddressLiteral src, Register rscratch = noreg);
1951 
1952   using Assembler::movq;
1953   void movq(XMMRegister dst, AddressLiteral src, Register rscratch = noreg);
1954 
1955   // Can push value or effective address
1956   void pushptr(AddressLiteral src, Register rscratch);
1957 
1958   void pushptr(Address src) { pushq(src); }
1959   void popptr(Address src) { popq(src); }
1960 
1961   void pushoop(jobject obj, Register rscratch);
1962   void pushklass(Metadata* obj, Register rscratch);
1963 
1964   // sign extend as need a l to ptr sized element
1965   void movl2ptr(Register dst, Address src) { movslq(dst, src); }
1966   void movl2ptr(Register dst, Register src) { movslq(dst, src); }
1967 
1968 
1969  public:
1970   // Inline type specific methods
1971   #include "asm/macroAssembler_common.hpp"
1972 
1973   // clear memory of size 'cnt' qwords, starting at 'base';
1974   // if 'is_large' is set, do not try to produce short loop
1975   void clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp, bool is_large, bool word_copy_only, KRegister mask=knoreg);
1976 
1977   // clear memory initialization sequence for constant size;
1978   void clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1979 
1980   // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM registers
1981   void xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1982 
1983   // Fill primitive arrays
1984   void generate_fill(BasicType t, bool aligned,
1985                      Register to, Register value, Register count,
1986                      Register rtmp, XMMRegister xtmp);
1987 
1988   void encode_iso_array(Register src, Register dst, Register len,
1989                         XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3,
1990                         XMMRegister tmp4, Register tmp5, Register result, bool ascii);
1991 
1992   void add2_with_carry(Register dest_hi, Register dest_lo, Register src1, Register src2);
1993   void multiply_64_x_64_loop(Register x, Register xstart, Register x_xstart,
1994                              Register y, Register y_idx, Register z,
1995                              Register carry, Register product,
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