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src/hotspot/cpu/x86/macroAssembler_x86.hpp

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  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef CPU_X86_MACROASSEMBLER_X86_HPP
  26 #define CPU_X86_MACROASSEMBLER_X86_HPP
  27 
  28 #include "asm/assembler.hpp"
  29 #include "code/vmreg.inline.hpp"
  30 #include "compiler/oopMap.hpp"
  31 #include "utilities/macros.hpp"
  32 #include "runtime/rtmLocking.hpp"

  33 #include "runtime/vm_version.hpp"
  34 


  35 // MacroAssembler extends Assembler by frequently used macros.
  36 //
  37 // Instructions for which a 'better' code sequence exists depending
  38 // on arguments should also go in here.
  39 
  40 class MacroAssembler: public Assembler {
  41   friend class LIR_Assembler;
  42   friend class Runtime1;      // as_Address()
  43 
  44  public:
  45   // Support for VM calls
  46   //
  47   // This is the base routine called by the different versions of call_VM_leaf. The interpreter
  48   // may customize this version by overriding it for its purposes (e.g., to save/restore
  49   // additional registers when doing a VM call).
  50 
  51   virtual void call_VM_leaf_base(
  52     address entry_point,               // the entry point
  53     int     number_of_arguments        // the number of arguments to pop after the call
  54   );

  84  // These routines should emit JVMTI PopFrame and ForceEarlyReturn handling code.
  85  // The implementation is only non-empty for the InterpreterMacroAssembler,
  86  // as only the interpreter handles PopFrame and ForceEarlyReturn requests.
  87  virtual void check_and_handle_popframe(Register java_thread);
  88  virtual void check_and_handle_earlyret(Register java_thread);
  89 
  90   Address as_Address(AddressLiteral adr);
  91   Address as_Address(ArrayAddress adr);
  92 
  93   // Support for NULL-checks
  94   //
  95   // Generates code that causes a NULL OS exception if the content of reg is NULL.
  96   // If the accessed location is M[reg + offset] and the offset is known, provide the
  97   // offset. No explicit code generation is needed if the offset is within a certain
  98   // range (0 <= offset <= page_size).
  99 
 100   void null_check(Register reg, int offset = -1);
 101   static bool needs_explicit_null_check(intptr_t offset);
 102   static bool uses_implicit_null_check(void* address);
 103 































 104   // Required platform-specific helpers for Label::patch_instructions.
 105   // They _shadow_ the declarations in AbstractAssembler, which are undefined.
 106   void pd_patch_instruction(address branch, address target, const char* file, int line) {
 107     unsigned char op = branch[0];
 108     assert(op == 0xE8 /* call */ ||
 109         op == 0xE9 /* jmp */ ||
 110         op == 0xEB /* short jmp */ ||
 111         (op & 0xF0) == 0x70 /* short jcc */ ||
 112         op == 0x0F && (branch[1] & 0xF0) == 0x80 /* jcc */ ||
 113         op == 0xC7 && branch[1] == 0xF8 /* xbegin */,
 114         "Invalid opcode at patch point");
 115 
 116     if (op == 0xEB || (op & 0xF0) == 0x70) {
 117       // short offset operators (jmp and jcc)
 118       char* disp = (char*) &branch[1];
 119       int imm8 = target - (address) &disp[1];
 120       guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset at %s:%d",
 121                 file == NULL ? "<NULL>" : file, line);
 122       *disp = imm8;
 123     } else {

 322   void resolve_jobject(Register value, Register thread, Register tmp);
 323 
 324   // C 'boolean' to Java boolean: x == 0 ? 0 : 1
 325   void c2bool(Register x);
 326 
 327   // C++ bool manipulation
 328 
 329   void movbool(Register dst, Address src);
 330   void movbool(Address dst, bool boolconst);
 331   void movbool(Address dst, Register src);
 332   void testbool(Register dst);
 333 
 334   void resolve_oop_handle(Register result, Register tmp = rscratch2);
 335   void resolve_weak_handle(Register result, Register tmp);
 336   void load_mirror(Register mirror, Register method, Register tmp = rscratch2);
 337   void load_method_holder_cld(Register rresult, Register rmethod);
 338 
 339   void load_method_holder(Register holder, Register method);
 340 
 341   // oop manipulations

 342   void load_klass(Register dst, Register src, Register tmp);
 343   void store_klass(Register dst, Register src, Register tmp);
 344 
 345   void access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
 346                       Register tmp1, Register thread_tmp);
 347   void access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register src,
 348                        Register tmp1, Register tmp2);










 349 
 350   void load_heap_oop(Register dst, Address src, Register tmp1 = noreg,
 351                      Register thread_tmp = noreg, DecoratorSet decorators = 0);
 352   void load_heap_oop_not_null(Register dst, Address src, Register tmp1 = noreg,
 353                               Register thread_tmp = noreg, DecoratorSet decorators = 0);
 354   void store_heap_oop(Address dst, Register src, Register tmp1 = noreg,
 355                       Register tmp2 = noreg, DecoratorSet decorators = 0);
 356 
 357   // Used for storing NULL. All other oop constants should be
 358   // stored using routines that take a jobject.
 359   void store_heap_oop_null(Address dst);
 360 


 361 #ifdef _LP64
 362   void store_klass_gap(Register dst, Register src);
 363 
 364   // This dummy is to prevent a call to store_heap_oop from
 365   // converting a zero (like NULL) into a Register by giving
 366   // the compiler two choices it can't resolve
 367 
 368   void store_heap_oop(Address dst, void* dummy);
 369 
 370   void encode_heap_oop(Register r);
 371   void decode_heap_oop(Register r);
 372   void encode_heap_oop_not_null(Register r);
 373   void decode_heap_oop_not_null(Register r);
 374   void encode_heap_oop_not_null(Register dst, Register src);
 375   void decode_heap_oop_not_null(Register dst, Register src);
 376 
 377   void set_narrow_oop(Register dst, jobject obj);
 378   void set_narrow_oop(Address dst, jobject obj);
 379   void cmp_narrow_oop(Register dst, jobject obj);
 380   void cmp_narrow_oop(Address dst, jobject obj);

 509   void empty_FPU_stack();
 510 #endif // !_LP64
 511 
 512   void push_IU_state();
 513   void pop_IU_state();
 514 
 515   void push_FPU_state();
 516   void pop_FPU_state();
 517 
 518   void push_CPU_state();
 519   void pop_CPU_state();
 520 
 521   // Round up to a power of two
 522   void round_to(Register reg, int modulus);
 523 
 524   // Callee saved registers handling
 525   void push_callee_saved_registers();
 526   void pop_callee_saved_registers();
 527 
 528   // allocation









 529   void eden_allocate(
 530     Register thread,                   // Current thread
 531     Register obj,                      // result: pointer to object after successful allocation
 532     Register var_size_in_bytes,        // object size in bytes if unknown at compile time; invalid otherwise
 533     int      con_size_in_bytes,        // object size in bytes if   known at compile time
 534     Register t1,                       // temp register
 535     Label&   slow_case                 // continuation point if fast allocation fails
 536   );
 537   void tlab_allocate(
 538     Register thread,                   // Current thread
 539     Register obj,                      // result: pointer to object after successful allocation
 540     Register var_size_in_bytes,        // object size in bytes if unknown at compile time; invalid otherwise
 541     int      con_size_in_bytes,        // object size in bytes if   known at compile time
 542     Register t1,                       // temp register
 543     Register t2,                       // temp register
 544     Label&   slow_case                 // continuation point if fast allocation fails
 545   );
 546   void zero_memory(Register address, Register length_in_bytes, int offset_in_bytes, Register temp);
 547 



 548   // interface method calling
 549   void lookup_interface_method(Register recv_klass,
 550                                Register intf_klass,
 551                                RegisterOrConstant itable_index,
 552                                Register method_result,
 553                                Register scan_temp,
 554                                Label& no_such_interface,
 555                                bool return_method = true);
 556 
 557   // virtual method calling
 558   void lookup_virtual_method(Register recv_klass,
 559                              RegisterOrConstant vtable_index,
 560                              Register method_result);
 561 
 562   // Test sub_klass against super_klass, with fast and slow paths.
 563 
 564   // The fast path produces a tri-state answer: yes / no / maybe-slow.
 565   // One of the three labels can be NULL, meaning take the fall-through.
 566   // If super_check_offset is -1, the value is loaded up from super_klass.
 567   // No registers are killed, except temp_reg.

 678   // Instructions that use AddressLiteral operands. These instruction can handle 32bit/64bit
 679   // operands. In general the names are modified to avoid hiding the instruction in Assembler
 680   // so that we don't need to implement all the varieties in the Assembler with trivial wrappers
 681   // here in MacroAssembler. The major exception to this rule is call
 682 
 683   // Arithmetics
 684 
 685 
 686   void addptr(Address dst, int32_t src) { LP64_ONLY(addq(dst, src)) NOT_LP64(addl(dst, src)) ; }
 687   void addptr(Address dst, Register src);
 688 
 689   void addptr(Register dst, Address src) { LP64_ONLY(addq(dst, src)) NOT_LP64(addl(dst, src)); }
 690   void addptr(Register dst, int32_t src);
 691   void addptr(Register dst, Register src);
 692   void addptr(Register dst, RegisterOrConstant src) {
 693     if (src.is_constant()) addptr(dst, (int) src.as_constant());
 694     else                   addptr(dst,       src.as_register());
 695   }
 696 
 697   void andptr(Register dst, int32_t src);
 698   void andptr(Register src1, Register src2) { LP64_ONLY(andq(src1, src2)) NOT_LP64(andl(src1, src2)) ; }

 699 
 700   void cmp8(AddressLiteral src1, int imm);
 701 
 702   // renamed to drag out the casting of address to int32_t/intptr_t
 703   void cmp32(Register src1, int32_t imm);
 704 
 705   void cmp32(AddressLiteral src1, int32_t imm);
 706   // compare reg - mem, or reg - &mem
 707   void cmp32(Register src1, AddressLiteral src2);
 708 
 709   void cmp32(Register src1, Address src2);
 710 
 711 #ifndef _LP64
 712   void cmpklass(Address dst, Metadata* obj);
 713   void cmpklass(Register dst, Metadata* obj);
 714   void cmpoop(Address dst, jobject obj);
 715 #endif // _LP64
 716 
 717   void cmpoop(Register src1, Register src2);
 718   void cmpoop(Register src1, Address src2);

1690   using Assembler::movq;
1691   void movdl(XMMRegister dst, AddressLiteral src);
1692   void movq(XMMRegister dst, AddressLiteral src);
1693 
1694   // Can push value or effective address
1695   void pushptr(AddressLiteral src);
1696 
1697   void pushptr(Address src) { LP64_ONLY(pushq(src)) NOT_LP64(pushl(src)); }
1698   void popptr(Address src) { LP64_ONLY(popq(src)) NOT_LP64(popl(src)); }
1699 
1700   void pushoop(jobject obj);
1701   void pushklass(Metadata* obj);
1702 
1703   // sign extend as need a l to ptr sized element
1704   void movl2ptr(Register dst, Address src) { LP64_ONLY(movslq(dst, src)) NOT_LP64(movl(dst, src)); }
1705   void movl2ptr(Register dst, Register src) { LP64_ONLY(movslq(dst, src)) NOT_LP64(if (dst != src) movl(dst, src)); }
1706 
1707 
1708  public:
1709   // C2 compiled method's prolog code.
1710   void verified_entry(int framesize, int stack_bang_size, bool fp_mode_24b, bool is_stub);















1711 
1712   // clear memory of size 'cnt' qwords, starting at 'base';
1713   // if 'is_large' is set, do not try to produce short loop
1714   void clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, bool is_large, KRegister mask=knoreg);
1715 
1716   // clear memory initialization sequence for constant size;
1717   void clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1718 
1719   // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM registers
1720   void xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1721 
1722   // Fill primitive arrays
1723   void generate_fill(BasicType t, bool aligned,
1724                      Register to, Register value, Register count,
1725                      Register rtmp, XMMRegister xtmp);
1726 
1727   void encode_iso_array(Register src, Register dst, Register len,
1728                         XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3,
1729                         XMMRegister tmp4, Register tmp5, Register result, bool ascii);
1730 
1731 #ifdef _LP64
1732   void add2_with_carry(Register dest_hi, Register dest_lo, Register src1, Register src2);
1733   void multiply_64_x_64_loop(Register x, Register xstart, Register x_xstart,
1734                              Register y, Register y_idx, Register z,

  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef CPU_X86_MACROASSEMBLER_X86_HPP
  26 #define CPU_X86_MACROASSEMBLER_X86_HPP
  27 
  28 #include "asm/assembler.hpp"
  29 #include "code/vmreg.inline.hpp"
  30 #include "compiler/oopMap.hpp"
  31 #include "utilities/macros.hpp"
  32 #include "runtime/rtmLocking.hpp"
  33 #include "runtime/signature.hpp"
  34 #include "runtime/vm_version.hpp"
  35 
  36 class ciInlineKlass;
  37 
  38 // MacroAssembler extends Assembler by frequently used macros.
  39 //
  40 // Instructions for which a 'better' code sequence exists depending
  41 // on arguments should also go in here.
  42 
  43 class MacroAssembler: public Assembler {
  44   friend class LIR_Assembler;
  45   friend class Runtime1;      // as_Address()
  46 
  47  public:
  48   // Support for VM calls
  49   //
  50   // This is the base routine called by the different versions of call_VM_leaf. The interpreter
  51   // may customize this version by overriding it for its purposes (e.g., to save/restore
  52   // additional registers when doing a VM call).
  53 
  54   virtual void call_VM_leaf_base(
  55     address entry_point,               // the entry point
  56     int     number_of_arguments        // the number of arguments to pop after the call
  57   );

  87  // These routines should emit JVMTI PopFrame and ForceEarlyReturn handling code.
  88  // The implementation is only non-empty for the InterpreterMacroAssembler,
  89  // as only the interpreter handles PopFrame and ForceEarlyReturn requests.
  90  virtual void check_and_handle_popframe(Register java_thread);
  91  virtual void check_and_handle_earlyret(Register java_thread);
  92 
  93   Address as_Address(AddressLiteral adr);
  94   Address as_Address(ArrayAddress adr);
  95 
  96   // Support for NULL-checks
  97   //
  98   // Generates code that causes a NULL OS exception if the content of reg is NULL.
  99   // If the accessed location is M[reg + offset] and the offset is known, provide the
 100   // offset. No explicit code generation is needed if the offset is within a certain
 101   // range (0 <= offset <= page_size).
 102 
 103   void null_check(Register reg, int offset = -1);
 104   static bool needs_explicit_null_check(intptr_t offset);
 105   static bool uses_implicit_null_check(void* address);
 106 
 107   // markWord tests, kills markWord reg
 108   void test_markword_is_inline_type(Register markword, Label& is_inline_type);
 109 
 110   // inlineKlass queries, kills temp_reg
 111   void test_klass_is_inline_type(Register klass, Register temp_reg, Label& is_inline_type);
 112   void test_klass_is_empty_inline_type(Register klass, Register temp_reg, Label& is_empty_inline_type);
 113   void test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type);
 114 
 115   // Get the default value oop for the given InlineKlass
 116   void get_default_value_oop(Register inline_klass, Register temp_reg, Register obj);
 117   // The empty value oop, for the given InlineKlass ("empty" as in no instance fields)
 118   // get_default_value_oop with extra assertion for empty inline klass
 119   void get_empty_inline_type_oop(Register inline_klass, Register temp_reg, Register obj);
 120 
 121   void test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free);
 122   void test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free);
 123   void test_field_is_inlined(Register flags, Register temp_reg, Label& is_inlined);
 124 
 125   // Check oops for special arrays, i.e. flattened and/or null-free
 126   void test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label);
 127   void test_flattened_array_oop(Register oop, Register temp_reg, Label&is_flattened_array);
 128   void test_non_flattened_array_oop(Register oop, Register temp_reg, Label&is_non_flattened_array);
 129   void test_null_free_array_oop(Register oop, Register temp_reg, Label&is_null_free_array);
 130   void test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array);
 131 
 132   // Check array klass layout helper for flatten or null-free arrays...
 133   void test_flattened_array_layout(Register lh, Label& is_flattened_array);
 134   void test_non_flattened_array_layout(Register lh, Label& is_non_flattened_array);
 135   void test_null_free_array_layout(Register lh, Label& is_null_free_array);
 136   void test_non_null_free_array_layout(Register lh, Label& is_non_null_free_array);
 137 
 138   // Required platform-specific helpers for Label::patch_instructions.
 139   // They _shadow_ the declarations in AbstractAssembler, which are undefined.
 140   void pd_patch_instruction(address branch, address target, const char* file, int line) {
 141     unsigned char op = branch[0];
 142     assert(op == 0xE8 /* call */ ||
 143         op == 0xE9 /* jmp */ ||
 144         op == 0xEB /* short jmp */ ||
 145         (op & 0xF0) == 0x70 /* short jcc */ ||
 146         op == 0x0F && (branch[1] & 0xF0) == 0x80 /* jcc */ ||
 147         op == 0xC7 && branch[1] == 0xF8 /* xbegin */,
 148         "Invalid opcode at patch point");
 149 
 150     if (op == 0xEB || (op & 0xF0) == 0x70) {
 151       // short offset operators (jmp and jcc)
 152       char* disp = (char*) &branch[1];
 153       int imm8 = target - (address) &disp[1];
 154       guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset at %s:%d",
 155                 file == NULL ? "<NULL>" : file, line);
 156       *disp = imm8;
 157     } else {

 356   void resolve_jobject(Register value, Register thread, Register tmp);
 357 
 358   // C 'boolean' to Java boolean: x == 0 ? 0 : 1
 359   void c2bool(Register x);
 360 
 361   // C++ bool manipulation
 362 
 363   void movbool(Register dst, Address src);
 364   void movbool(Address dst, bool boolconst);
 365   void movbool(Address dst, Register src);
 366   void testbool(Register dst);
 367 
 368   void resolve_oop_handle(Register result, Register tmp = rscratch2);
 369   void resolve_weak_handle(Register result, Register tmp);
 370   void load_mirror(Register mirror, Register method, Register tmp = rscratch2);
 371   void load_method_holder_cld(Register rresult, Register rmethod);
 372 
 373   void load_method_holder(Register holder, Register method);
 374 
 375   // oop manipulations
 376   void load_metadata(Register dst, Register src);
 377   void load_klass(Register dst, Register src, Register tmp);
 378   void store_klass(Register dst, Register src, Register tmp);
 379 
 380   void access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
 381                       Register tmp1, Register thread_tmp);
 382   void access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register src,
 383                        Register tmp1, Register tmp2, Register tmp3 = noreg);
 384 
 385   void access_value_copy(DecoratorSet decorators, Register src, Register dst, Register inline_klass);
 386 
 387   // inline type data payload offsets...
 388   void first_field_offset(Register inline_klass, Register offset);
 389   void data_for_oop(Register oop, Register data, Register inline_klass);
 390   // get data payload ptr a flat value array at index, kills rcx and index
 391   void data_for_value_array_index(Register array, Register array_klass,
 392                                   Register index, Register data);
 393 
 394 
 395   void load_heap_oop(Register dst, Address src, Register tmp1 = noreg,
 396                      Register thread_tmp = noreg, DecoratorSet decorators = 0);
 397   void load_heap_oop_not_null(Register dst, Address src, Register tmp1 = noreg,
 398                               Register thread_tmp = noreg, DecoratorSet decorators = 0);
 399   void store_heap_oop(Address dst, Register src, Register tmp1 = noreg,
 400                       Register tmp2 = noreg, Register tmp3 = noreg, DecoratorSet decorators = 0);
 401 
 402   // Used for storing NULL. All other oop constants should be
 403   // stored using routines that take a jobject.
 404   void store_heap_oop_null(Address dst);
 405 
 406   void load_prototype_header(Register dst, Register src, Register tmp);
 407 
 408 #ifdef _LP64
 409   void store_klass_gap(Register dst, Register src);
 410 
 411   // This dummy is to prevent a call to store_heap_oop from
 412   // converting a zero (like NULL) into a Register by giving
 413   // the compiler two choices it can't resolve
 414 
 415   void store_heap_oop(Address dst, void* dummy);
 416 
 417   void encode_heap_oop(Register r);
 418   void decode_heap_oop(Register r);
 419   void encode_heap_oop_not_null(Register r);
 420   void decode_heap_oop_not_null(Register r);
 421   void encode_heap_oop_not_null(Register dst, Register src);
 422   void decode_heap_oop_not_null(Register dst, Register src);
 423 
 424   void set_narrow_oop(Register dst, jobject obj);
 425   void set_narrow_oop(Address dst, jobject obj);
 426   void cmp_narrow_oop(Register dst, jobject obj);
 427   void cmp_narrow_oop(Address dst, jobject obj);

 556   void empty_FPU_stack();
 557 #endif // !_LP64
 558 
 559   void push_IU_state();
 560   void pop_IU_state();
 561 
 562   void push_FPU_state();
 563   void pop_FPU_state();
 564 
 565   void push_CPU_state();
 566   void pop_CPU_state();
 567 
 568   // Round up to a power of two
 569   void round_to(Register reg, int modulus);
 570 
 571   // Callee saved registers handling
 572   void push_callee_saved_registers();
 573   void pop_callee_saved_registers();
 574 
 575   // allocation
 576 
 577   // Object / value buffer allocation...
 578   // Allocate instance of klass, assumes klass initialized by caller
 579   // new_obj prefers to be rax
 580   // Kills t1 and t2, perserves klass, return allocation in new_obj (rsi on LP64)
 581   void allocate_instance(Register klass, Register new_obj,
 582                          Register t1, Register t2,
 583                          bool clear_fields, Label& alloc_failed);
 584 
 585   void eden_allocate(
 586     Register thread,                   // Current thread
 587     Register obj,                      // result: pointer to object after successful allocation
 588     Register var_size_in_bytes,        // object size in bytes if unknown at compile time; invalid otherwise
 589     int      con_size_in_bytes,        // object size in bytes if   known at compile time
 590     Register t1,                       // temp register
 591     Label&   slow_case                 // continuation point if fast allocation fails
 592   );
 593   void tlab_allocate(
 594     Register thread,                   // Current thread
 595     Register obj,                      // result: pointer to object after successful allocation
 596     Register var_size_in_bytes,        // object size in bytes if unknown at compile time; invalid otherwise
 597     int      con_size_in_bytes,        // object size in bytes if   known at compile time
 598     Register t1,                       // temp register
 599     Register t2,                       // temp register
 600     Label&   slow_case                 // continuation point if fast allocation fails
 601   );
 602   void zero_memory(Register address, Register length_in_bytes, int offset_in_bytes, Register temp);
 603 
 604   // For field "index" within "klass", return inline_klass ...
 605   void get_inline_type_field_klass(Register klass, Register index, Register inline_klass);
 606 
 607   // interface method calling
 608   void lookup_interface_method(Register recv_klass,
 609                                Register intf_klass,
 610                                RegisterOrConstant itable_index,
 611                                Register method_result,
 612                                Register scan_temp,
 613                                Label& no_such_interface,
 614                                bool return_method = true);
 615 
 616   // virtual method calling
 617   void lookup_virtual_method(Register recv_klass,
 618                              RegisterOrConstant vtable_index,
 619                              Register method_result);
 620 
 621   // Test sub_klass against super_klass, with fast and slow paths.
 622 
 623   // The fast path produces a tri-state answer: yes / no / maybe-slow.
 624   // One of the three labels can be NULL, meaning take the fall-through.
 625   // If super_check_offset is -1, the value is loaded up from super_klass.
 626   // No registers are killed, except temp_reg.

 737   // Instructions that use AddressLiteral operands. These instruction can handle 32bit/64bit
 738   // operands. In general the names are modified to avoid hiding the instruction in Assembler
 739   // so that we don't need to implement all the varieties in the Assembler with trivial wrappers
 740   // here in MacroAssembler. The major exception to this rule is call
 741 
 742   // Arithmetics
 743 
 744 
 745   void addptr(Address dst, int32_t src) { LP64_ONLY(addq(dst, src)) NOT_LP64(addl(dst, src)) ; }
 746   void addptr(Address dst, Register src);
 747 
 748   void addptr(Register dst, Address src) { LP64_ONLY(addq(dst, src)) NOT_LP64(addl(dst, src)); }
 749   void addptr(Register dst, int32_t src);
 750   void addptr(Register dst, Register src);
 751   void addptr(Register dst, RegisterOrConstant src) {
 752     if (src.is_constant()) addptr(dst, (int) src.as_constant());
 753     else                   addptr(dst,       src.as_register());
 754   }
 755 
 756   void andptr(Register dst, int32_t src);
 757   void andptr(Register dst, Register src) { LP64_ONLY(andq(dst, src)) NOT_LP64(andl(dst, src)) ; }
 758   void andptr(Register dst, Address src) { LP64_ONLY(andq(dst, src)) NOT_LP64(andl(dst, src)) ; }
 759 
 760   void cmp8(AddressLiteral src1, int imm);
 761 
 762   // renamed to drag out the casting of address to int32_t/intptr_t
 763   void cmp32(Register src1, int32_t imm);
 764 
 765   void cmp32(AddressLiteral src1, int32_t imm);
 766   // compare reg - mem, or reg - &mem
 767   void cmp32(Register src1, AddressLiteral src2);
 768 
 769   void cmp32(Register src1, Address src2);
 770 
 771 #ifndef _LP64
 772   void cmpklass(Address dst, Metadata* obj);
 773   void cmpklass(Register dst, Metadata* obj);
 774   void cmpoop(Address dst, jobject obj);
 775 #endif // _LP64
 776 
 777   void cmpoop(Register src1, Register src2);
 778   void cmpoop(Register src1, Address src2);

1750   using Assembler::movq;
1751   void movdl(XMMRegister dst, AddressLiteral src);
1752   void movq(XMMRegister dst, AddressLiteral src);
1753 
1754   // Can push value or effective address
1755   void pushptr(AddressLiteral src);
1756 
1757   void pushptr(Address src) { LP64_ONLY(pushq(src)) NOT_LP64(pushl(src)); }
1758   void popptr(Address src) { LP64_ONLY(popq(src)) NOT_LP64(popl(src)); }
1759 
1760   void pushoop(jobject obj);
1761   void pushklass(Metadata* obj);
1762 
1763   // sign extend as need a l to ptr sized element
1764   void movl2ptr(Register dst, Address src) { LP64_ONLY(movslq(dst, src)) NOT_LP64(movl(dst, src)); }
1765   void movl2ptr(Register dst, Register src) { LP64_ONLY(movslq(dst, src)) NOT_LP64(if (dst != src) movl(dst, src)); }
1766 
1767 
1768  public:
1769   // C2 compiled method's prolog code.
1770   void verified_entry(Compile* C, int sp_inc = 0);
1771 
1772   // Inline type specific methods
1773   #include "asm/macroAssembler_common.hpp"
1774 
1775   int store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter = true);
1776   bool move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]);
1777   bool unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
1778                             VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
1779                             RegState reg_state[]);
1780   bool pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
1781                           VMRegPair* from, int from_count, int& from_index, VMReg to,
1782                           RegState reg_state[], Register val_array);
1783   int extend_stack_for_inline_args(int args_on_stack);
1784   void remove_frame(int initial_framesize, bool needs_stack_repair);
1785   VMReg spill_reg_for(VMReg reg);
1786 
1787   // clear memory of size 'cnt' qwords, starting at 'base';
1788   // if 'is_large' is set, do not try to produce short loop
1789   void clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp, bool is_large, bool word_copy_only, KRegister mask=knoreg);
1790 
1791   // clear memory initialization sequence for constant size;
1792   void clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1793 
1794   // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM registers
1795   void xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1796 
1797   // Fill primitive arrays
1798   void generate_fill(BasicType t, bool aligned,
1799                      Register to, Register value, Register count,
1800                      Register rtmp, XMMRegister xtmp);
1801 
1802   void encode_iso_array(Register src, Register dst, Register len,
1803                         XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3,
1804                         XMMRegister tmp4, Register tmp5, Register result, bool ascii);
1805 
1806 #ifdef _LP64
1807   void add2_with_carry(Register dest_hi, Register dest_lo, Register src1, Register src2);
1808   void multiply_64_x_64_loop(Register x, Register xstart, Register x_xstart,
1809                              Register y, Register y_idx, Register z,
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