1 /*
2 * Copyright (c) 1997, 2024, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef CPU_X86_MACROASSEMBLER_X86_HPP
26 #define CPU_X86_MACROASSEMBLER_X86_HPP
27
28 #include "asm/assembler.hpp"
29 #include "asm/register.hpp"
30 #include "code/vmreg.inline.hpp"
31 #include "compiler/oopMap.hpp"
32 #include "utilities/macros.hpp"
33 #include "runtime/vm_version.hpp"
34 #include "utilities/checkedCast.hpp"
35
36 // MacroAssembler extends Assembler by frequently used macros.
37 //
38 // Instructions for which a 'better' code sequence exists depending
39 // on arguments should also go in here.
40
41 class MacroAssembler: public Assembler {
42 friend class LIR_Assembler;
43 friend class Runtime1; // as_Address()
44
45 public:
46 // Support for VM calls
47 //
48 // This is the base routine called by the different versions of call_VM_leaf. The interpreter
49 // may customize this version by overriding it for its purposes (e.g., to save/restore
50 // additional registers when doing a VM call).
51
52 virtual void call_VM_leaf_base(
53 address entry_point, // the entry point
54 int number_of_arguments // the number of arguments to pop after the call
55 );
77 // These routines should emit JVMTI PopFrame and ForceEarlyReturn handling code.
78 // The implementation is only non-empty for the InterpreterMacroAssembler,
79 // as only the interpreter handles PopFrame and ForceEarlyReturn requests.
80 virtual void check_and_handle_popframe();
81 virtual void check_and_handle_earlyret();
82
83 Address as_Address(AddressLiteral adr);
84 Address as_Address(ArrayAddress adr, Register rscratch);
85
86 // Support for null-checks
87 //
88 // Generates code that causes a null OS exception if the content of reg is null.
89 // If the accessed location is M[reg + offset] and the offset is known, provide the
90 // offset. No explicit code generation is needed if the offset is within a certain
91 // range (0 <= offset <= page_size).
92
93 void null_check(Register reg, int offset = -1);
94 static bool needs_explicit_null_check(intptr_t offset);
95 static bool uses_implicit_null_check(void* address);
96
97 // Required platform-specific helpers for Label::patch_instructions.
98 // They _shadow_ the declarations in AbstractAssembler, which are undefined.
99 void pd_patch_instruction(address branch, address target, const char* file, int line) {
100 unsigned char op = branch[0];
101 assert(op == 0xE8 /* call */ ||
102 op == 0xE9 /* jmp */ ||
103 op == 0xEB /* short jmp */ ||
104 (op & 0xF0) == 0x70 /* short jcc */ ||
105 (op == 0x0F && (branch[1] & 0xF0) == 0x80) /* jcc */ ||
106 (op == 0xC7 && branch[1] == 0xF8) /* xbegin */ ||
107 (op == 0x8D) /* lea */,
108 "Invalid opcode at patch point");
109
110 if (op == 0xEB || (op & 0xF0) == 0x70) {
111 // short offset operators (jmp and jcc)
112 char* disp = (char*) &branch[1];
113 int imm8 = checked_cast<int>(target - (address) &disp[1]);
114 guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset at %s:%d",
115 file == nullptr ? "<null>" : file, line);
116 *disp = (char)imm8;
332 void resolve_global_jobject(Register value, Register tmp);
333
334 // C 'boolean' to Java boolean: x == 0 ? 0 : 1
335 void c2bool(Register x);
336
337 // C++ bool manipulation
338
339 void movbool(Register dst, Address src);
340 void movbool(Address dst, bool boolconst);
341 void movbool(Address dst, Register src);
342 void testbool(Register dst);
343
344 void resolve_oop_handle(Register result, Register tmp);
345 void resolve_weak_handle(Register result, Register tmp);
346 void load_mirror(Register mirror, Register method, Register tmp);
347 void load_method_holder_cld(Register rresult, Register rmethod);
348
349 void load_method_holder(Register holder, Register method);
350
351 // oop manipulations
352 void load_narrow_klass_compact(Register dst, Register src);
353 void load_klass(Register dst, Register src, Register tmp);
354 void store_klass(Register dst, Register src, Register tmp);
355
356 // Compares the Klass pointer of an object to a given Klass (which might be narrow,
357 // depending on UseCompressedClassPointers).
358 void cmp_klass(Register klass, Register obj, Register tmp);
359
360 // Compares the Klass pointer of two objects obj1 and obj2. Result is in the condition flags.
361 // Uses tmp1 and tmp2 as temporary registers.
362 void cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2);
363
364 void access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
365 Register tmp1);
366 void access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
367 Register tmp1, Register tmp2, Register tmp3);
368
369 void load_heap_oop(Register dst, Address src, Register tmp1 = noreg, DecoratorSet decorators = 0);
370 void load_heap_oop_not_null(Register dst, Address src, Register tmp1 = noreg, DecoratorSet decorators = 0);
371 void store_heap_oop(Address dst, Register val, Register tmp1 = noreg,
372 Register tmp2 = noreg, Register tmp3 = noreg, DecoratorSet decorators = 0);
373
374 // Used for storing null. All other oop constants should be
375 // stored using routines that take a jobject.
376 void store_heap_oop_null(Address dst);
377
378 void store_klass_gap(Register dst, Register src);
379
380 // This dummy is to prevent a call to store_heap_oop from
381 // converting a zero (like null) into a Register by giving
382 // the compiler two choices it can't resolve
383
384 void store_heap_oop(Address dst, void* dummy);
385
386 void encode_heap_oop(Register r);
387 void decode_heap_oop(Register r);
388 void encode_heap_oop_not_null(Register r);
389 void decode_heap_oop_not_null(Register r);
390 void encode_heap_oop_not_null(Register dst, Register src);
391 void decode_heap_oop_not_null(Register dst, Register src);
392
393 void set_narrow_oop(Register dst, jobject obj);
394 void set_narrow_oop(Address dst, jobject obj);
395 void cmp_narrow_oop(Register dst, jobject obj);
396 void cmp_narrow_oop(Address dst, jobject obj);
397
495
496 public:
497 void push_set(RegSet set, int offset = -1);
498 void pop_set(RegSet set, int offset = -1);
499
500 // Push and pop everything that might be clobbered by a native
501 // runtime call.
502 // Only save the lower 64 bits of each vector register.
503 // Additional registers can be excluded in a passed RegSet.
504 void push_call_clobbered_registers_except(RegSet exclude, bool save_fpu = true);
505 void pop_call_clobbered_registers_except(RegSet exclude, bool restore_fpu = true);
506
507 void push_call_clobbered_registers(bool save_fpu = true) {
508 push_call_clobbered_registers_except(RegSet(), save_fpu);
509 }
510 void pop_call_clobbered_registers(bool restore_fpu = true) {
511 pop_call_clobbered_registers_except(RegSet(), restore_fpu);
512 }
513
514 // allocation
515 void tlab_allocate(
516 Register obj, // result: pointer to object after successful allocation
517 Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise
518 int con_size_in_bytes, // object size in bytes if known at compile time
519 Register t1, // temp register
520 Register t2, // temp register
521 Label& slow_case // continuation point if fast allocation fails
522 );
523 void zero_memory(Register address, Register length_in_bytes, int offset_in_bytes, Register temp);
524
525 void population_count(Register dst, Register src, Register scratch1, Register scratch2);
526
527 // interface method calling
528 void lookup_interface_method(Register recv_klass,
529 Register intf_klass,
530 RegisterOrConstant itable_index,
531 Register method_result,
532 Register scan_temp,
533 Label& no_such_interface,
534 bool return_method = true);
535
536 void lookup_interface_method_stub(Register recv_klass,
537 Register holder_klass,
538 Register resolved_klass,
539 Register method_result,
540 Register scan_temp,
541 Register temp_reg2,
542 Register receiver,
543 int itable_index,
544 Label& L_no_such_interface);
751 // operands. In general the names are modified to avoid hiding the instruction in Assembler
752 // so that we don't need to implement all the varieties in the Assembler with trivial wrappers
753 // here in MacroAssembler. The major exception to this rule is call
754
755 // Arithmetics
756
757
758 void addptr(Address dst, int32_t src) { addq(dst, src); }
759 void addptr(Address dst, Register src);
760
761 void addptr(Register dst, Address src) { addq(dst, src); }
762 void addptr(Register dst, int32_t src);
763 void addptr(Register dst, Register src);
764 void addptr(Register dst, RegisterOrConstant src) {
765 if (src.is_constant()) addptr(dst, checked_cast<int>(src.as_constant()));
766 else addptr(dst, src.as_register());
767 }
768
769 void andptr(Register dst, int32_t src);
770 void andptr(Register src1, Register src2) { andq(src1, src2); }
771
772 using Assembler::andq;
773 void andq(Register dst, AddressLiteral src, Register rscratch = noreg);
774
775 void cmp8(AddressLiteral src1, int imm, Register rscratch = noreg);
776
777 // renamed to drag out the casting of address to int32_t/intptr_t
778 void cmp32(Register src1, int32_t imm);
779
780 void cmp32(AddressLiteral src1, int32_t imm, Register rscratch = noreg);
781 // compare reg - mem, or reg - &mem
782 void cmp32(Register src1, AddressLiteral src2, Register rscratch = noreg);
783
784 void cmp32(Register src1, Address src2);
785
786 void cmpoop(Register src1, Register src2);
787 void cmpoop(Register src1, Address src2);
788 void cmpoop(Register dst, jobject obj, Register rscratch);
789
790 // NOTE src2 must be the lval. This is NOT an mem-mem compare
1879 void movdl(XMMRegister dst, AddressLiteral src, Register rscratch = noreg);
1880
1881 using Assembler::movq;
1882 void movq(XMMRegister dst, AddressLiteral src, Register rscratch = noreg);
1883
1884 // Can push value or effective address
1885 void pushptr(AddressLiteral src, Register rscratch);
1886
1887 void pushptr(Address src) { pushq(src); }
1888 void popptr(Address src) { popq(src); }
1889
1890 void pushoop(jobject obj, Register rscratch);
1891 void pushklass(Metadata* obj, Register rscratch);
1892
1893 // sign extend as need a l to ptr sized element
1894 void movl2ptr(Register dst, Address src) { movslq(dst, src); }
1895 void movl2ptr(Register dst, Register src) { movslq(dst, src); }
1896
1897
1898 public:
1899 // clear memory of size 'cnt' qwords, starting at 'base';
1900 // if 'is_large' is set, do not try to produce short loop
1901 void clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, bool is_large, KRegister mask=knoreg);
1902
1903 // clear memory initialization sequence for constant size;
1904 void clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1905
1906 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM registers
1907 void xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1908
1909 // Fill primitive arrays
1910 void generate_fill(BasicType t, bool aligned,
1911 Register to, Register value, Register count,
1912 Register rtmp, XMMRegister xtmp);
1913
1914 void encode_iso_array(Register src, Register dst, Register len,
1915 XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3,
1916 XMMRegister tmp4, Register tmp5, Register result, bool ascii);
1917
1918 void add2_with_carry(Register dest_hi, Register dest_lo, Register src1, Register src2);
1919 void multiply_64_x_64_loop(Register x, Register xstart, Register x_xstart,
1920 Register y, Register y_idx, Register z,
1921 Register carry, Register product,
|
1 /*
2 * Copyright (c) 1997, 2025, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef CPU_X86_MACROASSEMBLER_X86_HPP
26 #define CPU_X86_MACROASSEMBLER_X86_HPP
27
28 #include "asm/assembler.hpp"
29 #include "asm/register.hpp"
30 #include "code/vmreg.inline.hpp"
31 #include "compiler/oopMap.hpp"
32 #include "utilities/macros.hpp"
33 #include "runtime/signature.hpp"
34 #include "runtime/vm_version.hpp"
35 #include "utilities/checkedCast.hpp"
36
37 class ciInlineKlass;
38
39 // MacroAssembler extends Assembler by frequently used macros.
40 //
41 // Instructions for which a 'better' code sequence exists depending
42 // on arguments should also go in here.
43
44 class MacroAssembler: public Assembler {
45 friend class LIR_Assembler;
46 friend class Runtime1; // as_Address()
47
48 public:
49 // Support for VM calls
50 //
51 // This is the base routine called by the different versions of call_VM_leaf. The interpreter
52 // may customize this version by overriding it for its purposes (e.g., to save/restore
53 // additional registers when doing a VM call).
54
55 virtual void call_VM_leaf_base(
56 address entry_point, // the entry point
57 int number_of_arguments // the number of arguments to pop after the call
58 );
80 // These routines should emit JVMTI PopFrame and ForceEarlyReturn handling code.
81 // The implementation is only non-empty for the InterpreterMacroAssembler,
82 // as only the interpreter handles PopFrame and ForceEarlyReturn requests.
83 virtual void check_and_handle_popframe();
84 virtual void check_and_handle_earlyret();
85
86 Address as_Address(AddressLiteral adr);
87 Address as_Address(ArrayAddress adr, Register rscratch);
88
89 // Support for null-checks
90 //
91 // Generates code that causes a null OS exception if the content of reg is null.
92 // If the accessed location is M[reg + offset] and the offset is known, provide the
93 // offset. No explicit code generation is needed if the offset is within a certain
94 // range (0 <= offset <= page_size).
95
96 void null_check(Register reg, int offset = -1);
97 static bool needs_explicit_null_check(intptr_t offset);
98 static bool uses_implicit_null_check(void* address);
99
100 // markWord tests, kills markWord reg
101 void test_markword_is_inline_type(Register markword, Label& is_inline_type);
102
103 // inlineKlass queries, kills temp_reg
104 void test_klass_is_inline_type(Register klass, Register temp_reg, Label& is_inline_type);
105 void test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type);
106
107 void test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free);
108 void test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free);
109 void test_field_is_flat(Register flags, Register temp_reg, Label& is_flat);
110 void test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker);
111
112 // Check oops for special arrays, i.e. flat arrays and/or null-free arrays
113 void test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label);
114 void test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array);
115 void test_non_flat_array_oop(Register oop, Register temp_reg, Label& is_non_flat_array);
116 void test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array);
117 void test_non_null_free_array_oop(Register oop, Register temp_reg, Label& is_non_null_free_array);
118
119 // Check array klass layout helper for flat or null-free arrays...
120 void test_flat_array_layout(Register lh, Label& is_flat_array);
121 void test_non_flat_array_layout(Register lh, Label& is_non_flat_array);
122
123 // Required platform-specific helpers for Label::patch_instructions.
124 // They _shadow_ the declarations in AbstractAssembler, which are undefined.
125 void pd_patch_instruction(address branch, address target, const char* file, int line) {
126 unsigned char op = branch[0];
127 assert(op == 0xE8 /* call */ ||
128 op == 0xE9 /* jmp */ ||
129 op == 0xEB /* short jmp */ ||
130 (op & 0xF0) == 0x70 /* short jcc */ ||
131 (op == 0x0F && (branch[1] & 0xF0) == 0x80) /* jcc */ ||
132 (op == 0xC7 && branch[1] == 0xF8) /* xbegin */ ||
133 (op == 0x8D) /* lea */,
134 "Invalid opcode at patch point");
135
136 if (op == 0xEB || (op & 0xF0) == 0x70) {
137 // short offset operators (jmp and jcc)
138 char* disp = (char*) &branch[1];
139 int imm8 = checked_cast<int>(target - (address) &disp[1]);
140 guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset at %s:%d",
141 file == nullptr ? "<null>" : file, line);
142 *disp = (char)imm8;
358 void resolve_global_jobject(Register value, Register tmp);
359
360 // C 'boolean' to Java boolean: x == 0 ? 0 : 1
361 void c2bool(Register x);
362
363 // C++ bool manipulation
364
365 void movbool(Register dst, Address src);
366 void movbool(Address dst, bool boolconst);
367 void movbool(Address dst, Register src);
368 void testbool(Register dst);
369
370 void resolve_oop_handle(Register result, Register tmp);
371 void resolve_weak_handle(Register result, Register tmp);
372 void load_mirror(Register mirror, Register method, Register tmp);
373 void load_method_holder_cld(Register rresult, Register rmethod);
374
375 void load_method_holder(Register holder, Register method);
376
377 // oop manipulations
378
379 // Load oopDesc._metadata without decode (useful for direct Klass* compare from oops)
380 void load_metadata(Register dst, Register src);
381 void load_narrow_klass_compact(Register dst, Register src);
382 void load_klass(Register dst, Register src, Register tmp);
383 void store_klass(Register dst, Register src, Register tmp);
384
385 // Compares the Klass pointer of an object to a given Klass (which might be narrow,
386 // depending on UseCompressedClassPointers).
387 void cmp_klass(Register klass, Register obj, Register tmp);
388
389 // Compares the Klass pointer of two objects obj1 and obj2. Result is in the condition flags.
390 // Uses tmp1 and tmp2 as temporary registers.
391 void cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2);
392
393 void access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
394 Register tmp1);
395 void access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register val,
396 Register tmp1, Register tmp2, Register tmp3);
397
398 void flat_field_copy(DecoratorSet decorators, Register src, Register dst, Register inline_layout_info);
399
400 // inline type data payload offsets...
401 void payload_offset(Register inline_klass, Register offset);
402 void payload_addr(Register oop, Register data, Register inline_klass);
403 // get data payload ptr a flat value array at index, kills rcx and index
404 void data_for_value_array_index(Register array, Register array_klass,
405 Register index, Register data);
406
407 void load_heap_oop(Register dst, Address src, Register tmp1 = noreg, DecoratorSet decorators = 0);
408 void load_heap_oop_not_null(Register dst, Address src, Register tmp1 = noreg, DecoratorSet decorators = 0);
409 void store_heap_oop(Address dst, Register val, Register tmp1 = noreg,
410 Register tmp2 = noreg, Register tmp3 = noreg, DecoratorSet decorators = 0);
411
412 // Used for storing null. All other oop constants should be
413 // stored using routines that take a jobject.
414 void store_heap_oop_null(Address dst);
415
416 void load_prototype_header(Register dst, Register src, Register tmp);
417
418 void store_klass_gap(Register dst, Register src);
419
420 // This dummy is to prevent a call to store_heap_oop from
421 // converting a zero (like null) into a Register by giving
422 // the compiler two choices it can't resolve
423
424 void store_heap_oop(Address dst, void* dummy);
425
426 void encode_heap_oop(Register r);
427 void decode_heap_oop(Register r);
428 void encode_heap_oop_not_null(Register r);
429 void decode_heap_oop_not_null(Register r);
430 void encode_heap_oop_not_null(Register dst, Register src);
431 void decode_heap_oop_not_null(Register dst, Register src);
432
433 void set_narrow_oop(Register dst, jobject obj);
434 void set_narrow_oop(Address dst, jobject obj);
435 void cmp_narrow_oop(Register dst, jobject obj);
436 void cmp_narrow_oop(Address dst, jobject obj);
437
535
536 public:
537 void push_set(RegSet set, int offset = -1);
538 void pop_set(RegSet set, int offset = -1);
539
540 // Push and pop everything that might be clobbered by a native
541 // runtime call.
542 // Only save the lower 64 bits of each vector register.
543 // Additional registers can be excluded in a passed RegSet.
544 void push_call_clobbered_registers_except(RegSet exclude, bool save_fpu = true);
545 void pop_call_clobbered_registers_except(RegSet exclude, bool restore_fpu = true);
546
547 void push_call_clobbered_registers(bool save_fpu = true) {
548 push_call_clobbered_registers_except(RegSet(), save_fpu);
549 }
550 void pop_call_clobbered_registers(bool restore_fpu = true) {
551 pop_call_clobbered_registers_except(RegSet(), restore_fpu);
552 }
553
554 // allocation
555
556 // Object / value buffer allocation...
557 // Allocate instance of klass, assumes klass initialized by caller
558 // new_obj prefers to be rax
559 // Kills t1 and t2, perserves klass, return allocation in new_obj (rsi on LP64)
560 void allocate_instance(Register klass, Register new_obj,
561 Register t1, Register t2,
562 bool clear_fields, Label& alloc_failed);
563
564 void tlab_allocate(
565 Register obj, // result: pointer to object after successful allocation
566 Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise
567 int con_size_in_bytes, // object size in bytes if known at compile time
568 Register t1, // temp register
569 Register t2, // temp register
570 Label& slow_case // continuation point if fast allocation fails
571 );
572 void zero_memory(Register address, Register length_in_bytes, int offset_in_bytes, Register temp);
573
574 // For field "index" within "klass", return inline_klass ...
575 void get_inline_type_field_klass(Register klass, Register index, Register inline_klass);
576
577 void inline_layout_info(Register klass, Register index, Register layout_info);
578
579 void population_count(Register dst, Register src, Register scratch1, Register scratch2);
580
581 // interface method calling
582 void lookup_interface_method(Register recv_klass,
583 Register intf_klass,
584 RegisterOrConstant itable_index,
585 Register method_result,
586 Register scan_temp,
587 Label& no_such_interface,
588 bool return_method = true);
589
590 void lookup_interface_method_stub(Register recv_klass,
591 Register holder_klass,
592 Register resolved_klass,
593 Register method_result,
594 Register scan_temp,
595 Register temp_reg2,
596 Register receiver,
597 int itable_index,
598 Label& L_no_such_interface);
805 // operands. In general the names are modified to avoid hiding the instruction in Assembler
806 // so that we don't need to implement all the varieties in the Assembler with trivial wrappers
807 // here in MacroAssembler. The major exception to this rule is call
808
809 // Arithmetics
810
811
812 void addptr(Address dst, int32_t src) { addq(dst, src); }
813 void addptr(Address dst, Register src);
814
815 void addptr(Register dst, Address src) { addq(dst, src); }
816 void addptr(Register dst, int32_t src);
817 void addptr(Register dst, Register src);
818 void addptr(Register dst, RegisterOrConstant src) {
819 if (src.is_constant()) addptr(dst, checked_cast<int>(src.as_constant()));
820 else addptr(dst, src.as_register());
821 }
822
823 void andptr(Register dst, int32_t src);
824 void andptr(Register src1, Register src2) { andq(src1, src2); }
825 void andptr(Register dst, Address src) { andq(dst, src); }
826
827 using Assembler::andq;
828 void andq(Register dst, AddressLiteral src, Register rscratch = noreg);
829
830 void cmp8(AddressLiteral src1, int imm, Register rscratch = noreg);
831
832 // renamed to drag out the casting of address to int32_t/intptr_t
833 void cmp32(Register src1, int32_t imm);
834
835 void cmp32(AddressLiteral src1, int32_t imm, Register rscratch = noreg);
836 // compare reg - mem, or reg - &mem
837 void cmp32(Register src1, AddressLiteral src2, Register rscratch = noreg);
838
839 void cmp32(Register src1, Address src2);
840
841 void cmpoop(Register src1, Register src2);
842 void cmpoop(Register src1, Address src2);
843 void cmpoop(Register dst, jobject obj, Register rscratch);
844
845 // NOTE src2 must be the lval. This is NOT an mem-mem compare
1934 void movdl(XMMRegister dst, AddressLiteral src, Register rscratch = noreg);
1935
1936 using Assembler::movq;
1937 void movq(XMMRegister dst, AddressLiteral src, Register rscratch = noreg);
1938
1939 // Can push value or effective address
1940 void pushptr(AddressLiteral src, Register rscratch);
1941
1942 void pushptr(Address src) { pushq(src); }
1943 void popptr(Address src) { popq(src); }
1944
1945 void pushoop(jobject obj, Register rscratch);
1946 void pushklass(Metadata* obj, Register rscratch);
1947
1948 // sign extend as need a l to ptr sized element
1949 void movl2ptr(Register dst, Address src) { movslq(dst, src); }
1950 void movl2ptr(Register dst, Register src) { movslq(dst, src); }
1951
1952
1953 public:
1954 // Inline type specific methods
1955 #include "asm/macroAssembler_common.hpp"
1956
1957 int store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter = true);
1958 bool move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]);
1959 bool unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
1960 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
1961 RegState reg_state[]);
1962 bool pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
1963 VMRegPair* from, int from_count, int& from_index, VMReg to,
1964 RegState reg_state[], Register val_array);
1965 int extend_stack_for_inline_args(int args_on_stack);
1966 void remove_frame(int initial_framesize, bool needs_stack_repair);
1967 VMReg spill_reg_for(VMReg reg);
1968
1969 // clear memory of size 'cnt' qwords, starting at 'base';
1970 // if 'is_large' is set, do not try to produce short loop
1971 void clear_mem(Register base, Register cnt, Register val, XMMRegister xtmp, bool is_large, bool word_copy_only, KRegister mask=knoreg);
1972
1973 // clear memory initialization sequence for constant size;
1974 void clear_mem(Register base, int cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1975
1976 // clear memory of size 'cnt' qwords, starting at 'base' using XMM/YMM registers
1977 void xmm_clear_mem(Register base, Register cnt, Register rtmp, XMMRegister xtmp, KRegister mask=knoreg);
1978
1979 // Fill primitive arrays
1980 void generate_fill(BasicType t, bool aligned,
1981 Register to, Register value, Register count,
1982 Register rtmp, XMMRegister xtmp);
1983
1984 void encode_iso_array(Register src, Register dst, Register len,
1985 XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3,
1986 XMMRegister tmp4, Register tmp5, Register result, bool ascii);
1987
1988 void add2_with_carry(Register dest_hi, Register dest_lo, Register src1, Register src2);
1989 void multiply_64_x_64_loop(Register x, Register xstart, Register x_xstart,
1990 Register y, Register y_idx, Register z,
1991 Register carry, Register product,
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