2851
2852 uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
2853 return MachNode::size(ra_);
2854 }
2855
2856 %}
2857
2858 encode %{
2859
2860 enc_class call_epilog %{
2861 if (VerifyStackAtCalls) {
2862 // Check that stack depth is unchanged: find majik cookie on stack
2863 int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
2864 Label L;
2865 __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
2866 __ jccb(Assembler::equal, L);
2867 // Die if stack mismatch
2868 __ int3();
2869 __ bind(L);
2870 }
2871 %}
2872
2873 %}
2874
2875 // Operands for bound floating pointer register arguments
2876 operand rxmm0() %{
2877 constraint(ALLOC_IN_RC(xmm0_reg));
2878 match(VecX);
2879 format%{%}
2880 interface(REG_INTER);
2881 %}
2882
2883 //----------OPERANDS-----------------------------------------------------------
2884 // Operand definitions must precede instruction definitions for correct parsing
2885 // in the ADLC because operands constitute user defined types which are used in
2886 // instruction definitions.
2887
2888 // Vectors
2889
2890 // Dummy generic vector class. Should be used for all vector operands.
|
2851
2852 uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
2853 return MachNode::size(ra_);
2854 }
2855
2856 %}
2857
2858 encode %{
2859
2860 enc_class call_epilog %{
2861 if (VerifyStackAtCalls) {
2862 // Check that stack depth is unchanged: find majik cookie on stack
2863 int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
2864 Label L;
2865 __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
2866 __ jccb(Assembler::equal, L);
2867 // Die if stack mismatch
2868 __ int3();
2869 __ bind(L);
2870 }
2871 if (tf()->returns_inline_type_as_fields() && !_method->is_method_handle_intrinsic()) {
2872 // The last return value is not set by the callee but used to pass IsInit information to compiled code.
2873 // Search for the corresponding projection, get the register and emit code that initialized it.
2874 uint con = (tf()->range_cc()->cnt() - 1);
2875 for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) {
2876 ProjNode* proj = fast_out(i)->as_Proj();
2877 if (proj->_con == con) {
2878 // Set IsInit if rax is non-null (a non-null value is returned buffered or scalarized)
2879 OptoReg::Name optoReg = ra_->get_reg_first(proj);
2880 VMReg reg = OptoReg::as_VMReg(optoReg, ra_->_framesize, OptoReg::reg2stack(ra_->_matcher._new_SP));
2881 Register toReg = reg->is_reg() ? reg->as_Register() : rscratch1;
2882 __ testq(rax, rax);
2883 __ setb(Assembler::notZero, toReg);
2884 __ movzbl(toReg, toReg);
2885 if (reg->is_stack()) {
2886 int st_off = reg->reg2stack() * VMRegImpl::stack_slot_size;
2887 __ movq(Address(rsp, st_off), toReg);
2888 }
2889 break;
2890 }
2891 }
2892 if (return_value_is_used()) {
2893 // An inline type is returned as fields in multiple registers.
2894 // Rax either contains an oop if the inline type is buffered or a pointer
2895 // to the corresponding InlineKlass with the lowest bit set to 1. Zero rax
2896 // if the lowest bit is set to allow C2 to use the oop after null checking.
2897 // rax &= (rax & 1) - 1
2898 __ movptr(rscratch1, rax);
2899 __ andptr(rscratch1, 0x1);
2900 __ subptr(rscratch1, 0x1);
2901 __ andptr(rax, rscratch1);
2902 }
2903 }
2904 %}
2905
2906 %}
2907
2908 // Operands for bound floating pointer register arguments
2909 operand rxmm0() %{
2910 constraint(ALLOC_IN_RC(xmm0_reg));
2911 match(VecX);
2912 format%{%}
2913 interface(REG_INTER);
2914 %}
2915
2916 //----------OPERANDS-----------------------------------------------------------
2917 // Operand definitions must precede instruction definitions for correct parsing
2918 // in the ADLC because operands constitute user defined types which are used in
2919 // instruction definitions.
2920
2921 // Vectors
2922
2923 // Dummy generic vector class. Should be used for all vector operands.
|