2818
2819 uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
2820 return MachNode::size(ra_);
2821 }
2822
2823 %}
2824
2825 encode %{
2826
2827 enc_class call_epilog %{
2828 if (VerifyStackAtCalls) {
2829 // Check that stack depth is unchanged: find majik cookie on stack
2830 int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
2831 Label L;
2832 __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
2833 __ jccb(Assembler::equal, L);
2834 // Die if stack mismatch
2835 __ int3();
2836 __ bind(L);
2837 }
2838 %}
2839
2840 %}
2841
2842 // Operands for bound floating pointer register arguments
2843 operand rxmm0() %{
2844 constraint(ALLOC_IN_RC(xmm0_reg));
2845 match(VecX);
2846 format%{%}
2847 interface(REG_INTER);
2848 %}
2849
2850 //----------OPERANDS-----------------------------------------------------------
2851 // Operand definitions must precede instruction definitions for correct parsing
2852 // in the ADLC because operands constitute user defined types which are used in
2853 // instruction definitions.
2854
2855 // Vectors
2856
2857 // Dummy generic vector class. Should be used for all vector operands.
|
2818
2819 uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
2820 return MachNode::size(ra_);
2821 }
2822
2823 %}
2824
2825 encode %{
2826
2827 enc_class call_epilog %{
2828 if (VerifyStackAtCalls) {
2829 // Check that stack depth is unchanged: find majik cookie on stack
2830 int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
2831 Label L;
2832 __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
2833 __ jccb(Assembler::equal, L);
2834 // Die if stack mismatch
2835 __ int3();
2836 __ bind(L);
2837 }
2838 if (tf()->returns_inline_type_as_fields() && !_method->is_method_handle_intrinsic()) {
2839 // The last return value is not set by the callee but used to pass IsInit information to compiled code.
2840 // Search for the corresponding projection, get the register and emit code that initialized it.
2841 uint con = (tf()->range_cc()->cnt() - 1);
2842 for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) {
2843 ProjNode* proj = fast_out(i)->as_Proj();
2844 if (proj->_con == con) {
2845 // Set IsInit if rax is non-null (a non-null value is returned buffered or scalarized)
2846 OptoReg::Name optoReg = ra_->get_reg_first(proj);
2847 VMReg reg = OptoReg::as_VMReg(optoReg, ra_->_framesize, OptoReg::reg2stack(ra_->_matcher._new_SP));
2848 Register toReg = reg->is_reg() ? reg->as_Register() : rscratch1;
2849 __ testq(rax, rax);
2850 __ setb(Assembler::notZero, toReg);
2851 __ movzbl(toReg, toReg);
2852 if (reg->is_stack()) {
2853 int st_off = reg->reg2stack() * VMRegImpl::stack_slot_size;
2854 __ movq(Address(rsp, st_off), toReg);
2855 }
2856 break;
2857 }
2858 }
2859 if (return_value_is_used()) {
2860 // An inline type is returned as fields in multiple registers.
2861 // Rax either contains an oop if the inline type is buffered or a pointer
2862 // to the corresponding InlineKlass with the lowest bit set to 1. Zero rax
2863 // if the lowest bit is set to allow C2 to use the oop after null checking.
2864 // rax &= (rax & 1) - 1
2865 __ movptr(rscratch1, rax);
2866 __ andptr(rscratch1, 0x1);
2867 __ subptr(rscratch1, 0x1);
2868 __ andptr(rax, rscratch1);
2869 }
2870 }
2871 %}
2872
2873 %}
2874
2875 // Operands for bound floating pointer register arguments
2876 operand rxmm0() %{
2877 constraint(ALLOC_IN_RC(xmm0_reg));
2878 match(VecX);
2879 format%{%}
2880 interface(REG_INTER);
2881 %}
2882
2883 //----------OPERANDS-----------------------------------------------------------
2884 // Operand definitions must precede instruction definitions for correct parsing
2885 // in the ADLC because operands constitute user defined types which are used in
2886 // instruction definitions.
2887
2888 // Vectors
2889
2890 // Dummy generic vector class. Should be used for all vector operands.
|