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src/hotspot/cpu/x86/x86.ad

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 2773   uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
 2774     return MachNode::size(ra_);
 2775   }
 2776 
 2777 %}
 2778 
 2779 encode %{
 2780 
 2781   enc_class call_epilog %{
 2782     C2_MacroAssembler _masm(&cbuf);
 2783     if (VerifyStackAtCalls) {
 2784       // Check that stack depth is unchanged: find majik cookie on stack
 2785       int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
 2786       Label L;
 2787       __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
 2788       __ jccb(Assembler::equal, L);
 2789       // Die if stack mismatch
 2790       __ int3();
 2791       __ bind(L);
 2792     }




































 2793   %}
 2794 
 2795 %}
 2796 
 2797 // Operands for bound floating pointer register arguments
 2798 operand rxmm0() %{
 2799   constraint(ALLOC_IN_RC(xmm0_reg));
 2800   match(VecX);
 2801   format%{%}
 2802   interface(REG_INTER);
 2803 %}
 2804 
 2805 //----------OPERANDS-----------------------------------------------------------
 2806 // Operand definitions must precede instruction definitions for correct parsing
 2807 // in the ADLC because operands constitute user defined types which are used in
 2808 // instruction definitions.
 2809 
 2810 // Vectors
 2811 
 2812 // Dummy generic vector class. Should be used for all vector operands.

 2773   uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
 2774     return MachNode::size(ra_);
 2775   }
 2776 
 2777 %}
 2778 
 2779 encode %{
 2780 
 2781   enc_class call_epilog %{
 2782     C2_MacroAssembler _masm(&cbuf);
 2783     if (VerifyStackAtCalls) {
 2784       // Check that stack depth is unchanged: find majik cookie on stack
 2785       int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
 2786       Label L;
 2787       __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
 2788       __ jccb(Assembler::equal, L);
 2789       // Die if stack mismatch
 2790       __ int3();
 2791       __ bind(L);
 2792     }
 2793     if (tf()->returns_inline_type_as_fields() && !_method->is_method_handle_intrinsic()) {
 2794       C2_MacroAssembler _masm(&cbuf);
 2795       if (!_method->signature()->returns_null_free_inline_type()) {
 2796         // The last return value is not set by the callee but used to pass IsInit information to compiled code.
 2797         // Search for the corresponding projection, get the register and emit code that initialized it.
 2798         uint con = (tf()->range_cc()->cnt() - 1);
 2799         for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) {
 2800           ProjNode* proj = fast_out(i)->as_Proj();
 2801           if (proj->_con == con) {
 2802             // Set IsInit if rax is non-null (a non-null value is returned buffered or scalarized)
 2803             OptoReg::Name optoReg = ra_->get_reg_first(proj);
 2804             VMReg reg = OptoReg::as_VMReg(optoReg, ra_->_framesize, OptoReg::reg2stack(ra_->_matcher._new_SP));
 2805             Register toReg = reg->is_reg() ? reg->as_Register() : rscratch1;
 2806             __ testq(rax, rax);
 2807             __ set_byte_if_not_zero(toReg);
 2808             __ movzbl(toReg, toReg);
 2809             if (reg->is_stack()) {
 2810               int st_off = reg->reg2stack() * VMRegImpl::stack_slot_size;
 2811               __ movq(Address(rsp, st_off), toReg);
 2812             }
 2813             break;
 2814           }
 2815         }
 2816       }
 2817       if (return_value_is_used()) {
 2818         // An inline type is returned as fields in multiple registers.
 2819         // Rax either contains an oop if the inline type is buffered or a pointer
 2820         // to the corresponding InlineKlass with the lowest bit set to 1. Zero rax
 2821         // if the lowest bit is set to allow C2 to use the oop after null checking.
 2822         // rax &= (rax & 1) - 1
 2823         __ movptr(rscratch1, rax);
 2824         __ andptr(rscratch1, 0x1);
 2825         __ subptr(rscratch1, 0x1);
 2826         __ andptr(rax, rscratch1);
 2827       }
 2828     }
 2829   %}
 2830 
 2831 %}
 2832 
 2833 // Operands for bound floating pointer register arguments
 2834 operand rxmm0() %{
 2835   constraint(ALLOC_IN_RC(xmm0_reg));
 2836   match(VecX);
 2837   format%{%}
 2838   interface(REG_INTER);
 2839 %}
 2840 
 2841 //----------OPERANDS-----------------------------------------------------------
 2842 // Operand definitions must precede instruction definitions for correct parsing
 2843 // in the ADLC because operands constitute user defined types which are used in
 2844 // instruction definitions.
 2845 
 2846 // Vectors
 2847 
 2848 // Dummy generic vector class. Should be used for all vector operands.
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