2865
2866 uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
2867 return MachNode::size(ra_);
2868 }
2869
2870 %}
2871
2872 encode %{
2873
2874 enc_class call_epilog %{
2875 if (VerifyStackAtCalls) {
2876 // Check that stack depth is unchanged: find majik cookie on stack
2877 int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
2878 Label L;
2879 __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
2880 __ jccb(Assembler::equal, L);
2881 // Die if stack mismatch
2882 __ int3();
2883 __ bind(L);
2884 }
2885 %}
2886
2887 %}
2888
2889 // Operands for bound floating pointer register arguments
2890 operand rxmm0() %{
2891 constraint(ALLOC_IN_RC(xmm0_reg));
2892 match(VecX);
2893 format%{%}
2894 interface(REG_INTER);
2895 %}
2896
2897 //----------OPERANDS-----------------------------------------------------------
2898 // Operand definitions must precede instruction definitions for correct parsing
2899 // in the ADLC because operands constitute user defined types which are used in
2900 // instruction definitions.
2901
2902 // Vectors
2903
2904 // Dummy generic vector class. Should be used for all vector operands.
|
2865
2866 uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
2867 return MachNode::size(ra_);
2868 }
2869
2870 %}
2871
2872 encode %{
2873
2874 enc_class call_epilog %{
2875 if (VerifyStackAtCalls) {
2876 // Check that stack depth is unchanged: find majik cookie on stack
2877 int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
2878 Label L;
2879 __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
2880 __ jccb(Assembler::equal, L);
2881 // Die if stack mismatch
2882 __ int3();
2883 __ bind(L);
2884 }
2885 if (tf()->returns_inline_type_as_fields() && !_method->is_method_handle_intrinsic()) {
2886 // The last return value is not set by the callee but used to pass IsInit information to compiled code.
2887 // Search for the corresponding projection, get the register and emit code that initialized it.
2888 uint con = (tf()->range_cc()->cnt() - 1);
2889 for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) {
2890 ProjNode* proj = fast_out(i)->as_Proj();
2891 if (proj->_con == con) {
2892 // Set IsInit if rax is non-null (a non-null value is returned buffered or scalarized)
2893 OptoReg::Name optoReg = ra_->get_reg_first(proj);
2894 VMReg reg = OptoReg::as_VMReg(optoReg, ra_->_framesize, OptoReg::reg2stack(ra_->_matcher._new_SP));
2895 Register toReg = reg->is_reg() ? reg->as_Register() : rscratch1;
2896 __ testq(rax, rax);
2897 __ setb(Assembler::notZero, toReg);
2898 __ movzbl(toReg, toReg);
2899 if (reg->is_stack()) {
2900 int st_off = reg->reg2stack() * VMRegImpl::stack_slot_size;
2901 __ movq(Address(rsp, st_off), toReg);
2902 }
2903 break;
2904 }
2905 }
2906 if (return_value_is_used()) {
2907 // An inline type is returned as fields in multiple registers.
2908 // Rax either contains an oop if the inline type is buffered or a pointer
2909 // to the corresponding InlineKlass with the lowest bit set to 1. Zero rax
2910 // if the lowest bit is set to allow C2 to use the oop after null checking.
2911 // rax &= (rax & 1) - 1
2912 __ movptr(rscratch1, rax);
2913 __ andptr(rscratch1, 0x1);
2914 __ subptr(rscratch1, 0x1);
2915 __ andptr(rax, rscratch1);
2916 }
2917 }
2918 %}
2919
2920 %}
2921
2922 // Operands for bound floating pointer register arguments
2923 operand rxmm0() %{
2924 constraint(ALLOC_IN_RC(xmm0_reg));
2925 match(VecX);
2926 format%{%}
2927 interface(REG_INTER);
2928 %}
2929
2930 //----------OPERANDS-----------------------------------------------------------
2931 // Operand definitions must precede instruction definitions for correct parsing
2932 // in the ADLC because operands constitute user defined types which are used in
2933 // instruction definitions.
2934
2935 // Vectors
2936
2937 // Dummy generic vector class. Should be used for all vector operands.
|