2788
2789 uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
2790 return MachNode::size(ra_);
2791 }
2792
2793 %}
2794
2795 encode %{
2796
2797 enc_class call_epilog %{
2798 if (VerifyStackAtCalls) {
2799 // Check that stack depth is unchanged: find majik cookie on stack
2800 int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
2801 Label L;
2802 __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
2803 __ jccb(Assembler::equal, L);
2804 // Die if stack mismatch
2805 __ int3();
2806 __ bind(L);
2807 }
2808 %}
2809
2810 %}
2811
2812 // Operands for bound floating pointer register arguments
2813 operand rxmm0() %{
2814 constraint(ALLOC_IN_RC(xmm0_reg));
2815 match(VecX);
2816 format%{%}
2817 interface(REG_INTER);
2818 %}
2819
2820 //----------OPERANDS-----------------------------------------------------------
2821 // Operand definitions must precede instruction definitions for correct parsing
2822 // in the ADLC because operands constitute user defined types which are used in
2823 // instruction definitions.
2824
2825 // Vectors
2826
2827 // Dummy generic vector class. Should be used for all vector operands.
|
2788
2789 uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
2790 return MachNode::size(ra_);
2791 }
2792
2793 %}
2794
2795 encode %{
2796
2797 enc_class call_epilog %{
2798 if (VerifyStackAtCalls) {
2799 // Check that stack depth is unchanged: find majik cookie on stack
2800 int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
2801 Label L;
2802 __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
2803 __ jccb(Assembler::equal, L);
2804 // Die if stack mismatch
2805 __ int3();
2806 __ bind(L);
2807 }
2808 if (tf()->returns_inline_type_as_fields() && !_method->is_method_handle_intrinsic()) {
2809 // The last return value is not set by the callee but used to pass IsInit information to compiled code.
2810 // Search for the corresponding projection, get the register and emit code that initialized it.
2811 uint con = (tf()->range_cc()->cnt() - 1);
2812 for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) {
2813 ProjNode* proj = fast_out(i)->as_Proj();
2814 if (proj->_con == con) {
2815 // Set IsInit if rax is non-null (a non-null value is returned buffered or scalarized)
2816 OptoReg::Name optoReg = ra_->get_reg_first(proj);
2817 VMReg reg = OptoReg::as_VMReg(optoReg, ra_->_framesize, OptoReg::reg2stack(ra_->_matcher._new_SP));
2818 Register toReg = reg->is_reg() ? reg->as_Register() : rscratch1;
2819 __ testq(rax, rax);
2820 __ setb(Assembler::notZero, toReg);
2821 __ movzbl(toReg, toReg);
2822 if (reg->is_stack()) {
2823 int st_off = reg->reg2stack() * VMRegImpl::stack_slot_size;
2824 __ movq(Address(rsp, st_off), toReg);
2825 }
2826 break;
2827 }
2828 }
2829 if (return_value_is_used()) {
2830 // An inline type is returned as fields in multiple registers.
2831 // Rax either contains an oop if the inline type is buffered or a pointer
2832 // to the corresponding InlineKlass with the lowest bit set to 1. Zero rax
2833 // if the lowest bit is set to allow C2 to use the oop after null checking.
2834 // rax &= (rax & 1) - 1
2835 __ movptr(rscratch1, rax);
2836 __ andptr(rscratch1, 0x1);
2837 __ subptr(rscratch1, 0x1);
2838 __ andptr(rax, rscratch1);
2839 }
2840 }
2841 %}
2842
2843 %}
2844
2845 // Operands for bound floating pointer register arguments
2846 operand rxmm0() %{
2847 constraint(ALLOC_IN_RC(xmm0_reg));
2848 match(VecX);
2849 format%{%}
2850 interface(REG_INTER);
2851 %}
2852
2853 //----------OPERANDS-----------------------------------------------------------
2854 // Operand definitions must precede instruction definitions for correct parsing
2855 // in the ADLC because operands constitute user defined types which are used in
2856 // instruction definitions.
2857
2858 // Vectors
2859
2860 // Dummy generic vector class. Should be used for all vector operands.
|