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src/hotspot/cpu/x86/x86.ad

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2631   uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
2632     return MachNode::size(ra_);
2633   }
2634 
2635 %}
2636 
2637 encode %{
2638 
2639   enc_class call_epilog %{
2640     if (VerifyStackAtCalls) {
2641       // Check that stack depth is unchanged: find majik cookie on stack
2642       int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
2643       C2_MacroAssembler _masm(&cbuf);
2644       Label L;
2645       __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
2646       __ jccb(Assembler::equal, L);
2647       // Die if stack mismatch
2648       __ int3();
2649       __ bind(L);
2650     }




































2651   %}
2652 
2653 %}
2654 
2655 // Operands for bound floating pointer register arguments
2656 operand rxmm0() %{
2657   constraint(ALLOC_IN_RC(xmm0_reg));
2658   match(VecX);
2659   format%{%}
2660   interface(REG_INTER);
2661 %}
2662 
2663 //----------OPERANDS-----------------------------------------------------------
2664 // Operand definitions must precede instruction definitions for correct parsing
2665 // in the ADLC because operands constitute user defined types which are used in
2666 // instruction definitions.
2667 
2668 // Vectors
2669 
2670 // Dummy generic vector class. Should be used for all vector operands.

2631   uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
2632     return MachNode::size(ra_);
2633   }
2634 
2635 %}
2636 
2637 encode %{
2638 
2639   enc_class call_epilog %{
2640     if (VerifyStackAtCalls) {
2641       // Check that stack depth is unchanged: find majik cookie on stack
2642       int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
2643       C2_MacroAssembler _masm(&cbuf);
2644       Label L;
2645       __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
2646       __ jccb(Assembler::equal, L);
2647       // Die if stack mismatch
2648       __ int3();
2649       __ bind(L);
2650     }
2651     if (tf()->returns_inline_type_as_fields() && !_method->is_method_handle_intrinsic()) {
2652       C2_MacroAssembler _masm(&cbuf);
2653       if (!_method->signature()->returns_null_free_inline_type()) {
2654         // The last return value is not set by the callee but used to pass IsInit information to compiled code.
2655         // Search for the corresponding projection, get the register and emit code that initialized it.
2656         uint con = (tf()->range_cc()->cnt() - 1);
2657         for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) {
2658           ProjNode* proj = fast_out(i)->as_Proj();
2659           if (proj->_con == con) {
2660             // Set IsInit if rax is non-null (a non-null value is returned buffered or scalarized)
2661             OptoReg::Name optoReg = ra_->get_reg_first(proj);
2662             VMReg reg = OptoReg::as_VMReg(optoReg, ra_->_framesize, OptoReg::reg2stack(ra_->_matcher._new_SP));
2663             Register toReg = reg->is_reg() ? reg->as_Register() : rscratch1;
2664             __ testq(rax, rax);
2665             __ set_byte_if_not_zero(toReg);
2666             __ movzbl(toReg, toReg);
2667             if (reg->is_stack()) {
2668               int st_off = reg->reg2stack() * VMRegImpl::stack_slot_size;
2669               __ movq(Address(rsp, st_off), toReg);
2670             }
2671             break;
2672           }
2673         }
2674       }
2675       if (return_value_is_used()) {
2676         // An inline type is returned as fields in multiple registers.
2677         // Rax either contains an oop if the inline type is buffered or a pointer
2678         // to the corresponding InlineKlass with the lowest bit set to 1. Zero rax
2679         // if the lowest bit is set to allow C2 to use the oop after null checking.
2680         // rax &= (rax & 1) - 1
2681         __ movptr(rscratch1, rax);
2682         __ andptr(rscratch1, 0x1);
2683         __ subptr(rscratch1, 0x1);
2684         __ andptr(rax, rscratch1);
2685       }
2686     }
2687   %}
2688 
2689 %}
2690 
2691 // Operands for bound floating pointer register arguments
2692 operand rxmm0() %{
2693   constraint(ALLOC_IN_RC(xmm0_reg));
2694   match(VecX);
2695   format%{%}
2696   interface(REG_INTER);
2697 %}
2698 
2699 //----------OPERANDS-----------------------------------------------------------
2700 // Operand definitions must precede instruction definitions for correct parsing
2701 // in the ADLC because operands constitute user defined types which are used in
2702 // instruction definitions.
2703 
2704 // Vectors
2705 
2706 // Dummy generic vector class. Should be used for all vector operands.
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