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src/hotspot/cpu/x86/x86.ad

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 2704 
 2705   uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
 2706     return MachNode::size(ra_);
 2707   }
 2708 
 2709 %}
 2710 
 2711 encode %{
 2712 
 2713   enc_class call_epilog %{
 2714     if (VerifyStackAtCalls) {
 2715       // Check that stack depth is unchanged: find majik cookie on stack
 2716       int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
 2717       Label L;
 2718       __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
 2719       __ jccb(Assembler::equal, L);
 2720       // Die if stack mismatch
 2721       __ int3();
 2722       __ bind(L);
 2723     }

































 2724   %}
 2725 
 2726 %}
 2727 
 2728 // Operands for bound floating pointer register arguments
 2729 operand rxmm0() %{
 2730   constraint(ALLOC_IN_RC(xmm0_reg));
 2731   match(VecX);
 2732   format%{%}
 2733   interface(REG_INTER);
 2734 %}
 2735 
 2736 //----------OPERANDS-----------------------------------------------------------
 2737 // Operand definitions must precede instruction definitions for correct parsing
 2738 // in the ADLC because operands constitute user defined types which are used in
 2739 // instruction definitions.
 2740 
 2741 // Vectors
 2742 
 2743 // Dummy generic vector class. Should be used for all vector operands.

 2704 
 2705   uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
 2706     return MachNode::size(ra_);
 2707   }
 2708 
 2709 %}
 2710 
 2711 encode %{
 2712 
 2713   enc_class call_epilog %{
 2714     if (VerifyStackAtCalls) {
 2715       // Check that stack depth is unchanged: find majik cookie on stack
 2716       int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
 2717       Label L;
 2718       __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
 2719       __ jccb(Assembler::equal, L);
 2720       // Die if stack mismatch
 2721       __ int3();
 2722       __ bind(L);
 2723     }
 2724     if (tf()->returns_inline_type_as_fields() && !_method->is_method_handle_intrinsic() && _method->return_type()->is_loaded()) {
 2725       // The last return value is not set by the callee but used to pass the null marker to compiled code.
 2726       // Search for the corresponding projection, get the register and emit code that initialized it.
 2727       uint con = (tf()->range_cc()->cnt() - 1);
 2728       for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) {
 2729         ProjNode* proj = fast_out(i)->as_Proj();
 2730         if (proj->_con == con) {
 2731           // Set null marker if rax is non-null (a non-null value is returned buffered or scalarized)
 2732           OptoReg::Name optoReg = ra_->get_reg_first(proj);
 2733           VMReg reg = OptoReg::as_VMReg(optoReg, ra_->_framesize, OptoReg::reg2stack(ra_->_matcher._new_SP));
 2734           Register toReg = reg->is_reg() ? reg->as_Register() : rscratch1;
 2735           __ testq(rax, rax);
 2736           __ setb(Assembler::notZero, toReg);
 2737           __ movzbl(toReg, toReg);
 2738           if (reg->is_stack()) {
 2739             int st_off = reg->reg2stack() * VMRegImpl::stack_slot_size;
 2740             __ movq(Address(rsp, st_off), toReg);
 2741           }
 2742           break;
 2743         }
 2744       }
 2745       if (return_value_is_used()) {
 2746         // An inline type is returned as fields in multiple registers.
 2747         // Rax either contains an oop if the inline type is buffered or a pointer
 2748         // to the corresponding InlineKlass with the lowest bit set to 1. Zero rax
 2749         // if the lowest bit is set to allow C2 to use the oop after null checking.
 2750         // rax &= (rax & 1) - 1
 2751         __ movptr(rscratch1, rax);
 2752         __ andptr(rscratch1, 0x1);
 2753         __ subptr(rscratch1, 0x1);
 2754         __ andptr(rax, rscratch1);
 2755       }
 2756     }
 2757   %}
 2758 
 2759 %}
 2760 
 2761 // Operands for bound floating pointer register arguments
 2762 operand rxmm0() %{
 2763   constraint(ALLOC_IN_RC(xmm0_reg));
 2764   match(VecX);
 2765   format%{%}
 2766   interface(REG_INTER);
 2767 %}
 2768 
 2769 //----------OPERANDS-----------------------------------------------------------
 2770 // Operand definitions must precede instruction definitions for correct parsing
 2771 // in the ADLC because operands constitute user defined types which are used in
 2772 // instruction definitions.
 2773 
 2774 // Vectors
 2775 
 2776 // Dummy generic vector class. Should be used for all vector operands.
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