854 st->print("# stack alignment check");
855 #endif
856 }
857 if (C->stub_function() != NULL && BarrierSet::barrier_set()->barrier_set_nmethod() != NULL) {
858 st->print("\n\t");
859 st->print("cmpl [r15_thread + #disarmed_offset], #disarmed_value\t");
860 st->print("\n\t");
861 st->print("je fast_entry\t");
862 st->print("\n\t");
863 st->print("call #nmethod_entry_barrier_stub\t");
864 st->print("\n\tfast_entry:");
865 }
866 st->cr();
867 }
868 #endif
869
870 void MachPrologNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
871 Compile* C = ra_->C;
872 MacroAssembler _masm(&cbuf);
873
874 int framesize = C->frame_size_in_bytes();
875 int bangsize = C->bang_size_in_bytes();
876
877 if (C->clinit_barrier_on_entry()) {
878 assert(VM_Version::supports_fast_class_init_checks(), "sanity");
879 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
880
881 Label L_skip_barrier;
882 Register klass = rscratch1;
883
884 __ mov_metadata(klass, C->method()->holder()->constant_encoding());
885 __ clinit_barrier(klass, r15_thread, &L_skip_barrier /*L_fast_path*/);
886
887 __ jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub())); // slow path
888
889 __ bind(L_skip_barrier);
890 }
891
892 __ verified_entry(framesize, C->need_stack_bang(bangsize)?bangsize:0, false, C->stub_function() != NULL);
893
894 C->set_frame_complete(cbuf.insts_size());
895
896 if (C->has_mach_constant_base_node()) {
897 // NOTE: We set the table base offset here because users might be
898 // emitted before MachConstantBaseNode.
899 Compile::ConstantTable& constant_table = C->constant_table();
900 constant_table.set_table_base_offset(constant_table.calculate_table_base_offset());
901 }
902 }
903
904 uint MachPrologNode::size(PhaseRegAlloc* ra_) const
905 {
906 return MachNode::size(ra_); // too many variables; just compute it
907 // the hard way
908 }
909
910 int MachPrologNode::reloc() const
911 {
912 return 0; // a large enough number
946 "# Safepoint: poll for GC");
947 } else {
948 st->print_cr("testl rax, [rip + #offset_to_poll_page]\t"
949 "# Safepoint: poll for GC");
950 }
951 }
952 }
953 #endif
954
955 void MachEpilogNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const
956 {
957 Compile* C = ra_->C;
958 MacroAssembler _masm(&cbuf);
959
960 if (generate_vzeroupper(C)) {
961 // Clear upper bits of YMM registers when current compiled code uses
962 // wide vectors to avoid AVX <-> SSE transition penalty during call.
963 __ vzeroupper();
964 }
965
966 int framesize = C->frame_size_in_bytes();
967 assert((framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
968 // Remove word for return adr already pushed
969 // and RBP
970 framesize -= 2*wordSize;
971
972 // Note that VerifyStackAtCalls' Majik cookie does not change the frame size popped here
973
974 if (framesize) {
975 emit_opcode(cbuf, Assembler::REX_W);
976 if (framesize < 0x80) {
977 emit_opcode(cbuf, 0x83); // addq rsp, #framesize
978 emit_rm(cbuf, 0x3, 0x00, RSP_enc);
979 emit_d8(cbuf, framesize);
980 } else {
981 emit_opcode(cbuf, 0x81); // addq rsp, #framesize
982 emit_rm(cbuf, 0x3, 0x00, RSP_enc);
983 emit_d32(cbuf, framesize);
984 }
985 }
986
987 // popq rbp
988 emit_opcode(cbuf, 0x58 | RBP_enc);
989
990 if (StackReservedPages > 0 && C->has_reserved_stack_access()) {
991 __ reserved_stack_check();
992 }
993
994 if (do_polling() && C->is_method_compilation()) {
995 MacroAssembler _masm(&cbuf);
996 if (SafepointMechanism::uses_thread_local_poll()) {
997 __ movq(rscratch1, Address(r15_thread, Thread::polling_page_offset()));
998 __ relocate(relocInfo::poll_return_type);
999 __ testl(rax, Address(rscratch1, 0));
1000 } else {
1001 AddressLiteral polling_page(os::get_polling_page(), relocInfo::poll_return_type);
1002 if (Assembler::is_polling_page_far()) {
1003 __ lea(rscratch1, polling_page);
1004 __ relocate(relocInfo::poll_return_type);
1005 __ testl(rax, Address(rscratch1, 0));
1006 } else {
1007 __ testl(rax, polling_page);
1008 }
1541 emit_rm(cbuf, 0x2, reg & 7, 0x04);
1542 emit_rm(cbuf, 0x0, 0x04, RSP_enc);
1543 emit_d32(cbuf, offset);
1544 } else {
1545 emit_opcode(cbuf, reg < 8 ? Assembler::REX_W : Assembler::REX_WR);
1546 emit_opcode(cbuf, 0x8D); // LEA reg,[SP+offset]
1547 emit_rm(cbuf, 0x1, reg & 7, 0x04);
1548 emit_rm(cbuf, 0x0, 0x04, RSP_enc);
1549 emit_d8(cbuf, offset);
1550 }
1551 }
1552
1553 uint BoxLockNode::size(PhaseRegAlloc *ra_) const
1554 {
1555 int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
1556 return (offset < 0x80) ? 5 : 8; // REX
1557 }
1558
1559 //=============================================================================
1560 #ifndef PRODUCT
1561 void MachUEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
1562 {
1563 if (UseCompressedClassPointers) {
1564 st->print_cr("movl rscratch1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass");
1565 st->print_cr("\tdecode_klass_not_null rscratch1, rscratch1");
1566 st->print_cr("\tcmpq rax, rscratch1\t # Inline cache check");
1567 } else {
1568 st->print_cr("\tcmpq rax, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t"
1569 "# Inline cache check");
1570 }
1571 st->print_cr("\tjne SharedRuntime::_ic_miss_stub");
1572 st->print_cr("\tnop\t# nops to align entry point");
1573 }
1574 #endif
1575
1576 void MachUEPNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const
1577 {
1578 MacroAssembler masm(&cbuf);
1579 uint insts_size = cbuf.insts_size();
1580 if (UseCompressedClassPointers) {
6888 format %{ "MEMBAR-storestore (empty encoding)" %}
6889 ins_encode( );
6890 ins_pipe(empty);
6891 %}
6892
6893 //----------Move Instructions--------------------------------------------------
6894
6895 instruct castX2P(rRegP dst, rRegL src)
6896 %{
6897 match(Set dst (CastX2P src));
6898
6899 format %{ "movq $dst, $src\t# long->ptr" %}
6900 ins_encode %{
6901 if ($dst$$reg != $src$$reg) {
6902 __ movptr($dst$$Register, $src$$Register);
6903 }
6904 %}
6905 ins_pipe(ialu_reg_reg); // XXX
6906 %}
6907
6908 instruct castP2X(rRegL dst, rRegP src)
6909 %{
6910 match(Set dst (CastP2X src));
6911
6912 format %{ "movq $dst, $src\t# ptr -> long" %}
6913 ins_encode %{
6914 if ($dst$$reg != $src$$reg) {
6915 __ movptr($dst$$Register, $src$$Register);
6916 }
6917 %}
6918 ins_pipe(ialu_reg_reg); // XXX
6919 %}
6920
6921 // Convert oop into int for vectors alignment masking
6922 instruct convP2I(rRegI dst, rRegP src)
6923 %{
6924 match(Set dst (ConvL2I (CastP2X src)));
6925
6926 format %{ "movl $dst, $src\t# ptr -> int" %}
6927 ins_encode %{
6928 __ movl($dst$$Register, $src$$Register);
6929 %}
6930 ins_pipe(ialu_reg_reg); // XXX
6931 %}
6932
6933 // Convert compressed oop into int for vectors alignment masking
6934 // in case of 32bit oops (heap < 4Gb).
6935 instruct convN2I(rRegI dst, rRegN src)
6936 %{
6937 predicate(CompressedOops::shift() == 0);
6938 match(Set dst (ConvL2I (CastP2X (DecodeN src))));
6939
6940 format %{ "movl $dst, $src\t# compressed ptr -> int" %}
11169 ins_encode %{
11170 __ movdl($dst$$XMMRegister, $src$$Register);
11171 %}
11172 ins_pipe( pipe_slow );
11173 %}
11174
11175 instruct MoveL2D_reg_reg(regD dst, rRegL src) %{
11176 match(Set dst (MoveL2D src));
11177 effect(DEF dst, USE src);
11178 ins_cost(100);
11179 format %{ "movd $dst,$src\t# MoveL2D" %}
11180 ins_encode %{
11181 __ movdq($dst$$XMMRegister, $src$$Register);
11182 %}
11183 ins_pipe( pipe_slow );
11184 %}
11185
11186
11187 // =======================================================================
11188 // fast clearing of an array
11189 instruct rep_stos(rcx_RegL cnt, rdi_RegP base, regD tmp, rax_RegI zero,
11190 Universe dummy, rFlagsReg cr)
11191 %{
11192 predicate(!((ClearArrayNode*)n)->is_large());
11193 match(Set dummy (ClearArray cnt base));
11194 effect(USE_KILL cnt, USE_KILL base, TEMP tmp, KILL zero, KILL cr);
11195
11196 format %{ $$template
11197 $$emit$$"xorq rax, rax\t# ClearArray:\n\t"
11198 $$emit$$"cmp InitArrayShortSize,rcx\n\t"
11199 $$emit$$"jg LARGE\n\t"
11200 $$emit$$"dec rcx\n\t"
11201 $$emit$$"js DONE\t# Zero length\n\t"
11202 $$emit$$"mov rax,(rdi,rcx,8)\t# LOOP\n\t"
11203 $$emit$$"dec rcx\n\t"
11204 $$emit$$"jge LOOP\n\t"
11205 $$emit$$"jmp DONE\n\t"
11206 $$emit$$"# LARGE:\n\t"
11207 if (UseFastStosb) {
11208 $$emit$$"shlq rcx,3\t# Convert doublewords to bytes\n\t"
11209 $$emit$$"rep stosb\t# Store rax to *rdi++ while rcx--\n\t"
11210 } else if (UseXMMForObjInit) {
11211 $$emit$$"mov rdi,rax\n\t"
11212 $$emit$$"vpxor ymm0,ymm0,ymm0\n\t"
11213 $$emit$$"jmpq L_zero_64_bytes\n\t"
11214 $$emit$$"# L_loop:\t# 64-byte LOOP\n\t"
11215 $$emit$$"vmovdqu ymm0,(rax)\n\t"
11216 $$emit$$"vmovdqu ymm0,0x20(rax)\n\t"
11217 $$emit$$"add 0x40,rax\n\t"
11218 $$emit$$"# L_zero_64_bytes:\n\t"
11219 $$emit$$"sub 0x8,rcx\n\t"
11220 $$emit$$"jge L_loop\n\t"
11221 $$emit$$"add 0x4,rcx\n\t"
11222 $$emit$$"jl L_tail\n\t"
11223 $$emit$$"vmovdqu ymm0,(rax)\n\t"
11224 $$emit$$"add 0x20,rax\n\t"
11225 $$emit$$"sub 0x4,rcx\n\t"
11226 $$emit$$"# L_tail:\t# Clearing tail bytes\n\t"
11227 $$emit$$"add 0x4,rcx\n\t"
11228 $$emit$$"jle L_end\n\t"
11229 $$emit$$"dec rcx\n\t"
11230 $$emit$$"# L_sloop:\t# 8-byte short loop\n\t"
11231 $$emit$$"vmovq xmm0,(rax)\n\t"
11232 $$emit$$"add 0x8,rax\n\t"
11233 $$emit$$"dec rcx\n\t"
11234 $$emit$$"jge L_sloop\n\t"
11235 $$emit$$"# L_end:\n\t"
11236 } else {
11237 $$emit$$"rep stosq\t# Store rax to *rdi++ while rcx--\n\t"
11238 }
11239 $$emit$$"# DONE"
11240 %}
11241 ins_encode %{
11242 __ clear_mem($base$$Register, $cnt$$Register, $zero$$Register,
11243 $tmp$$XMMRegister, false);
11244 %}
11245 ins_pipe(pipe_slow);
11246 %}
11247
11248 instruct rep_stos_large(rcx_RegL cnt, rdi_RegP base, regD tmp, rax_RegI zero,
11249 Universe dummy, rFlagsReg cr)
11250 %{
11251 predicate(((ClearArrayNode*)n)->is_large());
11252 match(Set dummy (ClearArray cnt base));
11253 effect(USE_KILL cnt, USE_KILL base, TEMP tmp, KILL zero, KILL cr);
11254
11255 format %{ $$template
11256 if (UseFastStosb) {
11257 $$emit$$"xorq rax, rax\t# ClearArray:\n\t"
11258 $$emit$$"shlq rcx,3\t# Convert doublewords to bytes\n\t"
11259 $$emit$$"rep stosb\t# Store rax to *rdi++ while rcx--"
11260 } else if (UseXMMForObjInit) {
11261 $$emit$$"mov rdi,rax\t# ClearArray:\n\t"
11262 $$emit$$"vpxor ymm0,ymm0,ymm0\n\t"
11263 $$emit$$"jmpq L_zero_64_bytes\n\t"
11264 $$emit$$"# L_loop:\t# 64-byte LOOP\n\t"
11265 $$emit$$"vmovdqu ymm0,(rax)\n\t"
11266 $$emit$$"vmovdqu ymm0,0x20(rax)\n\t"
11267 $$emit$$"add 0x40,rax\n\t"
11268 $$emit$$"# L_zero_64_bytes:\n\t"
11269 $$emit$$"sub 0x8,rcx\n\t"
11270 $$emit$$"jge L_loop\n\t"
11271 $$emit$$"add 0x4,rcx\n\t"
11272 $$emit$$"jl L_tail\n\t"
11273 $$emit$$"vmovdqu ymm0,(rax)\n\t"
11274 $$emit$$"add 0x20,rax\n\t"
11275 $$emit$$"sub 0x4,rcx\n\t"
11276 $$emit$$"# L_tail:\t# Clearing tail bytes\n\t"
11277 $$emit$$"add 0x4,rcx\n\t"
11278 $$emit$$"jle L_end\n\t"
11279 $$emit$$"dec rcx\n\t"
11280 $$emit$$"# L_sloop:\t# 8-byte short loop\n\t"
11281 $$emit$$"vmovq xmm0,(rax)\n\t"
11282 $$emit$$"add 0x8,rax\n\t"
11283 $$emit$$"dec rcx\n\t"
11284 $$emit$$"jge L_sloop\n\t"
11285 $$emit$$"# L_end:\n\t"
11286 } else {
11287 $$emit$$"xorq rax, rax\t# ClearArray:\n\t"
11288 $$emit$$"rep stosq\t# Store rax to *rdi++ while rcx--"
11289 }
11290 %}
11291 ins_encode %{
11292 __ clear_mem($base$$Register, $cnt$$Register, $zero$$Register,
11293 $tmp$$XMMRegister, true);
11294 %}
11295 ins_pipe(pipe_slow);
11296 %}
11297
11298 instruct string_compareL(rdi_RegP str1, rcx_RegI cnt1, rsi_RegP str2, rdx_RegI cnt2,
11299 rax_RegI result, legVecS tmp1, rFlagsReg cr)
11300 %{
11301 predicate(((StrCompNode*)n)->encoding() == StrIntrinsicNode::LL);
11302 match(Set result (StrComp (Binary str1 cnt1) (Binary str2 cnt2)));
11303 effect(TEMP tmp1, USE_KILL str1, USE_KILL str2, USE_KILL cnt1, USE_KILL cnt2, KILL cr);
11304
11305 format %{ "String Compare byte[] $str1,$cnt1,$str2,$cnt2 -> $result // KILL $tmp1" %}
11306 ins_encode %{
11307 __ string_compare($str1$$Register, $str2$$Register,
11308 $cnt1$$Register, $cnt2$$Register, $result$$Register,
11309 $tmp1$$XMMRegister, StrIntrinsicNode::LL);
11310 %}
11311 ins_pipe( pipe_slow );
11312 %}
11313
11838 instruct testI_reg_imm(rFlagsReg cr, rRegI src, immI con, immI0 zero)
11839 %{
11840 match(Set cr (CmpI (AndI src con) zero));
11841
11842 format %{ "testl $src, $con" %}
11843 opcode(0xF7, 0x00);
11844 ins_encode(REX_reg(src), OpcP, reg_opc(src), Con32(con));
11845 ins_pipe(ialu_cr_reg_imm);
11846 %}
11847
11848 instruct testI_reg_mem(rFlagsReg cr, rRegI src, memory mem, immI0 zero)
11849 %{
11850 match(Set cr (CmpI (AndI src (LoadI mem)) zero));
11851
11852 format %{ "testl $src, $mem" %}
11853 opcode(0x85);
11854 ins_encode(REX_reg_mem(src, mem), OpcP, reg_mem(src, mem));
11855 ins_pipe(ialu_cr_reg_mem);
11856 %}
11857
11858 // Unsigned compare Instructions; really, same as signed except they
11859 // produce an rFlagsRegU instead of rFlagsReg.
11860 instruct compU_rReg(rFlagsRegU cr, rRegI op1, rRegI op2)
11861 %{
11862 match(Set cr (CmpU op1 op2));
11863
11864 format %{ "cmpl $op1, $op2\t# unsigned" %}
11865 opcode(0x3B); /* Opcode 3B /r */
11866 ins_encode(REX_reg_reg(op1, op2), OpcP, reg_reg(op1, op2));
11867 ins_pipe(ialu_cr_reg_reg);
11868 %}
11869
11870 instruct compU_rReg_imm(rFlagsRegU cr, rRegI op1, immI op2)
11871 %{
11872 match(Set cr (CmpU op1 op2));
11873
11874 format %{ "cmpl $op1, $op2\t# unsigned" %}
11875 opcode(0x81,0x07); /* Opcode 81 /7 */
11876 ins_encode(OpcSErm(op1, op2), Con8or32(op2));
11877 ins_pipe(ialu_cr_reg_imm);
12146 instruct testL_reg_mem(rFlagsReg cr, rRegL src, memory mem, immL0 zero)
12147 %{
12148 match(Set cr (CmpL (AndL src (LoadL mem)) zero));
12149
12150 format %{ "testq $src, $mem" %}
12151 opcode(0x85);
12152 ins_encode(REX_reg_mem_wide(src, mem), OpcP, reg_mem(src, mem));
12153 ins_pipe(ialu_cr_reg_mem);
12154 %}
12155
12156 instruct testL_reg_mem2(rFlagsReg cr, rRegP src, memory mem, immL0 zero)
12157 %{
12158 match(Set cr (CmpL (AndL (CastP2X src) (LoadL mem)) zero));
12159
12160 format %{ "testq $src, $mem" %}
12161 opcode(0x85);
12162 ins_encode(REX_reg_mem_wide(src, mem), OpcP, reg_mem(src, mem));
12163 ins_pipe(ialu_cr_reg_mem);
12164 %}
12165
12166 // Manifest a CmpL result in an integer register. Very painful.
12167 // This is the test to avoid.
12168 instruct cmpL3_reg_reg(rRegI dst, rRegL src1, rRegL src2, rFlagsReg flags)
12169 %{
12170 match(Set dst (CmpL3 src1 src2));
12171 effect(KILL flags);
12172
12173 ins_cost(275); // XXX
12174 format %{ "cmpq $src1, $src2\t# CmpL3\n\t"
12175 "movl $dst, -1\n\t"
12176 "jl,s done\n\t"
12177 "setne $dst\n\t"
12178 "movzbl $dst, $dst\n\t"
12179 "done:" %}
12180 ins_encode(cmpl3_flag(src1, src2, dst));
12181 ins_pipe(pipe_slow);
12182 %}
12183
12184 // Unsigned long compare Instructions; really, same as signed long except they
12185 // produce an rFlagsRegU instead of rFlagsReg.
12846
12847 ins_cost(300);
12848 format %{ "call,runtime " %}
12849 ins_encode(clear_avx, Java_To_Runtime(meth));
12850 ins_pipe(pipe_slow);
12851 %}
12852
12853 // Call runtime without safepoint
12854 instruct CallLeafDirect(method meth)
12855 %{
12856 match(CallLeaf);
12857 effect(USE meth);
12858
12859 ins_cost(300);
12860 format %{ "call_leaf,runtime " %}
12861 ins_encode(clear_avx, Java_To_Runtime(meth));
12862 ins_pipe(pipe_slow);
12863 %}
12864
12865 // Call runtime without safepoint
12866 instruct CallLeafNoFPDirect(method meth)
12867 %{
12868 match(CallLeafNoFP);
12869 effect(USE meth);
12870
12871 ins_cost(300);
12872 format %{ "call_leaf_nofp,runtime " %}
12873 ins_encode(clear_avx, Java_To_Runtime(meth));
12874 ins_pipe(pipe_slow);
12875 %}
12876
12877 // Return Instruction
12878 // Remove the return address & jump to it.
12879 // Notice: We always emit a nop after a ret to make sure there is room
12880 // for safepoint patching
12881 instruct Ret()
12882 %{
12883 match(Return);
12884
12885 format %{ "ret" %}
12886 opcode(0xC3);
12887 ins_encode(OpcP);
|
854 st->print("# stack alignment check");
855 #endif
856 }
857 if (C->stub_function() != NULL && BarrierSet::barrier_set()->barrier_set_nmethod() != NULL) {
858 st->print("\n\t");
859 st->print("cmpl [r15_thread + #disarmed_offset], #disarmed_value\t");
860 st->print("\n\t");
861 st->print("je fast_entry\t");
862 st->print("\n\t");
863 st->print("call #nmethod_entry_barrier_stub\t");
864 st->print("\n\tfast_entry:");
865 }
866 st->cr();
867 }
868 #endif
869
870 void MachPrologNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
871 Compile* C = ra_->C;
872 MacroAssembler _masm(&cbuf);
873
874 if (C->clinit_barrier_on_entry()) {
875 assert(VM_Version::supports_fast_class_init_checks(), "sanity");
876 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
877
878 Label L_skip_barrier;
879 Register klass = rscratch1;
880
881 __ mov_metadata(klass, C->method()->holder()->constant_encoding());
882 __ clinit_barrier(klass, r15_thread, &L_skip_barrier /*L_fast_path*/);
883
884 __ jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub())); // slow path
885
886 __ bind(L_skip_barrier);
887 }
888
889 __ verified_entry(C);
890 __ bind(*_verified_entry);
891
892 C->set_frame_complete(cbuf.insts_size());
893
894 if (C->has_mach_constant_base_node()) {
895 // NOTE: We set the table base offset here because users might be
896 // emitted before MachConstantBaseNode.
897 Compile::ConstantTable& constant_table = C->constant_table();
898 constant_table.set_table_base_offset(constant_table.calculate_table_base_offset());
899 }
900 }
901
902 uint MachPrologNode::size(PhaseRegAlloc* ra_) const
903 {
904 return MachNode::size(ra_); // too many variables; just compute it
905 // the hard way
906 }
907
908 int MachPrologNode::reloc() const
909 {
910 return 0; // a large enough number
944 "# Safepoint: poll for GC");
945 } else {
946 st->print_cr("testl rax, [rip + #offset_to_poll_page]\t"
947 "# Safepoint: poll for GC");
948 }
949 }
950 }
951 #endif
952
953 void MachEpilogNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const
954 {
955 Compile* C = ra_->C;
956 MacroAssembler _masm(&cbuf);
957
958 if (generate_vzeroupper(C)) {
959 // Clear upper bits of YMM registers when current compiled code uses
960 // wide vectors to avoid AVX <-> SSE transition penalty during call.
961 __ vzeroupper();
962 }
963
964 __ restore_stack(C);
965
966
967 if (StackReservedPages > 0 && C->has_reserved_stack_access()) {
968 __ reserved_stack_check();
969 }
970
971 if (do_polling() && C->is_method_compilation()) {
972 MacroAssembler _masm(&cbuf);
973 if (SafepointMechanism::uses_thread_local_poll()) {
974 __ movq(rscratch1, Address(r15_thread, Thread::polling_page_offset()));
975 __ relocate(relocInfo::poll_return_type);
976 __ testl(rax, Address(rscratch1, 0));
977 } else {
978 AddressLiteral polling_page(os::get_polling_page(), relocInfo::poll_return_type);
979 if (Assembler::is_polling_page_far()) {
980 __ lea(rscratch1, polling_page);
981 __ relocate(relocInfo::poll_return_type);
982 __ testl(rax, Address(rscratch1, 0));
983 } else {
984 __ testl(rax, polling_page);
985 }
1518 emit_rm(cbuf, 0x2, reg & 7, 0x04);
1519 emit_rm(cbuf, 0x0, 0x04, RSP_enc);
1520 emit_d32(cbuf, offset);
1521 } else {
1522 emit_opcode(cbuf, reg < 8 ? Assembler::REX_W : Assembler::REX_WR);
1523 emit_opcode(cbuf, 0x8D); // LEA reg,[SP+offset]
1524 emit_rm(cbuf, 0x1, reg & 7, 0x04);
1525 emit_rm(cbuf, 0x0, 0x04, RSP_enc);
1526 emit_d8(cbuf, offset);
1527 }
1528 }
1529
1530 uint BoxLockNode::size(PhaseRegAlloc *ra_) const
1531 {
1532 int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
1533 return (offset < 0x80) ? 5 : 8; // REX
1534 }
1535
1536 //=============================================================================
1537 #ifndef PRODUCT
1538 void MachVEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
1539 {
1540 st->print_cr("MachVEPNode");
1541 }
1542 #endif
1543
1544 void MachVEPNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const
1545 {
1546 MacroAssembler masm(&cbuf);
1547 if (!_verified) {
1548 uint insts_size = cbuf.insts_size();
1549 if (UseCompressedClassPointers) {
1550 masm.load_klass(rscratch1, j_rarg0);
1551 masm.cmpptr(rax, rscratch1);
1552 } else {
1553 masm.cmpptr(rax, Address(j_rarg0, oopDesc::klass_offset_in_bytes()));
1554 }
1555 masm.jump_cc(Assembler::notEqual, RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1556 } else {
1557 // Unpack value type args passed as oop and then jump to
1558 // the verified entry point (skipping the unverified entry).
1559 masm.unpack_value_args(ra_->C, _receiver_only);
1560 masm.jmp(*_verified_entry);
1561 }
1562 }
1563
1564 uint MachVEPNode::size(PhaseRegAlloc* ra_) const
1565 {
1566 return MachNode::size(ra_); // too many variables; just compute it the hard way
1567 }
1568
1569 //=============================================================================
1570 #ifndef PRODUCT
1571 void MachUEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
1572 {
1573 if (UseCompressedClassPointers) {
1574 st->print_cr("movl rscratch1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass");
1575 st->print_cr("\tdecode_klass_not_null rscratch1, rscratch1");
1576 st->print_cr("\tcmpq rax, rscratch1\t # Inline cache check");
1577 } else {
1578 st->print_cr("\tcmpq rax, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t"
1579 "# Inline cache check");
1580 }
1581 st->print_cr("\tjne SharedRuntime::_ic_miss_stub");
1582 st->print_cr("\tnop\t# nops to align entry point");
1583 }
1584 #endif
1585
1586 void MachUEPNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const
1587 {
1588 MacroAssembler masm(&cbuf);
1589 uint insts_size = cbuf.insts_size();
1590 if (UseCompressedClassPointers) {
6898 format %{ "MEMBAR-storestore (empty encoding)" %}
6899 ins_encode( );
6900 ins_pipe(empty);
6901 %}
6902
6903 //----------Move Instructions--------------------------------------------------
6904
6905 instruct castX2P(rRegP dst, rRegL src)
6906 %{
6907 match(Set dst (CastX2P src));
6908
6909 format %{ "movq $dst, $src\t# long->ptr" %}
6910 ins_encode %{
6911 if ($dst$$reg != $src$$reg) {
6912 __ movptr($dst$$Register, $src$$Register);
6913 }
6914 %}
6915 ins_pipe(ialu_reg_reg); // XXX
6916 %}
6917
6918 instruct castN2X(rRegL dst, rRegN src)
6919 %{
6920 match(Set dst (CastP2X src));
6921
6922 format %{ "movq $dst, $src\t# ptr -> long" %}
6923 ins_encode %{
6924 if ($dst$$reg != $src$$reg) {
6925 __ movptr($dst$$Register, $src$$Register);
6926 }
6927 %}
6928 ins_pipe(ialu_reg_reg); // XXX
6929 %}
6930
6931 instruct castP2X(rRegL dst, rRegP src)
6932 %{
6933 match(Set dst (CastP2X src));
6934
6935 format %{ "movq $dst, $src\t# ptr -> long" %}
6936 ins_encode %{
6937 if ($dst$$reg != $src$$reg) {
6938 __ movptr($dst$$Register, $src$$Register);
6939 }
6940 %}
6941 ins_pipe(ialu_reg_reg); // XXX
6942 %}
6943
6944 instruct castN2I(rRegI dst, rRegN src)
6945 %{
6946 match(Set dst (CastN2I src));
6947
6948 format %{ "movl $dst, $src\t# compressed ptr -> int" %}
6949 ins_encode %{
6950 if ($dst$$reg != $src$$reg) {
6951 __ movl($dst$$Register, $src$$Register);
6952 }
6953 %}
6954 ins_pipe(ialu_reg_reg); // XXX
6955 %}
6956
6957 instruct castI2N(rRegN dst, rRegI src)
6958 %{
6959 match(Set dst (CastI2N src));
6960
6961 format %{ "movl $dst, $src\t# int -> compressed ptr" %}
6962 ins_encode %{
6963 if ($dst$$reg != $src$$reg) {
6964 __ movl($dst$$Register, $src$$Register);
6965 }
6966 %}
6967 ins_pipe(ialu_reg_reg); // XXX
6968 %}
6969
6970
6971 // Convert oop into int for vectors alignment masking
6972 instruct convP2I(rRegI dst, rRegP src)
6973 %{
6974 match(Set dst (ConvL2I (CastP2X src)));
6975
6976 format %{ "movl $dst, $src\t# ptr -> int" %}
6977 ins_encode %{
6978 __ movl($dst$$Register, $src$$Register);
6979 %}
6980 ins_pipe(ialu_reg_reg); // XXX
6981 %}
6982
6983 // Convert compressed oop into int for vectors alignment masking
6984 // in case of 32bit oops (heap < 4Gb).
6985 instruct convN2I(rRegI dst, rRegN src)
6986 %{
6987 predicate(CompressedOops::shift() == 0);
6988 match(Set dst (ConvL2I (CastP2X (DecodeN src))));
6989
6990 format %{ "movl $dst, $src\t# compressed ptr -> int" %}
11219 ins_encode %{
11220 __ movdl($dst$$XMMRegister, $src$$Register);
11221 %}
11222 ins_pipe( pipe_slow );
11223 %}
11224
11225 instruct MoveL2D_reg_reg(regD dst, rRegL src) %{
11226 match(Set dst (MoveL2D src));
11227 effect(DEF dst, USE src);
11228 ins_cost(100);
11229 format %{ "movd $dst,$src\t# MoveL2D" %}
11230 ins_encode %{
11231 __ movdq($dst$$XMMRegister, $src$$Register);
11232 %}
11233 ins_pipe( pipe_slow );
11234 %}
11235
11236
11237 // =======================================================================
11238 // fast clearing of an array
11239 instruct rep_stos(rcx_RegL cnt, rdi_RegP base, regD tmp, rax_RegL val,
11240 Universe dummy, rFlagsReg cr)
11241 %{
11242 predicate(!((ClearArrayNode*)n)->is_large() && !((ClearArrayNode*)n)->word_copy_only());
11243 match(Set dummy (ClearArray (Binary cnt base) val));
11244 effect(USE_KILL cnt, USE_KILL base, TEMP tmp, KILL cr);
11245
11246 format %{ $$template
11247 $$emit$$"cmp InitArrayShortSize,rcx\n\t"
11248 $$emit$$"jg LARGE\n\t"
11249 $$emit$$"dec rcx\n\t"
11250 $$emit$$"js DONE\t# Zero length\n\t"
11251 $$emit$$"mov rax,(rdi,rcx,8)\t# LOOP\n\t"
11252 $$emit$$"dec rcx\n\t"
11253 $$emit$$"jge LOOP\n\t"
11254 $$emit$$"jmp DONE\n\t"
11255 $$emit$$"# LARGE:\n\t"
11256 if (UseFastStosb) {
11257 $$emit$$"shlq rcx,3\t# Convert doublewords to bytes\n\t"
11258 $$emit$$"rep stosb\t# Store rax to *rdi++ while rcx--\n\t"
11259 } else if (UseXMMForObjInit) {
11260 $$emit$$"movdq $tmp, $val\n\t"
11261 $$emit$$"punpcklqdq $tmp, $tmp\n\t"
11262 $$emit$$"vinserti128_high $tmp, $tmp\n\t"
11263 $$emit$$"jmpq L_zero_64_bytes\n\t"
11264 $$emit$$"# L_loop:\t# 64-byte LOOP\n\t"
11265 $$emit$$"vmovdqu $tmp,(rax)\n\t"
11266 $$emit$$"vmovdqu $tmp,0x20(rax)\n\t"
11267 $$emit$$"add 0x40,rax\n\t"
11268 $$emit$$"# L_zero_64_bytes:\n\t"
11269 $$emit$$"sub 0x8,rcx\n\t"
11270 $$emit$$"jge L_loop\n\t"
11271 $$emit$$"add 0x4,rcx\n\t"
11272 $$emit$$"jl L_tail\n\t"
11273 $$emit$$"vmovdqu $tmp,(rax)\n\t"
11274 $$emit$$"add 0x20,rax\n\t"
11275 $$emit$$"sub 0x4,rcx\n\t"
11276 $$emit$$"# L_tail:\t# Clearing tail bytes\n\t"
11277 $$emit$$"add 0x4,rcx\n\t"
11278 $$emit$$"jle L_end\n\t"
11279 $$emit$$"dec rcx\n\t"
11280 $$emit$$"# L_sloop:\t# 8-byte short loop\n\t"
11281 $$emit$$"vmovq xmm0,(rax)\n\t"
11282 $$emit$$"add 0x8,rax\n\t"
11283 $$emit$$"dec rcx\n\t"
11284 $$emit$$"jge L_sloop\n\t"
11285 $$emit$$"# L_end:\n\t"
11286 } else {
11287 $$emit$$"rep stosq\t# Store rax to *rdi++ while rcx--\n\t"
11288 }
11289 $$emit$$"# DONE"
11290 %}
11291 ins_encode %{
11292 __ clear_mem($base$$Register, $cnt$$Register, $val$$Register,
11293 $tmp$$XMMRegister, false, false);
11294 %}
11295 ins_pipe(pipe_slow);
11296 %}
11297
11298 instruct rep_stos_word_copy(rcx_RegL cnt, rdi_RegP base, regD tmp, rax_RegL val,
11299 Universe dummy, rFlagsReg cr)
11300 %{
11301 predicate(!((ClearArrayNode*)n)->is_large() && ((ClearArrayNode*)n)->word_copy_only());
11302 match(Set dummy (ClearArray (Binary cnt base) val));
11303 effect(USE_KILL cnt, USE_KILL base, TEMP tmp, KILL cr);
11304
11305 format %{ $$template
11306 $$emit$$"cmp InitArrayShortSize,rcx\n\t"
11307 $$emit$$"jg LARGE\n\t"
11308 $$emit$$"dec rcx\n\t"
11309 $$emit$$"js DONE\t# Zero length\n\t"
11310 $$emit$$"mov rax,(rdi,rcx,8)\t# LOOP\n\t"
11311 $$emit$$"dec rcx\n\t"
11312 $$emit$$"jge LOOP\n\t"
11313 $$emit$$"jmp DONE\n\t"
11314 $$emit$$"# LARGE:\n\t"
11315 if (UseXMMForObjInit) {
11316 $$emit$$"movdq $tmp, $val\n\t"
11317 $$emit$$"punpcklqdq $tmp, $tmp\n\t"
11318 $$emit$$"vinserti128_high $tmp, $tmp\n\t"
11319 $$emit$$"jmpq L_zero_64_bytes\n\t"
11320 $$emit$$"# L_loop:\t# 64-byte LOOP\n\t"
11321 $$emit$$"vmovdqu $tmp,(rax)\n\t"
11322 $$emit$$"vmovdqu $tmp,0x20(rax)\n\t"
11323 $$emit$$"add 0x40,rax\n\t"
11324 $$emit$$"# L_zero_64_bytes:\n\t"
11325 $$emit$$"sub 0x8,rcx\n\t"
11326 $$emit$$"jge L_loop\n\t"
11327 $$emit$$"add 0x4,rcx\n\t"
11328 $$emit$$"jl L_tail\n\t"
11329 $$emit$$"vmovdqu $tmp,(rax)\n\t"
11330 $$emit$$"add 0x20,rax\n\t"
11331 $$emit$$"sub 0x4,rcx\n\t"
11332 $$emit$$"# L_tail:\t# Clearing tail bytes\n\t"
11333 $$emit$$"add 0x4,rcx\n\t"
11334 $$emit$$"jle L_end\n\t"
11335 $$emit$$"dec rcx\n\t"
11336 $$emit$$"# L_sloop:\t# 8-byte short loop\n\t"
11337 $$emit$$"vmovq xmm0,(rax)\n\t"
11338 $$emit$$"add 0x8,rax\n\t"
11339 $$emit$$"dec rcx\n\t"
11340 $$emit$$"jge L_sloop\n\t"
11341 $$emit$$"# L_end:\n\t"
11342 } else {
11343 $$emit$$"rep stosq\t# Store rax to *rdi++ while rcx--\n\t"
11344 }
11345 $$emit$$"# DONE"
11346 %}
11347 ins_encode %{
11348 __ clear_mem($base$$Register, $cnt$$Register, $val$$Register,
11349 $tmp$$XMMRegister, false, true);
11350 %}
11351 ins_pipe(pipe_slow);
11352 %}
11353
11354 instruct rep_stos_large(rcx_RegL cnt, rdi_RegP base, regD tmp, rax_RegL val,
11355 Universe dummy, rFlagsReg cr)
11356 %{
11357 predicate(((ClearArrayNode*)n)->is_large() && !((ClearArrayNode*)n)->word_copy_only());
11358 match(Set dummy (ClearArray (Binary cnt base) val));
11359 effect(USE_KILL cnt, USE_KILL base, TEMP tmp, KILL cr);
11360
11361 format %{ $$template
11362 if (UseFastStosb) {
11363 $$emit$$"shlq rcx,3\t# Convert doublewords to bytes\n\t"
11364 $$emit$$"rep stosb\t# Store rax to *rdi++ while rcx--"
11365 } else if (UseXMMForObjInit) {
11366 $$emit$$"movdq $tmp, $val\n\t"
11367 $$emit$$"punpcklqdq $tmp, $tmp\n\t"
11368 $$emit$$"vinserti128_high $tmp, $tmp\n\t"
11369 $$emit$$"jmpq L_zero_64_bytes\n\t"
11370 $$emit$$"# L_loop:\t# 64-byte LOOP\n\t"
11371 $$emit$$"vmovdqu $tmp,(rax)\n\t"
11372 $$emit$$"vmovdqu $tmp,0x20(rax)\n\t"
11373 $$emit$$"add 0x40,rax\n\t"
11374 $$emit$$"# L_zero_64_bytes:\n\t"
11375 $$emit$$"sub 0x8,rcx\n\t"
11376 $$emit$$"jge L_loop\n\t"
11377 $$emit$$"add 0x4,rcx\n\t"
11378 $$emit$$"jl L_tail\n\t"
11379 $$emit$$"vmovdqu $tmp,(rax)\n\t"
11380 $$emit$$"add 0x20,rax\n\t"
11381 $$emit$$"sub 0x4,rcx\n\t"
11382 $$emit$$"# L_tail:\t# Clearing tail bytes\n\t"
11383 $$emit$$"add 0x4,rcx\n\t"
11384 $$emit$$"jle L_end\n\t"
11385 $$emit$$"dec rcx\n\t"
11386 $$emit$$"# L_sloop:\t# 8-byte short loop\n\t"
11387 $$emit$$"vmovq xmm0,(rax)\n\t"
11388 $$emit$$"add 0x8,rax\n\t"
11389 $$emit$$"dec rcx\n\t"
11390 $$emit$$"jge L_sloop\n\t"
11391 $$emit$$"# L_end:\n\t"
11392 } else {
11393 $$emit$$"rep stosq\t# Store rax to *rdi++ while rcx--"
11394 }
11395 %}
11396 ins_encode %{
11397 __ clear_mem($base$$Register, $cnt$$Register, $val$$Register,
11398 $tmp$$XMMRegister, true, false);
11399 %}
11400 ins_pipe(pipe_slow);
11401 %}
11402
11403 instruct rep_stos_large_word_copy(rcx_RegL cnt, rdi_RegP base, regD tmp, rax_RegL val,
11404 Universe dummy, rFlagsReg cr)
11405 %{
11406 predicate(((ClearArrayNode*)n)->is_large() && ((ClearArrayNode*)n)->word_copy_only());
11407 match(Set dummy (ClearArray (Binary cnt base) val));
11408 effect(USE_KILL cnt, USE_KILL base, TEMP tmp, KILL cr);
11409
11410 format %{ $$template
11411 if (UseXMMForObjInit) {
11412 $$emit$$"movdq $tmp, $val\n\t"
11413 $$emit$$"punpcklqdq $tmp, $tmp\n\t"
11414 $$emit$$"vinserti128_high $tmp, $tmp\n\t"
11415 $$emit$$"jmpq L_zero_64_bytes\n\t"
11416 $$emit$$"# L_loop:\t# 64-byte LOOP\n\t"
11417 $$emit$$"vmovdqu $tmp,(rax)\n\t"
11418 $$emit$$"vmovdqu $tmp,0x20(rax)\n\t"
11419 $$emit$$"add 0x40,rax\n\t"
11420 $$emit$$"# L_zero_64_bytes:\n\t"
11421 $$emit$$"sub 0x8,rcx\n\t"
11422 $$emit$$"jge L_loop\n\t"
11423 $$emit$$"add 0x4,rcx\n\t"
11424 $$emit$$"jl L_tail\n\t"
11425 $$emit$$"vmovdqu $tmp,(rax)\n\t"
11426 $$emit$$"add 0x20,rax\n\t"
11427 $$emit$$"sub 0x4,rcx\n\t"
11428 $$emit$$"# L_tail:\t# Clearing tail bytes\n\t"
11429 $$emit$$"add 0x4,rcx\n\t"
11430 $$emit$$"jle L_end\n\t"
11431 $$emit$$"dec rcx\n\t"
11432 $$emit$$"# L_sloop:\t# 8-byte short loop\n\t"
11433 $$emit$$"vmovq xmm0,(rax)\n\t"
11434 $$emit$$"add 0x8,rax\n\t"
11435 $$emit$$"dec rcx\n\t"
11436 $$emit$$"jge L_sloop\n\t"
11437 $$emit$$"# L_end:\n\t"
11438 } else {
11439 $$emit$$"rep stosq\t# Store rax to *rdi++ while rcx--"
11440 }
11441 %}
11442 ins_encode %{
11443 __ clear_mem($base$$Register, $cnt$$Register, $val$$Register,
11444 $tmp$$XMMRegister, true, true);
11445 %}
11446 ins_pipe(pipe_slow);
11447 %}
11448
11449 instruct string_compareL(rdi_RegP str1, rcx_RegI cnt1, rsi_RegP str2, rdx_RegI cnt2,
11450 rax_RegI result, legVecS tmp1, rFlagsReg cr)
11451 %{
11452 predicate(((StrCompNode*)n)->encoding() == StrIntrinsicNode::LL);
11453 match(Set result (StrComp (Binary str1 cnt1) (Binary str2 cnt2)));
11454 effect(TEMP tmp1, USE_KILL str1, USE_KILL str2, USE_KILL cnt1, USE_KILL cnt2, KILL cr);
11455
11456 format %{ "String Compare byte[] $str1,$cnt1,$str2,$cnt2 -> $result // KILL $tmp1" %}
11457 ins_encode %{
11458 __ string_compare($str1$$Register, $str2$$Register,
11459 $cnt1$$Register, $cnt2$$Register, $result$$Register,
11460 $tmp1$$XMMRegister, StrIntrinsicNode::LL);
11461 %}
11462 ins_pipe( pipe_slow );
11463 %}
11464
11989 instruct testI_reg_imm(rFlagsReg cr, rRegI src, immI con, immI0 zero)
11990 %{
11991 match(Set cr (CmpI (AndI src con) zero));
11992
11993 format %{ "testl $src, $con" %}
11994 opcode(0xF7, 0x00);
11995 ins_encode(REX_reg(src), OpcP, reg_opc(src), Con32(con));
11996 ins_pipe(ialu_cr_reg_imm);
11997 %}
11998
11999 instruct testI_reg_mem(rFlagsReg cr, rRegI src, memory mem, immI0 zero)
12000 %{
12001 match(Set cr (CmpI (AndI src (LoadI mem)) zero));
12002
12003 format %{ "testl $src, $mem" %}
12004 opcode(0x85);
12005 ins_encode(REX_reg_mem(src, mem), OpcP, reg_mem(src, mem));
12006 ins_pipe(ialu_cr_reg_mem);
12007 %}
12008
12009 // Fold array properties check
12010 instruct testI_mem_imm(rFlagsReg cr, memory mem, immI con, immI0 zero)
12011 %{
12012 match(Set cr (CmpI (AndI (CastN2I (LoadNKlass mem)) con) zero));
12013
12014 format %{ "testl $mem, $con" %}
12015 opcode(0xF7, 0x00);
12016 ins_encode(REX_mem(mem), OpcP, RM_opc_mem(0x00, mem), Con32(con));
12017 ins_pipe(ialu_mem_imm);
12018 %}
12019
12020 // Unsigned compare Instructions; really, same as signed except they
12021 // produce an rFlagsRegU instead of rFlagsReg.
12022 instruct compU_rReg(rFlagsRegU cr, rRegI op1, rRegI op2)
12023 %{
12024 match(Set cr (CmpU op1 op2));
12025
12026 format %{ "cmpl $op1, $op2\t# unsigned" %}
12027 opcode(0x3B); /* Opcode 3B /r */
12028 ins_encode(REX_reg_reg(op1, op2), OpcP, reg_reg(op1, op2));
12029 ins_pipe(ialu_cr_reg_reg);
12030 %}
12031
12032 instruct compU_rReg_imm(rFlagsRegU cr, rRegI op1, immI op2)
12033 %{
12034 match(Set cr (CmpU op1 op2));
12035
12036 format %{ "cmpl $op1, $op2\t# unsigned" %}
12037 opcode(0x81,0x07); /* Opcode 81 /7 */
12038 ins_encode(OpcSErm(op1, op2), Con8or32(op2));
12039 ins_pipe(ialu_cr_reg_imm);
12308 instruct testL_reg_mem(rFlagsReg cr, rRegL src, memory mem, immL0 zero)
12309 %{
12310 match(Set cr (CmpL (AndL src (LoadL mem)) zero));
12311
12312 format %{ "testq $src, $mem" %}
12313 opcode(0x85);
12314 ins_encode(REX_reg_mem_wide(src, mem), OpcP, reg_mem(src, mem));
12315 ins_pipe(ialu_cr_reg_mem);
12316 %}
12317
12318 instruct testL_reg_mem2(rFlagsReg cr, rRegP src, memory mem, immL0 zero)
12319 %{
12320 match(Set cr (CmpL (AndL (CastP2X src) (LoadL mem)) zero));
12321
12322 format %{ "testq $src, $mem" %}
12323 opcode(0x85);
12324 ins_encode(REX_reg_mem_wide(src, mem), OpcP, reg_mem(src, mem));
12325 ins_pipe(ialu_cr_reg_mem);
12326 %}
12327
12328 // Fold array properties check
12329 instruct testL_reg_mem3(rFlagsReg cr, memory mem, rRegL src, immL0 zero)
12330 %{
12331 match(Set cr (CmpL (AndL (CastP2X (LoadKlass mem)) src) zero));
12332
12333 format %{ "testq $src, $mem" %}
12334 opcode(0x85);
12335 ins_encode(REX_reg_mem_wide(src, mem), OpcP, reg_mem(src, mem));
12336 ins_pipe(ialu_cr_reg_mem);
12337 %}
12338
12339 // Manifest a CmpL result in an integer register. Very painful.
12340 // This is the test to avoid.
12341 instruct cmpL3_reg_reg(rRegI dst, rRegL src1, rRegL src2, rFlagsReg flags)
12342 %{
12343 match(Set dst (CmpL3 src1 src2));
12344 effect(KILL flags);
12345
12346 ins_cost(275); // XXX
12347 format %{ "cmpq $src1, $src2\t# CmpL3\n\t"
12348 "movl $dst, -1\n\t"
12349 "jl,s done\n\t"
12350 "setne $dst\n\t"
12351 "movzbl $dst, $dst\n\t"
12352 "done:" %}
12353 ins_encode(cmpl3_flag(src1, src2, dst));
12354 ins_pipe(pipe_slow);
12355 %}
12356
12357 // Unsigned long compare Instructions; really, same as signed long except they
12358 // produce an rFlagsRegU instead of rFlagsReg.
13019
13020 ins_cost(300);
13021 format %{ "call,runtime " %}
13022 ins_encode(clear_avx, Java_To_Runtime(meth));
13023 ins_pipe(pipe_slow);
13024 %}
13025
13026 // Call runtime without safepoint
13027 instruct CallLeafDirect(method meth)
13028 %{
13029 match(CallLeaf);
13030 effect(USE meth);
13031
13032 ins_cost(300);
13033 format %{ "call_leaf,runtime " %}
13034 ins_encode(clear_avx, Java_To_Runtime(meth));
13035 ins_pipe(pipe_slow);
13036 %}
13037
13038 // Call runtime without safepoint
13039 // entry point is null, target holds the address to call
13040 instruct CallLeafNoFPInDirect(rRegP target)
13041 %{
13042 predicate(n->as_Call()->entry_point() == NULL);
13043 match(CallLeafNoFP target);
13044
13045 ins_cost(300);
13046 format %{ "call_leaf_nofp,runtime indirect " %}
13047 ins_encode %{
13048 __ call($target$$Register);
13049 %}
13050
13051 ins_pipe(pipe_slow);
13052 %}
13053
13054 instruct CallLeafNoFPDirect(method meth)
13055 %{
13056 predicate(n->as_Call()->entry_point() != NULL);
13057 match(CallLeafNoFP);
13058 effect(USE meth);
13059
13060 ins_cost(300);
13061 format %{ "call_leaf_nofp,runtime " %}
13062 ins_encode(clear_avx, Java_To_Runtime(meth));
13063 ins_pipe(pipe_slow);
13064 %}
13065
13066 // Return Instruction
13067 // Remove the return address & jump to it.
13068 // Notice: We always emit a nop after a ret to make sure there is room
13069 // for safepoint patching
13070 instruct Ret()
13071 %{
13072 match(Return);
13073
13074 format %{ "ret" %}
13075 opcode(0xC3);
13076 ins_encode(OpcP);
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