12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/assembler.inline.hpp"
26 #include "c1/c1_Compilation.hpp"
27 #include "c1/c1_Instruction.hpp"
28 #include "c1/c1_InstructionPrinter.hpp"
29 #include "c1/c1_LIRAssembler.hpp"
30 #include "c1/c1_MacroAssembler.hpp"
31 #include "c1/c1_ValueStack.hpp"
32 #include "compiler/compilerDefinitions.inline.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "runtime/os.hpp"
35 #include "runtime/vm_version.hpp"
36
37 void LIR_Assembler::patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info) {
38 // We must have enough patching space so that call can be inserted.
39 // We cannot use fat nops here, since the concurrent code rewrite may transiently
40 // create the illegal instruction sequence.
41 while ((intx) _masm->pc() - (intx) patch->pc_start() < NativeGeneralJump::instruction_size) {
42 _masm->nop();
43 }
44 info->set_force_reexecute();
45 patch->install(_masm, patch_code, obj, info);
46 append_code_stub(patch);
47
48 #ifdef ASSERT
49 Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->stack()->bci());
50 if (patch->id() == PatchingStub::access_field_id) {
51 switch (code) {
52 case Bytecodes::_putstatic:
53 case Bytecodes::_getstatic:
54 case Bytecodes::_putfield:
100 //---------------------------------------------------------------
101
102
103 LIR_Assembler::LIR_Assembler(Compilation* c):
104 _masm(c->masm())
105 , _compilation(c)
106 , _frame_map(c->frame_map())
107 , _current_block(nullptr)
108 , _pending_non_safepoint(nullptr)
109 , _pending_non_safepoint_offset(0)
110 , _immediate_oops_patched(0)
111 {
112 _slow_case_stubs = new CodeStubList();
113 }
114
115
116 LIR_Assembler::~LIR_Assembler() {
117 // The unwind handler label may be unnbound if this destructor is invoked because of a bail-out.
118 // Reset it here to avoid an assertion.
119 _unwind_handler_entry.reset();
120 }
121
122
123 void LIR_Assembler::check_codespace() {
124 CodeSection* cs = _masm->code_section();
125 if (cs->remaining() < (int)(NOT_LP64(1*K)LP64_ONLY(2*K))) {
126 BAILOUT("CodeBuffer overflow");
127 }
128 }
129
130
131 void LIR_Assembler::append_code_stub(CodeStub* stub) {
132 _immediate_oops_patched += stub->nr_immediate_oops_patched();
133 _slow_case_stubs->append(stub);
134 }
135
136 void LIR_Assembler::emit_stubs(CodeStubList* stub_list) {
137 for (int m = 0; m < stub_list->length(); m++) {
138 CodeStub* s = stub_list->at(m);
139
320 if (!_branch_target_blocks.at(i)->label()->is_bound()) {
321 tty->print_cr("label of block B%d is not bound", _branch_target_blocks.at(i)->block_id());
322 assert(false, "unbound label");
323 }
324 }
325 }
326 #endif
327
328 //----------------------------------debug info--------------------------------
329
330
331 void LIR_Assembler::add_debug_info_for_branch(CodeEmitInfo* info) {
332 int pc_offset = code_offset();
333 flush_debug_info(pc_offset);
334 info->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
335 if (info->exception_handlers() != nullptr) {
336 compilation()->add_exception_handlers_for_pco(pc_offset, info->exception_handlers());
337 }
338 }
339
340
341 void LIR_Assembler::add_call_info(int pc_offset, CodeEmitInfo* cinfo) {
342 flush_debug_info(pc_offset);
343 cinfo->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
344 if (cinfo->exception_handlers() != nullptr) {
345 compilation()->add_exception_handlers_for_pco(pc_offset, cinfo->exception_handlers());
346 }
347 }
348
349 static ValueStack* debug_info(Instruction* ins) {
350 StateSplit* ss = ins->as_StateSplit();
351 if (ss != nullptr) return ss->state();
352 return ins->state_before();
353 }
354
355 void LIR_Assembler::process_debug_info(LIR_Op* op) {
356 Instruction* src = op->source();
357 if (src == nullptr) return;
358 int pc_offset = code_offset();
359 if (_pending_non_safepoint == src) {
360 _pending_non_safepoint_offset = pc_offset;
361 return;
362 }
363 ValueStack* vstack = debug_info(src);
461 } else {
462 emit_static_call_stub();
463 }
464 CHECK_BAILOUT();
465
466 switch (op->code()) {
467 case lir_static_call:
468 case lir_dynamic_call:
469 call(op, relocInfo::static_call_type);
470 break;
471 case lir_optvirtual_call:
472 call(op, relocInfo::opt_virtual_call_type);
473 break;
474 case lir_icvirtual_call:
475 ic_call(op);
476 break;
477 default:
478 fatal("unexpected op code: %s", op->name());
479 break;
480 }
481 }
482
483
484 void LIR_Assembler::emit_opLabel(LIR_OpLabel* op) {
485 _masm->bind (*(op->label()));
486 }
487
488
489 void LIR_Assembler::emit_op1(LIR_Op1* op) {
490 switch (op->code()) {
491 case lir_move:
492 if (op->move_kind() == lir_move_volatile) {
493 assert(op->patch_code() == lir_patch_none, "can't patch volatiles");
494 volatile_move_op(op->in_opr(), op->result_opr(), op->type(), op->info());
495 } else {
496 move_op(op->in_opr(), op->result_opr(), op->type(),
497 op->patch_code(), op->info(),
498 op->move_kind() == lir_move_wide);
499 }
500 break;
550 } else {
551 Unimplemented();
552 }
553 break;
554 }
555
556 case lir_monaddr:
557 monitor_address(op->in_opr()->as_constant_ptr()->as_jint(), op->result_opr());
558 break;
559
560 case lir_unwind:
561 unwind_op(op->in_opr());
562 break;
563
564 default:
565 Unimplemented();
566 break;
567 }
568 }
569
570
571 void LIR_Assembler::emit_op0(LIR_Op0* op) {
572 switch (op->code()) {
573 case lir_nop:
574 assert(op->info() == nullptr, "not supported");
575 _masm->nop();
576 break;
577
578 case lir_label:
579 Unimplemented();
580 break;
581
582 case lir_std_entry: {
583 // init offsets
584 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
585 if (needs_icache(compilation()->method())) {
586 int offset = check_icache();
587 offsets()->set_value(CodeOffsets::Entry, offset);
588 }
589 _masm->align(CodeEntryAlignment);
590 offsets()->set_value(CodeOffsets::Verified_Entry, _masm->offset());
591 _masm->verified_entry(compilation()->directive()->BreakAtExecuteOption);
592 if (needs_clinit_barrier_on_entry(compilation()->method())) {
593 clinit_barrier(compilation()->method());
594 }
595 build_frame();
596 offsets()->set_value(CodeOffsets::Frame_Complete, _masm->offset());
597 break;
598 }
599
600 case lir_osr_entry:
601 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
602 osr_entry();
603 break;
604
605 case lir_breakpoint:
606 breakpoint();
607 break;
608
609 case lir_membar:
610 membar();
611 break;
612
613 case lir_membar_acquire:
614 membar_acquire();
615 break;
616
617 case lir_membar_release:
618 membar_release();
625 case lir_membar_storestore:
626 membar_storestore();
627 break;
628
629 case lir_membar_loadstore:
630 membar_loadstore();
631 break;
632
633 case lir_membar_storeload:
634 membar_storeload();
635 break;
636
637 case lir_get_thread:
638 get_thread(op->result_opr());
639 break;
640
641 case lir_on_spin_wait:
642 on_spin_wait();
643 break;
644
645 default:
646 ShouldNotReachHere();
647 break;
648 }
649 }
650
651
652 void LIR_Assembler::emit_op2(LIR_Op2* op) {
653 switch (op->code()) {
654 case lir_cmp:
655 if (op->info() != nullptr) {
656 assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(),
657 "shouldn't be codeemitinfo for non-address operands");
658 add_debug_info_for_null_check_here(op->info()); // exception possible
659 }
660 comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
661 break;
662
663 case lir_cmp_l2i:
664 case lir_cmp_fd2i:
710
711 default:
712 Unimplemented();
713 break;
714 }
715 }
716
717 void LIR_Assembler::emit_op4(LIR_Op4* op) {
718 switch(op->code()) {
719 case lir_cmove:
720 cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->type(), op->in_opr3(), op->in_opr4());
721 break;
722
723 default:
724 Unimplemented();
725 break;
726 }
727 }
728
729 void LIR_Assembler::build_frame() {
730 _masm->build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes());
731 }
732
733
734 void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool wide) {
735 if (src->is_register()) {
736 if (dest->is_register()) {
737 assert(patch_code == lir_patch_none && info == nullptr, "no patching and info allowed here");
738 reg2reg(src, dest);
739 } else if (dest->is_stack()) {
740 assert(patch_code == lir_patch_none && info == nullptr, "no patching and info allowed here");
741 reg2stack(src, dest, type);
742 } else if (dest->is_address()) {
743 reg2mem(src, dest, type, patch_code, info, wide);
744 } else {
745 ShouldNotReachHere();
746 }
747
748 } else if (src->is_stack()) {
749 assert(patch_code == lir_patch_none && info == nullptr, "no patching and info allowed here");
750 if (dest->is_register()) {
|
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/assembler.inline.hpp"
26 #include "c1/c1_Compilation.hpp"
27 #include "c1/c1_Instruction.hpp"
28 #include "c1/c1_InstructionPrinter.hpp"
29 #include "c1/c1_LIRAssembler.hpp"
30 #include "c1/c1_MacroAssembler.hpp"
31 #include "c1/c1_ValueStack.hpp"
32 #include "ci/ciInlineKlass.hpp"
33 #include "ci/ciUtilities.inline.hpp"
34 #include "compiler/compilerDefinitions.inline.hpp"
35 #include "compiler/oopMap.hpp"
36 #include "runtime/os.hpp"
37 #include "runtime/sharedRuntime.hpp"
38 #include "runtime/vm_version.hpp"
39
40 void LIR_Assembler::patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info) {
41 // We must have enough patching space so that call can be inserted.
42 // We cannot use fat nops here, since the concurrent code rewrite may transiently
43 // create the illegal instruction sequence.
44 while ((intx) _masm->pc() - (intx) patch->pc_start() < NativeGeneralJump::instruction_size) {
45 _masm->nop();
46 }
47 info->set_force_reexecute();
48 patch->install(_masm, patch_code, obj, info);
49 append_code_stub(patch);
50
51 #ifdef ASSERT
52 Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->stack()->bci());
53 if (patch->id() == PatchingStub::access_field_id) {
54 switch (code) {
55 case Bytecodes::_putstatic:
56 case Bytecodes::_getstatic:
57 case Bytecodes::_putfield:
103 //---------------------------------------------------------------
104
105
106 LIR_Assembler::LIR_Assembler(Compilation* c):
107 _masm(c->masm())
108 , _compilation(c)
109 , _frame_map(c->frame_map())
110 , _current_block(nullptr)
111 , _pending_non_safepoint(nullptr)
112 , _pending_non_safepoint_offset(0)
113 , _immediate_oops_patched(0)
114 {
115 _slow_case_stubs = new CodeStubList();
116 }
117
118
119 LIR_Assembler::~LIR_Assembler() {
120 // The unwind handler label may be unnbound if this destructor is invoked because of a bail-out.
121 // Reset it here to avoid an assertion.
122 _unwind_handler_entry.reset();
123 _verified_inline_entry.reset();
124 }
125
126
127 void LIR_Assembler::check_codespace() {
128 CodeSection* cs = _masm->code_section();
129 if (cs->remaining() < (int)(NOT_LP64(1*K)LP64_ONLY(2*K))) {
130 BAILOUT("CodeBuffer overflow");
131 }
132 }
133
134
135 void LIR_Assembler::append_code_stub(CodeStub* stub) {
136 _immediate_oops_patched += stub->nr_immediate_oops_patched();
137 _slow_case_stubs->append(stub);
138 }
139
140 void LIR_Assembler::emit_stubs(CodeStubList* stub_list) {
141 for (int m = 0; m < stub_list->length(); m++) {
142 CodeStub* s = stub_list->at(m);
143
324 if (!_branch_target_blocks.at(i)->label()->is_bound()) {
325 tty->print_cr("label of block B%d is not bound", _branch_target_blocks.at(i)->block_id());
326 assert(false, "unbound label");
327 }
328 }
329 }
330 #endif
331
332 //----------------------------------debug info--------------------------------
333
334
335 void LIR_Assembler::add_debug_info_for_branch(CodeEmitInfo* info) {
336 int pc_offset = code_offset();
337 flush_debug_info(pc_offset);
338 info->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
339 if (info->exception_handlers() != nullptr) {
340 compilation()->add_exception_handlers_for_pco(pc_offset, info->exception_handlers());
341 }
342 }
343
344 void LIR_Assembler::add_call_info(int pc_offset, CodeEmitInfo* cinfo, bool maybe_return_as_fields) {
345 flush_debug_info(pc_offset);
346 cinfo->record_debug_info(compilation()->debug_info_recorder(), pc_offset, maybe_return_as_fields);
347 if (cinfo->exception_handlers() != nullptr) {
348 compilation()->add_exception_handlers_for_pco(pc_offset, cinfo->exception_handlers());
349 }
350 }
351
352 static ValueStack* debug_info(Instruction* ins) {
353 StateSplit* ss = ins->as_StateSplit();
354 if (ss != nullptr) return ss->state();
355 return ins->state_before();
356 }
357
358 void LIR_Assembler::process_debug_info(LIR_Op* op) {
359 Instruction* src = op->source();
360 if (src == nullptr) return;
361 int pc_offset = code_offset();
362 if (_pending_non_safepoint == src) {
363 _pending_non_safepoint_offset = pc_offset;
364 return;
365 }
366 ValueStack* vstack = debug_info(src);
464 } else {
465 emit_static_call_stub();
466 }
467 CHECK_BAILOUT();
468
469 switch (op->code()) {
470 case lir_static_call:
471 case lir_dynamic_call:
472 call(op, relocInfo::static_call_type);
473 break;
474 case lir_optvirtual_call:
475 call(op, relocInfo::opt_virtual_call_type);
476 break;
477 case lir_icvirtual_call:
478 ic_call(op);
479 break;
480 default:
481 fatal("unexpected op code: %s", op->name());
482 break;
483 }
484
485 ciInlineKlass* vk = nullptr;
486 if (op->maybe_return_as_fields(&vk)) {
487 int offset = store_inline_type_fields_to_buf(vk);
488 add_call_info(offset, op->info(), true);
489 }
490 }
491
492
493 void LIR_Assembler::emit_opLabel(LIR_OpLabel* op) {
494 _masm->bind (*(op->label()));
495 }
496
497
498 void LIR_Assembler::emit_op1(LIR_Op1* op) {
499 switch (op->code()) {
500 case lir_move:
501 if (op->move_kind() == lir_move_volatile) {
502 assert(op->patch_code() == lir_patch_none, "can't patch volatiles");
503 volatile_move_op(op->in_opr(), op->result_opr(), op->type(), op->info());
504 } else {
505 move_op(op->in_opr(), op->result_opr(), op->type(),
506 op->patch_code(), op->info(),
507 op->move_kind() == lir_move_wide);
508 }
509 break;
559 } else {
560 Unimplemented();
561 }
562 break;
563 }
564
565 case lir_monaddr:
566 monitor_address(op->in_opr()->as_constant_ptr()->as_jint(), op->result_opr());
567 break;
568
569 case lir_unwind:
570 unwind_op(op->in_opr());
571 break;
572
573 default:
574 Unimplemented();
575 break;
576 }
577 }
578
579 void LIR_Assembler::add_scalarized_debug_info(int pc_offset) {
580 // The VEP and VIEP(RO) of a C1-compiled method call buffer_inline_args_xxx()
581 // before doing any argument shuffling. This call may cause GC. When GC happens,
582 // all the parameters are still as passed by the caller, so we just use
583 // map->set_include_argument_oops() inside frame::sender_for_compiled_frame(RegisterMap* map).
584 // Deoptimization is delayed until we enter the method body, so we only need a
585 // scope for stack walking here. There are no materialized locals, expression
586 // stack entries, or monitors yet.
587 flush_debug_info(pc_offset);
588 OopMap* oop_map = new OopMap(0, 0);
589 DebugInformationRecorder* debug_info = compilation()->debug_info_recorder();
590 debug_info->add_safepoint(pc_offset, oop_map);
591 bool reexecute = false;
592 debug_info->describe_scope(pc_offset, methodHandle(), method(), 0, reexecute);
593 debug_info->end_safepoint(pc_offset);
594 }
595
596 // The entries points of C1-compiled methods can have the following types:
597 // (1) Methods with no inline type args
598 // (2) Methods with inline type receiver but no inline type args
599 // VIEP_RO is the same as VIEP
600 // (3) Methods with non-inline type receiver and some inline type args
601 // VIEP_RO is the same as VEP
602 // (4) Methods with inline type receiver and other inline type args
603 // Separate VEP, VIEP and VIEP_RO
604 //
605 // (1) (2) (3) (4)
606 // UEP/UIEP: VEP: UEP: UEP:
607 // check_icache pack receiver check_icache check_icache
608 // VEP/VIEP/VIEP_RO jump to VIEP VEP/VIEP_RO: VIEP_RO:
609 // body UEP/UIEP: pack inline args pack inline args (except receiver)
610 // check_icache jump to VIEP jump to VIEP
611 // VIEP/VIEP_RO UIEP: VEP:
612 // body check_icache pack all inline args
613 // VIEP: jump to VIEP
614 // body UIEP:
615 // check_icache
616 // VIEP:
617 // body
618 void LIR_Assembler::emit_std_entries() {
619 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
620
621 _masm->align(CodeEntryAlignment);
622
623 if (method()->has_scalarized_args()) {
624 VM_ENTRY_MARK;
625 assert(InlineTypePassFieldsAsArgs, "must be");
626 CompiledEntrySignature ces(method()->get_Method());
627 ces.compute_calling_conventions(false);
628 CodeOffsets::Entries ro_entry_type = ces.c1_inline_ro_entry_type();
629
630 // UEP: check icache and fall-through
631 if (ro_entry_type != CodeOffsets::Verified_Inline_Entry) {
632 offsets()->set_value(CodeOffsets::Entry, _masm->offset());
633 if (needs_icache(method())) {
634 check_icache();
635 }
636 }
637
638 // VIEP_RO: pack all value parameters, except the receiver
639 if (ro_entry_type == CodeOffsets::Verified_Inline_Entry_RO) {
640 emit_std_entry(CodeOffsets::Verified_Inline_Entry_RO, &ces);
641 }
642
643 // VEP: pack all value parameters
644 _masm->align(CodeEntryAlignment);
645 emit_std_entry(CodeOffsets::Verified_Entry, &ces);
646
647 // UIEP: check icache and fall-through
648 _masm->align(CodeEntryAlignment);
649 offsets()->set_value(CodeOffsets::Inline_Entry, _masm->offset());
650 if (ro_entry_type == CodeOffsets::Verified_Inline_Entry) {
651 // Special case if we have VIEP == VIEP(RO):
652 // this means UIEP (called by C1) == UEP (called by C2).
653 offsets()->set_value(CodeOffsets::Entry, _masm->offset());
654 }
655 if (needs_icache(method())) {
656 check_icache();
657 }
658
659 // VIEP: all value parameters are passed as refs - no packing.
660 emit_std_entry(CodeOffsets::Verified_Inline_Entry, nullptr);
661
662 if (ro_entry_type != CodeOffsets::Verified_Inline_Entry_RO) {
663 // The VIEP(RO) is the same as VEP or VIEP
664 assert(ro_entry_type == CodeOffsets::Verified_Entry ||
665 ro_entry_type == CodeOffsets::Verified_Inline_Entry, "must be");
666 offsets()->set_value(CodeOffsets::Verified_Inline_Entry_RO,
667 offsets()->value(ro_entry_type));
668 }
669 } else {
670 // All 3 entries are the same (no inline type packing)
671 offsets()->set_value(CodeOffsets::Entry, _masm->offset());
672 offsets()->set_value(CodeOffsets::Inline_Entry, _masm->offset());
673 if (needs_icache(method())) {
674 check_icache();
675 }
676 emit_std_entry(CodeOffsets::Verified_Inline_Entry, nullptr);
677 offsets()->set_value(CodeOffsets::Verified_Entry, offsets()->value(CodeOffsets::Verified_Inline_Entry));
678 offsets()->set_value(CodeOffsets::Verified_Inline_Entry_RO, offsets()->value(CodeOffsets::Verified_Inline_Entry));
679 }
680 }
681
682 void LIR_Assembler::emit_std_entry(CodeOffsets::Entries entry, const CompiledEntrySignature* ces) {
683 offsets()->set_value(entry, _masm->offset());
684 _masm->verified_entry(compilation()->directive()->BreakAtExecuteOption);
685 switch (entry) {
686 case CodeOffsets::Verified_Entry: {
687 if (needs_clinit_barrier_on_entry(method())) {
688 clinit_barrier(method());
689 }
690 int rt_call_offset = _masm->verified_entry(ces, initial_frame_size_in_bytes(), bang_size_in_bytes(), in_bytes(frame_map()->sp_offset_for_orig_pc()), _verified_inline_entry);
691 add_scalarized_debug_info(rt_call_offset);
692 break;
693 }
694 case CodeOffsets::Verified_Inline_Entry_RO: {
695 assert(!needs_clinit_barrier_on_entry(method()), "can't be static");
696 int rt_call_offset = _masm->verified_inline_ro_entry(ces, initial_frame_size_in_bytes(), bang_size_in_bytes(), in_bytes(frame_map()->sp_offset_for_orig_pc()), _verified_inline_entry);
697 add_scalarized_debug_info(rt_call_offset);
698 break;
699 }
700 case CodeOffsets::Verified_Inline_Entry: {
701 if (needs_clinit_barrier_on_entry(method())) {
702 clinit_barrier(method());
703 }
704 build_frame();
705 offsets()->set_value(CodeOffsets::Frame_Complete, _masm->offset());
706 break;
707 }
708 default:
709 ShouldNotReachHere();
710 break;
711 }
712 }
713
714 void LIR_Assembler::emit_op0(LIR_Op0* op) {
715 switch (op->code()) {
716 case lir_nop:
717 assert(op->info() == nullptr, "not supported");
718 _masm->nop();
719 break;
720
721 case lir_label:
722 Unimplemented();
723 break;
724
725 case lir_std_entry:
726 emit_std_entries();
727 break;
728
729 case lir_osr_entry:
730 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
731 osr_entry();
732 break;
733
734 case lir_breakpoint:
735 breakpoint();
736 break;
737
738 case lir_membar:
739 membar();
740 break;
741
742 case lir_membar_acquire:
743 membar_acquire();
744 break;
745
746 case lir_membar_release:
747 membar_release();
754 case lir_membar_storestore:
755 membar_storestore();
756 break;
757
758 case lir_membar_loadstore:
759 membar_loadstore();
760 break;
761
762 case lir_membar_storeload:
763 membar_storeload();
764 break;
765
766 case lir_get_thread:
767 get_thread(op->result_opr());
768 break;
769
770 case lir_on_spin_wait:
771 on_spin_wait();
772 break;
773
774 case lir_check_orig_pc:
775 check_orig_pc();
776 break;
777
778 default:
779 ShouldNotReachHere();
780 break;
781 }
782 }
783
784
785 void LIR_Assembler::emit_op2(LIR_Op2* op) {
786 switch (op->code()) {
787 case lir_cmp:
788 if (op->info() != nullptr) {
789 assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(),
790 "shouldn't be codeemitinfo for non-address operands");
791 add_debug_info_for_null_check_here(op->info()); // exception possible
792 }
793 comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
794 break;
795
796 case lir_cmp_l2i:
797 case lir_cmp_fd2i:
843
844 default:
845 Unimplemented();
846 break;
847 }
848 }
849
850 void LIR_Assembler::emit_op4(LIR_Op4* op) {
851 switch(op->code()) {
852 case lir_cmove:
853 cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->type(), op->in_opr3(), op->in_opr4());
854 break;
855
856 default:
857 Unimplemented();
858 break;
859 }
860 }
861
862 void LIR_Assembler::build_frame() {
863 _masm->build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes(), in_bytes(frame_map()->sp_offset_for_orig_pc()),
864 needs_stack_repair(), method()->has_scalarized_args(), &_verified_inline_entry);
865 }
866
867
868 void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool wide) {
869 if (src->is_register()) {
870 if (dest->is_register()) {
871 assert(patch_code == lir_patch_none && info == nullptr, "no patching and info allowed here");
872 reg2reg(src, dest);
873 } else if (dest->is_stack()) {
874 assert(patch_code == lir_patch_none && info == nullptr, "no patching and info allowed here");
875 reg2stack(src, dest, type);
876 } else if (dest->is_address()) {
877 reg2mem(src, dest, type, patch_code, info, wide);
878 } else {
879 ShouldNotReachHere();
880 }
881
882 } else if (src->is_stack()) {
883 assert(patch_code == lir_patch_none && info == nullptr, "no patching and info allowed here");
884 if (dest->is_register()) {
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