14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef SHARE_C1_C1_LIRASSEMBLER_HPP
26 #define SHARE_C1_C1_LIRASSEMBLER_HPP
27
28 #include "c1/c1_CodeStubs.hpp"
29 #include "ci/ciMethodData.hpp"
30 #include "oops/methodData.hpp"
31 #include "utilities/macros.hpp"
32
33 class Compilation;
34 class ScopeValue;
35
36 class LIR_Assembler: public CompilationResourceObj {
37 private:
38 C1_MacroAssembler* _masm;
39 CodeStubList* _slow_case_stubs;
40
41 Compilation* _compilation;
42 FrameMap* _frame_map;
43 BlockBegin* _current_block;
44
45 Instruction* _pending_non_safepoint;
46 int _pending_non_safepoint_offset;
47 int _immediate_oops_patched;
48
49 Label _unwind_handler_entry;
50
51 #ifdef ASSERT
52 BlockList _branch_target_blocks;
53 void check_no_unbound_labels();
54 #endif
55
56 FrameMap* frame_map() const { return _frame_map; }
57
58 void set_current_block(BlockBegin* b) { _current_block = b; }
59 BlockBegin* current_block() const { return _current_block; }
60
61 // non-safepoint debug info management
62 void flush_debug_info(int before_pc_offset) {
63 if (_pending_non_safepoint != NULL) {
64 if (_pending_non_safepoint_offset < before_pc_offset)
65 record_non_safepoint_debug_info();
66 _pending_non_safepoint = NULL;
67 }
68 }
69 void process_debug_info(LIR_Op* op);
74 bool bailed_out() const { return compilation()->bailed_out(); }
75
76 // code emission patterns and accessors
77 void check_codespace();
78 bool needs_icache(ciMethod* method) const;
79
80 // returns offset of icache check
81 int check_icache();
82
83 bool needs_clinit_barrier_on_entry(ciMethod* method) const;
84 void clinit_barrier(ciMethod* method);
85
86 void jobject2reg(jobject o, Register reg);
87 void jobject2reg_with_patching(Register reg, CodeEmitInfo* info);
88
89 void metadata2reg(Metadata* o, Register reg);
90 void klass2reg_with_patching(Register reg, CodeEmitInfo* info);
91
92 void emit_stubs(CodeStubList* stub_list);
93
94 // addresses
95 Address as_Address(LIR_Address* addr);
96 Address as_Address_lo(LIR_Address* addr);
97 Address as_Address_hi(LIR_Address* addr);
98
99 // debug information
100 void add_call_info(int pc_offset, CodeEmitInfo* cinfo);
101 void add_debug_info_for_branch(CodeEmitInfo* info);
102 void add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo);
103 void add_debug_info_for_div0_here(CodeEmitInfo* info);
104 ImplicitNullCheckStub* add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo);
105 ImplicitNullCheckStub* add_debug_info_for_null_check_here(CodeEmitInfo* info);
106
107 void breakpoint();
108 void push(LIR_Opr opr);
109 void pop(LIR_Opr opr);
110
111 // patching
112 void append_patching_stub(PatchingStub* stub);
113 void patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info);
114
115 void comp_op(LIR_Condition condition, LIR_Opr src, LIR_Opr result, LIR_Op2* op);
116
117 PatchingStub::PatchID patching_id(CodeEmitInfo* info);
118
119 public:
120 LIR_Assembler(Compilation* c);
177
178 void shift_op(LIR_Code code, LIR_Opr left, LIR_Opr count, LIR_Opr dest, LIR_Opr tmp);
179 void shift_op(LIR_Code code, LIR_Opr left, jint count, LIR_Opr dest);
180
181 void move_regs(Register from_reg, Register to_reg);
182 void swap_reg(Register a, Register b);
183
184 void emit_op0(LIR_Op0* op);
185 void emit_op1(LIR_Op1* op);
186 void emit_op2(LIR_Op2* op);
187 void emit_op3(LIR_Op3* op);
188 void emit_op4(LIR_Op4* op);
189 void emit_opBranch(LIR_OpBranch* op);
190 void emit_opLabel(LIR_OpLabel* op);
191 void emit_arraycopy(LIR_OpArrayCopy* op);
192 void emit_updatecrc32(LIR_OpUpdateCRC32* op);
193 void emit_opConvert(LIR_OpConvert* op);
194 void emit_alloc_obj(LIR_OpAllocObj* op);
195 void emit_alloc_array(LIR_OpAllocArray* op);
196 void emit_opTypeCheck(LIR_OpTypeCheck* op);
197 void emit_typecheck_helper(LIR_OpTypeCheck *op, Label* success, Label* failure, Label* obj_is_null);
198 void emit_compare_and_swap(LIR_OpCompareAndSwap* op);
199 void emit_lock(LIR_OpLock* op);
200 void emit_load_klass(LIR_OpLoadKlass* op);
201 void emit_call(LIR_OpJavaCall* op);
202 void emit_rtcall(LIR_OpRTCall* op);
203 void emit_profile_call(LIR_OpProfileCall* op);
204 void emit_profile_type(LIR_OpProfileType* op);
205 void emit_delay(LIR_OpDelay* op);
206
207 void arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack);
208 void arithmetic_idiv(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr temp, LIR_Opr result, CodeEmitInfo* info);
209 void intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr unused, LIR_Opr dest, LIR_Op* op);
210 #ifdef ASSERT
211 void emit_assert(LIR_OpAssert* op);
212 #endif
213
214 void logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest);
215
216 void roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack);
217 void move_op(LIR_Opr src, LIR_Opr result, BasicType type,
218 LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool wide);
219 void volatile_move_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info);
220 void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); // info set for null exceptions
221 void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op);
222 void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result, BasicType type,
223 LIR_Opr cmp_opr1 = LIR_OprFact::illegalOpr, LIR_Opr cmp_opr2 = LIR_OprFact::illegalOpr);
224 void call( LIR_OpJavaCall* op, relocInfo::relocType rtype);
225 void ic_call( LIR_OpJavaCall* op);
226 void vtable_call( LIR_OpJavaCall* op);
227
228 void osr_entry();
229
230 void build_frame();
231
232 void throw_op(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info);
233 void unwind_op(LIR_Opr exceptionOop);
234 void monitor_address(int monitor_ix, LIR_Opr dst);
235
236 void align_backward_branch_target();
237 void align_call(LIR_Code code);
238
239 void negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp = LIR_OprFact::illegalOpr);
240 void leal(LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code = lir_patch_none, CodeEmitInfo* info = NULL);
241
242 void rt_call(LIR_Opr result, address dest, const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info);
243
244 void membar();
245 void membar_acquire();
246 void membar_release();
247 void membar_loadload();
248 void membar_storestore();
249 void membar_loadstore();
250 void membar_storeload();
251 void on_spin_wait();
252 void get_thread(LIR_Opr result);
253
254 void verify_oop_map(CodeEmitInfo* info);
255
256 void atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr dest, LIR_Opr tmp);
257
258 #include CPU_HEADER(c1_LIRAssembler)
259
260 public:
261 int nr_immediate_oops_patched() const { return _immediate_oops_patched; }
262
263 static int call_stub_size() {
264 return _call_stub_size;
265 }
266
267 static int exception_handler_size() {
268 return _exception_handler_size;
269 }
270
271 static int deopt_handler_size() {
272 return _deopt_handler_size;
|
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef SHARE_C1_C1_LIRASSEMBLER_HPP
26 #define SHARE_C1_C1_LIRASSEMBLER_HPP
27
28 #include "c1/c1_CodeStubs.hpp"
29 #include "ci/ciMethodData.hpp"
30 #include "oops/methodData.hpp"
31 #include "utilities/macros.hpp"
32
33 class Compilation;
34 class CompiledEntrySignature;
35 class ScopeValue;
36
37 class LIR_Assembler: public CompilationResourceObj {
38 private:
39 C1_MacroAssembler* _masm;
40 CodeStubList* _slow_case_stubs;
41
42 Compilation* _compilation;
43 FrameMap* _frame_map;
44 BlockBegin* _current_block;
45
46 Instruction* _pending_non_safepoint;
47 int _pending_non_safepoint_offset;
48 int _immediate_oops_patched;
49
50 Label _unwind_handler_entry;
51 Label _verified_inline_entry;
52
53 #ifdef ASSERT
54 BlockList _branch_target_blocks;
55 void check_no_unbound_labels();
56 #endif
57
58 FrameMap* frame_map() const { return _frame_map; }
59
60 void set_current_block(BlockBegin* b) { _current_block = b; }
61 BlockBegin* current_block() const { return _current_block; }
62
63 // non-safepoint debug info management
64 void flush_debug_info(int before_pc_offset) {
65 if (_pending_non_safepoint != NULL) {
66 if (_pending_non_safepoint_offset < before_pc_offset)
67 record_non_safepoint_debug_info();
68 _pending_non_safepoint = NULL;
69 }
70 }
71 void process_debug_info(LIR_Op* op);
76 bool bailed_out() const { return compilation()->bailed_out(); }
77
78 // code emission patterns and accessors
79 void check_codespace();
80 bool needs_icache(ciMethod* method) const;
81
82 // returns offset of icache check
83 int check_icache();
84
85 bool needs_clinit_barrier_on_entry(ciMethod* method) const;
86 void clinit_barrier(ciMethod* method);
87
88 void jobject2reg(jobject o, Register reg);
89 void jobject2reg_with_patching(Register reg, CodeEmitInfo* info);
90
91 void metadata2reg(Metadata* o, Register reg);
92 void klass2reg_with_patching(Register reg, CodeEmitInfo* info);
93
94 void emit_stubs(CodeStubList* stub_list);
95
96 bool needs_stack_repair() const {
97 return compilation()->needs_stack_repair();
98 }
99
100 // addresses
101 Address as_Address(LIR_Address* addr);
102 Address as_Address_lo(LIR_Address* addr);
103 Address as_Address_hi(LIR_Address* addr);
104
105 // debug information
106 void add_call_info(int pc_offset, CodeEmitInfo* cinfo, bool maybe_return_as_fields = false);
107 void add_debug_info_for_branch(CodeEmitInfo* info);
108 void add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo);
109 void add_debug_info_for_div0_here(CodeEmitInfo* info);
110 ImplicitNullCheckStub* add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo);
111 ImplicitNullCheckStub* add_debug_info_for_null_check_here(CodeEmitInfo* info);
112
113 void breakpoint();
114 void push(LIR_Opr opr);
115 void pop(LIR_Opr opr);
116
117 // patching
118 void append_patching_stub(PatchingStub* stub);
119 void patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info);
120
121 void comp_op(LIR_Condition condition, LIR_Opr src, LIR_Opr result, LIR_Op2* op);
122
123 PatchingStub::PatchID patching_id(CodeEmitInfo* info);
124
125 public:
126 LIR_Assembler(Compilation* c);
183
184 void shift_op(LIR_Code code, LIR_Opr left, LIR_Opr count, LIR_Opr dest, LIR_Opr tmp);
185 void shift_op(LIR_Code code, LIR_Opr left, jint count, LIR_Opr dest);
186
187 void move_regs(Register from_reg, Register to_reg);
188 void swap_reg(Register a, Register b);
189
190 void emit_op0(LIR_Op0* op);
191 void emit_op1(LIR_Op1* op);
192 void emit_op2(LIR_Op2* op);
193 void emit_op3(LIR_Op3* op);
194 void emit_op4(LIR_Op4* op);
195 void emit_opBranch(LIR_OpBranch* op);
196 void emit_opLabel(LIR_OpLabel* op);
197 void emit_arraycopy(LIR_OpArrayCopy* op);
198 void emit_updatecrc32(LIR_OpUpdateCRC32* op);
199 void emit_opConvert(LIR_OpConvert* op);
200 void emit_alloc_obj(LIR_OpAllocObj* op);
201 void emit_alloc_array(LIR_OpAllocArray* op);
202 void emit_opTypeCheck(LIR_OpTypeCheck* op);
203 void emit_opFlattenedArrayCheck(LIR_OpFlattenedArrayCheck* op);
204 void emit_opNullFreeArrayCheck(LIR_OpNullFreeArrayCheck* op);
205 void emit_opSubstitutabilityCheck(LIR_OpSubstitutabilityCheck* op);
206 void emit_typecheck_helper(LIR_OpTypeCheck *op, Label* success, Label* failure, Label* obj_is_null);
207 void emit_compare_and_swap(LIR_OpCompareAndSwap* op);
208 void emit_lock(LIR_OpLock* op);
209 void emit_load_klass(LIR_OpLoadKlass* op);
210 void emit_call(LIR_OpJavaCall* op);
211 void emit_rtcall(LIR_OpRTCall* op);
212 void emit_profile_call(LIR_OpProfileCall* op);
213 void emit_profile_type(LIR_OpProfileType* op);
214 void emit_profile_inline_type(LIR_OpProfileInlineType* op);
215 void emit_delay(LIR_OpDelay* op);
216 void emit_std_entries();
217 void emit_std_entry(CodeOffsets::Entries entry, const CompiledEntrySignature* ces);
218 void add_scalarized_entry_info(int call_offset);
219
220 void arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack);
221 void arithmetic_idiv(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr temp, LIR_Opr result, CodeEmitInfo* info);
222 void intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr unused, LIR_Opr dest, LIR_Op* op);
223 #ifdef ASSERT
224 void emit_assert(LIR_OpAssert* op);
225 #endif
226
227 void logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest);
228
229 void roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack);
230 void move_op(LIR_Opr src, LIR_Opr result, BasicType type,
231 LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool wide);
232 void volatile_move_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info);
233 void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); // info set for null exceptions
234 void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op);
235 void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result, BasicType type,
236 LIR_Opr cmp_opr1 = LIR_OprFact::illegalOpr, LIR_Opr cmp_opr2 = LIR_OprFact::illegalOpr);
237 void call( LIR_OpJavaCall* op, relocInfo::relocType rtype);
238 void ic_call( LIR_OpJavaCall* op);
239 void vtable_call( LIR_OpJavaCall* op);
240 int store_inline_type_fields_to_buf(ciInlineKlass* vk);
241
242 void osr_entry();
243
244 void build_frame();
245
246 void throw_op(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info);
247 void unwind_op(LIR_Opr exceptionOop);
248 void monitor_address(int monitor_ix, LIR_Opr dst);
249
250 void align_backward_branch_target();
251 void align_call(LIR_Code code);
252
253 void negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp = LIR_OprFact::illegalOpr);
254 void leal(LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code = lir_patch_none, CodeEmitInfo* info = NULL);
255
256 void rt_call(LIR_Opr result, address dest, const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info);
257
258 void membar();
259 void membar_acquire();
260 void membar_release();
261 void membar_loadload();
262 void membar_storestore();
263 void membar_loadstore();
264 void membar_storeload();
265 void on_spin_wait();
266 void get_thread(LIR_Opr result);
267 void check_orig_pc();
268
269 void verify_oop_map(CodeEmitInfo* info);
270
271 void atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr dest, LIR_Opr tmp);
272
273 #include CPU_HEADER(c1_LIRAssembler)
274
275 public:
276 int nr_immediate_oops_patched() const { return _immediate_oops_patched; }
277
278 static int call_stub_size() {
279 return _call_stub_size;
280 }
281
282 static int exception_handler_size() {
283 return _exception_handler_size;
284 }
285
286 static int deopt_handler_size() {
287 return _deopt_handler_size;
|